diff options
Diffstat (limited to 'drivers/gpu/drm/amd/display')
| -rw-r--r-- | drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 5 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc_link.c | 6 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c | 23 | 
3 files changed, 12 insertions, 22 deletions
| diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index fb27783d7a54..3082b55b1e77 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -4533,6 +4533,7 @@ static void handle_cursor_update(struct drm_plane *plane,  	amdgpu_crtc->cursor_width = plane->state->crtc_w;  	amdgpu_crtc->cursor_height = plane->state->crtc_h; +	memset(&attributes, 0, sizeof(attributes));  	attributes.address.high_part = upper_32_bits(address);  	attributes.address.low_part  = lower_32_bits(address);  	attributes.width             = plane->state->crtc_w; @@ -5429,9 +5430,11 @@ static void get_freesync_config_for_crtc(  	struct amdgpu_dm_connector *aconnector =  			to_amdgpu_dm_connector(new_con_state->base.connector);  	struct drm_display_mode *mode = &new_crtc_state->base.mode; +	int vrefresh = drm_mode_vrefresh(mode);  	new_crtc_state->vrr_supported = new_con_state->freesync_capable && -		aconnector->min_vfreq <= drm_mode_vrefresh(mode); +					vrefresh >= aconnector->min_vfreq && +					vrefresh <= aconnector->max_vfreq;  	if (new_crtc_state->vrr_supported) {  		new_crtc_state->stream->ignore_msa_timing_param = true; diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c index 4eba3c4800b6..ea18e9c2d8ce 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c @@ -2660,12 +2660,18 @@ void core_link_enable_stream(  void core_link_disable_stream(struct pipe_ctx *pipe_ctx, int option)  {  	struct dc  *core_dc = pipe_ctx->stream->ctx->dc; +	struct dc_stream_state *stream = pipe_ctx->stream;  	core_dc->hwss.blank_stream(pipe_ctx);  	if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)  		deallocate_mst_payload(pipe_ctx); +	if (dc_is_hdmi_signal(pipe_ctx->stream->signal)) +		dal_ddc_service_write_scdc_data( +			stream->link->ddc, 0, +			stream->timing.flags.LTE_340MCSC_SCRAMBLE); +  	core_dc->hwss.disable_stream(pipe_ctx, option);  	disable_link(pipe_ctx->stream->link, pipe_ctx->stream->signal); diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c index 683829466a44..0ba68d41b9c3 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c @@ -1150,28 +1150,9 @@ void hubp1_cursor_set_position(  	REG_UPDATE(CURSOR_CONTROL,  			CURSOR_ENABLE, cur_en); -	//account for cases where we see negative offset relative to overlay plane -	if (src_x_offset < 0 && src_y_offset < 0) { -		REG_SET_2(CURSOR_POSITION, 0, -			CURSOR_X_POSITION, 0, -			CURSOR_Y_POSITION, 0); -		x_hotspot -= src_x_offset; -		y_hotspot -= src_y_offset; -	} else if (src_x_offset < 0) { -		REG_SET_2(CURSOR_POSITION, 0, -			CURSOR_X_POSITION, 0, -			CURSOR_Y_POSITION, pos->y); -		x_hotspot -= src_x_offset; -	} else if (src_y_offset < 0) { -		REG_SET_2(CURSOR_POSITION, 0, +	REG_SET_2(CURSOR_POSITION, 0,  			CURSOR_X_POSITION, pos->x, -			CURSOR_Y_POSITION, 0); -		y_hotspot -= src_y_offset; -	} else { -		REG_SET_2(CURSOR_POSITION, 0, -				CURSOR_X_POSITION, pos->x, -				CURSOR_Y_POSITION, pos->y); -	} +			CURSOR_Y_POSITION, pos->y);  	REG_SET_2(CURSOR_HOT_SPOT, 0,  			CURSOR_HOT_SPOT_X, x_hotspot, |