diff options
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c | 86 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c | 10 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc_surface.c | 14 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/dc_link_ddc.h | 5 | 
4 files changed, 102 insertions, 13 deletions
| diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c index 985fe8c22875..10a5807a7e8b 100644 --- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c +++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c @@ -70,6 +70,10 @@ static enum bp_result get_firmware_info_v3_1(  	struct bios_parser *bp,  	struct dc_firmware_info *info); +static enum bp_result get_firmware_info_v3_2( +	struct bios_parser *bp, +	struct dc_firmware_info *info); +  static struct atom_hpd_int_record *get_hpd_record(struct bios_parser *bp,  		struct atom_display_object_path_v2 *object); @@ -1321,9 +1325,11 @@ static enum bp_result bios_parser_get_firmware_info(  		case 3:  			switch (revision.minor) {  			case 1: -			case 2:  				result = get_firmware_info_v3_1(bp, info);  				break; +			case 2: +				result = get_firmware_info_v3_2(bp, info); +				break;  			default:  				break;  			} @@ -1383,6 +1389,84 @@ static enum bp_result get_firmware_info_v3_1(  	return BP_RESULT_OK;  } +static enum bp_result get_firmware_info_v3_2( +	struct bios_parser *bp, +	struct dc_firmware_info *info) +{ +	struct atom_firmware_info_v3_2 *firmware_info; +	struct atom_display_controller_info_v4_1 *dce_info = NULL; +	struct atom_common_table_header *header; +	struct atom_data_revision revision; +	struct atom_smu_info_v3_2 *smu_info_v3_2 = NULL; +	struct atom_smu_info_v3_3 *smu_info_v3_3 = NULL; + +	if (!info) +		return BP_RESULT_BADINPUT; + +	firmware_info = GET_IMAGE(struct atom_firmware_info_v3_2, +			DATA_TABLES(firmwareinfo)); + +	dce_info = GET_IMAGE(struct atom_display_controller_info_v4_1, +			DATA_TABLES(dce_info)); + +	if (!firmware_info || !dce_info) +		return BP_RESULT_BADBIOSTABLE; + +	memset(info, 0, sizeof(*info)); + +	header = GET_IMAGE(struct atom_common_table_header, +					DATA_TABLES(smu_info)); +	get_atom_data_table_revision(header, &revision); + +	if (revision.minor == 2) { +		/* Vega12 */ +		smu_info_v3_2 = GET_IMAGE(struct atom_smu_info_v3_2, +							DATA_TABLES(smu_info)); + +		if (!smu_info_v3_2) +			return BP_RESULT_BADBIOSTABLE; + +		info->default_engine_clk = smu_info_v3_2->bootup_dcefclk_10khz * 10; +	} else if (revision.minor == 3) { +		/* Vega20 */ +		smu_info_v3_3 = GET_IMAGE(struct atom_smu_info_v3_3, +							DATA_TABLES(smu_info)); + +		if (!smu_info_v3_3) +			return BP_RESULT_BADBIOSTABLE; + +		info->default_engine_clk = smu_info_v3_3->bootup_dcefclk_10khz * 10; +	} + +	 // We need to convert from 10KHz units into KHz units. +	info->default_memory_clk = firmware_info->bootup_mclk_in10khz * 10; + +	 /* 27MHz for Vega10 & Vega12; 100MHz for Vega20 */ +	info->pll_info.crystal_frequency = dce_info->dce_refclk_10khz * 10; +	/* Hardcode frequency if BIOS gives no DCE Ref Clk */ +	if (info->pll_info.crystal_frequency == 0) { +		if (revision.minor == 2) +			info->pll_info.crystal_frequency = 27000; +		else if (revision.minor == 3) +			info->pll_info.crystal_frequency = 100000; +	} +	/*dp_phy_ref_clk is not correct for atom_display_controller_info_v4_2, but we don't use it*/ +	info->dp_phy_ref_clk     = dce_info->dpphy_refclk_10khz * 10; +	info->i2c_engine_ref_clk = dce_info->i2c_engine_refclk_10khz * 10; + +	/* Get GPU PLL VCO Clock */ +	if (bp->cmd_tbl.get_smu_clock_info != NULL) { +		if (revision.minor == 2) +			info->smu_gpu_pll_output_freq = +					bp->cmd_tbl.get_smu_clock_info(bp, SMU9_SYSPLL0_ID) * 10; +		else if (revision.minor == 3) +			info->smu_gpu_pll_output_freq = +					bp->cmd_tbl.get_smu_clock_info(bp, SMU11_SYSPLL3_0_ID) * 10; +	} + +	return BP_RESULT_OK; +} +  static enum bp_result bios_parser_get_encoder_cap_info(  	struct dc_bios *dcb,  	struct graphics_object_id object_id, diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c index 49c2face1e7a..ae48d603ebd6 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c @@ -629,13 +629,14 @@ bool dal_ddc_service_query_ddc_data(  	return ret;  } -ssize_t dal_ddc_service_read_dpcd_data( +enum ddc_result dal_ddc_service_read_dpcd_data(  	struct ddc_service *ddc,  	bool i2c,  	enum i2c_mot_mode mot,  	uint32_t address,  	uint8_t *data, -	uint32_t len) +	uint32_t len, +	uint32_t *read)  {  	struct aux_payload read_payload = {  		.i2c_over_aux = i2c, @@ -652,6 +653,8 @@ ssize_t dal_ddc_service_read_dpcd_data(  		.mot = mot  	}; +	*read = 0; +  	if (len > DEFAULT_AUX_MAX_DATA_SIZE) {  		BREAK_TO_DEBUGGER();  		return DDC_RESULT_FAILED_INVALID_OPERATION; @@ -661,7 +664,8 @@ ssize_t dal_ddc_service_read_dpcd_data(  		ddc->ctx->i2caux,  		ddc->ddc_pin,  		&command)) { -		return (ssize_t)command.payloads->length; +		*read = command.payloads->length; +		return DDC_RESULT_SUCESSFULL;  	}  	return DDC_RESULT_FAILED_OPERATION; diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_surface.c b/drivers/gpu/drm/amd/display/dc/core/dc_surface.c index ade5b8ee9c3c..132eef3826e2 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_surface.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_surface.c @@ -66,8 +66,8 @@ struct dc_plane_state *dc_create_plane_state(struct dc *dc)  {  	struct dc *core_dc = dc; -	struct dc_plane_state *plane_state = kzalloc(sizeof(*plane_state), -						     GFP_KERNEL); +	struct dc_plane_state *plane_state = kvzalloc(sizeof(*plane_state), +						      GFP_KERNEL);  	if (NULL == plane_state)  		return NULL; @@ -120,7 +120,7 @@ static void dc_plane_state_free(struct kref *kref)  {  	struct dc_plane_state *plane_state = container_of(kref, struct dc_plane_state, refcount);  	destruct(plane_state); -	kfree(plane_state); +	kvfree(plane_state);  }  void dc_plane_state_release(struct dc_plane_state *plane_state) @@ -136,7 +136,7 @@ void dc_gamma_retain(struct dc_gamma *gamma)  static void dc_gamma_free(struct kref *kref)  {  	struct dc_gamma *gamma = container_of(kref, struct dc_gamma, refcount); -	kfree(gamma); +	kvfree(gamma);  }  void dc_gamma_release(struct dc_gamma **gamma) @@ -147,7 +147,7 @@ void dc_gamma_release(struct dc_gamma **gamma)  struct dc_gamma *dc_create_gamma(void)  { -	struct dc_gamma *gamma = kzalloc(sizeof(*gamma), GFP_KERNEL); +	struct dc_gamma *gamma = kvzalloc(sizeof(*gamma), GFP_KERNEL);  	if (gamma == NULL)  		goto alloc_fail; @@ -167,7 +167,7 @@ void dc_transfer_func_retain(struct dc_transfer_func *tf)  static void dc_transfer_func_free(struct kref *kref)  {  	struct dc_transfer_func *tf = container_of(kref, struct dc_transfer_func, refcount); -	kfree(tf); +	kvfree(tf);  }  void dc_transfer_func_release(struct dc_transfer_func *tf) @@ -177,7 +177,7 @@ void dc_transfer_func_release(struct dc_transfer_func *tf)  struct dc_transfer_func *dc_create_transfer_func(void)  { -	struct dc_transfer_func *tf = kzalloc(sizeof(*tf), GFP_KERNEL); +	struct dc_transfer_func *tf = kvzalloc(sizeof(*tf), GFP_KERNEL);  	if (tf == NULL)  		goto alloc_fail; diff --git a/drivers/gpu/drm/amd/display/dc/inc/dc_link_ddc.h b/drivers/gpu/drm/amd/display/dc/inc/dc_link_ddc.h index 090b7a8dd67b..30b3a08b91be 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/dc_link_ddc.h +++ b/drivers/gpu/drm/amd/display/dc/inc/dc_link_ddc.h @@ -102,13 +102,14 @@ bool dal_ddc_service_query_ddc_data(  		uint8_t *read_buf,  		uint32_t read_size); -ssize_t dal_ddc_service_read_dpcd_data( +enum ddc_result dal_ddc_service_read_dpcd_data(  		struct ddc_service *ddc,  		bool i2c,  		enum i2c_mot_mode mot,  		uint32_t address,  		uint8_t *data, -		uint32_t len); +		uint32_t len, +		uint32_t *read);  enum ddc_result dal_ddc_service_write_dpcd_data(  		struct ddc_service *ddc, |