aboutsummaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd/display/dc/bios
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/bios')
-rw-r--r--drivers/gpu/drm/amd/display/dc/bios/bios_parser.c12
-rw-r--r--drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c19
-rw-r--r--drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.c10
-rw-r--r--drivers/gpu/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c36
-rw-r--r--drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c36
-rw-r--r--drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c36
6 files changed, 36 insertions, 113 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
index a4c97d32e751..823843cd2613 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
@@ -23,6 +23,8 @@
*
*/
+#include <linux/slab.h>
+
#include "dm_services.h"
#include "atom.h"
@@ -2541,7 +2543,6 @@ static enum bp_result construct_integrated_info(
/* Sort voltage table from low to high*/
if (result == BP_RESULT_OK) {
- struct clock_voltage_caps temp = {0, 0};
uint32_t i;
uint32_t j;
@@ -2551,10 +2552,8 @@ static enum bp_result construct_integrated_info(
info->disp_clk_voltage[j].max_supported_clk <
info->disp_clk_voltage[j-1].max_supported_clk) {
/* swap j and j - 1*/
- temp = info->disp_clk_voltage[j-1];
- info->disp_clk_voltage[j-1] =
- info->disp_clk_voltage[j];
- info->disp_clk_voltage[j] = temp;
+ swap(info->disp_clk_voltage[j - 1],
+ info->disp_clk_voltage[j]);
}
}
}
@@ -2794,8 +2793,6 @@ static const struct dc_vbios_funcs vbios_funcs = {
.get_device_tag = bios_parser_get_device_tag,
- .get_firmware_info = bios_parser_get_firmware_info,
-
.get_spread_spectrum_info = bios_parser_get_spread_spectrum_info,
.get_ss_entry_number = bios_parser_get_ss_entry_number,
@@ -2920,6 +2917,7 @@ static bool bios_parser_construct(
dal_bios_parser_init_cmd_tbl_helper(&bp->cmd_helper, dce_version);
bp->base.integrated_info = bios_parser_create_integrated_info(&bp->base);
+ bp->base.fw_info_valid = bios_parser_get_firmware_info(&bp->base, &bp->base.fw_info) == BP_RESULT_OK;
return true;
}
diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
index fd5266a58297..7873abea4112 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
@@ -23,6 +23,8 @@
*
*/
+#include <linux/slab.h>
+
#include "dm_services.h"
#include "ObjectID.h"
@@ -1313,6 +1315,8 @@ static enum bp_result bios_parser_get_encoder_cap_info(
ATOM_ENCODER_CAP_RECORD_HBR3_EN) ? 1 : 0;
info->HDMI_6GB_EN = (record->encodercaps &
ATOM_ENCODER_CAP_RECORD_HDMI6Gbps_EN) ? 1 : 0;
+ info->DP_IS_USB_C = (record->encodercaps &
+ ATOM_ENCODER_CAP_RECORD_USB_C_TYPE) ? 1 : 0;
return BP_RESULT_OK;
}
@@ -1398,6 +1402,10 @@ static enum bp_result get_integrated_info_v11(
info->ma_channel_number = info_v11->umachannelnumber;
info->lvds_ss_percentage =
le16_to_cpu(info_v11->lvds_ss_percentage);
+#ifdef CONFIG_DRM_AMD_DC_DCN2_0
+ info->dp_ss_control =
+ le16_to_cpu(info_v11->reserved1);
+#endif
info->lvds_sspread_rate_in_10hz =
le16_to_cpu(info_v11->lvds_ss_rate_10hz);
info->hdmi_ss_percentage =
@@ -1605,8 +1613,6 @@ static enum bp_result construct_integrated_info(
struct atom_common_table_header *header;
struct atom_data_revision revision;
-
- struct clock_voltage_caps temp = {0, 0};
uint32_t i;
uint32_t j;
@@ -1636,10 +1642,8 @@ static enum bp_result construct_integrated_info(
info->disp_clk_voltage[j-1].max_supported_clk
) {
/* swap j and j - 1*/
- temp = info->disp_clk_voltage[j-1];
- info->disp_clk_voltage[j-1] =
- info->disp_clk_voltage[j];
- info->disp_clk_voltage[j] = temp;
+ swap(info->disp_clk_voltage[j - 1],
+ info->disp_clk_voltage[j]);
}
}
}
@@ -1873,8 +1877,6 @@ static const struct dc_vbios_funcs vbios_funcs = {
.get_device_tag = bios_parser_get_device_tag,
- .get_firmware_info = bios_parser_get_firmware_info,
-
.get_spread_spectrum_info = bios_parser_get_spread_spectrum_info,
.get_ss_entry_number = bios_parser_get_ss_entry_number,
@@ -1990,6 +1992,7 @@ static bool bios_parser_construct(
dal_bios_parser_init_cmd_tbl_helper2(&bp->cmd_helper, dce_version);
bp->base.integrated_info = bios_parser_create_integrated_info(&bp->base);
+ bp->base.fw_info_valid = bios_parser_get_firmware_info(&bp->base, &bp->base.fw_info) == BP_RESULT_OK;
return true;
}
diff --git a/drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.c b/drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.c
index 8196f3bb10c7..db153ddf0fee 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.c
@@ -57,12 +57,18 @@ bool dal_bios_parser_init_cmd_tbl_helper2(
return true;
#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
case DCN_VERSION_1_0:
+ case DCN_VERSION_1_01:
*h = dal_cmd_tbl_helper_dce112_get_table2();
return true;
#endif
-#if defined(CONFIG_DRM_AMD_DC_DCN1_01)
- case DCN_VERSION_1_01:
+#if defined(CONFIG_DRM_AMD_DC_DCN2_0)
+ case DCN_VERSION_2_0:
+ *h = dal_cmd_tbl_helper_dce112_get_table2();
+ return true;
+#endif
+#if defined(CONFIG_DRM_AMD_DC_DCN2_1)
+ case DCN_VERSION_2_1:
*h = dal_cmd_tbl_helper_dce112_get_table2();
return true;
#endif
diff --git a/drivers/gpu/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c b/drivers/gpu/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c
index ca24154468c7..11bf247bb180 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c
@@ -153,38 +153,10 @@ static uint8_t hpd_sel_to_atom(enum hpd_source_id id)
static uint8_t dig_encoder_sel_to_atom(enum engine_id id)
{
- uint8_t atom_dig_encoder_sel = 0;
-
- switch (id) {
- case ENGINE_ID_DIGA:
- atom_dig_encoder_sel = ATOM_TRANMSITTER_V5__DIGA_SEL;
- break;
- case ENGINE_ID_DIGB:
- atom_dig_encoder_sel = ATOM_TRANMSITTER_V5__DIGB_SEL;
- break;
- case ENGINE_ID_DIGC:
- atom_dig_encoder_sel = ATOM_TRANMSITTER_V5__DIGC_SEL;
- break;
- case ENGINE_ID_DIGD:
- atom_dig_encoder_sel = ATOM_TRANMSITTER_V5__DIGD_SEL;
- break;
- case ENGINE_ID_DIGE:
- atom_dig_encoder_sel = ATOM_TRANMSITTER_V5__DIGE_SEL;
- break;
- case ENGINE_ID_DIGF:
- atom_dig_encoder_sel = ATOM_TRANMSITTER_V5__DIGF_SEL;
- break;
- case ENGINE_ID_DIGG:
- atom_dig_encoder_sel = ATOM_TRANMSITTER_V5__DIGG_SEL;
- break;
- case ENGINE_ID_UNKNOWN:
- /* No DIG_FRONT is associated to DIG_BACKEND */
- atom_dig_encoder_sel = 0;
- break;
- default:
- atom_dig_encoder_sel = ATOM_TRANMSITTER_V5__DIGA_SEL;
- break;
- }
+ /* On any ASIC after DCE80, we manually program the DIG_FE
+ * selection (see connect_dig_be_to_fe function of the link
+ * encoder), so translation should always return 0 (no FE).
+ */
return 0;
}
diff --git a/drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c b/drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c
index 0237ae575068..755b6e33140a 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c
@@ -150,38 +150,10 @@ static uint8_t hpd_sel_to_atom(enum hpd_source_id id)
static uint8_t dig_encoder_sel_to_atom(enum engine_id id)
{
- uint8_t atom_dig_encoder_sel = 0;
-
- switch (id) {
- case ENGINE_ID_DIGA:
- atom_dig_encoder_sel = ATOM_TRANMSITTER_V6__DIGA_SEL;
- break;
- case ENGINE_ID_DIGB:
- atom_dig_encoder_sel = ATOM_TRANMSITTER_V6__DIGB_SEL;
- break;
- case ENGINE_ID_DIGC:
- atom_dig_encoder_sel = ATOM_TRANMSITTER_V6__DIGC_SEL;
- break;
- case ENGINE_ID_DIGD:
- atom_dig_encoder_sel = ATOM_TRANMSITTER_V6__DIGD_SEL;
- break;
- case ENGINE_ID_DIGE:
- atom_dig_encoder_sel = ATOM_TRANMSITTER_V6__DIGE_SEL;
- break;
- case ENGINE_ID_DIGF:
- atom_dig_encoder_sel = ATOM_TRANMSITTER_V6__DIGF_SEL;
- break;
- case ENGINE_ID_DIGG:
- atom_dig_encoder_sel = ATOM_TRANMSITTER_V6__DIGG_SEL;
- break;
- case ENGINE_ID_UNKNOWN:
- /* No DIG_FRONT is associated to DIG_BACKEND */
- atom_dig_encoder_sel = 0;
- break;
- default:
- atom_dig_encoder_sel = ATOM_TRANMSITTER_V6__DIGA_SEL;
- break;
- }
+ /* On any ASIC after DCE80, we manually program the DIG_FE
+ * selection (see connect_dig_be_to_fe function of the link
+ * encoder), so translation should always return 0 (no FE).
+ */
return 0;
}
diff --git a/drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c b/drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c
index 452034f83e4c..06b4f7fa4a50 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c
@@ -150,38 +150,10 @@ static uint8_t hpd_sel_to_atom(enum hpd_source_id id)
static uint8_t dig_encoder_sel_to_atom(enum engine_id id)
{
- uint8_t atom_dig_encoder_sel = 0;
-
- switch (id) {
- case ENGINE_ID_DIGA:
- atom_dig_encoder_sel = ATOM_TRANMSITTER_V6__DIGA_SEL;
- break;
- case ENGINE_ID_DIGB:
- atom_dig_encoder_sel = ATOM_TRANMSITTER_V6__DIGB_SEL;
- break;
- case ENGINE_ID_DIGC:
- atom_dig_encoder_sel = ATOM_TRANMSITTER_V6__DIGC_SEL;
- break;
- case ENGINE_ID_DIGD:
- atom_dig_encoder_sel = ATOM_TRANMSITTER_V6__DIGD_SEL;
- break;
- case ENGINE_ID_DIGE:
- atom_dig_encoder_sel = ATOM_TRANMSITTER_V6__DIGE_SEL;
- break;
- case ENGINE_ID_DIGF:
- atom_dig_encoder_sel = ATOM_TRANMSITTER_V6__DIGF_SEL;
- break;
- case ENGINE_ID_DIGG:
- atom_dig_encoder_sel = ATOM_TRANMSITTER_V6__DIGG_SEL;
- break;
- case ENGINE_ID_UNKNOWN:
- /* No DIG_FRONT is associated to DIG_BACKEND */
- atom_dig_encoder_sel = 0;
- break;
- default:
- atom_dig_encoder_sel = ATOM_TRANMSITTER_V6__DIGA_SEL;
- break;
- }
+ /* On any ASIC after DCE80, we manually program the DIG_FE
+ * selection (see connect_dig_be_to_fe function of the link
+ * encoder), so translation should always return 0 (no FE).
+ */
return 0;
}