diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu.h')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu.h | 14 | 
1 files changed, 8 insertions, 6 deletions
| diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index ae9371b172e3..e3e2e6e3b485 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -82,7 +82,6 @@  #include "amdgpu_vce.h"  #include "amdgpu_vcn.h"  #include "amdgpu_jpeg.h" -#include "amdgpu_mn.h"  #include "amdgpu_gmc.h"  #include "amdgpu_gfx.h"  #include "amdgpu_sdma.h" @@ -196,6 +195,7 @@ extern int amdgpu_emu_mode;  extern uint amdgpu_smu_memory_pool_size;  extern int amdgpu_smu_pptable_id;  extern uint amdgpu_dc_feature_mask; +extern uint amdgpu_freesync_vid_mode;  extern uint amdgpu_dc_debug_mask;  extern uint amdgpu_dc_visual_confirm;  extern uint amdgpu_dm_abm_level; @@ -219,10 +219,12 @@ extern int amdgpu_use_xgmi_p2p;  extern int sched_policy;  extern bool debug_evictions;  extern bool no_system_mem_limit; +extern int halt_if_hws_hang;  #else  static const int __maybe_unused sched_policy = KFD_SCHED_POLICY_HWS;  static const bool __maybe_unused debug_evictions; /* = false */  static const bool __maybe_unused no_system_mem_limit; +static const int __maybe_unused halt_if_hws_hang;  #endif  #ifdef CONFIG_HSA_AMD_P2P  extern bool pcie_p2p; @@ -274,9 +276,6 @@ extern int amdgpu_vcnfw_log;  #define AMDGPU_RESET_VCE			(1 << 13)  #define AMDGPU_RESET_VCE1			(1 << 14) -#define AMDGPU_RESET_LEVEL_SOFT_RECOVERY (1 << 0) -#define AMDGPU_RESET_LEVEL_MODE2 (1 << 1) -  /* max cursor sizes (in pixels) */  #define CIK_CURSOR_WIDTH 128  #define CIK_CURSOR_HEIGHT 128 @@ -678,7 +677,7 @@ enum amd_hw_ip_block_type {  	MAX_HWIP  }; -#define HWIP_MAX_INSTANCE	11 +#define HWIP_MAX_INSTANCE	28  #define HW_ID_MAX		300  #define IP_VERSION(mj, mn, rv) (((mj) << 16) | ((mn) << 8) | (rv)) @@ -1065,8 +1064,8 @@ struct amdgpu_device {  	struct work_struct		reset_work; -	uint32_t						amdgpu_reset_level_mask;  	bool                            job_hang; +	bool                            dc_enabled;  };  static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev) @@ -1124,6 +1123,8 @@ void amdgpu_device_indirect_wreg64(struct amdgpu_device *adev,  bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type);  bool amdgpu_device_has_dc_support(struct amdgpu_device *adev); +void amdgpu_device_set_sriov_virtual_display(struct amdgpu_device *adev); +  int amdgpu_device_pre_asic_reset(struct amdgpu_device *adev,  				 struct amdgpu_reset_context *reset_context); @@ -1297,6 +1298,7 @@ void amdgpu_device_pcie_port_wreg(struct amdgpu_device *adev,  				u32 reg, u32 v);  struct dma_fence *amdgpu_device_switch_gang(struct amdgpu_device *adev,  					    struct dma_fence *gang); +bool amdgpu_device_has_display_hardware(struct amdgpu_device *adev);  /* atpx handler */  #if defined(CONFIG_VGA_SWITCHEROO) |