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-rw-r--r--drivers/edac/Kconfig8
-rw-r--r--drivers/edac/amd64_edac_inj.c10
-rw-r--r--drivers/edac/edac_mc.c9
-rw-r--r--drivers/edac/edac_mc_sysfs.c30
-rw-r--r--drivers/edac/i5100_edac.c2
-rw-r--r--drivers/edac/i7core_edac.c10
-rw-r--r--drivers/edac/mce_amd.c5
-rw-r--r--drivers/edac/mce_amd_inj.c4
8 files changed, 45 insertions, 33 deletions
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index e443f2c1dfd1..878f09005fad 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -145,7 +145,7 @@ config EDAC_E7XXX
config EDAC_E752X
tristate "Intel e752x (e7520, e7525, e7320) and 3100"
- depends on EDAC_MM_EDAC && PCI && X86 && HOTPLUG
+ depends on EDAC_MM_EDAC && PCI && X86
help
Support for error detection and correction on the Intel
E7520, E7525, E7320 server chipsets.
@@ -349,21 +349,21 @@ config EDAC_OCTEON_PC
config EDAC_OCTEON_L2C
tristate "Cavium Octeon Secondary Caches (L2C)"
- depends on EDAC_MM_EDAC && CPU_CAVIUM_OCTEON
+ depends on EDAC_MM_EDAC && CAVIUM_OCTEON_SOC
help
Support for error detection and correction on the
Cavium Octeon family of SOCs.
config EDAC_OCTEON_LMC
tristate "Cavium Octeon DRAM Memory Controller (LMC)"
- depends on EDAC_MM_EDAC && CPU_CAVIUM_OCTEON
+ depends on EDAC_MM_EDAC && CAVIUM_OCTEON_SOC
help
Support for error detection and correction on the
Cavium Octeon family of SOCs.
config EDAC_OCTEON_PCI
tristate "Cavium Octeon PCI Controller"
- depends on EDAC_MM_EDAC && PCI && CPU_CAVIUM_OCTEON
+ depends on EDAC_MM_EDAC && PCI && CAVIUM_OCTEON_SOC
help
Support for error detection and correction on the
Cavium Octeon family of SOCs.
diff --git a/drivers/edac/amd64_edac_inj.c b/drivers/edac/amd64_edac_inj.c
index 845f04786c2d..0d66ae68d468 100644
--- a/drivers/edac/amd64_edac_inj.c
+++ b/drivers/edac/amd64_edac_inj.c
@@ -24,7 +24,7 @@ static ssize_t amd64_inject_section_store(struct device *dev,
unsigned long value;
int ret;
- ret = strict_strtoul(data, 10, &value);
+ ret = kstrtoul(data, 10, &value);
if (ret < 0)
return ret;
@@ -61,7 +61,7 @@ static ssize_t amd64_inject_word_store(struct device *dev,
unsigned long value;
int ret;
- ret = strict_strtoul(data, 10, &value);
+ ret = kstrtoul(data, 10, &value);
if (ret < 0)
return ret;
@@ -97,7 +97,7 @@ static ssize_t amd64_inject_ecc_vector_store(struct device *dev,
unsigned long value;
int ret;
- ret = strict_strtoul(data, 16, &value);
+ ret = kstrtoul(data, 16, &value);
if (ret < 0)
return ret;
@@ -124,7 +124,7 @@ static ssize_t amd64_inject_read_store(struct device *dev,
u32 section, word_bits;
int ret;
- ret = strict_strtoul(data, 10, &value);
+ ret = kstrtoul(data, 10, &value);
if (ret < 0)
return ret;
@@ -157,7 +157,7 @@ static ssize_t amd64_inject_write_store(struct device *dev,
unsigned long value;
int ret;
- ret = strict_strtoul(data, 10, &value);
+ ret = kstrtoul(data, 10, &value);
if (ret < 0)
return ret;
diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c
index 27e86d938262..89e109022d78 100644
--- a/drivers/edac/edac_mc.c
+++ b/drivers/edac/edac_mc.c
@@ -48,6 +48,8 @@ static LIST_HEAD(mc_devices);
*/
static void const *edac_mc_owner;
+static struct bus_type mc_bus[EDAC_MAX_MCS];
+
unsigned edac_dimm_info_location(struct dimm_info *dimm, char *buf,
unsigned len)
{
@@ -723,6 +725,11 @@ int edac_mc_add_mc(struct mem_ctl_info *mci)
int ret = -EINVAL;
edac_dbg(0, "\n");
+ if (mci->mc_idx >= EDAC_MAX_MCS) {
+ pr_warn_once("Too many memory controllers: %d\n", mci->mc_idx);
+ return -ENODEV;
+ }
+
#ifdef CONFIG_EDAC_DEBUG
if (edac_debug_level >= 3)
edac_mc_dump_mci(mci);
@@ -762,6 +769,8 @@ int edac_mc_add_mc(struct mem_ctl_info *mci)
/* set load time so that error rate can be tracked */
mci->start_time = jiffies;
+ mci->bus = &mc_bus[mci->mc_idx];
+
if (edac_create_sysfs_mci_device(mci)) {
edac_mc_printk(mci, KERN_WARNING,
"failed to create sysfs device\n");
diff --git a/drivers/edac/edac_mc_sysfs.c b/drivers/edac/edac_mc_sysfs.c
index 67610a6ebf87..e7c32c4f7837 100644
--- a/drivers/edac/edac_mc_sysfs.c
+++ b/drivers/edac/edac_mc_sysfs.c
@@ -370,7 +370,7 @@ static int edac_create_csrow_object(struct mem_ctl_info *mci,
return -ENODEV;
csrow->dev.type = &csrow_attr_type;
- csrow->dev.bus = &mci->bus;
+ csrow->dev.bus = mci->bus;
device_initialize(&csrow->dev);
csrow->dev.parent = &mci->dev;
csrow->mci = mci;
@@ -605,7 +605,7 @@ static int edac_create_dimm_object(struct mem_ctl_info *mci,
dimm->mci = mci;
dimm->dev.type = &dimm_attr_type;
- dimm->dev.bus = &mci->bus;
+ dimm->dev.bus = mci->bus;
device_initialize(&dimm->dev);
dimm->dev.parent = &mci->dev;
@@ -678,7 +678,7 @@ static ssize_t mci_sdram_scrub_rate_store(struct device *dev,
unsigned long bandwidth = 0;
int new_bw = 0;
- if (strict_strtoul(data, 10, &bandwidth) < 0)
+ if (kstrtoul(data, 10, &bandwidth) < 0)
return -EINVAL;
new_bw = mci->set_sdram_scrub_rate(mci, bandwidth);
@@ -975,11 +975,13 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
* The memory controller needs its own bus, in order to avoid
* namespace conflicts at /sys/bus/edac.
*/
- mci->bus.name = kasprintf(GFP_KERNEL, "mc%d", mci->mc_idx);
- if (!mci->bus.name)
+ mci->bus->name = kasprintf(GFP_KERNEL, "mc%d", mci->mc_idx);
+ if (!mci->bus->name)
return -ENOMEM;
- edac_dbg(0, "creating bus %s\n", mci->bus.name);
- err = bus_register(&mci->bus);
+
+ edac_dbg(0, "creating bus %s\n", mci->bus->name);
+
+ err = bus_register(mci->bus);
if (err < 0)
return err;
@@ -988,7 +990,7 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
device_initialize(&mci->dev);
mci->dev.parent = mci_pdev;
- mci->dev.bus = &mci->bus;
+ mci->dev.bus = mci->bus;
dev_set_name(&mci->dev, "mc%d", mci->mc_idx);
dev_set_drvdata(&mci->dev, mci);
pm_runtime_forbid(&mci->dev);
@@ -997,8 +999,8 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
err = device_add(&mci->dev);
if (err < 0) {
edac_dbg(1, "failure: create device %s\n", dev_name(&mci->dev));
- bus_unregister(&mci->bus);
- kfree(mci->bus.name);
+ bus_unregister(mci->bus);
+ kfree(mci->bus->name);
return err;
}
@@ -1064,8 +1066,8 @@ fail:
}
fail2:
device_unregister(&mci->dev);
- bus_unregister(&mci->bus);
- kfree(mci->bus.name);
+ bus_unregister(mci->bus);
+ kfree(mci->bus->name);
return err;
}
@@ -1098,8 +1100,8 @@ void edac_unregister_sysfs(struct mem_ctl_info *mci)
{
edac_dbg(1, "Unregistering device %s\n", dev_name(&mci->dev));
device_unregister(&mci->dev);
- bus_unregister(&mci->bus);
- kfree(mci->bus.name);
+ bus_unregister(mci->bus);
+ kfree(mci->bus->name);
}
static void mc_attr_release(struct device *dev)
diff --git a/drivers/edac/i5100_edac.c b/drivers/edac/i5100_edac.c
index 1b635178cc44..157b934e8ce3 100644
--- a/drivers/edac/i5100_edac.c
+++ b/drivers/edac/i5100_edac.c
@@ -974,7 +974,7 @@ static int i5100_setup_debugfs(struct mem_ctl_info *mci)
if (!i5100_debugfs)
return -ENODEV;
- priv->debugfs = debugfs_create_dir(mci->bus.name, i5100_debugfs);
+ priv->debugfs = debugfs_create_dir(mci->bus->name, i5100_debugfs);
if (!priv->debugfs)
return -ENOMEM;
diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c
index 0ec3e95a12cd..80a963d64e58 100644
--- a/drivers/edac/i7core_edac.c
+++ b/drivers/edac/i7core_edac.c
@@ -704,7 +704,7 @@ static ssize_t i7core_inject_section_store(struct device *dev,
if (pvt->inject.enable)
disable_inject(mci);
- rc = strict_strtoul(data, 10, &value);
+ rc = kstrtoul(data, 10, &value);
if ((rc < 0) || (value > 3))
return -EIO;
@@ -741,7 +741,7 @@ struct i7core_pvt *pvt = mci->pvt_info;
if (pvt->inject.enable)
disable_inject(mci);
- rc = strict_strtoul(data, 10, &value);
+ rc = kstrtoul(data, 10, &value);
if ((rc < 0) || (value > 7))
return -EIO;
@@ -781,7 +781,7 @@ static ssize_t i7core_inject_eccmask_store(struct device *dev,
if (pvt->inject.enable)
disable_inject(mci);
- rc = strict_strtoul(data, 10, &value);
+ rc = kstrtoul(data, 10, &value);
if (rc < 0)
return -EIO;
@@ -830,7 +830,7 @@ static ssize_t i7core_inject_store_##param( \
if (!strcasecmp(data, "any") || !strcasecmp(data, "any\n"))\
value = -1; \
else { \
- rc = strict_strtoul(data, 10, &value); \
+ rc = kstrtoul(data, 10, &value); \
if ((rc < 0) || (value >= limit)) \
return -EIO; \
} \
@@ -934,7 +934,7 @@ static ssize_t i7core_inject_enable_store(struct device *dev,
if (!pvt->pci_ch[pvt->inject.channel][0])
return 0;
- rc = strict_strtoul(data, 10, &enable);
+ rc = kstrtoul(data, 10, &enable);
if ((rc < 0))
return 0;
diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c
index f3f0c930d550..30f7309446a6 100644
--- a/drivers/edac/mce_amd.c
+++ b/drivers/edac/mce_amd.c
@@ -134,7 +134,8 @@ static const char * const mc5_mce_desc[] = {
"Physical register file AG0 port",
"Physical register file AG1 port",
"Flag register file",
- "DE error occurred"
+ "DE error occurred",
+ "Retire status queue"
};
static bool f12h_mc0_mce(u16 ec, u8 xec)
@@ -624,7 +625,7 @@ static void decode_mc5_mce(struct mce *m)
if (xec == 0x0 || xec == 0xc)
pr_cont("%s.\n", mc5_mce_desc[xec]);
- else if (xec < 0xd)
+ else if (xec <= 0xd)
pr_cont("%s parity error.\n", mc5_mce_desc[xec]);
else
goto wrong_mc5_mce;
diff --git a/drivers/edac/mce_amd_inj.c b/drivers/edac/mce_amd_inj.c
index 2ae78f20cc28..5e46a9fea31b 100644
--- a/drivers/edac/mce_amd_inj.c
+++ b/drivers/edac/mce_amd_inj.c
@@ -43,7 +43,7 @@ static ssize_t edac_inject_##reg##_store(struct kobject *kobj, \
int ret = 0; \
unsigned long value; \
\
- ret = strict_strtoul(data, 16, &value); \
+ ret = kstrtoul(data, 16, &value); \
if (ret < 0) \
printk(KERN_ERR "Error writing MCE " #reg " field.\n"); \
\
@@ -83,7 +83,7 @@ static ssize_t edac_inject_bank_store(struct kobject *kobj,
int ret = 0;
unsigned long value;
- ret = strict_strtoul(data, 10, &value);
+ ret = kstrtoul(data, 10, &value);
if (ret < 0) {
printk(KERN_ERR "Invalid bank value!\n");
return -EINVAL;
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