diff options
Diffstat (limited to 'arch/sparc/include/asm')
| -rw-r--r-- | arch/sparc/include/asm/cacheflush_64.h | 5 | ||||
| -rw-r--r-- | arch/sparc/include/asm/pgtable_32.h | 29 | ||||
| -rw-r--r-- | arch/sparc/include/asm/pgtable_64.h | 42 | ||||
| -rw-r--r-- | arch/sparc/include/asm/pgtsrmmu.h | 14 | ||||
| -rw-r--r-- | arch/sparc/include/asm/thread_info_32.h | 6 | ||||
| -rw-r--r-- | arch/sparc/include/asm/thread_info_64.h | 12 | 
6 files changed, 12 insertions, 96 deletions
| diff --git a/arch/sparc/include/asm/cacheflush_64.h b/arch/sparc/include/asm/cacheflush_64.h index 38965379e350..68513c41e10d 100644 --- a/arch/sparc/include/asm/cacheflush_64.h +++ b/arch/sparc/include/asm/cacheflush_64.h @@ -74,11 +74,6 @@ void flush_ptrace_access(struct vm_area_struct *, struct page *,  #define flush_cache_vmap(start, end)		do { } while (0)  #define flush_cache_vunmap(start, end)		do { } while (0) -#ifdef CONFIG_DEBUG_PAGEALLOC -/* internal debugging function */ -void kernel_map_pages(struct page *page, int numpages, int enable); -#endif -  #endif /* !__ASSEMBLY__ */  #endif /* _SPARC64_CACHEFLUSH_H */ diff --git a/arch/sparc/include/asm/pgtable_32.h b/arch/sparc/include/asm/pgtable_32.h index b9b91ae19fe1..f06b36a00a3b 100644 --- a/arch/sparc/include/asm/pgtable_32.h +++ b/arch/sparc/include/asm/pgtable_32.h @@ -44,7 +44,7 @@ unsigned long __init bootmem_init(unsigned long *pages_avail);  #define PTRS_PER_PMD    	SRMMU_PTRS_PER_PMD  #define PTRS_PER_PGD    	SRMMU_PTRS_PER_PGD  #define USER_PTRS_PER_PGD	PAGE_OFFSET / SRMMU_PGDIR_SIZE -#define FIRST_USER_ADDRESS	0 +#define FIRST_USER_ADDRESS	0UL  #define PTE_SIZE		(PTRS_PER_PTE*4)  #define PAGE_NONE	SRMMU_PAGE_NONE @@ -102,7 +102,8 @@ extern unsigned long empty_zero_page;   */  static inline unsigned long srmmu_swap(unsigned long *addr, unsigned long value)  { -	__asm__ __volatile__("swap [%2], %0" : "=&r" (value) : "0" (value), "r" (addr)); +	__asm__ __volatile__("swap [%2], %0" : +			"=&r" (value) : "0" (value), "r" (addr) : "memory");  	return value;  } @@ -221,14 +222,6 @@ static inline int pte_young(pte_t pte)  	return pte_val(pte) & SRMMU_REF;  } -/* - * The following only work if pte_present() is not true. - */ -static inline int pte_file(pte_t pte) -{ -	return pte_val(pte) & SRMMU_FILE; -} -  static inline int pte_special(pte_t pte)  {  	return 0; @@ -375,22 +368,6 @@ static inline swp_entry_t __swp_entry(unsigned long type, unsigned long offset)  #define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val(pte) })  #define __swp_entry_to_pte(x)		((pte_t) { (x).val }) -/* file-offset-in-pte helpers */ -static inline unsigned long pte_to_pgoff(pte_t pte) -{ -	return pte_val(pte) >> SRMMU_PTE_FILE_SHIFT; -} - -static inline pte_t pgoff_to_pte(unsigned long pgoff) -{ -	return __pte((pgoff << SRMMU_PTE_FILE_SHIFT) | SRMMU_FILE); -} - -/* - * This is made a constant because mm/fremap.c required a constant. - */ -#define PTE_FILE_MAX_BITS 24 -  static inline unsigned long  __get_phys (unsigned long addr)  { diff --git a/arch/sparc/include/asm/pgtable_64.h b/arch/sparc/include/asm/pgtable_64.h index 1ff9e7864168..dc165ebdf05a 100644 --- a/arch/sparc/include/asm/pgtable_64.h +++ b/arch/sparc/include/asm/pgtable_64.h @@ -93,7 +93,7 @@ bool kern_addr_valid(unsigned long addr);  #define PTRS_PER_PGD	(1UL << PGDIR_BITS)  /* Kernel has a separate 44bit address space. */ -#define FIRST_USER_ADDRESS	0 +#define FIRST_USER_ADDRESS	0UL  #define pmd_ERROR(e)							\  	pr_err("%s:%d: bad pmd %p(%016lx) seen at (%pS)\n",		\ @@ -137,7 +137,6 @@ bool kern_addr_valid(unsigned long addr);  #define _PAGE_SOFT_4U	  _AC(0x0000000000001F80,UL) /* Software bits:       */  #define _PAGE_EXEC_4U	  _AC(0x0000000000001000,UL) /* Executable SW bit    */  #define _PAGE_MODIFIED_4U _AC(0x0000000000000800,UL) /* Modified (dirty)     */ -#define _PAGE_FILE_4U	  _AC(0x0000000000000800,UL) /* Pagecache page       */  #define _PAGE_ACCESSED_4U _AC(0x0000000000000400,UL) /* Accessed (ref'd)     */  #define _PAGE_READ_4U	  _AC(0x0000000000000200,UL) /* Readable SW Bit      */  #define _PAGE_WRITE_4U	  _AC(0x0000000000000100,UL) /* Writable SW Bit      */ @@ -167,7 +166,6 @@ bool kern_addr_valid(unsigned long addr);  #define _PAGE_EXEC_4V	  _AC(0x0000000000000080,UL) /* Executable Page      */  #define _PAGE_W_4V	  _AC(0x0000000000000040,UL) /* Writable             */  #define _PAGE_SOFT_4V	  _AC(0x0000000000000030,UL) /* Software bits        */ -#define _PAGE_FILE_4V	  _AC(0x0000000000000020,UL) /* Pagecache page       */  #define _PAGE_PRESENT_4V  _AC(0x0000000000000010,UL) /* Present              */  #define _PAGE_RESV_4V	  _AC(0x0000000000000008,UL) /* Reserved             */  #define _PAGE_SZ16GB_4V	  _AC(0x0000000000000007,UL) /* 16GB Page            */ @@ -332,22 +330,6 @@ static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)  }  #endif -static inline pte_t pgoff_to_pte(unsigned long off) -{ -	off <<= PAGE_SHIFT; - -	__asm__ __volatile__( -	"\n661:	or		%0, %2, %0\n" -	"	.section	.sun4v_1insn_patch, \"ax\"\n" -	"	.word		661b\n" -	"	or		%0, %3, %0\n" -	"	.previous\n" -	: "=r" (off) -	: "0" (off), "i" (_PAGE_FILE_4U), "i" (_PAGE_FILE_4V)); - -	return __pte(off); -} -  static inline pgprot_t pgprot_noncached(pgprot_t prot)  {  	unsigned long val = pgprot_val(prot); @@ -609,22 +591,6 @@ static inline unsigned long pte_exec(pte_t pte)  	return (pte_val(pte) & mask);  } -static inline unsigned long pte_file(pte_t pte) -{ -	unsigned long val = pte_val(pte); - -	__asm__ __volatile__( -	"\n661:	and		%0, %2, %0\n" -	"	.section	.sun4v_1insn_patch, \"ax\"\n" -	"	.word		661b\n" -	"	and		%0, %3, %0\n" -	"	.previous\n" -	: "=r" (val) -	: "0" (val), "i" (_PAGE_FILE_4U), "i" (_PAGE_FILE_4V)); - -	return val; -} -  static inline unsigned long pte_present(pte_t pte)  {  	unsigned long val = pte_val(pte); @@ -971,12 +937,6 @@ pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);  #define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val(pte) })  #define __swp_entry_to_pte(x)		((pte_t) { (x).val }) -/* File offset in PTE support. */ -unsigned long pte_file(pte_t); -#define pte_to_pgoff(pte)	(pte_val(pte) >> PAGE_SHIFT) -pte_t pgoff_to_pte(unsigned long); -#define PTE_FILE_MAX_BITS	(64UL - PAGE_SHIFT - 1UL) -  int page_in_phys_avail(unsigned long paddr);  /* diff --git a/arch/sparc/include/asm/pgtsrmmu.h b/arch/sparc/include/asm/pgtsrmmu.h index 79da17866fa8..ae51a111a8c7 100644 --- a/arch/sparc/include/asm/pgtsrmmu.h +++ b/arch/sparc/include/asm/pgtsrmmu.h @@ -80,10 +80,6 @@  #define SRMMU_PRIV         0x1c  #define SRMMU_PRIV_RDONLY  0x18 -#define SRMMU_FILE         0x40	/* Implemented in software */ - -#define SRMMU_PTE_FILE_SHIFT     8	/* == 32-PTE_FILE_MAX_BITS */ -  #define SRMMU_CHG_MASK    (0xffffff00 | SRMMU_REF | SRMMU_DIRTY)  /* SRMMU swap entry encoding @@ -94,13 +90,13 @@   * oooooooooooooooooootttttRRRRRRRR   * fedcba9876543210fedcba9876543210   * - * The bottom 8 bits are reserved for protection and status bits, especially - * FILE and PRESENT. + * The bottom 7 bits are reserved for protection and status bits, especially + * PRESENT.   */  #define SRMMU_SWP_TYPE_MASK	0x1f -#define SRMMU_SWP_TYPE_SHIFT	SRMMU_PTE_FILE_SHIFT -#define SRMMU_SWP_OFF_MASK	0x7ffff -#define SRMMU_SWP_OFF_SHIFT	(SRMMU_PTE_FILE_SHIFT + 5) +#define SRMMU_SWP_TYPE_SHIFT	7 +#define SRMMU_SWP_OFF_MASK	0xfffff +#define SRMMU_SWP_OFF_SHIFT	(SRMMU_SWP_TYPE_SHIFT + 5)  /* Some day I will implement true fine grained access bits for   * user pages because the SRMMU gives us the capabilities to diff --git a/arch/sparc/include/asm/thread_info_32.h b/arch/sparc/include/asm/thread_info_32.h index 025c98446b1e..fd7bd0a440ca 100644 --- a/arch/sparc/include/asm/thread_info_32.h +++ b/arch/sparc/include/asm/thread_info_32.h @@ -47,8 +47,6 @@ struct thread_info {  	struct reg_window32	reg_window[NSWINS];	/* align for ldd! */  	unsigned long		rwbuf_stkptrs[NSWINS];  	unsigned long		w_saved; - -	struct restart_block	restart_block;  };  /* @@ -62,9 +60,6 @@ struct thread_info {  	.flags		=	0,			\  	.cpu		=	0,			\  	.preempt_count	=	INIT_PREEMPT_COUNT,	\ -	.restart_block	= {				\ -		.fn	=	do_no_restart_syscall,	\ -	},						\  }  #define init_thread_info	(init_thread_union.thread_info) @@ -103,7 +98,6 @@ register struct thread_info *current_thread_info_reg asm("g6");  #define TI_REG_WINDOW	0x30  #define TI_RWIN_SPTRS	0x230  #define TI_W_SAVED	0x250 -/* #define TI_RESTART_BLOCK 0x25n */ /* Nobody cares */  /*   * thread information flag bit numbers diff --git a/arch/sparc/include/asm/thread_info_64.h b/arch/sparc/include/asm/thread_info_64.h index 798f0279a4b5..ff455164732a 100644 --- a/arch/sparc/include/asm/thread_info_64.h +++ b/arch/sparc/include/asm/thread_info_64.h @@ -58,8 +58,6 @@ struct thread_info {  	unsigned long		gsr[7];  	unsigned long		xfsr[7]; -	struct restart_block	restart_block; -  	struct pt_regs		*kern_una_regs;  	unsigned int		kern_una_insn; @@ -92,10 +90,9 @@ struct thread_info {  #define TI_RWIN_SPTRS	0x000003c8  #define TI_GSR		0x00000400  #define TI_XFSR		0x00000438 -#define TI_RESTART_BLOCK 0x00000470 -#define TI_KUNA_REGS	0x000004a0 -#define TI_KUNA_INSN	0x000004a8 -#define TI_FPREGS	0x000004c0 +#define TI_KUNA_REGS	0x00000470 +#define TI_KUNA_INSN	0x00000478 +#define TI_FPREGS	0x00000480  /* We embed this in the uppermost byte of thread_info->flags */  #define FAULT_CODE_WRITE	0x01	/* Write access, implies D-TLB	   */ @@ -124,9 +121,6 @@ struct thread_info {  	.current_ds	=	ASI_P,			\  	.exec_domain	=	&default_exec_domain,	\  	.preempt_count	=	INIT_PREEMPT_COUNT,	\ -	.restart_block	= {				\ -		.fn	=	do_no_restart_syscall,	\ -	},						\  }  #define init_thread_info	(init_thread_union.thread_info) |