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-rw-r--r--arch/sh/drivers/dma/Kconfig20
-rw-r--r--arch/sh/drivers/pci/ops-sh7785lcr.c14
-rw-r--r--arch/sh/drivers/pci/pci-sh7780.c16
-rw-r--r--arch/sh/drivers/pci/pci-sh7780.h2
-rw-r--r--arch/sh/drivers/pci/pci.c3
5 files changed, 30 insertions, 25 deletions
diff --git a/arch/sh/drivers/dma/Kconfig b/arch/sh/drivers/dma/Kconfig
index f13a05285a9d..666713ac5fcf 100644
--- a/arch/sh/drivers/dma/Kconfig
+++ b/arch/sh/drivers/dma/Kconfig
@@ -12,21 +12,25 @@ config SH_DMA
config SH_DMA_IRQ_MULTI
bool
depends on SH_DMA
- default y if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7751 || \
- CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || \
- CPU_SUBTYPE_SH7091 || CPU_SUBTYPE_SH7763 || CPU_SUBTYPE_SH7764 || \
- CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
+ default y if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7751 || \
+ CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7750R || \
+ CPU_SUBTYPE_SH7751R || CPU_SUBTYPE_SH7091 || \
+ CPU_SUBTYPE_SH7763 || CPU_SUBTYPE_SH7764 || \
+ CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
config NR_ONCHIP_DMA_CHANNELS
int
depends on SH_DMA
- default "4" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7750S
- default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || CPU_SUBTYPE_SH7760
- default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
+ default "4" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7751 || \
+ CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7091
+ default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || \
+ CPU_SUBTYPE_SH7760
+ default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7780 || \
+ CPU_SUBTYPE_SH7785
default "6"
help
This allows you to specify the number of channels that the on-chip
- DMAC supports. This will be 4 for SH7750/SH7751 and 8 for the
+ DMAC supports. This will be 4 for SH7091/SH7750/SH7751 and 8 for the
SH7750R/SH7751R.
config NR_DMA_CHANNELS_BOOL
diff --git a/arch/sh/drivers/pci/ops-sh7785lcr.c b/arch/sh/drivers/pci/ops-sh7785lcr.c
index b3bd68702059..fb0869f0bef8 100644
--- a/arch/sh/drivers/pci/ops-sh7785lcr.c
+++ b/arch/sh/drivers/pci/ops-sh7785lcr.c
@@ -48,13 +48,13 @@ EXPORT_SYMBOL(board_pci_channels);
static struct sh4_pci_address_map sh7785_pci_map = {
.window0 = {
- .base = SH7780_CS2_BASE_ADDR,
- .size = 0x04000000,
- },
-
- .window1 = {
- .base = SH7780_CS3_BASE_ADDR,
- .size = 0x04000000,
+#if defined(CONFIG_32BIT)
+ .base = SH7780_32BIT_DDR_BASE_ADDR,
+ .size = 0x40000000,
+#else
+ .base = SH7780_CS0_BASE_ADDR,
+ .size = 0x20000000,
+#endif
},
.flags = SH4_PCIC_NO_RESET,
diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c
index 773d575a04b9..bae6a2cf047d 100644
--- a/arch/sh/drivers/pci/pci-sh7780.c
+++ b/arch/sh/drivers/pci/pci-sh7780.c
@@ -120,19 +120,15 @@ int __init sh7780_pcic_init(struct sh4_pci_address_map *map)
/* Set IO and Mem windows to local address
* Make PCI and local address the same for easy 1 to 1 mapping
- * Window0 = map->window0.size @ non-cached area base = SDRAM
- * Window1 = map->window1.size @ cached area base = SDRAM
*/
- word = (CONFIG_MEMORY_SIZE - 0x00100000) | 0x00000001;
- pci_write_reg(word, SH4_PCILSR0);
- pci_write_reg(0x00000001, SH4_PCILSR1);
+ pci_write_reg(map->window0.size - 0xfffff, SH4_PCILSR0);
+ pci_write_reg(map->window1.size - 0xfffff, SH4_PCILSR1);
/* Set the values on window 0 PCI config registers */
- word = CONFIG_MEMORY_START | (CONFIG_MEMORY_SIZE - 0x01000000);
- pci_write_reg(word, SH4_PCILAR0);
- pci_write_reg(word, SH7780_PCIMBAR0);
+ pci_write_reg(map->window0.base, SH4_PCILAR0);
+ pci_write_reg(map->window0.base, SH7780_PCIMBAR0);
/* Set the values on window 1 PCI config registers */
- pci_write_reg(0x00000000, SH4_PCILAR1);
- pci_write_reg(0x00000000, SH7780_PCIMBAR1);
+ pci_write_reg(map->window1.base, SH4_PCILAR1);
+ pci_write_reg(map->window1.base, SH7780_PCIMBAR1);
/* Map IO space into PCI IO window
* The IO window is 64K-PCIBIOS_MIN_IO in size
diff --git a/arch/sh/drivers/pci/pci-sh7780.h b/arch/sh/drivers/pci/pci-sh7780.h
index 97b2c98f05c4..93adc7119b79 100644
--- a/arch/sh/drivers/pci/pci-sh7780.h
+++ b/arch/sh/drivers/pci/pci-sh7780.h
@@ -104,6 +104,8 @@
#define SH7780_CS5_BASE_ADDR (SH7780_CS4_BASE_ADDR + SH7780_MEM_REGION_SIZE)
#define SH7780_CS6_BASE_ADDR (SH7780_CS5_BASE_ADDR + SH7780_MEM_REGION_SIZE)
+#define SH7780_32BIT_DDR_BASE_ADDR 0x40000000
+
struct sh4_pci_address_map;
/* arch/sh/drivers/pci/pci-sh7780.c */
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
index e36c7b870861..0d6ac7a1db49 100644
--- a/arch/sh/drivers/pci/pci.c
+++ b/arch/sh/drivers/pci/pci.c
@@ -19,6 +19,7 @@
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/init.h>
+#include <linux/dma-debug.h>
#include <asm/io.h>
static int __init pcibios_init(void)
@@ -43,6 +44,8 @@ static int __init pcibios_init(void)
pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq);
+ dma_debug_add_bus(&pci_bus_type);
+
return 0;
}
subsys_initcall(pcibios_init);