diff options
Diffstat (limited to 'arch/ppc/syslib')
| -rw-r--r-- | arch/ppc/syslib/m8260_setup.c | 6 | ||||
| -rw-r--r-- | arch/ppc/syslib/m82xx_pci.c | 38 | ||||
| -rw-r--r-- | arch/ppc/syslib/m8xx_setup.c | 16 | ||||
| -rw-r--r-- | arch/ppc/syslib/ocp.c | 1 | ||||
| -rw-r--r-- | arch/ppc/syslib/ppc4xx_setup.c | 23 |
5 files changed, 0 insertions, 84 deletions
diff --git a/arch/ppc/syslib/m8260_setup.c b/arch/ppc/syslib/m8260_setup.c index 46588fa94381..b40583724de3 100644 --- a/arch/ppc/syslib/m8260_setup.c +++ b/arch/ppc/syslib/m8260_setup.c @@ -175,12 +175,6 @@ m8260_init_IRQ(void) * in case the boot rom changed something on us. */ cpm2_immr->im_intctl.ic_siprr = 0x05309770; - -#if defined(CONFIG_PCI) && (defined(CONFIG_ADS8272) || defined(CONFIG_PQ2FADS)) - /* Initialize stuff for the 82xx CPLD IC and install demux */ - pq2pci_init_irq(); -#endif - } /* diff --git a/arch/ppc/syslib/m82xx_pci.c b/arch/ppc/syslib/m82xx_pci.c index fe860d52e2e4..657a1c25a2ab 100644 --- a/arch/ppc/syslib/m82xx_pci.c +++ b/arch/ppc/syslib/m82xx_pci.c @@ -150,14 +150,6 @@ pq2pci_init_irq(void) { int irq; volatile cpm2_map_t *immap = cpm2_immr; -#if defined CONFIG_ADS8272 - /* configure chip select for PCI interrupt controller */ - immap->im_memctl.memc_br3 = PCI_INT_STAT_REG | 0x00001801; - immap->im_memctl.memc_or3 = 0xffff8010; -#elif defined CONFIG_PQ2FADS - immap->im_memctl.memc_br8 = PCI_INT_STAT_REG | 0x00001801; - immap->im_memctl.memc_or8 = 0xffff8010; -#endif for (irq = NR_CPM_INTS; irq < NR_CPM_INTS + 4; irq++) irq_desc[irq].chip = &pq2pci_ic; @@ -222,26 +214,6 @@ pq2ads_setup_pci(struct pci_controller *hose) immap->im_memctl.memc_pcibr1 = M82xx_PCI_SEC_WND_BASE | PCIBR_ENABLE; #endif -#if defined CONFIG_ADS8272 - immap->im_siu_conf.siu_82xx.sc_siumcr = - (immap->im_siu_conf.siu_82xx.sc_siumcr & - ~(SIUMCR_BBD | SIUMCR_ESE | SIUMCR_PBSE | - SIUMCR_CDIS | SIUMCR_DPPC11 | SIUMCR_L2CPC11 | - SIUMCR_LBPC11 | SIUMCR_APPC11 | - SIUMCR_CS10PC11 | SIUMCR_BCTLC11 | SIUMCR_MMR11)) | - SIUMCR_DPPC11 | SIUMCR_L2CPC01 | SIUMCR_LBPC00 | - SIUMCR_APPC10 | SIUMCR_CS10PC00 | - SIUMCR_BCTLC00 | SIUMCR_MMR11 ; - -#elif defined CONFIG_PQ2FADS - /* - * Setting required to enable IRQ1-IRQ7 (SIUMCR [DPPC]), - * and local bus for PCI (SIUMCR [LBPC]). - */ - immap->im_siu_conf.siu_82xx.sc_siumcr = (immap->im_siu_conf.siu_82xx.sc_siumcr & - ~(SIUMCR_L2CPC11 | SIUMCR_LBPC11 | SIUMCR_CS10PC11 | SIUMCR_APPC11) | - SIUMCR_BBD | SIUMCR_LBPC01 | SIUMCR_DPPC11 | SIUMCR_APPC10); -#endif /* Enable PCI */ immap->im_pci.pci_gcr = cpu_to_le32(PCIGCR_PCI_BUS_EN); @@ -284,12 +256,6 @@ pq2ads_setup_pci(struct pci_controller *hose) immap->im_pci.pci_pibar0 = cpu_to_le32(M82xx_PCI_SLAVE_MEM_BUS >> PITA_ADDR_SHIFT); immap->im_pci.pci_pitar0 = cpu_to_le32(M82xx_PCI_SLAVE_MEM_LOCAL>> PITA_ADDR_SHIFT); -#if defined CONFIG_ADS8272 - /* PCI int highest prio */ - immap->im_siu_conf.siu_82xx.sc_ppc_alrh = 0x01236745; -#elif defined CONFIG_PQ2FADS - immap->im_siu_conf.siu_82xx.sc_ppc_alrh = 0x03124567; -#endif /* park bus on PCI */ immap->im_siu_conf.siu_82xx.sc_ppc_acr = PPC_ACR_BUS_PARK_PCI; @@ -320,10 +286,6 @@ void __init pq2_find_bridges(void) hose->bus_offset = 0; hose->last_busno = 0xff; -#ifdef CONFIG_ADS8272 - hose->set_cfg_type = 1; -#endif - setup_m8260_indirect_pci(hose, (unsigned long)&cpm2_immr->im_pci.pci_cfg_addr, (unsigned long)&cpm2_immr->im_pci.pci_cfg_data); diff --git a/arch/ppc/syslib/m8xx_setup.c b/arch/ppc/syslib/m8xx_setup.c index 9caf850c9b38..18da720fc1b0 100644 --- a/arch/ppc/syslib/m8xx_setup.c +++ b/arch/ppc/syslib/m8xx_setup.c @@ -87,8 +87,6 @@ void m8xx_calibrate_decr(void); unsigned char __res[sizeof(bd_t)]; -extern void m8xx_ide_init(void); - extern unsigned long find_available_memory(void); extern void m8xx_cpm_reset(void); extern void m8xx_wdt_handler_install(bd_t *bp); @@ -143,16 +141,6 @@ m8xx_setup_arch(void) #endif #endif -#if defined (CONFIG_MPC86XADS) || defined (CONFIG_MPC885ADS) -#if defined(CONFIG_MTD_PHYSMAP) - physmap_configure(binfo->bi_flashstart, binfo->bi_flashsize, - MPC8xxADS_BANK_WIDTH, NULL); -#ifdef CONFIG_MTD_PARTITIONS - physmap_set_partitions(mpc8xxads_partitions, mpc8xxads_part_num); -#endif /* CONFIG_MTD_PARTITIONS */ -#endif /* CONFIG_MTD_PHYSMAP */ -#endif - board_init(); } @@ -474,8 +462,4 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5, ppc_md.find_end_of_memory = m8xx_find_end_of_memory; ppc_md.setup_io_mappings = m8xx_map_io; - -#if defined(CONFIG_BLK_DEV_MPC8xx_IDE) - m8xx_ide_init(); -#endif } diff --git a/arch/ppc/syslib/ocp.c b/arch/ppc/syslib/ocp.c index ac80370ed2f7..a6fb7dcfa738 100644 --- a/arch/ppc/syslib/ocp.c +++ b/arch/ppc/syslib/ocp.c @@ -49,7 +49,6 @@ #include <asm/io.h> #include <asm/ocp.h> #include <asm/errno.h> -#include <asm/semaphore.h> //#define DBG(x) printk x #define DBG(x) diff --git a/arch/ppc/syslib/ppc4xx_setup.c b/arch/ppc/syslib/ppc4xx_setup.c index debe14c083a1..353d746b47e1 100644 --- a/arch/ppc/syslib/ppc4xx_setup.c +++ b/arch/ppc/syslib/ppc4xx_setup.c @@ -24,7 +24,6 @@ #include <linux/pci.h> #include <linux/rtc.h> #include <linux/console.h> -#include <linux/ide.h> #include <linux/serial_reg.h> #include <linux/seq_file.h> @@ -189,24 +188,6 @@ ppc4xx_calibrate_decr(void) mtspr(SPRN_PIT, tb_ticks_per_jiffy); } -/* - * IDE stuff. - * should be generic for every IDE PCI chipset - */ -#if defined(CONFIG_PCI) && defined(CONFIG_IDE) -static void -ppc4xx_ide_init_hwif_ports(hw_regs_t * hw, unsigned long data_port, - unsigned long ctrl_port, int *irq) -{ - int i; - - for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; ++i) - hw->io_ports[i] = data_port + i - IDE_DATA_OFFSET; - - hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port; -} -#endif /* defined(CONFIG_PCI) && defined(CONFIG_IDE) */ - TODC_ALLOC(); /* @@ -271,10 +252,6 @@ ppc4xx_init(unsigned long r3, unsigned long r4, unsigned long r5, #ifdef CONFIG_SERIAL_TEXT_DEBUG ppc_md.progress = gen550_progress; #endif - -#if defined(CONFIG_PCI) && defined(CONFIG_IDE) - ppc_ide_md.ide_init_hwif = ppc4xx_ide_init_hwif_ports; -#endif /* defined(CONFIG_PCI) && defined(CONFIG_IDE) */ } /* Called from machine_check_exception */ |