diff options
Diffstat (limited to 'arch/powerpc/sysdev/xive/native.c')
| -rw-r--r-- | arch/powerpc/sysdev/xive/native.c | 34 | 
1 files changed, 13 insertions, 21 deletions
| diff --git a/arch/powerpc/sysdev/xive/native.c b/arch/powerpc/sysdev/xive/native.c index 311185b9960a..5b20a678d755 100644 --- a/arch/powerpc/sysdev/xive/native.c +++ b/arch/powerpc/sysdev/xive/native.c @@ -109,7 +109,7 @@ int xive_native_configure_irq(u32 hw_irq, u32 target, u8 prio, u32 sw_irq)  		rc = opal_xive_set_irq_config(hw_irq, target, prio, sw_irq);  		if (rc != OPAL_BUSY)  			break; -		msleep(1); +		msleep(OPAL_BUSY_DELAY_MS);  	}  	return rc == 0 ? 0 : -ENXIO;  } @@ -163,7 +163,7 @@ int xive_native_configure_queue(u32 vp_id, struct xive_q *q, u8 prio,  		rc = opal_xive_set_queue_info(vp_id, prio, qpage_phys, order, flags);  		if (rc != OPAL_BUSY)  			break; -		msleep(1); +		msleep(OPAL_BUSY_DELAY_MS);  	}  	if (rc) {  		pr_err("Error %lld setting queue for prio %d\n", rc, prio); @@ -190,7 +190,7 @@ static void __xive_native_disable_queue(u32 vp_id, struct xive_q *q, u8 prio)  		rc = opal_xive_set_queue_info(vp_id, prio, 0, 0, 0);  		if (rc != OPAL_BUSY)  			break; -		msleep(1); +		msleep(OPAL_BUSY_DELAY_MS);  	}  	if (rc)  		pr_err("Error %lld disabling queue for prio %d\n", rc, prio); @@ -253,7 +253,7 @@ static int xive_native_get_ipi(unsigned int cpu, struct xive_cpu *xc)  	for (;;) {  		irq = opal_xive_allocate_irq(chip_id);  		if (irq == OPAL_BUSY) { -			msleep(1); +			msleep(OPAL_BUSY_DELAY_MS);  			continue;  		}  		if (irq < 0) { @@ -275,7 +275,7 @@ u32 xive_native_alloc_irq(void)  		rc = opal_xive_allocate_irq(OPAL_XIVE_ANY_CHIP);  		if (rc != OPAL_BUSY)  			break; -		msleep(1); +		msleep(OPAL_BUSY_DELAY_MS);  	}  	if (rc < 0)  		return 0; @@ -289,7 +289,7 @@ void xive_native_free_irq(u32 irq)  		s64 rc = opal_xive_free_irq(irq);  		if (rc != OPAL_BUSY)  			break; -		msleep(1); +		msleep(OPAL_BUSY_DELAY_MS);  	}  }  EXPORT_SYMBOL_GPL(xive_native_free_irq); @@ -305,7 +305,7 @@ static void xive_native_put_ipi(unsigned int cpu, struct xive_cpu *xc)  	for (;;) {  		rc = opal_xive_free_irq(xc->hw_ipi);  		if (rc == OPAL_BUSY) { -			msleep(1); +			msleep(OPAL_BUSY_DELAY_MS);  			continue;  		}  		xc->hw_ipi = 0; @@ -395,12 +395,11 @@ static void xive_native_setup_cpu(unsigned int cpu, struct xive_cpu *xc)  	/* Enable the pool VP */  	vp = xive_pool_vps + cpu; -	pr_debug("CPU %d setting up pool VP 0x%x\n", cpu, vp);  	for (;;) {  		rc = opal_xive_set_vp_info(vp, OPAL_XIVE_VP_ENABLED, 0);  		if (rc != OPAL_BUSY)  			break; -		msleep(1); +		msleep(OPAL_BUSY_DELAY_MS);  	}  	if (rc) {  		pr_err("Failed to enable pool VP on CPU %d\n", cpu); @@ -415,16 +414,9 @@ static void xive_native_setup_cpu(unsigned int cpu, struct xive_cpu *xc)  	}  	vp_cam = be64_to_cpu(vp_cam_be); -	pr_debug("VP CAM = %llx\n", vp_cam); -  	/* Push it on the CPU (set LSMFB to 0xff to skip backlog scan) */ -	pr_debug("(Old HW value: %08x)\n", -		 in_be32(xive_tima + TM_QW2_HV_POOL + TM_WORD2));  	out_be32(xive_tima + TM_QW2_HV_POOL + TM_WORD0, 0xff); -	out_be32(xive_tima + TM_QW2_HV_POOL + TM_WORD2, -		 TM_QW2W2_VP | vp_cam); -	pr_debug("(New HW value: %08x)\n", -		 in_be32(xive_tima + TM_QW2_HV_POOL + TM_WORD2)); +	out_be32(xive_tima + TM_QW2_HV_POOL + TM_WORD2, TM_QW2W2_VP | vp_cam);  }  static void xive_native_teardown_cpu(unsigned int cpu, struct xive_cpu *xc) @@ -444,7 +436,7 @@ static void xive_native_teardown_cpu(unsigned int cpu, struct xive_cpu *xc)  		rc = opal_xive_set_vp_info(vp, 0, 0);  		if (rc != OPAL_BUSY)  			break; -		msleep(1); +		msleep(OPAL_BUSY_DELAY_MS);  	}  } @@ -645,7 +637,7 @@ u32 xive_native_alloc_vp_block(u32 max_vcpus)  		rc = opal_xive_alloc_vp_block(order);  		switch (rc) {  		case OPAL_BUSY: -			msleep(1); +			msleep(OPAL_BUSY_DELAY_MS);  			break;  		case OPAL_XIVE_PROVISIONING:  			if (!xive_native_provision_pages()) @@ -687,7 +679,7 @@ int xive_native_enable_vp(u32 vp_id, bool single_escalation)  		rc = opal_xive_set_vp_info(vp_id, flags, 0);  		if (rc != OPAL_BUSY)  			break; -		msleep(1); +		msleep(OPAL_BUSY_DELAY_MS);  	}  	return rc ? -EIO : 0;  } @@ -701,7 +693,7 @@ int xive_native_disable_vp(u32 vp_id)  		rc = opal_xive_set_vp_info(vp_id, 0, 0);  		if (rc != OPAL_BUSY)  			break; -		msleep(1); +		msleep(OPAL_BUSY_DELAY_MS);  	}  	return rc ? -EIO : 0;  } |