diff options
Diffstat (limited to 'arch/mips/alchemy')
| -rw-r--r-- | arch/mips/alchemy/board-gpr.c | 23 | ||||
| -rw-r--r-- | arch/mips/alchemy/common/clock.c | 10 |
2 files changed, 26 insertions, 7 deletions
diff --git a/arch/mips/alchemy/board-gpr.c b/arch/mips/alchemy/board-gpr.c index 6fb6b3faa158..328d697e72b4 100644 --- a/arch/mips/alchemy/board-gpr.c +++ b/arch/mips/alchemy/board-gpr.c @@ -30,6 +30,7 @@ #include <linux/gpio.h> #include <linux/i2c.h> #include <linux/i2c-gpio.h> +#include <linux/gpio/machine.h> #include <asm/bootinfo.h> #include <asm/idle.h> #include <asm/reboot.h> @@ -218,10 +219,27 @@ static struct platform_device gpr_led_devices = { /* * I2C */ +static struct gpiod_lookup_table gpr_i2c_gpiod_table = { + .dev_id = "i2c-gpio", + .table = { + /* + * This should be on "GPIO2" which has base at 200 so + * the global numbers 209 and 210 should correspond to + * local offsets 9 and 10. + */ + GPIO_LOOKUP_IDX("alchemy-gpio2", 9, NULL, 0, + GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("alchemy-gpio2", 10, NULL, 1, + GPIO_ACTIVE_HIGH), + }, +}; + static struct i2c_gpio_platform_data gpr_i2c_data = { - .sda_pin = 209, + /* + * The open drain mode is hardwired somewhere or an electrical + * property of the alchemy GPIO controller. + */ .sda_is_open_drain = 1, - .scl_pin = 210, .scl_is_open_drain = 1, .udelay = 2, /* ~100 kHz */ .timeout = HZ, @@ -295,6 +313,7 @@ arch_initcall(gpr_pci_init); static int __init gpr_dev_init(void) { + gpiod_add_lookup_table(&gpr_i2c_gpiod_table); i2c_register_board_info(0, gpr_i2c_info, ARRAY_SIZE(gpr_i2c_info)); return platform_add_devices(gpr_devices, ARRAY_SIZE(gpr_devices)); diff --git a/arch/mips/alchemy/common/clock.c b/arch/mips/alchemy/common/clock.c index a83c7b7e2eb1..6b6f6851df92 100644 --- a/arch/mips/alchemy/common/clock.c +++ b/arch/mips/alchemy/common/clock.c @@ -143,7 +143,7 @@ void __init alchemy_set_lpj(void) preset_lpj /= 2 * HZ; } -static struct clk_ops alchemy_clkops_cpu = { +static const struct clk_ops alchemy_clkops_cpu = { .recalc_rate = alchemy_clk_cpu_recalc, }; @@ -224,7 +224,7 @@ static long alchemy_clk_aux_roundr(struct clk_hw *hw, return (*parent_rate) * mult; } -static struct clk_ops alchemy_clkops_aux = { +static const struct clk_ops alchemy_clkops_aux = { .recalc_rate = alchemy_clk_aux_recalc, .set_rate = alchemy_clk_aux_setr, .round_rate = alchemy_clk_aux_roundr, @@ -576,7 +576,7 @@ static int alchemy_clk_fgv1_detr(struct clk_hw *hw, } /* Au1000, Au1100, Au15x0, Au12x0 */ -static struct clk_ops alchemy_clkops_fgenv1 = { +static const struct clk_ops alchemy_clkops_fgenv1 = { .recalc_rate = alchemy_clk_fgv1_recalc, .determine_rate = alchemy_clk_fgv1_detr, .set_rate = alchemy_clk_fgv1_setr, @@ -717,7 +717,7 @@ static int alchemy_clk_fgv2_detr(struct clk_hw *hw, } /* Au1300 larger input mux, no separate disable bit, flexible divider */ -static struct clk_ops alchemy_clkops_fgenv2 = { +static const struct clk_ops alchemy_clkops_fgenv2 = { .recalc_rate = alchemy_clk_fgv2_recalc, .determine_rate = alchemy_clk_fgv2_detr, .set_rate = alchemy_clk_fgv2_setr, @@ -925,7 +925,7 @@ static int alchemy_clk_csrc_detr(struct clk_hw *hw, return alchemy_clk_fgcs_detr(hw, req, scale, 4); } -static struct clk_ops alchemy_clkops_csrc = { +static const struct clk_ops alchemy_clkops_csrc = { .recalc_rate = alchemy_clk_csrc_recalc, .determine_rate = alchemy_clk_csrc_detr, .set_rate = alchemy_clk_csrc_setr, |