diff options
Diffstat (limited to 'arch/arm64/boot/dts/exynos')
-rw-r--r-- | arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi | 11 | ||||
-rw-r--r-- | arch/arm64/boot/dts/exynos/exynos5433.dtsi | 24 | ||||
-rw-r--r-- | arch/arm64/boot/dts/exynos/exynos7-espresso.dts | 2 | ||||
-rw-r--r-- | arch/arm64/boot/dts/exynos/exynos7.dtsi | 2 | ||||
-rw-r--r-- | arch/arm64/boot/dts/exynos/exynos850.dtsi | 6 | ||||
-rw-r--r-- | arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 9 |
6 files changed, 29 insertions, 25 deletions
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi index bde6a6bb8dfc..6f701297a665 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi @@ -96,10 +96,10 @@ max98504: amplifier@31 { compatible = "maxim,max98504"; reg = <0x31>; - maxim,rx-path = <1>; - maxim,tx-path = <1>; - maxim,tx-channel-mask = <3>; - maxim,tx-channel-source = <2>; + + DIOVDD-supply = <&ldo3_reg>; + DVDD-supply = <&ldo3_reg>; + /* PVDD-supply to VPH_PWR */ }; }; @@ -925,7 +925,6 @@ compatible = "maxim,max77843-haptic"; haptic-supply = <&ldo38_reg>; pwms = <&pwm 0 33670 0>; - pwm-names = "haptic"; }; }; }; @@ -1315,7 +1314,7 @@ reg = <0x0>; spi-max-frequency = <5000000>; power-supply = <&irda_regulator>; - duty-cycle = <60>; + duty-cycle = /bits/ 8 <60>; led-active-low; controller-data { diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index bd6a354b9cb5..47b5ac06f0d6 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -89,7 +89,6 @@ compatible = "arm,cortex-a53"; enable-method = "psci"; reg = <0x100>; - clock-frequency = <1300000000>; clocks = <&cmu_apollo CLK_SCLK_APOLLO>; clock-names = "apolloclk"; operating-points-v2 = <&cluster_a53_opp_table>; @@ -108,7 +107,6 @@ compatible = "arm,cortex-a53"; enable-method = "psci"; reg = <0x101>; - clock-frequency = <1300000000>; operating-points-v2 = <&cluster_a53_opp_table>; #cooling-cells = <2>; i-cache-size = <0x8000>; @@ -125,7 +123,6 @@ compatible = "arm,cortex-a53"; enable-method = "psci"; reg = <0x102>; - clock-frequency = <1300000000>; operating-points-v2 = <&cluster_a53_opp_table>; #cooling-cells = <2>; i-cache-size = <0x8000>; @@ -142,7 +139,6 @@ compatible = "arm,cortex-a53"; enable-method = "psci"; reg = <0x103>; - clock-frequency = <1300000000>; operating-points-v2 = <&cluster_a53_opp_table>; #cooling-cells = <2>; i-cache-size = <0x8000>; @@ -159,7 +155,6 @@ compatible = "arm,cortex-a57"; enable-method = "psci"; reg = <0x0>; - clock-frequency = <1900000000>; clocks = <&cmu_atlas CLK_SCLK_ATLAS>; clock-names = "atlasclk"; operating-points-v2 = <&cluster_a57_opp_table>; @@ -178,7 +173,6 @@ compatible = "arm,cortex-a57"; enable-method = "psci"; reg = <0x1>; - clock-frequency = <1900000000>; operating-points-v2 = <&cluster_a57_opp_table>; #cooling-cells = <2>; i-cache-size = <0xc000>; @@ -195,7 +189,6 @@ compatible = "arm,cortex-a57"; enable-method = "psci"; reg = <0x2>; - clock-frequency = <1900000000>; operating-points-v2 = <&cluster_a57_opp_table>; #cooling-cells = <2>; i-cache-size = <0xc000>; @@ -212,7 +205,6 @@ compatible = "arm,cortex-a57"; enable-method = "psci"; reg = <0x3>; - clock-frequency = <1900000000>; operating-points-v2 = <&cluster_a57_opp_table>; #cooling-cells = <2>; i-cache-size = <0xc000>; @@ -226,6 +218,8 @@ cluster_a57_l2: l2-cache0 { compatible = "cache"; + cache-level = <2>; + cache-unified; cache-size = <0x200000>; cache-line-size = <64>; cache-sets = <2048>; @@ -233,6 +227,8 @@ cluster_a53_l2: l2-cache1 { compatible = "cache"; + cache-level = <2>; + cache-unified; cache-size = <0x40000>; cache-line-size = <64>; cache-sets = <256>; @@ -1118,22 +1114,26 @@ }; syscon_disp: syscon@13b80000 { - compatible = "samsung,exynos5433-sysreg", "syscon"; + compatible = "samsung,exynos5433-disp-sysreg", + "samsung,exynos5433-sysreg", "syscon"; reg = <0x13b80000 0x1010>; }; syscon_cam0: syscon@120f0000 { - compatible = "samsung,exynos5433-sysreg", "syscon"; + compatible = "samsung,exynos5433-cam0-sysreg", + "samsung,exynos5433-sysreg", "syscon"; reg = <0x120f0000 0x1020>; }; syscon_cam1: syscon@145f0000 { - compatible = "samsung,exynos5433-sysreg", "syscon"; + compatible = "samsung,exynos5433-cam1-sysreg", + "samsung,exynos5433-sysreg", "syscon"; reg = <0x145f0000 0x1038>; }; syscon_fsys: syscon@156f0000 { - compatible = "samsung,exynos5433-sysreg", "syscon"; + compatible = "samsung,exynos5433-fsys-sysreg", + "samsung,exynos5433-sysreg", "syscon"; reg = <0x156f0000 0x1044>; }; diff --git a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts index e38c59cf18dc..b846c0be90e3 100644 --- a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts +++ b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts @@ -83,8 +83,6 @@ }; &hsi2c_4 { - samsung,i2c-sda-delay = <100>; - samsung,i2c-max-bus-freq = <200000>; status = "okay"; pmic@66 { diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi index 1cd771c90b47..f378d8629d88 100644 --- a/arch/arm64/boot/dts/exynos/exynos7.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi @@ -107,6 +107,8 @@ atlas_l2: l2-cache0 { compatible = "cache"; + cache-level = <2>; + cache-unified; cache-size = <0x200000>; cache-line-size = <64>; cache-sets = <2048>; diff --git a/arch/arm64/boot/dts/exynos/exynos850.dtsi b/arch/arm64/boot/dts/exynos/exynos850.dtsi index c61441f3a89a..a38fe5129937 100644 --- a/arch/arm64/boot/dts/exynos/exynos850.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos850.dtsi @@ -549,13 +549,15 @@ }; sysreg_peri: syscon@10020000 { - compatible = "samsung,exynos850-sysreg", "syscon"; + compatible = "samsung,exynos850-peri-sysreg", + "samsung,exynos850-sysreg", "syscon"; reg = <0x10020000 0x10000>; clocks = <&cmu_peri CLK_GOUT_SYSREG_PERI_PCLK>; }; sysreg_cmgp: syscon@11c20000 { - compatible = "samsung,exynos850-sysreg", "syscon"; + compatible = "samsung,exynos850-cmgp-sysreg", + "samsung,exynos850-sysreg", "syscon"; reg = <0x11c20000 0x10000>; clocks = <&cmu_cmgp CLK_GOUT_SYSREG_CMGP_PCLK>; }; diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi index 5dc361734cfe..d3c5cdeff47f 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi @@ -370,17 +370,20 @@ }; syscon_fsys2: syscon@17c20000 { - compatible = "samsung,exynosautov9-sysreg", "syscon"; + compatible = "samsung,exynosautov9-fsys2-sysreg", + "samsung,exynosautov9-sysreg", "syscon"; reg = <0x17c20000 0x1000>; }; syscon_peric0: syscon@10220000 { - compatible = "samsung,exynosautov9-sysreg", "syscon"; + compatible = "samsung,exynosautov9-peric0-sysreg", + "samsung,exynosautov9-sysreg", "syscon"; reg = <0x10220000 0x2000>; }; syscon_peric1: syscon@10820000 { - compatible = "samsung,exynosautov9-sysreg", "syscon"; + compatible = "samsung,exynosautov9-peric1-sysreg", + "samsung,exynosautov9-sysreg", "syscon"; reg = <0x10820000 0x2000>; }; |