diff options
| -rw-r--r-- | drivers/video/fbdev/Kconfig | 34 | ||||
| -rw-r--r-- | drivers/video/fbdev/Makefile | 1 | ||||
| -rw-r--r-- | drivers/video/fbdev/atafb.c | 21 | ||||
| -rw-r--r-- | drivers/video/fbdev/atmel_lcdfb.c | 6 | ||||
| -rw-r--r-- | drivers/video/fbdev/au1200fb.c | 19 | ||||
| -rw-r--r-- | drivers/video/fbdev/controlfb.c | 8 | ||||
| -rw-r--r-- | drivers/video/fbdev/cyber2000fb.c | 5 | ||||
| -rw-r--r-- | drivers/video/fbdev/efifb.c | 5 | ||||
| -rw-r--r-- | drivers/video/fbdev/gbefb.c | 19 | ||||
| -rw-r--r-- | drivers/video/fbdev/imxfb.c | 9 | ||||
| -rw-r--r-- | drivers/video/fbdev/jz4740_fb.c | 7 | ||||
| -rw-r--r-- | drivers/video/fbdev/mmp/hw/mmp_ctrl.c | 8 | ||||
| -rw-r--r-- | drivers/video/fbdev/mxsfb.c | 1028 | ||||
| -rw-r--r-- | drivers/video/fbdev/omap2/omapfb/dss/Kconfig | 12 | ||||
| -rw-r--r-- | drivers/video/fbdev/omap2/omapfb/dss/Makefile | 1 | ||||
| -rw-r--r-- | drivers/video/fbdev/omap2/omapfb/dss/core.c | 6 | ||||
| -rw-r--r-- | drivers/video/fbdev/omap2/omapfb/dss/dss.h | 4 | ||||
| -rw-r--r-- | drivers/video/fbdev/omap2/omapfb/dss/rfbi.c | 1078 | ||||
| -rw-r--r-- | drivers/video/fbdev/pvr2fb.c | 182 | ||||
| -rw-r--r-- | include/video/omapfb_dss.h | 32 |
20 files changed, 132 insertions, 2353 deletions
diff --git a/drivers/video/fbdev/Kconfig b/drivers/video/fbdev/Kconfig index 1b2f5f31fb6f..b174af914e7a 100644 --- a/drivers/video/fbdev/Kconfig +++ b/drivers/video/fbdev/Kconfig @@ -332,7 +332,8 @@ config FB_SA1100 config FB_IMX tristate "Freescale i.MX1/21/25/27 LCD support" - depends on FB && ARCH_MXC + depends on FB && HAVE_CLK && HAS_IOMEM + depends on ARCH_MXC || COMPILE_TEST select LCD_CLASS_DEVICE select FB_CFB_FILLRECT select FB_CFB_COPYAREA @@ -670,7 +671,8 @@ config FB_HGA config FB_GBE bool "SGI Graphics Backend frame buffer support" - depends on (FB = y) && SGI_IP32 + depends on (FB = y) && HAS_IOMEM + depends on SGI_IP32 || COMPILE_TEST select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT @@ -808,7 +810,8 @@ config FB_XVR1000 config FB_PVR2 tristate "NEC PowerVR 2 display support" - depends on FB && SH_DREAMCAST + depends on FB && HAS_IOMEM + depends on SH_DREAMCAST || COMPILE_TEST select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT @@ -856,7 +859,8 @@ config FB_S1D13XXX config FB_ATMEL tristate "AT91 LCD Controller support" - depends on FB && OF && HAVE_FB_ATMEL + depends on FB && OF && HAVE_CLK && HAS_IOMEM + depends on HAVE_FB_ATMEL || COMPILE_TEST select FB_BACKLIGHT select FB_CFB_FILLRECT select FB_CFB_COPYAREA @@ -1729,7 +1733,8 @@ config FB_68328 config FB_PXA168 tristate "PXA168/910 LCD framebuffer support" - depends on FB && (CPU_PXA168 || CPU_PXA910) + depends on FB && HAVE_CLK && HAS_IOMEM + depends on CPU_PXA168 || CPU_PXA910 || COMPILE_TEST select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT @@ -1873,7 +1878,8 @@ config FB_TMIO_ACCELL config FB_S3C tristate "Samsung S3C framebuffer support" - depends on FB && (CPU_S3C2416 || ARCH_S3C64XX) + depends on FB && HAVE_CLK && HAS_IOMEM + depends on (CPU_S3C2416 || ARCH_S3C64XX) || COMPILE_TEST select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT @@ -2055,7 +2061,8 @@ config FB_SH7760 config FB_DA8XX tristate "DA8xx/OMAP-L1xx/AM335x Framebuffer support" - depends on FB && (ARCH_DAVINCI_DA8XX || SOC_AM33XX) + depends on FB && HAVE_CLK && HAS_IOMEM + depends on ARCH_DAVINCI_DA8XX || SOC_AM33XX || COMPILE_TEST select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT @@ -2172,7 +2179,7 @@ config FB_EP93XX config FB_PRE_INIT_FB bool "Don't reinitialize, use bootloader's GDC/Display configuration" - depends on FB && (FB_MB862XX_LIME || FB_MXS) + depends on FB && FB_MB862XX_LIME ---help--- Select this option if display contents should be inherited as set by the bootloader. @@ -2213,17 +2220,6 @@ config FB_JZ4740 help Framebuffer support for the JZ4740 SoC. -config FB_MXS - tristate "MXS LCD framebuffer support" - depends on FB && (ARCH_MXS || ARCH_MXC) - select FB_CFB_FILLRECT - select FB_CFB_COPYAREA - select FB_CFB_IMAGEBLIT - select FB_MODE_HELPERS - select VIDEOMODE_HELPERS - help - Framebuffer support for the MXS SoC. - config FB_PUV3_UNIGFX tristate "PKUnity v3 Unigfx framebuffer support" depends on FB && UNICORE32 && ARCH_PUV3 diff --git a/drivers/video/fbdev/Makefile b/drivers/video/fbdev/Makefile index 655f2537cac1..7dc4861a93e6 100644 --- a/drivers/video/fbdev/Makefile +++ b/drivers/video/fbdev/Makefile @@ -131,7 +131,6 @@ obj-$(CONFIG_FB_VGA16) += vga16fb.o obj-$(CONFIG_FB_OF) += offb.o obj-$(CONFIG_FB_MX3) += mx3fb.o obj-$(CONFIG_FB_DA8XX) += da8xx-fb.o -obj-$(CONFIG_FB_MXS) += mxsfb.o obj-$(CONFIG_FB_SSD1307) += ssd1307fb.o obj-$(CONFIG_FB_SIMPLE) += simplefb.o diff --git a/drivers/video/fbdev/atafb.c b/drivers/video/fbdev/atafb.c index b986af2a8042..fc9dfb0a95af 100644 --- a/drivers/video/fbdev/atafb.c +++ b/drivers/video/fbdev/atafb.c @@ -77,29 +77,8 @@ #define SWITCH_SND7 0x80 #define SWITCH_NONE 0x00 - #define up(x, r) (((x) + (r) - 1) & ~((r)-1)) - /* - * Interface to the world - */ - -static int atafb_check_var(struct fb_var_screeninfo *var, struct fb_info *info); -static int atafb_set_par(struct fb_info *info); -static int atafb_setcolreg(unsigned int regno, unsigned int red, unsigned int green, - unsigned int blue, unsigned int transp, - struct fb_info *info); -static int atafb_blank(int blank, struct fb_info *info); -static int atafb_pan_display(struct fb_var_screeninfo *var, - struct fb_info *info); -static void atafb_fillrect(struct fb_info *info, - const struct fb_fillrect *rect); -static void atafb_copyarea(struct fb_info *info, - const struct fb_copyarea *region); -static void atafb_imageblit(struct fb_info *info, const struct fb_image *image); -static int atafb_ioctl(struct fb_info *info, unsigned int cmd, - unsigned long arg); - static int default_par; /* default resolution (0=none) */ diff --git a/drivers/video/fbdev/atmel_lcdfb.c b/drivers/video/fbdev/atmel_lcdfb.c index e67dfd94bf1d..930cc3f92e01 100644 --- a/drivers/video/fbdev/atmel_lcdfb.c +++ b/drivers/video/fbdev/atmel_lcdfb.c @@ -673,7 +673,7 @@ static int atmel_lcdfb_set_par(struct fb_info *info) lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0); /* Disable all interrupts */ - lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL); + lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0U); /* Enable FIFO & DMA errors */ lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI); @@ -950,7 +950,7 @@ static int atmel_lcdfb_of_init(struct atmel_lcdfb_info *sinfo) struct fb_videomode fb_vm; struct gpio_desc *gpiod; struct videomode vm; - int ret = -ENOENT; + int ret; int i; sinfo->config = (struct atmel_lcdfb_config*) @@ -1291,7 +1291,7 @@ static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg) * We don't want to handle interrupts while the clock is * stopped. It may take forever. */ - lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL); + lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0U); sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_CTR); lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0); diff --git a/drivers/video/fbdev/au1200fb.c b/drivers/video/fbdev/au1200fb.c index 3872ccef4cb2..26caffb02b7e 100644 --- a/drivers/video/fbdev/au1200fb.c +++ b/drivers/video/fbdev/au1200fb.c @@ -147,6 +147,7 @@ struct au1200_lcd_iodata_t { struct au1200fb_device { struct fb_info *fb_info; /* FB driver info record */ struct au1200fb_platdata *pd; + struct device *dev; int plane; unsigned char* fb_mem; /* FrameBuffer memory map */ @@ -1232,10 +1233,8 @@ static int au1200fb_fb_mmap(struct fb_info *info, struct vm_area_struct *vma) { struct au1200fb_device *fbdev = info->par; - vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); - pgprot_val(vma->vm_page_prot) |= _CACHE_MASK; /* CCA=7 */ - - return vm_iomap_memory(vma, fbdev->fb_phys, fbdev->fb_len); + return dma_mmap_attrs(fbdev->dev, vma, fbdev->fb_mem, fbdev->fb_phys, + fbdev->fb_len, DMA_ATTR_NON_CONSISTENT); } static void set_global(u_int cmd, struct au1200_lcd_global_regs_t *pdata) @@ -1647,7 +1646,6 @@ static int au1200fb_drv_probe(struct platform_device *dev) struct au1200fb_device *fbdev; struct au1200fb_platdata *pd; struct fb_info *fbi = NULL; - unsigned long page; int bpp, plane, ret, irq; print_info("" DRIVER_DESC ""); @@ -1685,6 +1683,7 @@ static int au1200fb_drv_probe(struct platform_device *dev) fbdev = fbi->par; fbdev->fb_info = fbi; fbdev->pd = pd; + fbdev->dev = &dev->dev; fbdev->plane = plane; @@ -1702,16 +1701,6 @@ static int au1200fb_drv_probe(struct platform_device *dev) goto failed; } - /* - * Set page reserved so that mmap will work. This is necessary - * since we'll be remapping normal memory. - */ - for (page = (unsigned long)fbdev->fb_phys; - page < PAGE_ALIGN((unsigned long)fbdev->fb_phys + - fbdev->fb_len); - page += PAGE_SIZE) { - SetPageReserved(pfn_to_page(page >> PAGE_SHIFT)); /* LCD DMA is NOT coherent on Au1200 */ - } print_dbg("Framebuffer memory map at %p", fbdev->fb_mem); print_dbg("phys=0x%08x, size=%dK", fbdev->fb_phys, fbdev->fb_len / 1024); diff --git a/drivers/video/fbdev/controlfb.c b/drivers/video/fbdev/controlfb.c index 7af8db28bb80..9a680ef3ffc3 100644 --- a/drivers/video/fbdev/controlfb.c +++ b/drivers/video/fbdev/controlfb.c @@ -182,7 +182,7 @@ int init_module(void) int ret = -ENXIO; dp = of_find_node_by_name(NULL, "control"); - if (dp != 0 && !control_of_init(dp)) + if (dp && !control_of_init(dp)) ret = 0; of_node_put(dp); @@ -580,7 +580,7 @@ static int __init control_init(void) control_setup(option); dp = of_find_node_by_name(NULL, "control"); - if (dp != 0 && !control_of_init(dp)) + if (dp && !control_of_init(dp)) ret = 0; of_node_put(dp); @@ -683,8 +683,8 @@ static int __init control_of_init(struct device_node *dp) return -ENXIO; } p = kzalloc(sizeof(*p), GFP_KERNEL); - if (p == 0) - return -ENXIO; + if (!p) + return -ENOMEM; control_fb = p; /* save it for cleanups */ /* Map in frame buffer and registers */ diff --git a/drivers/video/fbdev/cyber2000fb.c b/drivers/video/fbdev/cyber2000fb.c index 452ef07b3a06..9e5385b0e388 100644 --- a/drivers/video/fbdev/cyber2000fb.c +++ b/drivers/video/fbdev/cyber2000fb.c @@ -1641,10 +1641,6 @@ static void cyberpro_common_resume(struct cfb_info *cfb) } /* - * PCI specific support. - */ -#ifdef CONFIG_PCI -/* * We need to wake up the CyberPro, and make sure its in linear memory * mode. Unfortunately, this is specific to the platform and card that * we are running on. @@ -1860,7 +1856,6 @@ static struct pci_driver cyberpro_driver = { .resume = cyberpro_pci_resume, .id_table = cyberpro_pci_table }; -#endif /* * I don't think we can use the "module_init" stuff here because diff --git a/drivers/video/fbdev/efifb.c b/drivers/video/fbdev/efifb.c index 9f39f0c360e0..dfa8dd47d19d 100644 --- a/drivers/video/fbdev/efifb.c +++ b/drivers/video/fbdev/efifb.c @@ -169,6 +169,11 @@ static void efifb_show_boot_graphics(struct fb_info *info) return; } + if (bgrt_tab.status & 0x06) { + pr_info("efifb: BGRT rotation bits set, not showing boot graphics\n"); + return; + } + /* Avoid flashing the logo if we're going to print std probe messages */ if (console_loglevel > CONSOLE_LOGLEVEL_QUIET) return; diff --git a/drivers/video/fbdev/gbefb.c b/drivers/video/fbdev/gbefb.c index 3fcb33232ba3..b9f6a82a0495 100644 --- a/drivers/video/fbdev/gbefb.c +++ b/drivers/video/fbdev/gbefb.c @@ -39,9 +39,7 @@ struct gbefb_par { int valid; }; -#ifdef CONFIG_SGI_IP32 #define GBE_BASE 0x16000000 /* SGI O2 */ -#endif /* macro for fastest write-though access to the framebuffer */ #ifdef CONFIG_MIPS @@ -51,10 +49,6 @@ struct gbefb_par { #define pgprot_fb(_prot) (((_prot) & (~_CACHE_MASK)) | _CACHE_CACHABLE_NO_WA) #endif #endif -#ifdef CONFIG_X86 -#define pgprot_fb(_prot) (((_prot) & ~_PAGE_CACHE_MASK) | \ - cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS)) -#endif /* * RAM we reserve for the frame buffer. This defines the maximum screen @@ -279,7 +273,7 @@ static void gbe_turn_off(void) val = 0; SET_GBE_FIELD(VT_XY, FREEZE, val, 1); gbe->vt_xy = val; - udelay(10000); + mdelay(10); for (i = 0; i < 10000; i++) { val = gbe->vt_xy; if (GET_GBE_FIELD(VT_XY, FREEZE, val) != 1) @@ -294,7 +288,7 @@ static void gbe_turn_off(void) val = gbe->dotclock; SET_GBE_FIELD(DOTCLK, RUN, val, 0); gbe->dotclock = val; - udelay(10000); + mdelay(10); for (i = 0; i < 10000; i++) { val = gbe->dotclock; if (GET_GBE_FIELD(DOTCLK, RUN, val)) @@ -331,7 +325,7 @@ static void gbe_turn_on(void) val = gbe->dotclock; SET_GBE_FIELD(DOTCLK, RUN, val, 1); gbe->dotclock = val; - udelay(10000); + mdelay(10); for (i = 0; i < 10000; i++) { val = gbe->dotclock; if (GET_GBE_FIELD(DOTCLK, RUN, val) != 1) @@ -346,7 +340,7 @@ static void gbe_turn_on(void) val = 0; SET_GBE_FIELD(VT_XY, FREEZE, val, 0); gbe->vt_xy = val; - udelay(10000); + mdelay(10); for (i = 0; i < 10000; i++) { val = gbe->vt_xy; if (GET_GBE_FIELD(VT_XY, FREEZE, val)) @@ -547,7 +541,7 @@ static void gbe_set_timing_info(struct gbe_timing_info *timing) SET_GBE_FIELD(DOTCLK, P, val, timing->pll_p); SET_GBE_FIELD(DOTCLK, RUN, val, 0); /* do not start yet */ gbe->dotclock = val; - udelay(10000); + mdelay(10); /* setup pixel counter */ val = 0; @@ -1018,9 +1012,10 @@ static int gbefb_mmap(struct fb_info *info, /* remap using the fastest write-through mode on architecture */ /* try not polluting the cache when possible */ +#ifdef CONFIG_MIPS pgprot_val(vma->vm_page_prot) = pgprot_fb(pgprot_val(vma->vm_page_prot)); - +#endif /* VM_IO | VM_DONTEXPAND | VM_DONTDUMP are set by remap_pfn_range() */ /* look for the starting tile */ diff --git a/drivers/video/fbdev/imxfb.c b/drivers/video/fbdev/imxfb.c index c4eb8661f751..8d1053e9ef9f 100644 --- a/drivers/video/fbdev/imxfb.c +++ b/drivers/video/fbdev/imxfb.c @@ -974,9 +974,8 @@ static int imxfb_probe(struct platform_device *pdev) } fbi->map_size = PAGE_ALIGN(info->fix.smem_len); - info->screen_base = dma_alloc_wc(&pdev->dev, fbi->map_size, - &fbi->map_dma, GFP_KERNEL); - + info->screen_buffer = dma_alloc_wc(&pdev->dev, fbi->map_size, + &fbi->map_dma, GFP_KERNEL); if (!info->screen_base) { dev_err(&pdev->dev, "Failed to allocate video RAM: %d\n", ret); ret = -ENOMEM; @@ -1046,7 +1045,7 @@ failed_cmap: if (pdata && pdata->exit) pdata->exit(fbi->pdev); failed_platform_init: - dma_free_wc(&pdev->dev, fbi->map_size, info->screen_base, + dma_free_wc(&pdev->dev, fbi->map_size, info->screen_buffer, fbi->map_dma); failed_map: iounmap(fbi->regs); @@ -1077,7 +1076,7 @@ static int imxfb_remove(struct platform_device *pdev) pdata = dev_get_platdata(&pdev->dev); if (pdata && pdata->exit) pdata->exit(fbi->pdev); - dma_free_wc(&pdev->dev, fbi->map_size, info->screen_base, + dma_free_wc(&pdev->dev, fbi->map_size, info->screen_buffer, fbi->map_dma); iounmap(fbi->regs); release_mem_region(res->start, resource_size(res)); diff --git a/drivers/video/fbdev/jz4740_fb.c b/drivers/video/fbdev/jz4740_fb.c index 145095655cc2..1f78b2bfe566 100644 --- a/drivers/video/fbdev/jz4740_fb.c +++ b/drivers/video/fbdev/jz4740_fb.c @@ -457,7 +457,6 @@ static int jzfb_alloc_devmem(struct jzfb *jzfb) { int max_videosize = 0; struct fb_videomode *mode = jzfb->pdata->modes; - void *page; int i; for (i = 0; i < jzfb->pdata->num_modes; ++mode, ++i) { @@ -482,12 +481,6 @@ static int jzfb_alloc_devmem(struct jzfb *jzfb) if (!jzfb->vidmem) goto err_free_framedesc; - for (page = jzfb->vidmem; - page < jzfb->vidmem + PAGE_ALIGN(jzfb->vidmem_size); - page += PAGE_SIZE) { - SetPageReserved(virt_to_page(page)); - } - jzfb->framedesc->next = jzfb->framedesc_phys; jzfb->framedesc->addr = jzfb->vidmem_phys; jzfb->framedesc->id = 0xdeafbead; diff --git a/drivers/video/fbdev/mmp/hw/mmp_ctrl.c b/drivers/video/fbdev/mmp/hw/mmp_ctrl.c index 87d943f15a12..17174cd7a5bb 100644 --- a/drivers/video/fbdev/mmp/hw/mmp_ctrl.c +++ b/drivers/video/fbdev/mmp/hw/mmp_ctrl.c @@ -433,7 +433,7 @@ static int mmphw_probe(struct platform_device *pdev) { struct mmp_mach_plat_info *mi; struct resource *res; - int ret, i, size, irq; + int ret, i, irq; struct mmphw_path_plat *path_plat; struct mmphw_ctrl *ctrl = NULL; @@ -461,9 +461,9 @@ static int mmphw_probe(struct platform_device *pdev) } /* allocate */ - size = sizeof(struct mmphw_ctrl) + sizeof(struct mmphw_path_plat) * - mi->path_num; - ctrl = devm_kzalloc(&pdev->dev, size, GFP_KERNEL); + ctrl = devm_kzalloc(&pdev->dev, + struct_size(ctrl, path_plats, mi->path_num), + GFP_KERNEL); if (!ctrl) { ret = -ENOMEM; goto failed; diff --git a/drivers/video/fbdev/mxsfb.c b/drivers/video/fbdev/mxsfb.c deleted file mode 100644 index d8bebe35b410..000000000000 --- a/drivers/video/fbdev/mxsfb.c +++ /dev/null @@ -1,1028 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Copyright (C) 2010 Juergen Beisert, Pengutronix - * - * This code is based on: - * Author: Vitaly Wool <[email protected]> - * - * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. - * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. - */ - -#define DRIVER_NAME "mxsfb" - -/** - * @file - * @brief LCDIF driver for i.MX23 and i.MX28 - * - * The LCDIF support four modes of operation - * - MPU interface (to drive smart displays) -> not supported yet - * - VSYNC interface (like MPU interface plus Vsync) -> not supported yet - * - Dotclock interface (to drive LC displays with RGB data and sync signals) - * - DVI (to drive ITU-R BT656) -> not supported yet - * - * This driver depends on a correct setup of the pins used for this purpose - * (platform specific). - * - * For the developer: Don't forget to set the data bus width to the display - * in the imx_fb_videomode structure. You will else end up with ugly colours. - * If you fight against jitter you can vary the clock delay. This is a feature - * of the i.MX28 and you can vary it between 2 ns ... 8 ns in 2 ns steps. Give - * the required value in the imx_fb_videomode structure. - */ - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/of_device.h> -#include <linux/platform_device.h> -#include <linux/clk.h> -#include <linux/dma-mapping.h> -#include <linux/io.h> -#include <linux/fb.h> -#include <linux/regulator/consumer.h> -#include <video/of_display_timing.h> -#include <video/of_videomode.h> -#include <video/videomode.h> - -#define REG_SET 4 -#define REG_CLR 8 - -#define LCDC_CTRL 0x00 -#define LCDC_CTRL1 0x10 -#define LCDC_V4_CTRL2 0x20 -#define LCDC_V3_TRANSFER_COUNT 0x20 -#define LCDC_V4_TRANSFER_COUNT 0x30 -#define LCDC_V4_CUR_BUF 0x40 -#define LCDC_V4_NEXT_BUF 0x50 -#define LCDC_V3_CUR_BUF 0x30 -#define LCDC_V3_NEXT_BUF 0x40 -#define LCDC_TIMING 0x60 -#define LCDC_VDCTRL0 0x70 -#define LCDC_VDCTRL1 0x80 -#define LCDC_VDCTRL2 0x90 -#define LCDC_VDCTRL3 0xa0 -#define LCDC_VDCTRL4 0xb0 -#define LCDC_DVICTRL0 0xc0 -#define LCDC_DVICTRL1 0xd0 -#define LCDC_DVICTRL2 0xe0 -#define LCDC_DVICTRL3 0xf0 -#define LCDC_DVICTRL4 0x100 -#define LCDC_V4_DATA 0x180 -#define LCDC_V3_DATA 0x1b0 -#define LCDC_V4_DEBUG0 0x1d0 -#define LCDC_V3_DEBUG0 0x1f0 - -#define CTRL_SFTRST (1 << 31) -#define CTRL_CLKGATE (1 << 30) -#define CTRL_BYPASS_COUNT (1 << 19) -#define CTRL_VSYNC_MODE (1 << 18) -#define CTRL_DOTCLK_MODE (1 << 17) -#define CTRL_DATA_SELECT (1 << 16) -#define CTRL_SET_BUS_WIDTH(x) (((x) & 0x3) << 10) -#define CTRL_GET_BUS_WIDTH(x) (((x) >> 10) & 0x3) -#define CTRL_SET_WORD_LENGTH(x) (((x) & 0x3) << 8) -#define CTRL_GET_WORD_LENGTH(x) (((x) >> 8) & 0x3) -#define CTRL_MASTER (1 << 5) -#define CTRL_DF16 (1 << 3) -#define CTRL_DF18 (1 << 2) -#define CTRL_DF24 (1 << 1) -#define CTRL_RUN (1 << 0) - -#define CTRL1_FIFO_CLEAR (1 << 21) -#define CTRL1_SET_BYTE_PACKAGING(x) (((x) & 0xf) << 16) -#define CTRL1_GET_BYTE_PACKAGING(x) (((x) >> 16) & 0xf) - -#define TRANSFER_COUNT_SET_VCOUNT(x) (((x) & 0xffff) << 16) -#define TRANSFER_COUNT_GET_VCOUNT(x) (((x) >> 16) & 0xffff) -#define TRANSFER_COUNT_SET_HCOUNT(x) ((x) & 0xffff) -#define TRANSFER_COUNT_GET_HCOUNT(x) ((x) & 0xffff) - - -#define VDCTRL0_ENABLE_PRESENT (1 << 28) -#define VDCTRL0_VSYNC_ACT_HIGH (1 << 27) -#define VDCTRL0_HSYNC_ACT_HIGH (1 << 26) -#define VDCTRL0_DOTCLK_ACT_FALLING (1 << 25) -#define VDCTRL0_ENABLE_ACT_HIGH (1 << 24) -#define VDCTRL0_VSYNC_PERIOD_UNIT (1 << 21) -#define VDCTRL0_VSYNC_PULSE_WIDTH_UNIT (1 << 20) -#define VDCTRL0_HALF_LINE (1 << 19) -#define VDCTRL0_HALF_LINE_MODE (1 << 18) -#define VDCTRL0_SET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff) -#define VDCTRL0_GET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff) - -#define VDCTRL2_SET_HSYNC_PERIOD(x) ((x) & 0x3ffff) -#define VDCTRL2_GET_HSYNC_PERIOD(x) ((x) & 0x3ffff) - -#define VDCTRL3_MUX_SYNC_SIGNALS (1 << 29) -#define VDCTRL3_VSYNC_ONLY (1 << 28) -#define SET_HOR_WAIT_CNT(x) (((x) & 0xfff) << 16) -#define GET_HOR_WAIT_CNT(x) (((x) >> 16) & 0xfff) -#define SET_VERT_WAIT_CNT(x) ((x) & 0xffff) -#define GET_VERT_WAIT_CNT(x) ((x) & 0xffff) - -#define VDCTRL4_SET_DOTCLK_DLY(x) (((x) & 0x7) << 29) /* v4 only */ -#define VDCTRL4_GET_DOTCLK_DLY(x) (((x) >> 29) & 0x7) /* v4 only */ -#define VDCTRL4_SYNC_SIGNALS_ON (1 << 18) -#define SET_DOTCLK_H_VALID_DATA_CNT(x) ((x) & 0x3ffff) - -#define DEBUG0_HSYNC (1 < 26) -#define DEBUG0_VSYNC (1 < 25) - -#define MIN_XRES 120 -#define MIN_YRES 120 - -#define RED 0 -#define GREEN 1 -#define BLUE 2 -#define TRANSP 3 - -#define STMLCDIF_8BIT 1 /** pixel data bus to the display is of 8 bit width */ -#define STMLCDIF_16BIT 0 /** pixel data bus to the display is of 16 bit width */ -#define STMLCDIF_18BIT 2 /** pixel data bus to the display is of 18 bit width */ -#define STMLCDIF_24BIT 3 /** pixel data bus to the display is of 24 bit width */ - -#define MXSFB_SYNC_DATA_ENABLE_HIGH_ACT (1 << 6) -#define MXSFB_SYNC_DOTCLK_FALLING_ACT (1 << 7) /* negative edge sampling */ - -enum mxsfb_devtype { - MXSFB_V3, - MXSFB_V4, -}; - -/* CPU dependent register offsets */ -struct mxsfb_devdata { - unsigned transfer_count; - unsigned cur_buf; - unsigned next_buf; - unsigned debug0; - unsigned hs_wdth_mask; - unsigned hs_wdth_shift; - unsigned ipversion; -}; - -struct mxsfb_info { - struct platform_device *pdev; - struct clk *clk; - struct clk *clk_axi; - struct clk *clk_disp_axi; - void __iomem *base; /* registers */ - unsigned allocated_size; - int enabled; - unsigned ld_intf_width; - unsigned dotclk_delay; - const struct mxsfb_devdata *devdata; - u32 sync; - struct regulator *reg_lcd; - int pre_init; -}; - -#define mxsfb_is_v3(host) (host->devdata->ipversion == 3) -#define mxsfb_is_v4(host) (host->devdata->ipversion == 4) - -static const struct mxsfb_devdata mxsfb_devdata[] = { - [MXSFB_V3] = { - .transfer_count = LCDC_V3_TRANSFER_COUNT, - .cur_buf = LCDC_V3_CUR_BUF, - .next_buf = LCDC_V3_NEXT_BUF, - .debug0 = LCDC_V3_DEBUG0, - .hs_wdth_mask = 0xff, - .hs_wdth_shift = 24, - .ipversion = 3, - }, - [MXSFB_V4] = { - .transfer_count = LCDC_V4_TRANSFER_COUNT, - .cur_buf = LCDC_V4_CUR_BUF, - .next_buf = LCDC_V4_NEXT_BUF, - .debug0 = LCDC_V4_DEBUG0, - .hs_wdth_mask = 0x3fff, - .hs_wdth_shift = 18, - .ipversion = 4, - }, -}; - -/* mask and shift depends on architecture */ -static inline u32 set_hsync_pulse_width(struct mxsfb_info *host, unsigned val) -{ - return (val & host->devdata->hs_wdth_mask) << - host->devdata->hs_wdth_shift; -} - -static inline u32 get_hsync_pulse_width(struct mxsfb_info *host, unsigned val) -{ - return (val >> host->devdata->hs_wdth_shift) & - host->devdata->hs_wdth_mask; -} - -static const struct fb_bitfield def_rgb565[] = { - [RED] = { - .offset = 11, - .length = 5, - }, - [GREEN] = { - .offset = 5, - .length = 6, - }, - [BLUE] = { - .offset = 0, - .length = 5, - }, - [TRANSP] = { /* no support for transparency */ - .length = 0, - } -}; - -static const struct fb_bitfield def_rgb888[] = { - [RED] = { - .offset = 16, - .length = 8, - }, - [GREEN] = { - .offset = 8, - .length = 8, - }, - [BLUE] = { - .offset = 0, - .length = 8, - }, - [TRANSP] = { /* no support for transparency */ - .length = 0, - } -}; - -static inline unsigned chan_to_field(unsigned chan, struct fb_bitfield *bf) -{ - chan &= 0xffff; - chan >>= 16 - bf->length; - return chan << bf->offset; -} - -static int mxsfb_check_var(struct fb_var_screeninfo *var, - struct fb_info *fb_info) -{ - struct mxsfb_info *host = fb_info->par; - const struct fb_bitfield *rgb = NULL; - - if (var->xres < MIN_XRES) - var->xres = MIN_XRES; - if (var->yres < MIN_YRES) - var->yres = MIN_YRES; - - var->xres_virtual = var->xres; - - var->yres_virtual = var->yres; - - switch (var->bits_per_pixel) { - case 16: - /* always expect RGB 565 */ - rgb = def_rgb565; - break; - case 32: - switch (host->ld_intf_width) { - case STMLCDIF_8BIT: - pr_debug("Unsupported LCD bus width mapping\n"); - break; - case STMLCDIF_16BIT: - case STMLCDIF_18BIT: - case STMLCDIF_24BIT: - /* real 24 bit */ - rgb = def_rgb888; - break; - } - break; - default: - pr_err("Unsupported colour depth: %u\n", var->bits_per_pixel); - return -EINVAL; - } - - /* - * Copy the RGB parameters for this display - * from the machine specific parameters. - */ - var->red = rgb[RED]; - var->green = rgb[GREEN]; - var->blue = rgb[BLUE]; - var->transp = rgb[TRANSP]; - - return 0; -} - -static inline void mxsfb_enable_axi_clk(struct mxsfb_info *host) -{ - if (host->clk_axi) - clk_prepare_enable(host->clk_axi); -} - -static inline void mxsfb_disable_axi_clk(struct mxsfb_info *host) -{ - if (host->clk_axi) - clk_disable_unprepare(host->clk_axi); -} - -static void mxsfb_enable_controller(struct fb_info *fb_info) -{ - struct mxsfb_info *host = fb_info->par; - u32 reg; - int ret; - - dev_dbg(&host->pdev->dev, "%s\n", __func__); - - if (host->reg_lcd) { - ret = regulator_enable(host->reg_lcd); - if (ret) { - dev_err(&host->pdev->dev, - "lcd regulator enable failed: %d\n", ret); - return; - } - } - - if (host->clk_disp_axi) - clk_prepare_enable(host->clk_disp_axi); - clk_prepare_enable(host->clk); - clk_set_rate(host->clk, PICOS2KHZ(fb_info->var.pixclock) * 1000U); - - mxsfb_enable_axi_clk(host); - - /* if it was disabled, re-enable the mode again */ - writel(CTRL_DOTCLK_MODE, host->base + LCDC_CTRL + REG_SET); - - /* enable the SYNC signals first, then the DMA engine */ - reg = readl(host->base + LCDC_VDCTRL4); - reg |= VDCTRL4_SYNC_SIGNALS_ON; - writel(reg, host->base + LCDC_VDCTRL4); - - writel(CTRL_RUN, host->base + LCDC_CTRL + REG_SET); - - host->enabled = 1; -} - -static void mxsfb_disable_controller(struct fb_info *fb_info) -{ - struct mxsfb_info *host = fb_info->par; - unsigned loop; - u32 reg; - int ret; - - dev_dbg(&host->pdev->dev, "%s\n", __func__); - - /* - * Even if we disable the controller here, it will still continue - * until its FIFOs are running out of data - */ - writel(CTRL_DOTCLK_MODE, host->base + LCDC_CTRL + REG_CLR); - - loop = 1000; - while (loop) { - reg = readl(host->base + LCDC_CTRL); - if (!(reg & CTRL_RUN)) - break; - loop--; - } - - reg = readl(host->base + LCDC_VDCTRL4); - writel(reg & ~VDCTRL4_SYNC_SIGNALS_ON, host->base + LCDC_VDCTRL4); - - mxsfb_disable_axi_clk(host); - - clk_disable_unprepare(host->clk); - if (host->clk_disp_axi) - clk_disable_unprepare(host->clk_disp_axi); - - host->enabled = 0; - - if (host->reg_lcd) { - ret = regulator_disable(host->reg_lcd); - if (ret) - dev_err(&host->pdev->dev, - "lcd regulator disable failed: %d\n", ret); - } -} - -static int mxsfb_set_par(struct fb_info *fb_info) -{ - struct mxsfb_info *host = fb_info->par; - u32 ctrl, vdctrl0, vdctrl4; - int line_size, fb_size; - int reenable = 0; - - line_size = fb_info->var.xres * (fb_info->var.bits_per_pixel >> 3); - fb_size = fb_info->var.yres_virtual * line_size; - - if (fb_size > fb_info->fix.smem_len) - return -ENOMEM; - - fb_info->fix.line_length = line_size; - - if (host->pre_init) { - mxsfb_enable_controller(fb_info); - host->pre_init = 0; - return 0; - } - - /* - * It seems, you can't re-program the controller if it is still running. - * This may lead into shifted pictures (FIFO issue?). - * So, first stop the controller and drain its FIFOs - */ - if (host->enabled) { - reenable = 1; - mxsfb_disable_controller(fb_info); - } - - mxsfb_enable_axi_clk(host); - - /* clear the FIFOs */ - writel(CTRL1_FIFO_CLEAR, host->base + LCDC_CTRL1 + REG_SET); - - ctrl = CTRL_BYPASS_COUNT | CTRL_MASTER | - CTRL_SET_BUS_WIDTH(host->ld_intf_width); - - switch (fb_info->var.bits_per_pixel) { - case 16: - dev_dbg(&host->pdev->dev, "Setting up RGB565 mode\n"); - ctrl |= CTRL_SET_WORD_LENGTH(0); - writel(CTRL1_SET_BYTE_PACKAGING(0xf), host->base + LCDC_CTRL1); - break; - case 32: - dev_dbg(&host->pdev->dev, "Setting up RGB888/666 mode\n"); - ctrl |= CTRL_SET_WORD_LENGTH(3); - switch (host->ld_intf_width) { - case STMLCDIF_8BIT: - mxsfb_disable_axi_clk(host); - dev_err(&host->pdev->dev, - "Unsupported LCD bus width mapping\n"); - return -EINVAL; - case STMLCDIF_16BIT: - case STMLCDIF_18BIT: - case STMLCDIF_24BIT: - /* real 24 bit */ - break; - } - /* do not use packed pixels = one pixel per word instead */ - writel(CTRL1_SET_BYTE_PACKAGING(0x7), host->base + LCDC_CTRL1); - break; - default: - mxsfb_disable_axi_clk(host); - dev_err(&host->pdev->dev, "Unhandled color depth of %u\n", - fb_info->var.bits_per_pixel); - return -EINVAL; - } - - writel(ctrl, host->base + LCDC_CTRL); - - writel(TRANSFER_COUNT_SET_VCOUNT(fb_info->var.yres) | - TRANSFER_COUNT_SET_HCOUNT(fb_info->var.xres), - host->base + host->devdata->transfer_count); - - vdctrl0 = VDCTRL0_ENABLE_PRESENT | /* always in DOTCLOCK mode */ - VDCTRL0_VSYNC_PERIOD_UNIT | - VDCTRL0_VSYNC_PULSE_WIDTH_UNIT | - VDCTRL0_SET_VSYNC_PULSE_WIDTH(fb_info->var.vsync_len); - if (fb_info->var.sync & FB_SYNC_HOR_HIGH_ACT) - vdctrl0 |= VDCTRL0_HSYNC_ACT_HIGH; - if (fb_info->var.sync & FB_SYNC_VERT_HIGH_ACT) - vdctrl0 |= VDCTRL0_VSYNC_ACT_HIGH; - if (host->sync & MXSFB_SYNC_DATA_ENABLE_HIGH_ACT) - vdctrl0 |= VDCTRL0_ENABLE_ACT_HIGH; - if (host->sync & MXSFB_SYNC_DOTCLK_FALLING_ACT) - vdctrl0 |= VDCTRL0_DOTCLK_ACT_FALLING; - - writel(vdctrl0, host->base + LCDC_VDCTRL0); - - /* frame length in lines */ - writel(fb_info->var.upper_margin + fb_info->var.vsync_len + - fb_info->var.lower_margin + fb_info->var.yres, - host->base + LCDC_VDCTRL1); - - /* line length in units of clocks or pixels */ - writel(set_hsync_pulse_width(host, fb_info->var.hsync_len) | - VDCTRL2_SET_HSYNC_PERIOD(fb_info->var.left_margin + - fb_info->var.hsync_len + fb_info->var.right_margin + - fb_info->var.xres), - host->base + LCDC_VDCTRL2); - - writel(SET_HOR_WAIT_CNT(fb_info->var.left_margin + - fb_info->var.hsync_len) | - SET_VERT_WAIT_CNT(fb_info->var.upper_margin + - fb_info->var.vsync_len), - host->base + LCDC_VDCTRL3); - - vdctrl4 = SET_DOTCLK_H_VALID_DATA_CNT(fb_info->var.xres); - if (mxsfb_is_v4(host)) - vdctrl4 |= VDCTRL4_SET_DOTCLK_DLY(host->dotclk_delay); - writel(vdctrl4, host->base + LCDC_VDCTRL4); - - writel(fb_info->fix.smem_start + - fb_info->fix.line_length * fb_info->var.yoffset, - host->base + host->devdata->next_buf); - - mxsfb_disable_axi_clk(host); - - if (reenable) - mxsfb_enable_controller(fb_info); - - return 0; -} - -static int mxsfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, - u_int transp, struct fb_info *fb_info) -{ - unsigned int val; - int ret = -EINVAL; - - /* - * If greyscale is true, then we convert the RGB value - * to greyscale no matter what visual we are using. - */ - if (fb_info->var.grayscale) - red = green = blue = (19595 * red + 38470 * green + - 7471 * blue) >> 16; - - switch (fb_info->fix.visual) { - case FB_VISUAL_TRUECOLOR: - /* - * 12 or 16-bit True Colour. We encode the RGB value - * according to the RGB bitfield information. - */ - if (regno < 16) { - u32 *pal = fb_info->pseudo_palette; - - val = chan_to_field(red, &fb_info->var.red); - val |= chan_to_field(green, &fb_info->var.green); - val |= chan_to_field(blue, &fb_info->var.blue); - - pal[regno] = val; - ret = 0; - } - break; - - case FB_VISUAL_STATIC_PSEUDOCOLOR: - case FB_VISUAL_PSEUDOCOLOR: - break; - } - - return ret; -} - -static int mxsfb_blank(int blank, struct fb_info *fb_info) -{ - struct mxsfb_info *host = fb_info->par; - - switch (blank) { - case FB_BLANK_POWERDOWN: - case FB_BLANK_VSYNC_SUSPEND: - case FB_BLANK_HSYNC_SUSPEND: - case FB_BLANK_NORMAL: - if (host->enabled) - mxsfb_disable_controller(fb_info); - break; - - case FB_BLANK_UNBLANK: - if (!host->enabled) - mxsfb_enable_controller(fb_info); - break; - } - return 0; -} - -static int mxsfb_pan_display(struct fb_var_screeninfo *var, - struct fb_info *fb_info) -{ - struct mxsfb_info *host = fb_info->par; - unsigned offset; - - if (var->xoffset != 0) - return -EINVAL; - - offset = fb_info->fix.line_length * var->yoffset; - - mxsfb_enable_axi_clk(host); - - /* update on next VSYNC */ - writel(fb_info->fix.smem_start + offset, - host->base + host->devdata->next_buf); - - mxsfb_disable_axi_clk(host); - - return 0; -} - -static struct fb_ops mxsfb_ops = { - .owner = THIS_MODULE, - .fb_check_var = mxsfb_check_var, - .fb_set_par = mxsfb_set_par, - .fb_setcolreg = mxsfb_setcolreg, - .fb_blank = mxsfb_blank, - .fb_pan_display = mxsfb_pan_display, - .fb_fillrect = cfb_fillrect, - .fb_copyarea = cfb_copyarea, - .fb_imageblit = cfb_imageblit, -}; - -static int mxsfb_restore_mode(struct fb_info *fb_info, - struct fb_videomode *vmode) -{ - struct mxsfb_info *host = fb_info->par; - unsigned period; - unsigned long pa, fbsize; - int bits_per_pixel, ofs, ret = 0; - u32 transfer_count, vdctrl0, vdctrl2, vdctrl3, vdctrl4, ctrl; - - mxsfb_enable_axi_clk(host); - - /* Only restore the mode when the controller is running */ - ctrl = readl(host->base + LCDC_CTRL); - if (!(ctrl & CTRL_RUN)) { - ret = -EINVAL; - goto err; - } - - vdctrl0 = readl(host->base + LCDC_VDCTRL0); - vdctrl2 = readl(host->base + LCDC_VDCTRL2); - vdctrl3 = readl(host->base + LCDC_VDCTRL3); - vdctrl4 = readl(host->base + LCDC_VDCTRL4); - - transfer_count = readl(host->base + host->devdata->transfer_count); - - vmode->xres = TRANSFER_COUNT_GET_HCOUNT(transfer_count); - vmode->yres = TRANSFER_COUNT_GET_VCOUNT(transfer_count); - - switch (CTRL_GET_WORD_LENGTH(ctrl)) { - case 0: - bits_per_pixel = 16; - break; - case 3: - bits_per_pixel = 32; - break; - case 1: - default: - ret = -EINVAL; - goto err; - } - - fb_info->var.bits_per_pixel = bits_per_pixel; - - vmode->pixclock = KHZ2PICOS(clk_get_rate(host->clk) / 1000U); - vmode->hsync_len = get_hsync_pulse_width(host, vdctrl2); - vmode->left_margin = GET_HOR_WAIT_CNT(vdctrl3) - vmode->hsync_len; - vmode->right_margin = VDCTRL2_GET_HSYNC_PERIOD(vdctrl2) - - vmode->hsync_len - vmode->left_margin - vmode->xres; - vmode->vsync_len = VDCTRL0_GET_VSYNC_PULSE_WIDTH(vdctrl0); - period = readl(host->base + LCDC_VDCTRL1); - vmode->upper_margin = GET_VERT_WAIT_CNT(vdctrl3) - vmode->vsync_len; - vmode->lower_margin = period - vmode->vsync_len - - vmode->upper_margin - vmode->yres; - - vmode->vmode = FB_VMODE_NONINTERLACED; - - vmode->sync = 0; - if (vdctrl0 & VDCTRL0_HSYNC_ACT_HIGH) - vmode->sync |= FB_SYNC_HOR_HIGH_ACT; - if (vdctrl0 & VDCTRL0_VSYNC_ACT_HIGH) - vmode->sync |= FB_SYNC_VERT_HIGH_ACT; - - pr_debug("Reconstructed video mode:\n"); - pr_debug("%dx%d, hsync: %u left: %u, right: %u, vsync: %u, upper: %u, lower: %u\n", - vmode->xres, vmode->yres, vmode->hsync_len, vmode->left_margin, - vmode->right_margin, vmode->vsync_len, vmode->upper_margin, - vmode->lower_margin); - pr_debug("pixclk: %ldkHz\n", PICOS2KHZ(vmode->pixclock)); - - host->ld_intf_width = CTRL_GET_BUS_WIDTH(ctrl); - host->dotclk_delay = VDCTRL4_GET_DOTCLK_DLY(vdctrl4); - - fb_info->fix.line_length = vmode->xres * (bits_per_pixel >> 3); - - pa = readl(host->base + host->devdata->cur_buf); - fbsize = fb_info->fix.line_length * vmode->yres; - if (pa < fb_info->fix.smem_start) { - ret = -EINVAL; - goto err; - } - if (pa + fbsize > fb_info->fix.smem_start + fb_info->fix.smem_len) { - ret = -EINVAL; - goto err; - } - ofs = pa - fb_info->fix.smem_start; - if (ofs) { - memmove(fb_info->screen_base, fb_info->screen_base + ofs, fbsize); - writel(fb_info->fix.smem_start, host->base + host->devdata->next_buf); - } - - fb_info->fix.ypanstep = 1; - - clk_prepare_enable(host->clk); - host->enabled = 1; - -err: - if (ret) - mxsfb_disable_axi_clk(host); - - return ret; -} - -static int mxsfb_init_fbinfo_dt(struct fb_info *fb_info, - struct fb_videomode *vmode) -{ - struct mxsfb_info *host = fb_info->par; - struct fb_var_screeninfo *var = &fb_info->var; - struct device *dev = &host->pdev->dev; - struct device_node *np = host->pdev->dev.of_node; - struct device_node *display_np; - struct videomode vm; - u32 width; - int ret; - - display_np = of_parse_phandle(np, "display", 0); - if (!display_np) { - dev_err(dev, "failed to find display phandle\n"); - return -ENOENT; - } - - ret = of_property_read_u32(display_np, "bus-width", &width); - if (ret < 0) { - dev_err(dev, "failed to get property bus-width\n"); - goto put_display_node; - } - - switch (width) { - case 8: - host->ld_intf_width = STMLCDIF_8BIT; - break; - case 16: - host->ld_intf_width = STMLCDIF_16BIT; - break; - case 18: - host->ld_intf_width = STMLCDIF_18BIT; - break; - case 24: - host->ld_intf_width = STMLCDIF_24BIT; - break; - default: - dev_err(dev, "invalid bus-width value\n"); - ret = -EINVAL; - goto put_display_node; - } - - ret = of_property_read_u32(display_np, "bits-per-pixel", - &var->bits_per_pixel); - if (ret < 0) { - dev_err(dev, "failed to get property bits-per-pixel\n"); - goto put_display_node; - } - - ret = of_get_videomode(display_np, &vm, OF_USE_NATIVE_MODE); - if (ret) { - dev_err(dev, "failed to get videomode from DT\n"); - goto put_display_node; - } - - ret = fb_videomode_from_videomode(&vm, vmode); - if (ret < 0) - goto put_display_node; - - if (vm.flags & DISPLAY_FLAGS_DE_HIGH) - host->sync |= MXSFB_SYNC_DATA_ENABLE_HIGH_ACT; - - /* - * The PIXDATA flags of the display_flags enum are controller - * centric, e.g. NEGEDGE means drive data on negative edge. - * However, the drivers flag is display centric: Sample the - * data on negative (falling) edge. Therefore, check for the - * POSEDGE flag: - * drive on positive edge => sample on negative edge - */ - if (vm.flags & DISPLAY_FLAGS_PIXDATA_POSEDGE) - host->sync |= MXSFB_SYNC_DOTCLK_FALLING_ACT; - -put_display_node: - of_node_put(display_np); - return ret; -} - -static int mxsfb_init_fbinfo(struct fb_info *fb_info, - struct fb_videomode *vmode) -{ - int ret; - struct mxsfb_info *host = fb_info->par; - struct device *dev = &host->pdev->dev; - struct fb_var_screeninfo *var = &fb_info->var; - dma_addr_t fb_phys; - void *fb_virt; - unsigned fb_size; - - fb_info->fbops = &mxsfb_ops; - fb_info->flags = FBINFO_FLAG_DEFAULT | FBINFO_READS_FAST; - strlcpy(fb_info->fix.id, "mxs", sizeof(fb_info->fix.id)); - fb_info->fix.type = FB_TYPE_PACKED_PIXELS; - fb_info->fix.ypanstep = 1; - fb_info->fix.visual = FB_VISUAL_TRUECOLOR, - fb_info->fix.accel = FB_ACCEL_NONE; - - ret = mxsfb_init_fbinfo_dt(fb_info, vmode); - if (ret) - return ret; - - var->nonstd = 0; - var->activate = FB_ACTIVATE_NOW; - var->accel_flags = 0; - var->vmode = FB_VMODE_NONINTERLACED; - - /* Memory allocation for framebuffer */ - fb_size = SZ_2M; - fb_virt = dma_alloc_wc(dev, PAGE_ALIGN(fb_size), &fb_phys, GFP_KERNEL); - if (!fb_virt) - return -ENOMEM; - - fb_info->fix.smem_start = fb_phys; - fb_info->screen_base = fb_virt; - fb_info->screen_size = fb_info->fix.smem_len = fb_size; - - if (mxsfb_restore_mode(fb_info, vmode)) - memset(fb_virt, 0, fb_size); - - return 0; -} - -static void mxsfb_free_videomem(struct fb_info *fb_info) -{ - struct mxsfb_info *host = fb_info->par; - struct device *dev = &host->pdev->dev; - - dma_free_wc(dev, fb_info->screen_size, fb_info->screen_base, - fb_info->fix.smem_start); -} - -static const struct platform_device_id mxsfb_devtype[] = { - { - .name = "imx23-fb", - .driver_data = MXSFB_V3, - }, { - .name = "imx28-fb", - .driver_data = MXSFB_V4, - }, { - /* sentinel */ - } -}; -MODULE_DEVICE_TABLE(platform, mxsfb_devtype); - -static const struct of_device_id mxsfb_dt_ids[] = { - { .compatible = "fsl,imx23-lcdif", .data = &mxsfb_devtype[0], }, - { .compatible = "fsl,imx28-lcdif", .data = &mxsfb_devtype[1], }, - { /* sentinel */ } -}; -MODULE_DEVICE_TABLE(of, mxsfb_dt_ids); - -static int mxsfb_probe(struct platform_device *pdev) -{ - const struct of_device_id *of_id = - of_match_device(mxsfb_dt_ids, &pdev->dev); - struct resource *res; - struct mxsfb_info *host; - struct fb_info *fb_info; - struct fb_videomode *mode; - int ret; - - if (of_id) - pdev->id_entry = of_id->data; - - fb_info = framebuffer_alloc(sizeof(struct mxsfb_info), &pdev->dev); - if (!fb_info) { - dev_err(&pdev->dev, "Failed to allocate fbdev\n"); - return -ENOMEM; - } - - mode = devm_kzalloc(&pdev->dev, sizeof(struct fb_videomode), - GFP_KERNEL); - if (mode == NULL) - return -ENOMEM; - - host = fb_info->par; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - host->base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(host->base)) { - ret = PTR_ERR(host->base); - goto fb_release; - } - - host->pdev = pdev; - platform_set_drvdata(pdev, host); - - host->devdata = &mxsfb_devdata[pdev->id_entry->driver_data]; - - host->clk = devm_clk_get(&host->pdev->dev, NULL); - if (IS_ERR(host->clk)) { - ret = PTR_ERR(host->clk); - goto fb_release; - } - - host->clk_axi = devm_clk_get(&host->pdev->dev, "axi"); - if (IS_ERR(host->clk_axi)) - host->clk_axi = NULL; - - host->clk_disp_axi = devm_clk_get(&host->pdev->dev, "disp_axi"); - if (IS_ERR(host->clk_disp_axi)) - host->clk_disp_axi = NULL; - - host->reg_lcd = devm_regulator_get(&pdev->dev, "lcd"); - if (IS_ERR(host->reg_lcd)) - host->reg_lcd = NULL; - -#if defined(CONFIG_FB_PRE_INIT_FB) - host->pre_init = 1; -#endif - - fb_info->pseudo_palette = devm_kcalloc(&pdev->dev, 16, sizeof(u32), - GFP_KERNEL); - if (!fb_info->pseudo_palette) { - ret = -ENOMEM; - goto fb_release; - } - - ret = mxsfb_init_fbinfo(fb_info, mode); - if (ret != 0) - goto fb_release; - - fb_videomode_to_var(&fb_info->var, mode); - - /* init the color fields */ - mxsfb_check_var(&fb_info->var, fb_info); - - platform_set_drvdata(pdev, fb_info); - - ret = register_framebuffer(fb_info); - if (ret != 0) { - dev_err(&pdev->dev,"Failed to register framebuffer\n"); - goto fb_destroy; - } - - if (!host->enabled) { - mxsfb_enable_axi_clk(host); - writel(0, host->base + LCDC_CTRL); - mxsfb_disable_axi_clk(host); - mxsfb_set_par(fb_info); - mxsfb_enable_controller(fb_info); - } - - host->pre_init = 0; - dev_info(&pdev->dev, "initialized\n"); - - return 0; - -fb_destroy: - if (host->enabled) - clk_disable_unprepare(host->clk); -fb_release: - framebuffer_release(fb_info); - - return ret; -} - -static int mxsfb_remove(struct platform_device *pdev) -{ - struct fb_info *fb_info = platform_get_drvdata(pdev); - struct mxsfb_info *host = fb_info->par; - - if (host->enabled) - mxsfb_disable_controller(fb_info); - - unregister_framebuffer(fb_info); - mxsfb_free_videomem(fb_info); - - framebuffer_release(fb_info); - - return 0; -} - -static void mxsfb_shutdown(struct platform_device *pdev) -{ - struct fb_info *fb_info = platform_get_drvdata(pdev); - struct mxsfb_info *host = fb_info->par; - - mxsfb_enable_axi_clk(host); - - /* - * Force stop the LCD controller as keeping it running during reboot - * might interfere with the BootROM's boot mode pads sampling. - */ - writel(CTRL_RUN, host->base + LCDC_CTRL + REG_CLR); - - mxsfb_disable_axi_clk(host); -} - -static struct platform_driver mxsfb_driver = { - .probe = mxsfb_probe, - .remove = mxsfb_remove, - .shutdown = mxsfb_shutdown, - .id_table = mxsfb_devtype, - .driver = { - .name = DRIVER_NAME, - .of_match_table = mxsfb_dt_ids, - }, -}; - -module_platform_driver(mxsfb_driver); - -MODULE_DESCRIPTION("Freescale mxs framebuffer driver"); -MODULE_AUTHOR("Sascha Hauer, Pengutronix"); -MODULE_LICENSE("GPL"); diff --git a/drivers/video/fbdev/omap2/omapfb/dss/Kconfig b/drivers/video/fbdev/omap2/omapfb/dss/Kconfig index a34820e8ab97..36b97fee2d57 100644 --- a/drivers/video/fbdev/omap2/omapfb/dss/Kconfig +++ b/drivers/video/fbdev/omap2/omapfb/dss/Kconfig @@ -39,18 +39,6 @@ config FB_OMAP2_DSS_DPI help DPI Interface. This is the Parallel Display Interface. -config FB_OMAP2_DSS_RFBI - bool "RFBI support" - depends on BROKEN - help - MIPI DBI support (RFBI, Remote Framebuffer Interface, in Texas - Instrument's terminology). - - DBI is a bus between the host processor and a peripheral, - such as a display or a framebuffer chip. - - See http://www.mipi.org/ for DBI specifications. - config FB_OMAP2_DSS_VENC bool "VENC support" default y diff --git a/drivers/video/fbdev/omap2/omapfb/dss/Makefile b/drivers/video/fbdev/omap2/omapfb/dss/Makefile index 7318d5260e8d..eb3689ae8d87 100644 --- a/drivers/video/fbdev/omap2/omapfb/dss/Makefile +++ b/drivers/video/fbdev/omap2/omapfb/dss/Makefile @@ -8,7 +8,6 @@ omapdss-y := core.o dss.o dss_features.o dispc.o dispc_coefs.o display.o \ omapdss-y += manager.o manager-sysfs.o overlay.o overlay-sysfs.o apply.o \ dispc-compat.o display-sysfs.o omapdss-$(CONFIG_FB_OMAP2_DSS_DPI) += dpi.o -omapdss-$(CONFIG_FB_OMAP2_DSS_RFBI) += rfbi.o omapdss-$(CONFIG_FB_OMAP2_DSS_VENC) += venc.o omapdss-$(CONFIG_FB_OMAP2_DSS_SDI) += sdi.o omapdss-$(CONFIG_FB_OMAP2_DSS_DSI) += dsi.o diff --git a/drivers/video/fbdev/omap2/omapfb/dss/core.c b/drivers/video/fbdev/omap2/omapfb/dss/core.c index b5956a1a30d4..4a35edbc545f 100644 --- a/drivers/video/fbdev/omap2/omapfb/dss/core.c +++ b/drivers/video/fbdev/omap2/omapfb/dss/core.c @@ -218,9 +218,6 @@ static int (*dss_output_drv_reg_funcs[])(void) __initdata = { #ifdef CONFIG_FB_OMAP2_DSS_SDI sdi_init_platform_driver, #endif -#ifdef CONFIG_FB_OMAP2_DSS_RFBI - rfbi_init_platform_driver, -#endif #ifdef CONFIG_FB_OMAP2_DSS_VENC venc_init_platform_driver, #endif @@ -242,9 +239,6 @@ static void (*dss_output_drv_unreg_funcs[])(void) = { #ifdef CONFIG_FB_OMAP2_DSS_VENC venc_uninit_platform_driver, #endif -#ifdef CONFIG_FB_OMAP2_DSS_RFBI - rfbi_uninit_platform_driver, -#endif #ifdef CONFIG_FB_OMAP2_DSS_SDI sdi_uninit_platform_driver, #endif diff --git a/drivers/video/fbdev/omap2/omapfb/dss/dss.h b/drivers/video/fbdev/omap2/omapfb/dss/dss.h index b1a354494144..f1acead1c415 100644 --- a/drivers/video/fbdev/omap2/omapfb/dss/dss.h +++ b/drivers/video/fbdev/omap2/omapfb/dss/dss.h @@ -472,10 +472,6 @@ void hdmi4_uninit_platform_driver(void); int hdmi5_init_platform_driver(void) __init; void hdmi5_uninit_platform_driver(void); -/* RFBI */ -int rfbi_init_platform_driver(void) __init; -void rfbi_uninit_platform_driver(void); - #ifdef CONFIG_FB_OMAP2_DSS_COLLECT_IRQ_STATS static inline void dss_collect_irq_stats(u32 irqstatus, unsigned *irq_arr) diff --git a/drivers/video/fbdev/omap2/omapfb/dss/rfbi.c b/drivers/video/fbdev/omap2/omapfb/dss/rfbi.c deleted file mode 100644 index 562b0c4ae0c6..000000000000 --- a/drivers/video/fbdev/omap2/omapfb/dss/rfbi.c +++ /dev/null @@ -1,1078 +0,0 @@ -/* - * linux/drivers/video/omap2/dss/rfbi.c - * - * Copyright (C) 2009 Nokia Corporation - * Author: Tomi Valkeinen <[email protected]> - * - * Some code and ideas taken from drivers/video/omap/ driver - * by Imre Deak. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#define DSS_SUBSYS_NAME "RFBI" - -#include <linux/kernel.h> -#include <linux/dma-mapping.h> -#include <linux/export.h> -#include <linux/vmalloc.h> -#include <linux/clk.h> -#include <linux/io.h> -#include <linux/delay.h> -#include <linux/kfifo.h> -#include <linux/ktime.h> -#include <linux/hrtimer.h> -#include <linux/seq_file.h> -#include <linux/semaphore.h> -#include <linux/platform_device.h> -#include <linux/pm_runtime.h> -#include <linux/component.h> - -#include <video/omapfb_dss.h> -#include "dss.h" - -struct rfbi_reg { u16 idx; }; - -#define RFBI_REG(idx) ((const struct rfbi_reg) { idx }) - -#define RFBI_REVISION RFBI_REG(0x0000) -#define RFBI_SYSCONFIG RFBI_REG(0x0010) -#define RFBI_SYSSTATUS RFBI_REG(0x0014) -#define RFBI_CONTROL RFBI_REG(0x0040) -#define RFBI_PIXEL_CNT RFBI_REG(0x0044) -#define RFBI_LINE_NUMBER RFBI_REG(0x0048) -#define RFBI_CMD RFBI_REG(0x004c) -#define RFBI_PARAM RFBI_REG(0x0050) -#define RFBI_DATA RFBI_REG(0x0054) -#define RFBI_READ RFBI_REG(0x0058) -#define RFBI_STATUS RFBI_REG(0x005c) - -#define RFBI_CONFIG(n) RFBI_REG(0x0060 + (n)*0x18) -#define RFBI_ONOFF_TIME(n) RFBI_REG(0x0064 + (n)*0x18) -#define RFBI_CYCLE_TIME(n) RFBI_REG(0x0068 + (n)*0x18) -#define RFBI_DATA_CYCLE1(n) RFBI_REG(0x006c + (n)*0x18) -#define RFBI_DATA_CYCLE2(n) RFBI_REG(0x0070 + (n)*0x18) -#define RFBI_DATA_CYCLE3(n) RFBI_REG(0x0074 + (n)*0x18) - -#define RFBI_VSYNC_WIDTH RFBI_REG(0x0090) -#define RFBI_HSYNC_WIDTH RFBI_REG(0x0094) - -#define REG_FLD_MOD(idx, val, start, end) \ - rfbi_write_reg(idx, FLD_MOD(rfbi_read_reg(idx), val, start, end)) - -enum omap_rfbi_cycleformat { - OMAP_DSS_RFBI_CYCLEFORMAT_1_1 = 0, - OMAP_DSS_RFBI_CYCLEFORMAT_2_1 = 1, - OMAP_DSS_RFBI_CYCLEFORMAT_3_1 = 2, - OMAP_DSS_RFBI_CYCLEFORMAT_3_2 = 3, -}; - -enum omap_rfbi_datatype { - OMAP_DSS_RFBI_DATATYPE_12 = 0, - OMAP_DSS_RFBI_DATATYPE_16 = 1, - OMAP_DSS_RFBI_DATATYPE_18 = 2, - OMAP_DSS_RFBI_DATATYPE_24 = 3, -}; - -enum omap_rfbi_parallelmode { - OMAP_DSS_RFBI_PARALLELMODE_8 = 0, - OMAP_DSS_RFBI_PARALLELMODE_9 = 1, - OMAP_DSS_RFBI_PARALLELMODE_12 = 2, - OMAP_DSS_RFBI_PARALLELMODE_16 = 3, -}; - -static int rfbi_convert_timings(struct rfbi_timings *t); -static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div); - -static struct { - struct platform_device *pdev; - void __iomem *base; - - unsigned long l4_khz; - - enum omap_rfbi_datatype datatype; - enum omap_rfbi_parallelmode parallelmode; - - enum omap_rfbi_te_mode te_mode; - int te_enabled; - - void (*framedone_callback)(void *data); - void *framedone_callback_data; - - struct omap_dss_device *dssdev[2]; - - struct semaphore bus_lock; - - struct omap_video_timings timings; - int pixel_size; - int data_lines; - struct rfbi_timings intf_timings; - - struct omap_dss_device output; -} rfbi; - -static inline void rfbi_write_reg(const struct rfbi_reg idx, u32 val) -{ - __raw_writel(val, rfbi.base + idx.idx); -} - -static inline u32 rfbi_read_reg(const struct rfbi_reg idx) -{ - return __raw_readl(rfbi.base + idx.idx); -} - -static int rfbi_runtime_get(void) -{ - int r; - - DSSDBG("rfbi_runtime_get\n"); - - r = pm_runtime_get_sync(&rfbi.pdev->dev); - WARN_ON(r < 0); - return r < 0 ? r : 0; -} - -static void rfbi_runtime_put(void) -{ - int r; - - DSSDBG("rfbi_runtime_put\n"); - - r = pm_runtime_put_sync(&rfbi.pdev->dev); - WARN_ON(r < 0 && r != -ENOSYS); -} - -static void rfbi_bus_lock(void) -{ - down(&rfbi.bus_lock); -} - -static void rfbi_bus_unlock(void) -{ - up(&rfbi.bus_lock); -} - -static void rfbi_write_command(const void *buf, u32 len) -{ - switch (rfbi.parallelmode) { - case OMAP_DSS_RFBI_PARALLELMODE_8: - { - const u8 *b = buf; - for (; len; len--) - rfbi_write_reg(RFBI_CMD, *b++); - break; - } - - case OMAP_DSS_RFBI_PARALLELMODE_16: - { - const u16 *w = buf; - BUG_ON(len & 1); - for (; len; len -= 2) - rfbi_write_reg(RFBI_CMD, *w++); - break; - } - - case OMAP_DSS_RFBI_PARALLELMODE_9: - case OMAP_DSS_RFBI_PARALLELMODE_12: - default: - BUG(); - } -} - -static void rfbi_read_data(void *buf, u32 len) -{ - switch (rfbi.parallelmode) { - case OMAP_DSS_RFBI_PARALLELMODE_8: - { - u8 *b = buf; - for (; len; len--) { - rfbi_write_reg(RFBI_READ, 0); - *b++ = rfbi_read_reg(RFBI_READ); - } - break; - } - - case OMAP_DSS_RFBI_PARALLELMODE_16: - { - u16 *w = buf; - BUG_ON(len & ~1); - for (; len; len -= 2) { - rfbi_write_reg(RFBI_READ, 0); - *w++ = rfbi_read_reg(RFBI_READ); - } - break; - } - - case OMAP_DSS_RFBI_PARALLELMODE_9: - case OMAP_DSS_RFBI_PARALLELMODE_12: - default: - BUG(); - } -} - -static void rfbi_write_data(const void *buf, u32 len) -{ - switch (rfbi.parallelmode) { - case OMAP_DSS_RFBI_PARALLELMODE_8: - { - const u8 *b = buf; - for (; len; len--) - rfbi_write_reg(RFBI_PARAM, *b++); - break; - } - - case OMAP_DSS_RFBI_PARALLELMODE_16: - { - const u16 *w = buf; - BUG_ON(len & 1); - for (; len; len -= 2) - rfbi_write_reg(RFBI_PARAM, *w++); - break; - } - - case OMAP_DSS_RFBI_PARALLELMODE_9: - case OMAP_DSS_RFBI_PARALLELMODE_12: - default: - BUG(); - - } -} - -static void rfbi_write_pixels(const void __iomem *buf, int scr_width, - u16 x, u16 y, - u16 w, u16 h) -{ - int start_offset = scr_width * y + x; - int horiz_offset = scr_width - w; - int i; - - if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 && - rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) { - const u16 __iomem *pd = buf; - pd += start_offset; - - for (; h; --h) { - for (i = 0; i < w; ++i) { - const u8 __iomem *b = (const u8 __iomem *)pd; - rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1)); - rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0)); - ++pd; - } - pd += horiz_offset; - } - } else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_24 && - rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) { - const u32 __iomem *pd = buf; - pd += start_offset; - - for (; h; --h) { - for (i = 0; i < w; ++i) { - const u8 __iomem *b = (const u8 __iomem *)pd; - rfbi_write_reg(RFBI_PARAM, __raw_readb(b+2)); - rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1)); - rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0)); - ++pd; - } - pd += horiz_offset; - } - } else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 && - rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_16) { - const u16 __iomem *pd = buf; - pd += start_offset; - - for (; h; --h) { - for (i = 0; i < w; ++i) { - rfbi_write_reg(RFBI_PARAM, __raw_readw(pd)); - ++pd; - } - pd += horiz_offset; - } - } else { - BUG(); - } -} - -static int rfbi_transfer_area(struct omap_dss_device *dssdev, - void (*callback)(void *data), void *data) -{ - u32 l; - int r; - struct omap_overlay_manager *mgr = rfbi.output.manager; - u16 width = rfbi.timings.x_res; - u16 height = rfbi.timings.y_res; - - /*BUG_ON(callback == 0);*/ - BUG_ON(rfbi.framedone_callback != NULL); - - DSSDBG("rfbi_transfer_area %dx%d\n", width, height); - - dss_mgr_set_timings(mgr, &rfbi.timings); - - r = dss_mgr_enable(mgr); - if (r) - return r; - - rfbi.framedone_callback = callback; - rfbi.framedone_callback_data = data; - - rfbi_write_reg(RFBI_PIXEL_CNT, width * height); - - l = rfbi_read_reg(RFBI_CONTROL); - l = FLD_MOD(l, 1, 0, 0); /* enable */ - if (!rfbi.te_enabled) - l = FLD_MOD(l, 1, 4, 4); /* ITE */ - - rfbi_write_reg(RFBI_CONTROL, l); - - return 0; -} - -static void framedone_callback(void *data) -{ - void (*callback)(void *data); - - DSSDBG("FRAMEDONE\n"); - - REG_FLD_MOD(RFBI_CONTROL, 0, 0, 0); - - callback = rfbi.framedone_callback; - rfbi.framedone_callback = NULL; - - if (callback != NULL) - callback(rfbi.framedone_callback_data); -} - -#if 1 /* VERBOSE */ -static void rfbi_print_timings(void) -{ - u32 l; - u32 time; - - l = rfbi_read_reg(RFBI_CONFIG(0)); - time = 1000000000 / rfbi.l4_khz; - if (l & (1 << 4)) - time *= 2; - - DSSDBG("Tick time %u ps\n", time); - l = rfbi_read_reg(RFBI_ONOFF_TIME(0)); - DSSDBG("CSONTIME %d, CSOFFTIME %d, WEONTIME %d, WEOFFTIME %d, " - "REONTIME %d, REOFFTIME %d\n", - l & 0x0f, (l >> 4) & 0x3f, (l >> 10) & 0x0f, (l >> 14) & 0x3f, - (l >> 20) & 0x0f, (l >> 24) & 0x3f); - - l = rfbi_read_reg(RFBI_CYCLE_TIME(0)); - DSSDBG("WECYCLETIME %d, RECYCLETIME %d, CSPULSEWIDTH %d, " - "ACCESSTIME %d\n", - (l & 0x3f), (l >> 6) & 0x3f, (l >> 12) & 0x3f, - (l >> 22) & 0x3f); -} -#else -static void rfbi_print_timings(void) {} -#endif - - - - -static u32 extif_clk_period; - -static inline unsigned long round_to_extif_ticks(unsigned long ps, int div) -{ - int bus_tick = extif_clk_period * div; - return (ps + bus_tick - 1) / bus_tick * bus_tick; -} - -static int calc_reg_timing(struct rfbi_timings *t, int div) -{ - t->clk_div = div; - - t->cs_on_time = round_to_extif_ticks(t->cs_on_time, div); - - t->we_on_time = round_to_extif_ticks(t->we_on_time, div); - t->we_off_time = round_to_extif_ticks(t->we_off_time, div); - t->we_cycle_time = round_to_extif_ticks(t->we_cycle_time, div); - - t->re_on_time = round_to_extif_ticks(t->re_on_time, div); - t->re_off_time = round_to_extif_ticks(t->re_off_time, div); - t->re_cycle_time = round_to_extif_ticks(t->re_cycle_time, div); - - t->access_time = round_to_extif_ticks(t->access_time, div); - t->cs_off_time = round_to_extif_ticks(t->cs_off_time, div); - t->cs_pulse_width = round_to_extif_ticks(t->cs_pulse_width, div); - - DSSDBG("[reg]cson %d csoff %d reon %d reoff %d\n", - t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time); - DSSDBG("[reg]weon %d weoff %d recyc %d wecyc %d\n", - t->we_on_time, t->we_off_time, t->re_cycle_time, - t->we_cycle_time); - DSSDBG("[reg]rdaccess %d cspulse %d\n", - t->access_time, t->cs_pulse_width); - - return rfbi_convert_timings(t); -} - -static int calc_extif_timings(struct rfbi_timings *t) -{ - u32 max_clk_div; - int div; - - rfbi_get_clk_info(&extif_clk_period, &max_clk_div); - for (div = 1; div <= max_clk_div; div++) { - if (calc_reg_timing(t, div) == 0) - break; - } - - if (div <= max_clk_div) - return 0; - - DSSERR("can't setup timings\n"); - return -1; -} - - -static void rfbi_set_timings(int rfbi_module, struct rfbi_timings *t) -{ - int r; - - if (!t->converted) { - r = calc_extif_timings(t); - if (r < 0) - DSSERR("Failed to calc timings\n"); - } - - BUG_ON(!t->converted); - - rfbi_write_reg(RFBI_ONOFF_TIME(rfbi_module), t->tim[0]); - rfbi_write_reg(RFBI_CYCLE_TIME(rfbi_module), t->tim[1]); - - /* TIMEGRANULARITY */ - REG_FLD_MOD(RFBI_CONFIG(rfbi_module), - (t->tim[2] ? 1 : 0), 4, 4); - - rfbi_print_timings(); -} - -static int ps_to_rfbi_ticks(int time, int div) -{ - unsigned long tick_ps; - int ret; - - /* Calculate in picosecs to yield more exact results */ - tick_ps = 1000000000 / (rfbi.l4_khz) * div; - - ret = (time + tick_ps - 1) / tick_ps; - - return ret; -} - -static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div) -{ - *clk_period = 1000000000 / rfbi.l4_khz; - *max_clk_div = 2; -} - -static int rfbi_convert_timings(struct rfbi_timings *t) -{ - u32 l; - int reon, reoff, weon, weoff, cson, csoff, cs_pulse; - int actim, recyc, wecyc; - int div = t->clk_div; - - if (div <= 0 || div > 2) - return -1; - - /* Make sure that after conversion it still holds that: - * weoff > weon, reoff > reon, recyc >= reoff, wecyc >= weoff, - * csoff > cson, csoff >= max(weoff, reoff), actim > reon - */ - weon = ps_to_rfbi_ticks(t->we_on_time, div); - weoff = ps_to_rfbi_ticks(t->we_off_time, div); - if (weoff <= weon) - weoff = weon + 1; - if (weon > 0x0f) - return -1; - if (weoff > 0x3f) - return -1; - - reon = ps_to_rfbi_ticks(t->re_on_time, div); - reoff = ps_to_rfbi_ticks(t->re_off_time, div); - if (reoff <= reon) - reoff = reon + 1; - if (reon > 0x0f) - return -1; - if (reoff > 0x3f) - return -1; - - cson = ps_to_rfbi_ticks(t->cs_on_time, div); - csoff = ps_to_rfbi_ticks(t->cs_off_time, div); - if (csoff <= cson) - csoff = cson + 1; - if (csoff < max(weoff, reoff)) - csoff = max(weoff, reoff); - if (cson > 0x0f) - return -1; - if (csoff > 0x3f) - return -1; - - l = cson; - l |= csoff << 4; - l |= weon << 10; - l |= weoff << 14; - l |= reon << 20; - l |= reoff << 24; - - t->tim[0] = l; - - actim = ps_to_rfbi_ticks(t->access_time, div); - if (actim <= reon) - actim = reon + 1; - if (actim > 0x3f) - return -1; - - wecyc = ps_to_rfbi_ticks(t->we_cycle_time, div); - if (wecyc < weoff) - wecyc = weoff; - if (wecyc > 0x3f) - return -1; - - recyc = ps_to_rfbi_ticks(t->re_cycle_time, div); - if (recyc < reoff) - recyc = reoff; - if (recyc > 0x3f) - return -1; - - cs_pulse = ps_to_rfbi_ticks(t->cs_pulse_width, div); - if (cs_pulse > 0x3f) - return -1; - - l = wecyc; - l |= recyc << 6; - l |= cs_pulse << 12; - l |= actim << 22; - - t->tim[1] = l; - - t->tim[2] = div - 1; - - t->converted = 1; - - return 0; -} - -/* xxx FIX module selection missing */ -static int rfbi_setup_te(enum omap_rfbi_te_mode mode, - unsigned hs_pulse_time, unsigned vs_pulse_time, - int hs_pol_inv, int vs_pol_inv, int extif_div) -{ - int hs, vs; - int min; - u32 l; - - hs = ps_to_rfbi_ticks(hs_pulse_time, 1); - vs = ps_to_rfbi_ticks(vs_pulse_time, 1); - if (hs < 2) - return -EDOM; - if (mode == OMAP_DSS_RFBI_TE_MODE_2) - min = 2; - else /* OMAP_DSS_RFBI_TE_MODE_1 */ - min = 4; - if (vs < min) - return -EDOM; - if (vs == hs) - return -EINVAL; - rfbi.te_mode = mode; - DSSDBG("setup_te: mode %d hs %d vs %d hs_inv %d vs_inv %d\n", - mode, hs, vs, hs_pol_inv, vs_pol_inv); - - rfbi_write_reg(RFBI_HSYNC_WIDTH, hs); - rfbi_write_reg(RFBI_VSYNC_WIDTH, vs); - - l = rfbi_read_reg(RFBI_CONFIG(0)); - if (hs_pol_inv) - l &= ~(1 << 21); - else - l |= 1 << 21; - if (vs_pol_inv) - l &= ~(1 << 20); - else - l |= 1 << 20; - - return 0; -} - -/* xxx FIX module selection missing */ -static int rfbi_enable_te(bool enable, unsigned line) -{ - u32 l; - - DSSDBG("te %d line %d mode %d\n", enable, line, rfbi.te_mode); - if (line > (1 << 11) - 1) - return -EINVAL; - - l = rfbi_read_reg(RFBI_CONFIG(0)); - l &= ~(0x3 << 2); - if (enable) { - rfbi.te_enabled = 1; - l |= rfbi.te_mode << 2; - } else - rfbi.te_enabled = 0; - rfbi_write_reg(RFBI_CONFIG(0), l); - rfbi_write_reg(RFBI_LINE_NUMBER, line); - - return 0; -} - -static int rfbi_configure_bus(int rfbi_module, int bpp, int lines) -{ - u32 l; - int cycle1 = 0, cycle2 = 0, cycle3 = 0; - enum omap_rfbi_cycleformat cycleformat; - enum omap_rfbi_datatype datatype; - enum omap_rfbi_parallelmode parallelmode; - - switch (bpp) { - case 12: - datatype = OMAP_DSS_RFBI_DATATYPE_12; - break; - case 16: - datatype = OMAP_DSS_RFBI_DATATYPE_16; - break; - case 18: - datatype = OMAP_DSS_RFBI_DATATYPE_18; - break; - case 24: - datatype = OMAP_DSS_RFBI_DATATYPE_24; - break; - default: - BUG(); - return 1; - } - rfbi.datatype = datatype; - - switch (lines) { - case 8: - parallelmode = OMAP_DSS_RFBI_PARALLELMODE_8; - break; - case 9: - parallelmode = OMAP_DSS_RFBI_PARALLELMODE_9; - break; - case 12: - parallelmode = OMAP_DSS_RFBI_PARALLELMODE_12; - break; - case 16: - parallelmode = OMAP_DSS_RFBI_PARALLELMODE_16; - break; - default: - BUG(); - return 1; - } - rfbi.parallelmode = parallelmode; - - if ((bpp % lines) == 0) { - switch (bpp / lines) { - case 1: - cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_1_1; - break; - case 2: - cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_2_1; - break; - case 3: - cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_1; - break; - default: - BUG(); - return 1; - } - } else if ((2 * bpp % lines) == 0) { - if ((2 * bpp / lines) == 3) - cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_2; - else { - BUG(); - return 1; - } - } else { - BUG(); - return 1; - } - - switch (cycleformat) { - case OMAP_DSS_RFBI_CYCLEFORMAT_1_1: - cycle1 = lines; - break; - - case OMAP_DSS_RFBI_CYCLEFORMAT_2_1: - cycle1 = lines; - cycle2 = lines; - break; - - case OMAP_DSS_RFBI_CYCLEFORMAT_3_1: - cycle1 = lines; - cycle2 = lines; - cycle3 = lines; - break; - - case OMAP_DSS_RFBI_CYCLEFORMAT_3_2: - cycle1 = lines; - cycle2 = (lines / 2) | ((lines / 2) << 16); - cycle3 = (lines << 16); - break; - } - - REG_FLD_MOD(RFBI_CONTROL, 0, 3, 2); /* clear CS */ - - l = 0; - l |= FLD_VAL(parallelmode, 1, 0); - l |= FLD_VAL(0, 3, 2); /* TRIGGERMODE: ITE */ - l |= FLD_VAL(0, 4, 4); /* TIMEGRANULARITY */ - l |= FLD_VAL(datatype, 6, 5); - /* l |= FLD_VAL(2, 8, 7); */ /* L4FORMAT, 2pix/L4 */ - l |= FLD_VAL(0, 8, 7); /* L4FORMAT, 1pix/L4 */ - l |= FLD_VAL(cycleformat, 10, 9); - l |= FLD_VAL(0, 12, 11); /* UNUSEDBITS */ - l |= FLD_VAL(0, 16, 16); /* A0POLARITY */ - l |= FLD_VAL(0, 17, 17); /* REPOLARITY */ - l |= FLD_VAL(0, 18, 18); /* WEPOLARITY */ - l |= FLD_VAL(0, 19, 19); /* CSPOLARITY */ - l |= FLD_VAL(1, 20, 20); /* TE_VSYNC_POLARITY */ - l |= FLD_VAL(1, 21, 21); /* HSYNCPOLARITY */ - rfbi_write_reg(RFBI_CONFIG(rfbi_module), l); - - rfbi_write_reg(RFBI_DATA_CYCLE1(rfbi_module), cycle1); - rfbi_write_reg(RFBI_DATA_CYCLE2(rfbi_module), cycle2); - rfbi_write_reg(RFBI_DATA_CYCLE3(rfbi_module), cycle3); - - - l = rfbi_read_reg(RFBI_CONTROL); - l = FLD_MOD(l, rfbi_module+1, 3, 2); /* Select CSx */ - l = FLD_MOD(l, 0, 1, 1); /* clear bypass */ - rfbi_write_reg(RFBI_CONTROL, l); - - - DSSDBG("RFBI config: bpp %d, lines %d, cycles: 0x%x 0x%x 0x%x\n", - bpp, lines, cycle1, cycle2, cycle3); - - return 0; -} - -static int rfbi_configure(struct omap_dss_device *dssdev) -{ - return rfbi_configure_bus(dssdev->phy.rfbi.channel, rfbi.pixel_size, - rfbi.data_lines); -} - -static int rfbi_update(struct omap_dss_device *dssdev, void (*callback)(void *), - void *data) -{ - return rfbi_transfer_area(dssdev, callback, data); -} - -static void rfbi_set_size(struct omap_dss_device *dssdev, u16 w, u16 h) -{ - rfbi.timings.x_res = w; - rfbi.timings.y_res = h; -} - -static void rfbi_set_pixel_size(struct omap_dss_device *dssdev, int pixel_size) -{ - rfbi.pixel_size = pixel_size; -} - -static void rfbi_set_data_lines(struct omap_dss_device *dssdev, int data_lines) -{ - rfbi.data_lines = data_lines; -} - -static void rfbi_set_interface_timings(struct omap_dss_device *dssdev, - struct rfbi_timings *timings) -{ - rfbi.intf_timings = *timings; -} - -static void rfbi_dump_regs(struct seq_file *s) -{ -#define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, rfbi_read_reg(r)) - - if (rfbi_runtime_get()) - return; - - DUMPREG(RFBI_REVISION); - DUMPREG(RFBI_SYSCONFIG); - DUMPREG(RFBI_SYSSTATUS); - DUMPREG(RFBI_CONTROL); - DUMPREG(RFBI_PIXEL_CNT); - DUMPREG(RFBI_LINE_NUMBER); - DUMPREG(RFBI_CMD); - DUMPREG(RFBI_PARAM); - DUMPREG(RFBI_DATA); - DUMPREG(RFBI_READ); - DUMPREG(RFBI_STATUS); - - DUMPREG(RFBI_CONFIG(0)); - DUMPREG(RFBI_ONOFF_TIME(0)); - DUMPREG(RFBI_CYCLE_TIME(0)); - DUMPREG(RFBI_DATA_CYCLE1(0)); - DUMPREG(RFBI_DATA_CYCLE2(0)); - DUMPREG(RFBI_DATA_CYCLE3(0)); - - DUMPREG(RFBI_CONFIG(1)); - DUMPREG(RFBI_ONOFF_TIME(1)); - DUMPREG(RFBI_CYCLE_TIME(1)); - DUMPREG(RFBI_DATA_CYCLE1(1)); - DUMPREG(RFBI_DATA_CYCLE2(1)); - DUMPREG(RFBI_DATA_CYCLE3(1)); - - DUMPREG(RFBI_VSYNC_WIDTH); - DUMPREG(RFBI_HSYNC_WIDTH); - - rfbi_runtime_put(); -#undef DUMPREG -} - -static void rfbi_config_lcd_manager(struct omap_dss_device *dssdev) -{ - struct omap_overlay_manager *mgr = rfbi.output.manager; - struct dss_lcd_mgr_config mgr_config; - - mgr_config.io_pad_mode = DSS_IO_PAD_MODE_RFBI; - - mgr_config.stallmode = true; - /* Do we need fifohandcheck for RFBI? */ - mgr_config.fifohandcheck = false; - - mgr_config.video_port_width = rfbi.pixel_size; - mgr_config.lcden_sig_polarity = 0; - - dss_mgr_set_lcd_config(mgr, &mgr_config); - - /* - * Set rfbi.timings with default values, the x_res and y_res fields - * are expected to be already configured by the panel driver via - * omapdss_rfbi_set_size() - */ - rfbi.timings.hsw = 1; - rfbi.timings.hfp = 1; - rfbi.timings.hbp = 1; - rfbi.timings.vsw = 1; - rfbi.timings.vfp = 0; - rfbi.timings.vbp = 0; - - rfbi.timings.interlace = false; - rfbi.timings.hsync_level = OMAPDSS_SIG_ACTIVE_HIGH; - rfbi.timings.vsync_level = OMAPDSS_SIG_ACTIVE_HIGH; - rfbi.timings.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; - rfbi.timings.de_level = OMAPDSS_SIG_ACTIVE_HIGH; - rfbi.timings.sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE; - - dss_mgr_set_timings(mgr, &rfbi.timings); -} - -static int rfbi_display_enable(struct omap_dss_device *dssdev) -{ - struct omap_dss_device *out = &rfbi.output; - int r; - - if (out->manager == NULL) { - DSSERR("failed to enable display: no output/manager\n"); - return -ENODEV; - } - - r = rfbi_runtime_get(); - if (r) - return r; - - r = dss_mgr_register_framedone_handler(out->manager, - framedone_callback, NULL); - if (r) { - DSSERR("can't get FRAMEDONE irq\n"); - goto err1; - } - - rfbi_config_lcd_manager(dssdev); - - rfbi_configure_bus(dssdev->phy.rfbi.channel, rfbi.pixel_size, - rfbi.data_lines); - - rfbi_set_timings(dssdev->phy.rfbi.channel, &rfbi.intf_timings); - - return 0; -err1: - rfbi_runtime_put(); - return r; -} - -static void rfbi_display_disable(struct omap_dss_device *dssdev) -{ - struct omap_dss_device *out = &rfbi.output; - - dss_mgr_unregister_framedone_handler(out->manager, - framedone_callback, NULL); - - rfbi_runtime_put(); -} - -static int rfbi_init_display(struct omap_dss_device *dssdev) -{ - rfbi.dssdev[dssdev->phy.rfbi.channel] = dssdev; - return 0; -} - -static void rfbi_init_output(struct platform_device *pdev) -{ - struct omap_dss_device *out = &rfbi.output; - - out->dev = &pdev->dev; - out->id = OMAP_DSS_OUTPUT_DBI; - out->output_type = OMAP_DISPLAY_TYPE_DBI; - out->name = "rfbi.0"; - out->dispc_channel = OMAP_DSS_CHANNEL_LCD; - out->owner = THIS_MODULE; - - omapdss_register_output(out); -} - -static void rfbi_uninit_output(struct platform_device *pdev) -{ - struct omap_dss_device *out = &rfbi.output; - - omapdss_unregister_output(out); -} - -/* RFBI HW IP initialisation */ -static int rfbi_bind(struct device *dev, struct device *master, void *data) -{ - struct platform_device *pdev = to_platform_device(dev); - u32 rev; - struct resource *rfbi_mem; - struct clk *clk; - int r; - - rfbi.pdev = pdev; - - sema_init(&rfbi.bus_lock, 1); - - rfbi_mem = platform_get_resource(rfbi.pdev, IORESOURCE_MEM, 0); - if (!rfbi_mem) { - DSSERR("can't get IORESOURCE_MEM RFBI\n"); - return -EINVAL; - } - - rfbi.base = devm_ioremap(&pdev->dev, rfbi_mem->start, - resource_size(rfbi_mem)); - if (!rfbi.base) { - DSSERR("can't ioremap RFBI\n"); - return -ENOMEM; - } - - clk = clk_get(&pdev->dev, "ick"); - if (IS_ERR(clk)) { - DSSERR("can't get ick\n"); - return PTR_ERR(clk); - } - - rfbi.l4_khz = clk_get_rate(clk) / 1000; - - clk_put(clk); - - pm_runtime_enable(&pdev->dev); - - r = rfbi_runtime_get(); - if (r) - goto err_runtime_get; - - msleep(10); - - rev = rfbi_read_reg(RFBI_REVISION); - dev_dbg(&pdev->dev, "OMAP RFBI rev %d.%d\n", - FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0)); - - rfbi_runtime_put(); - - dss_debugfs_create_file("rfbi", rfbi_dump_regs); - - rfbi_init_output(pdev); - - return 0; - -err_runtime_get: - pm_runtime_disable(&pdev->dev); - return r; -} - -static void rfbi_unbind(struct device *dev, struct device *master, void *data) -{ - struct platform_device *pdev = to_platform_device(dev); - - rfbi_uninit_output(pdev); - - pm_runtime_disable(&pdev->dev); - - return 0; -} - -static const struct component_ops rfbi_component_ops = { - .bind = rfbi_bind, - .unbind = rfbi_unbind, -}; - -static int rfbi_probe(struct platform_device *pdev) -{ - return component_add(&pdev->dev, &rfbi_component_ops); -} - -static int rfbi_remove(struct platform_device *pdev) -{ - component_del(&pdev->dev, &rfbi_component_ops); - return 0; -} - -static int rfbi_runtime_suspend(struct device *dev) -{ - dispc_runtime_put(); - - return 0; -} - -static int rfbi_runtime_resume(struct device *dev) -{ - int r; - - r = dispc_runtime_get(); - if (r < 0) - return r; - - return 0; -} - -static const struct dev_pm_ops rfbi_pm_ops = { - .runtime_suspend = rfbi_runtime_suspend, - .runtime_resume = rfbi_runtime_resume, -}; - -static struct platform_driver omap_rfbihw_driver = { - .probe = rfbi_probe, - .remove = rfbi_remove, - .driver = { - .name = "omapdss_rfbi", - .pm = &rfbi_pm_ops, - .suppress_bind_attrs = true, - }, -}; - -int __init rfbi_init_platform_driver(void) -{ - return platform_driver_register(&omap_rfbihw_driver); -} - -void rfbi_uninit_platform_driver(void) -{ - platform_driver_unregister(&omap_rfbihw_driver); -} diff --git a/drivers/video/fbdev/pvr2fb.c b/drivers/video/fbdev/pvr2fb.c index 73d92d8a85cc..ad67f2135d5b 100644 --- a/drivers/video/fbdev/pvr2fb.c +++ b/drivers/video/fbdev/pvr2fb.c @@ -140,7 +140,7 @@ static struct pvr2fb_par { unsigned char is_doublescan; /* Are scanlines output twice? (doublescan) */ unsigned char is_lowres; /* Is horizontal pixel-doubling enabled? */ - unsigned long mmio_base; /* MMIO base */ + void __iomem *mmio_base; /* MMIO base */ u32 palette[16]; } *currentpar; @@ -194,39 +194,6 @@ static unsigned int shdma = PVR2_CASCADE_CHAN; static unsigned int pvr2dma = ONCHIP_NR_DMA_CHANNELS; #endif -static int pvr2fb_setcolreg(unsigned int regno, unsigned int red, unsigned int green, unsigned int blue, - unsigned int transp, struct fb_info *info); -static int pvr2fb_blank(int blank, struct fb_info *info); -static unsigned long get_line_length(int xres_virtual, int bpp); -static void set_color_bitfields(struct fb_var_screeninfo *var); -static int pvr2fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info); -static int pvr2fb_set_par(struct fb_info *info); -static void pvr2_update_display(struct fb_info *info); -static void pvr2_init_display(struct fb_info *info); -static void pvr2_do_blank(void); -static irqreturn_t pvr2fb_interrupt(int irq, void *dev_id); -static int pvr2_init_cable(void); -static int pvr2_get_param(const struct pvr2_params *p, const char *s, - int val, int size); -#ifdef CONFIG_PVR2_DMA -static ssize_t pvr2fb_write(struct fb_info *info, const char *buf, - size_t count, loff_t *ppos); -#endif - -static struct fb_ops pvr2fb_ops = { - .owner = THIS_MODULE, - .fb_setcolreg = pvr2fb_setcolreg, - .fb_blank = pvr2fb_blank, - .fb_check_var = pvr2fb_check_var, - .fb_set_par = pvr2fb_set_par, -#ifdef CONFIG_PVR2_DMA - .fb_write = pvr2fb_write, -#endif - .fb_fillrect = cfb_fillrect, - .fb_copyarea = cfb_copyarea, - .fb_imageblit = cfb_imageblit, -}; - static struct fb_videomode pvr2_modedb[] = { /* * Broadcast video modes (PAL and NTSC). I'm unfamiliar with @@ -354,6 +321,36 @@ static int pvr2fb_setcolreg(unsigned int regno, unsigned int red, return 0; } +/* + * Determine the cable type and initialize the cable output format. Don't do + * anything if the cable type has been overidden (via "cable:XX"). + */ + +#define PCTRA ((void __iomem *)0xff80002c) +#define PDTRA ((void __iomem *)0xff800030) +#define VOUTC ((void __iomem *)0xa0702c00) + +static int pvr2_init_cable(void) +{ + if (cable_type < 0) { + fb_writel((fb_readl(PCTRA) & 0xfff0ffff) | 0x000a0000, + PCTRA); + cable_type = (fb_readw(PDTRA) >> 8) & 3; + } + + /* Now select the output format (either composite or other) */ + /* XXX: Save the previous val first, as this reg is also AICA + related */ + if (cable_type == CT_COMPOSITE) + fb_writel(3 << 8, VOUTC); + else if (cable_type == CT_RGB) + fb_writel(1 << 9, VOUTC); + else + fb_writel(0, VOUTC); + + return cable_type; +} + static int pvr2fb_set_par(struct fb_info *info) { struct pvr2fb_par *par = (struct pvr2fb_par *)info->par; @@ -623,7 +620,7 @@ static void pvr2_do_blank(void) is_blanked = do_blank > 0 ? do_blank : 0; } -static irqreturn_t pvr2fb_interrupt(int irq, void *dev_id) +static irqreturn_t __maybe_unused pvr2fb_interrupt(int irq, void *dev_id) { struct fb_info *info = dev_id; @@ -642,36 +639,6 @@ static irqreturn_t pvr2fb_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } -/* - * Determine the cable type and initialize the cable output format. Don't do - * anything if the cable type has been overidden (via "cable:XX"). - */ - -#define PCTRA 0xff80002c -#define PDTRA 0xff800030 -#define VOUTC 0xa0702c00 - -static int pvr2_init_cable(void) -{ - if (cable_type < 0) { - fb_writel((fb_readl(PCTRA) & 0xfff0ffff) | 0x000a0000, - PCTRA); - cable_type = (fb_readw(PDTRA) >> 8) & 3; - } - - /* Now select the output format (either composite or other) */ - /* XXX: Save the previous val first, as this reg is also AICA - related */ - if (cable_type == CT_COMPOSITE) - fb_writel(3 << 8, VOUTC); - else if (cable_type == CT_RGB) - fb_writel(1 << 9, VOUTC); - else - fb_writel(0, VOUTC); - - return cable_type; -} - #ifdef CONFIG_PVR2_DMA static ssize_t pvr2fb_write(struct fb_info *info, const char *buf, size_t count, loff_t *ppos) @@ -742,6 +709,46 @@ out_unmap: } #endif /* CONFIG_PVR2_DMA */ +static struct fb_ops pvr2fb_ops = { + .owner = THIS_MODULE, + .fb_setcolreg = pvr2fb_setcolreg, + .fb_blank = pvr2fb_blank, + .fb_check_var = pvr2fb_check_var, + .fb_set_par = pvr2fb_set_par, +#ifdef CONFIG_PVR2_DMA + .fb_write = pvr2fb_write, +#endif + .fb_fillrect = cfb_fillrect, + .fb_copyarea = cfb_copyarea, + .fb_imageblit = cfb_imageblit, +}; + +#ifndef MODULE +static int pvr2_get_param_val(const struct pvr2_params *p, const char *s, + int size) +{ + int i; + + for (i = 0; i < size; i++) { + if (!strncasecmp(p[i].name, s, strlen(s))) + return p[i].val; + } + return -1; +} +#endif + +static char *pvr2_get_param_name(const struct pvr2_params *p, int val, + int size) +{ + int i; + + for (i = 0; i < size; i++) { + if (p[i].val == val) + return p[i].name; + } + return NULL; +} + /** * pvr2fb_common_init * @@ -760,7 +767,7 @@ out_unmap: * in for flexibility anyways. Who knows, maybe someone has tv-out on a * PCI-based version of these things ;-) */ -static int pvr2fb_common_init(void) +static int __maybe_unused pvr2fb_common_init(void) { struct pvr2fb_par *par = currentpar; unsigned long modememused, rev; @@ -773,8 +780,8 @@ static int pvr2fb_common_init(void) goto out_err; } - par->mmio_base = (unsigned long)ioremap_nocache(pvr2_fix.mmio_start, - pvr2_fix.mmio_len); + par->mmio_base = ioremap_nocache(pvr2_fix.mmio_start, + pvr2_fix.mmio_len); if (!par->mmio_base) { printk(KERN_ERR "pvr2fb: Failed to remap mmio space\n"); goto out_err; @@ -822,8 +829,8 @@ static int pvr2fb_common_init(void) fb_info->var.xres, fb_info->var.yres, fb_info->var.bits_per_pixel, get_line_length(fb_info->var.xres, fb_info->var.bits_per_pixel), - (char *)pvr2_get_param(cables, NULL, cable_type, 3), - (char *)pvr2_get_param(outputs, NULL, video_output, 3)); + pvr2_get_param_name(cables, cable_type, 3), + pvr2_get_param_name(outputs, video_output, 3)); #ifdef CONFIG_SH_STORE_QUEUES fb_notice(fb_info, "registering with SQ API\n"); @@ -841,7 +848,7 @@ out_err: if (fb_info->screen_base) iounmap(fb_info->screen_base); if (par->mmio_base) - iounmap((void *)par->mmio_base); + iounmap(par->mmio_base); return -ENXIO; } @@ -901,15 +908,15 @@ static int __init pvr2fb_dc_init(void) return pvr2fb_common_init(); } -static void __exit pvr2fb_dc_exit(void) +static void pvr2fb_dc_exit(void) { if (fb_info->screen_base) { iounmap(fb_info->screen_base); fb_info->screen_base = NULL; } if (currentpar->mmio_base) { - iounmap((void *)currentpar->mmio_base); - currentpar->mmio_base = 0; + iounmap(currentpar->mmio_base); + currentpar->mmio_base = NULL; } free_irq(HW_EVENT_VSYNC, fb_info); @@ -958,8 +965,8 @@ static void pvr2fb_pci_remove(struct pci_dev *pdev) fb_info->screen_base = NULL; } if (currentpar->mmio_base) { - iounmap((void *)currentpar->mmio_base); - currentpar->mmio_base = 0; + iounmap(currentpar->mmio_base); + currentpar->mmio_base = NULL; } pci_release_regions(pdev); @@ -985,29 +992,12 @@ static int __init pvr2fb_pci_init(void) return pci_register_driver(&pvr2fb_pci_driver); } -static void __exit pvr2fb_pci_exit(void) +static void pvr2fb_pci_exit(void) { pci_unregister_driver(&pvr2fb_pci_driver); } #endif /* CONFIG_PCI */ -static int pvr2_get_param(const struct pvr2_params *p, const char *s, int val, - int size) -{ - int i; - - for (i = 0 ; i < size ; i++ ) { - if (s != NULL) { - if (!strncasecmp(p[i].name, s, strlen(s))) - return p[i].val; - } else { - if (p[i].val == val) - return (int)p[i].name; - } - } - return -1; -} - /* * Parse command arguments. Supported arguments are: * inverse Use inverse color maps @@ -1047,9 +1037,9 @@ static int __init pvr2fb_setup(char *options) } if (*cable_arg) - cable_type = pvr2_get_param(cables, cable_arg, 0, 3); + cable_type = pvr2_get_param_val(cables, cable_arg, 3); if (*output_arg) - video_output = pvr2_get_param(outputs, output_arg, 0, 3); + video_output = pvr2_get_param_val(outputs, output_arg, 3); return 0; } diff --git a/include/video/omapfb_dss.h b/include/video/omapfb_dss.h index a167b839eccb..e8eaac2cb7b8 100644 --- a/include/video/omapfb_dss.h +++ b/include/video/omapfb_dss.h @@ -114,11 +114,6 @@ enum omap_dss_trans_key_type { OMAP_DSS_COLOR_KEY_VID_SRC = 1, }; -enum omap_rfbi_te_mode { - OMAP_DSS_RFBI_TE_MODE_1 = 1, - OMAP_DSS_RFBI_TE_MODE_2 = 2, -}; - enum omap_dss_signal_level { OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH, @@ -189,27 +184,6 @@ enum omap_dss_output_id { OMAP_DSS_OUTPUT_HDMI = 1 << 6, }; -/* RFBI */ - -struct rfbi_timings { - int cs_on_time; - int cs_off_time; - int we_on_time; - int we_off_time; - int re_on_time; - int re_off_time; - int we_cycle_time; - int re_cycle_time; - int cs_pulse_width; - int access_time; - - int clk_div; - - u32 tim[5]; /* set by rfbi_convert_timings() */ - - int converted; -}; - /* DSI */ enum omap_dss_dsi_trans_mode { @@ -641,11 +615,6 @@ struct omap_dss_device { } dpi; struct { - u8 channel; - u8 data_lines; - } rfbi; - - struct { u8 datapairs; } sdi; @@ -668,7 +637,6 @@ struct omap_dss_device { struct { u8 pixel_size; - struct rfbi_timings rfbi_timings; } ctrl; const char *name; |