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-rw-r--r--arch/arm/boot/dts/ste-nomadik-nhk15.dts13
-rw-r--r--arch/arm/boot/dts/ste-nomadik-stn8815.dtsi38
2 files changed, 50 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/ste-nomadik-nhk15.dts b/arch/arm/boot/dts/ste-nomadik-nhk15.dts
index 4a21c6492dbb..d35aa88791ad 100644
--- a/arch/arm/boot/dts/ste-nomadik-nhk15.dts
+++ b/arch/arm/boot/dts/ste-nomadik-nhk15.dts
@@ -57,8 +57,15 @@
};
};
};
+ lis3lv02dl {
+ lis3lv02dl_nhk_mode: lis3lv02dl_nhk {
+ nhk_cfg1 {
+ pins = "GPIO82_C10"; // IRQ line
+ ste,input = <0>;
+ };
+ };
+ };
};
-
src@101e0000 {
/* These chrystal outputs are not used on this board */
disable-sxtalo;
@@ -86,6 +93,10 @@
lis3lv02dl@1d {
/* Accelerometer */
compatible = "st,lis3lv02dl-accel";
+ interrupt-parent = <&gpio2>;
+ interrupts = <18 IRQ_TYPE_EDGE_RISING>; // GPIO 82
+ pinctrl-0 = <&lis3lv02dl_nhk_mode>;
+ pinctrl-names = "default";
reg = <0x1d>;
};
stmpe0: stmpe2401@43 {
diff --git a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
index e2be53343064..d2d532a9d783 100644
--- a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
+++ b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
@@ -748,6 +748,9 @@
clocks = <&uart0clk>, <&pclkuart0>;
clock-names = "uartclk", "apb_pclk";
status = "disabled";
+ dmas = <&dmac0 14 1>,
+ <&dmac0 15 1>;
+ dma-names = "rx", "tx";
};
uart1: uart@101fb000 {
@@ -759,6 +762,9 @@
clock-names = "uartclk", "apb_pclk";
pinctrl-names = "default";
pinctrl-0 = <&uart1_default_mux>;
+ dmas = <&dmac1 22 1>,
+ <&dmac1 23 1>;
+ dma-names = "rx", "tx";
};
uart2: uart@101f2000 {
@@ -769,6 +775,9 @@
clocks = <&uart2clk>, <&pclkuart2>;
clock-names = "uartclk", "apb_pclk";
status = "disabled";
+ dmas = <&dmac1 30 1>,
+ <&dmac1 31 1>;
+ dma-names = "rx", "tx";
};
rng: rng@101b0000 {
@@ -813,5 +822,34 @@
pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>;
vmmc-supply = <&vmmc_regulator>;
};
+
+ dmac0: dma-controller@10130000 {
+ compatible = "arm,pl080", "arm,primecell";
+ reg = <0x10130000 0x1000>;
+ interrupt-parent = <&vica>;
+ interrupts = <15>;
+ clocks = <&hclkdma0>;
+ clock-names = "apb_pclk";
+ lli-bus-interface-ahb1;
+ lli-bus-interface-ahb2;
+ mem-bus-interface-ahb2;
+ memcpy-burst-size = <256>;
+ memcpy-bus-width = <32>;
+ #dma-cells = <2>;
+ };
+ dmac1: dma-controller@10150000 {
+ compatible = "arm,pl080", "arm,primecell";
+ reg = <0x10150000 0x1000>;
+ interrupt-parent = <&vica>;
+ interrupts = <13>;
+ clocks = <&hclkdma1>;
+ clock-names = "apb_pclk";
+ lli-bus-interface-ahb1;
+ lli-bus-interface-ahb2;
+ mem-bus-interface-ahb2;
+ memcpy-burst-size = <256>;
+ memcpy-bus-width = <32>;
+ #dma-cells = <2>;
+ };
};
};