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-rw-r--r--arch/arm64/boot/dts/freescale/imx8mm.dtsi32
1 files changed, 16 insertions, 16 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index fccfb2fc2161..2128644801b3 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -200,6 +200,22 @@
arm,no-tick-in-suspend;
};
+ usbphynop1: usbphynop1 {
+ compatible = "usb-nop-xceiv";
+ clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
+ assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
+ assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>;
+ clock-names = "main_clk";
+ };
+
+ usbphynop2: usbphynop2 {
+ compatible = "usb-nop-xceiv";
+ clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
+ assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
+ assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>;
+ clock-names = "main_clk";
+ };
+
soc@0 {
compatible = "simple-bus";
#address-cells = <1>;
@@ -737,14 +753,6 @@
status = "disabled";
};
- usbphynop1: usbphynop1 {
- compatible = "usb-nop-xceiv";
- clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
- assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
- assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>;
- clock-names = "main_clk";
- };
-
usbmisc1: usbmisc@32e40200 {
compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc";
#index-cells = <1>;
@@ -766,14 +774,6 @@
status = "disabled";
};
- usbphynop2: usbphynop2 {
- compatible = "usb-nop-xceiv";
- clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
- assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
- assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>;
- clock-names = "main_clk";
- };
-
usbmisc2: usbmisc@32e50200 {
compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc";
#index-cells = <1>;