diff options
| -rw-r--r-- | Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml | 19 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi | 5 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/exynos/exynos5433.dtsi | 19 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/exynos/exynos7-espresso.dts | 5 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/exynos/exynos7885-jackpotlte.dts | 1 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/exynos/exynos850.dtsi | 9 | ||||
| -rw-r--r-- | include/dt-bindings/clock/exynos850.h | 28 |
7 files changed, 69 insertions, 17 deletions
diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml index 141cf173f87d..8aa87b8c1b33 100644 --- a/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml @@ -37,6 +37,7 @@ properties: - samsung,exynos850-cmu-cmgp - samsung,exynos850-cmu-core - samsung,exynos850-cmu-dpu + - samsung,exynos850-cmu-g3d - samsung,exynos850-cmu-hsi - samsung,exynos850-cmu-is - samsung,exynos850-cmu-mfcmscl @@ -173,6 +174,24 @@ allOf: properties: compatible: contains: + const: samsung,exynos850-cmu-g3d + + then: + properties: + clocks: + items: + - description: External reference clock (26 MHz) + - description: G3D clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: dout_g3d_switch + + - if: + properties: + compatible: + contains: const: samsung,exynos850-cmu-hsi then: diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi index f54f30633417..e4ed788413fe 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi @@ -21,6 +21,8 @@ gsc0 = &gsc_0; gsc1 = &gsc_1; gsc2 = &gsc_2; + mmc0 = &mshc_0; + mmc2 = &mshc_2; pinctrl0 = &pinctrl_alive; pinctrl1 = &pinctrl_aud; pinctrl2 = &pinctrl_cpif; @@ -40,8 +42,6 @@ spi2 = &spi_2; spi3 = &spi_3; spi4 = &spi_4; - mshc0 = &mshc_0; - mshc2 = &mshc_2; }; chosen { @@ -952,6 +952,7 @@ &mshc_0 { status = "okay"; + mmc-ddr-1_8v; mmc-hs200-1_8v; mmc-hs400-1_8v; cap-mmc-highspeed; diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index 5519a80576c5..91ae0462a706 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -911,12 +911,20 @@ }; pmu_system_controller: system-controller@105c0000 { - compatible = "samsung,exynos5433-pmu", "syscon"; + compatible = "samsung,exynos5433-pmu", "simple-mfd", "syscon"; reg = <0x105c0000 0x5008>; #clock-cells = <1>; clock-names = "clkout16"; clocks = <&xxti>; + mipi_phy: mipi-phy { + compatible = "samsung,exynos5433-mipi-video-phy"; + #phy-cells = <1>; + samsung,cam0-sysreg = <&syscon_cam0>; + samsung,cam1-sysreg = <&syscon_cam1>; + samsung,disp-sysreg = <&syscon_disp>; + }; + reboot: syscon-reboot { compatible = "syscon-reboot"; regmap = <&pmu_system_controller>; @@ -936,15 +944,6 @@ interrupts = <GIC_PPI 9 0xf04>; }; - mipi_phy: video-phy { - compatible = "samsung,exynos5433-mipi-video-phy"; - #phy-cells = <1>; - samsung,pmu-syscon = <&pmu_system_controller>; - samsung,cam0-sysreg = <&syscon_cam0>; - samsung,cam1-sysreg = <&syscon_cam1>; - samsung,disp-sysreg = <&syscon_disp>; - }; - decon: decon@13800000 { compatible = "samsung,exynos5433-decon"; reg = <0x13800000 0x2104>; diff --git a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts index f3f4a6ab4b49..1f2eddcebdd9 100644 --- a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts +++ b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts @@ -17,9 +17,9 @@ compatible = "samsung,exynos7-espresso", "samsung,exynos7"; aliases { + mmc0 = &mmc_0; + mmc2 = &mmc_2; serial0 = &serial_2; - mshc0 = &mmc_0; - mshc2 = &mmc_2; }; chosen { @@ -362,6 +362,7 @@ &mmc_0 { status = "okay"; cap-mmc-highspeed; + mmc-ddr-1_8v; mmc-hs200-1_8v; non-removable; card-detect-delay = <200>; diff --git a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte.dts b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte.dts index 5db9a81ac7bb..47a389d9ff7d 100644 --- a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte.dts +++ b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte.dts @@ -18,6 +18,7 @@ chassis-type = "handset"; aliases { + mmc0 = &mmc_0; serial0 = &serial_0; serial1 = &serial_1; serial2 = &serial_2; diff --git a/arch/arm64/boot/dts/exynos/exynos850.dtsi b/arch/arm64/boot/dts/exynos/exynos850.dtsi index a38fe5129937..d67e98120313 100644 --- a/arch/arm64/boot/dts/exynos/exynos850.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos850.dtsi @@ -245,6 +245,15 @@ "dout_peri_uart", "dout_peri_ip"; }; + cmu_g3d: clock-controller@11400000 { + compatible = "samsung,exynos850-cmu-g3d"; + reg = <0x11400000 0x8000>; + #clock-cells = <1>; + + clocks = <&oscclk>, <&cmu_top CLK_DOUT_G3D_SWITCH>; + clock-names = "oscclk", "dout_g3d_switch"; + }; + cmu_apm: clock-controller@11800000 { compatible = "samsung,exynos850-cmu-apm"; reg = <0x11800000 0x8000>; diff --git a/include/dt-bindings/clock/exynos850.h b/include/dt-bindings/clock/exynos850.h index 88d5289883d3..afacba338c91 100644 --- a/include/dt-bindings/clock/exynos850.h +++ b/include/dt-bindings/clock/exynos850.h @@ -85,7 +85,10 @@ #define CLK_DOUT_MFCMSCL_M2M 73 #define CLK_DOUT_MFCMSCL_MCSC 74 #define CLK_DOUT_MFCMSCL_JPEG 75 -#define TOP_NR_CLK 76 +#define CLK_MOUT_G3D_SWITCH 76 +#define CLK_GOUT_G3D_SWITCH 77 +#define CLK_DOUT_G3D_SWITCH 78 +#define TOP_NR_CLK 79 /* CMU_APM */ #define CLK_RCO_I3C_PMIC 1 @@ -175,7 +178,8 @@ #define IOCLK_AUDIOCDCLK5 58 #define IOCLK_AUDIOCDCLK6 59 #define TICK_USB 60 -#define AUD_NR_CLK 61 +#define CLK_GOUT_AUD_CMU_AUD_PCLK 61 +#define AUD_NR_CLK 62 /* CMU_CMGP */ #define CLK_RCO_CMGP 1 @@ -195,6 +199,21 @@ #define CLK_GOUT_SYSREG_CMGP_PCLK 15 #define CMGP_NR_CLK 16 +/* CMU_G3D */ +#define CLK_FOUT_G3D_PLL 1 +#define CLK_MOUT_G3D_PLL 2 +#define CLK_MOUT_G3D_SWITCH_USER 3 +#define CLK_MOUT_G3D_BUSD 4 +#define CLK_DOUT_G3D_BUSP 5 +#define CLK_GOUT_G3D_CMU_G3D_PCLK 6 +#define CLK_GOUT_G3D_GPU_CLK 7 +#define CLK_GOUT_G3D_TZPC_PCLK 8 +#define CLK_GOUT_G3D_GRAY2BIN_CLK 9 +#define CLK_GOUT_G3D_BUSD_CLK 10 +#define CLK_GOUT_G3D_BUSP_CLK 11 +#define CLK_GOUT_G3D_SYSREG_PCLK 12 +#define G3D_NR_CLK 13 + /* CMU_HSI */ #define CLK_MOUT_HSI_BUS_USER 1 #define CLK_MOUT_HSI_MMC_CARD_USER 2 @@ -209,7 +228,10 @@ #define CLK_GOUT_MMC_CARD_ACLK 11 #define CLK_GOUT_MMC_CARD_SDCLKIN 12 #define CLK_GOUT_SYSREG_HSI_PCLK 13 -#define HSI_NR_CLK 14 +#define CLK_GOUT_HSI_PPMU_ACLK 14 +#define CLK_GOUT_HSI_PPMU_PCLK 15 +#define CLK_GOUT_HSI_CMU_HSI_PCLK 16 +#define HSI_NR_CLK 17 /* CMU_IS */ #define CLK_MOUT_IS_BUS_USER 1 |