diff options
-rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3588j.dtsi | 108 |
1 files changed, 108 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3588j.dtsi b/arch/arm64/boot/dts/rockchip/rk3588j.dtsi index 0bbeee399a63..b7e69553857b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588j.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588j.dtsi @@ -5,3 +5,111 @@ */ #include "rk3588-extra.dtsi" + +/ { + cluster0_opp_table: opp-table-cluster0 { + compatible = "operating-points-v2"; + opp-shared; + + opp-1416000000 { + opp-hz = /bits/ 64 <1416000000>; + opp-microvolt = <750000 750000 950000>; + clock-latency-ns = <40000>; + opp-suspend; + }; + opp-1608000000 { + opp-hz = /bits/ 64 <1608000000>; + opp-microvolt = <887500 887500 950000>; + clock-latency-ns = <40000>; + }; + opp-1704000000 { + opp-hz = /bits/ 64 <1704000000>; + opp-microvolt = <937500 937500 950000>; + clock-latency-ns = <40000>; + }; + }; + + cluster1_opp_table: opp-table-cluster1 { + compatible = "operating-points-v2"; + opp-shared; + + opp-1416000000 { + opp-hz = /bits/ 64 <1416000000>; + opp-microvolt = <750000 750000 950000>; + clock-latency-ns = <40000>; + }; + opp-1608000000 { + opp-hz = /bits/ 64 <1608000000>; + opp-microvolt = <787500 787500 950000>; + clock-latency-ns = <40000>; + }; + opp-1800000000 { + opp-hz = /bits/ 64 <1800000000>; + opp-microvolt = <875000 875000 950000>; + clock-latency-ns = <40000>; + }; + opp-2016000000 { + opp-hz = /bits/ 64 <2016000000>; + opp-microvolt = <950000 950000 950000>; + clock-latency-ns = <40000>; + }; + }; + + cluster2_opp_table: opp-table-cluster2 { + compatible = "operating-points-v2"; + opp-shared; + + opp-1416000000 { + opp-hz = /bits/ 64 <1416000000>; + opp-microvolt = <750000 750000 950000>; + clock-latency-ns = <40000>; + }; + opp-1608000000 { + opp-hz = /bits/ 64 <1608000000>; + opp-microvolt = <787500 787500 950000>; + clock-latency-ns = <40000>; + }; + opp-1800000000 { + opp-hz = /bits/ 64 <1800000000>; + opp-microvolt = <875000 875000 950000>; + clock-latency-ns = <40000>; + }; + opp-2016000000 { + opp-hz = /bits/ 64 <2016000000>; + opp-microvolt = <950000 950000 950000>; + clock-latency-ns = <40000>; + }; + }; +}; + +&cpu_b0 { + operating-points-v2 = <&cluster1_opp_table>; +}; + +&cpu_b1 { + operating-points-v2 = <&cluster1_opp_table>; +}; + +&cpu_b2 { + operating-points-v2 = <&cluster2_opp_table>; +}; + +&cpu_b3 { + operating-points-v2 = <&cluster2_opp_table>; +}; + +&cpu_l0 { + operating-points-v2 = <&cluster0_opp_table>; +}; + +&cpu_l1 { + operating-points-v2 = <&cluster0_opp_table>; +}; + +&cpu_l2 { + operating-points-v2 = <&cluster0_opp_table>; +}; + +&cpu_l3 { + operating-points-v2 = <&cluster0_opp_table>; +}; |