diff options
| -rw-r--r-- | Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt | 5 | ||||
| -rw-r--r-- | arch/arm/boot/dts/at91rm9200.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/boot/dts/at91sam9x5.dtsi | 60 | ||||
| -rw-r--r-- | arch/arm/boot/dts/kizbox.dts | 2 | ||||
| -rw-r--r-- | arch/arm/configs/at91_dt_defconfig | 3 | ||||
| -rw-r--r-- | arch/arm/mach-at91/setup.c | 2 | 
6 files changed, 51 insertions, 25 deletions
| diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt index 3a268127b054..bc50899e0c81 100644 --- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt @@ -81,7 +81,8 @@ PA31	TXD4  Required properties for pin configuration node:  - atmel,pins: 4 integers array, represents a group of pins mux and config    setting. The format is atmel,pins = <PIN_BANK PIN_BANK_NUM PERIPH CONFIG>. -  The PERIPH 0 means gpio. +  The PERIPH 0 means gpio, PERIPH 1 is periph A, PERIPH 2 is periph B... +  PIN_BANK 0 is pioA, PIN_BANK 1 is pioB...  Bits used for CONFIG:  PULL_UP		(1 << 0): indicate this pin need a pull up. @@ -126,7 +127,7 @@ pinctrl@fffff400 {  		pinctrl_dbgu: dbgu-0 {  			atmel,pins =  				<1 14 0x1 0x0	/* PB14 periph A */ -				 1 15 0x1 0x1>;	/* PB15 periph with pullup */ +				 1 15 0x1 0x1>;	/* PB15 periph A with pullup */  		};  	};  }; diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi index e154f242c680..222047f1ece9 100644 --- a/arch/arm/boot/dts/at91rm9200.dtsi +++ b/arch/arm/boot/dts/at91rm9200.dtsi @@ -336,8 +336,8 @@  	i2c@0 {  		compatible = "i2c-gpio"; -		gpios = <&pioA 23 0 /* sda */ -			 &pioA 24 0 /* scl */ +		gpios = <&pioA 25 0 /* sda */ +			 &pioA 26 0 /* scl */  			>;  		i2c-gpio,sda-open-drain;  		i2c-gpio,scl-open-drain; diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index 3a47cf952146..8ecca6948d81 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi @@ -143,6 +143,11 @@  						atmel,pins =  							<0 3 0x1 0x0>;	/* PA3 periph A */  					}; + +					pinctrl_usart0_sck: usart0_sck-0 { +						atmel,pins = +							<0 4 0x1 0x0>;	/* PA4 periph A */ +					};  				};  				usart1 { @@ -154,12 +159,17 @@  					pinctrl_usart1_rts: usart1_rts-0 {  						atmel,pins = -							<3 27 0x3 0x0>;	/* PC27 periph C */ +							<2 27 0x3 0x0>;	/* PC27 periph C */  					};  					pinctrl_usart1_cts: usart1_cts-0 {  						atmel,pins = -							<3 28 0x3 0x0>;	/* PC28 periph C */ +							<2 28 0x3 0x0>;	/* PC28 periph C */ +					}; + +					pinctrl_usart1_sck: usart1_sck-0 { +						atmel,pins = +							<2 28 0x3 0x0>;	/* PC29 periph C */  					};  				}; @@ -172,46 +182,56 @@  					pinctrl_uart2_rts: uart2_rts-0 {  						atmel,pins = -							<0 0 0x2 0x0>;	/* PB0 periph B */ +							<1 0 0x2 0x0>;	/* PB0 periph B */  					};  					pinctrl_uart2_cts: uart2_cts-0 {  						atmel,pins = -							<0 1 0x2 0x0>;	/* PB1 periph B */ +							<1 1 0x2 0x0>;	/* PB1 periph B */ +					}; + +					pinctrl_usart2_sck: usart2_sck-0 { +						atmel,pins = +							<1 2 0x2 0x0>;	/* PB2 periph B */  					};  				};  				usart3 {  					pinctrl_uart3: usart3-0 {  						atmel,pins = -							<3 23 0x2 0x1	/* PC22 periph B with pullup */ -							 3 23 0x2 0x0>;	/* PC23 periph B */ +							<2 23 0x2 0x1	/* PC22 periph B with pullup */ +							 2 23 0x2 0x0>;	/* PC23 periph B */  					};  					pinctrl_usart3_rts: usart3_rts-0 {  						atmel,pins = -							<3 24 0x2 0x0>;	/* PC24 periph B */ +							<2 24 0x2 0x0>;	/* PC24 periph B */  					};  					pinctrl_usart3_cts: usart3_cts-0 {  						atmel,pins = -							<3 25 0x2 0x0>;	/* PC25 periph B */ +							<2 25 0x2 0x0>;	/* PC25 periph B */ +					}; + +					pinctrl_usart3_sck: usart3_sck-0 { +						atmel,pins = +							<2 26 0x2 0x0>;	/* PC26 periph B */  					};  				};  				uart0 {  					pinctrl_uart0: uart0-0 {  						atmel,pins = -							<3 8 0x3 0x0	/* PC8 periph C */ -							 3 9 0x3 0x1>;	/* PC9 periph C with pullup */ +							<2 8 0x3 0x0	/* PC8 periph C */ +							 2 9 0x3 0x1>;	/* PC9 periph C with pullup */  					};  				};  				uart1 {  					pinctrl_uart1: uart1-0 {  						atmel,pins = -							<3 16 0x3 0x0	/* PC16 periph C */ -							 3 17 0x3 0x1>;	/* PC17 periph C with pullup */ +							<2 16 0x3 0x0	/* PC16 periph C */ +							 2 17 0x3 0x1>;	/* PC17 periph C with pullup */  					};  				}; @@ -240,14 +260,14 @@  					pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {  						atmel,pins = -							<1 8 0x1 0x0	/* PA8 periph A */ -							 1 11 0x1 0x0	/* PA11 periph A */ -							 1 12 0x1 0x0	/* PA12 periph A */ -							 1 13 0x1 0x0	/* PA13 periph A */ -							 1 14 0x1 0x0	/* PA14 periph A */ -							 1 15 0x1 0x0	/* PA15 periph A */ -							 1 16 0x1 0x0	/* PA16 periph A */ -							 1 17 0x1 0x0>;	/* PA17 periph A */ +							<1 8 0x1 0x0	/* PB8 periph A */ +							 1 11 0x1 0x0	/* PB11 periph A */ +							 1 12 0x1 0x0	/* PB12 periph A */ +							 1 13 0x1 0x0	/* PB13 periph A */ +							 1 14 0x1 0x0	/* PB14 periph A */ +							 1 15 0x1 0x0	/* PB15 periph A */ +							 1 16 0x1 0x0	/* PB16 periph A */ +							 1 17 0x1 0x0>;	/* PB17 periph A */  					};  				}; diff --git a/arch/arm/boot/dts/kizbox.dts b/arch/arm/boot/dts/kizbox.dts index e8814fe0e277..b4dc3ed9a3ec 100644 --- a/arch/arm/boot/dts/kizbox.dts +++ b/arch/arm/boot/dts/kizbox.dts @@ -48,6 +48,8 @@  			macb0: ethernet@fffc4000 {  				phy-mode = "mii"; +				pinctrl-0 = <&pinctrl_macb_rmii +				             &pinctrl_macb_rmii_mii_alt>;  				status = "okay";  			}; diff --git a/arch/arm/configs/at91_dt_defconfig b/arch/arm/configs/at91_dt_defconfig index b175577d7abb..1ea959019fcd 100644 --- a/arch/arm/configs/at91_dt_defconfig +++ b/arch/arm/configs/at91_dt_defconfig @@ -19,6 +19,7 @@ CONFIG_SOC_AT91SAM9260=y  CONFIG_SOC_AT91SAM9263=y  CONFIG_SOC_AT91SAM9G45=y  CONFIG_SOC_AT91SAM9X5=y +CONFIG_SOC_AT91SAM9N12=y  CONFIG_MACH_AT91SAM_DT=y  CONFIG_AT91_PROGRAMMABLE_CLOCKS=y  CONFIG_AT91_TIMER_HZ=128 @@ -31,7 +32,7 @@ CONFIG_ZBOOT_ROM_TEXT=0x0  CONFIG_ZBOOT_ROM_BSS=0x0  CONFIG_ARM_APPENDED_DTB=y  CONFIG_ARM_ATAG_DTB_COMPAT=y -CONFIG_CMDLINE="mem=128M console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw" +CONFIG_CMDLINE="console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"  CONFIG_KEXEC=y  CONFIG_AUTO_ZRELADDR=y  # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c index 9ee866ce0478..4b678478cf95 100644 --- a/arch/arm/mach-at91/setup.c +++ b/arch/arm/mach-at91/setup.c @@ -105,6 +105,8 @@ static void __init soc_detect(u32 dbgu_base)  	switch (socid) {  	case ARCH_ID_AT91RM9200:  		at91_soc_initdata.type = AT91_SOC_RM9200; +		if (at91_soc_initdata.subtype == AT91_SOC_SUBTYPE_NONE) +			at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;  		at91_boot_soc = at91rm9200_soc;  		break; |