diff options
569 files changed, 6547 insertions, 5942 deletions
diff --git a/Documentation/arm64/memory.txt b/Documentation/arm64/memory.txt index dbbdcbba75a3..4110cca96bd6 100644 --- a/Documentation/arm64/memory.txt +++ b/Documentation/arm64/memory.txt @@ -27,17 +27,17 @@ Start End Size Use ----------------------------------------------------------------------- 0000000000000000 0000007fffffffff 512GB user -ffffff8000000000 ffffffbbfffcffff ~240GB vmalloc +ffffff8000000000 ffffffbbfffeffff ~240GB vmalloc -ffffffbbfffd0000 ffffffbcfffdffff 64KB [guard page] +ffffffbbffff0000 ffffffbbffffffff 64KB [guard page] -ffffffbbfffe0000 ffffffbcfffeffff 64KB PCI I/O space +ffffffbc00000000 ffffffbdffffffff 8GB vmemmap -ffffffbbffff0000 ffffffbcffffffff 64KB [guard page] +ffffffbe00000000 ffffffbffbbfffff ~8GB [guard, future vmmemap] -ffffffbc00000000 ffffffbdffffffff 8GB vmemmap +ffffffbffbe00000 ffffffbffbe0ffff 64KB PCI I/O space -ffffffbe00000000 ffffffbffbffffff ~8GB [guard, future vmmemap] +ffffffbbffff0000 ffffffbcffffffff ~2MB [guard] ffffffbffc000000 ffffffbfffffffff 64MB modules diff --git a/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt b/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt index f3cf43b66f7e..3614242e7732 100644 --- a/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt +++ b/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt @@ -12,13 +12,13 @@ Optional properties: Examples: i2c@83fc4000 { /* I2C2 on i.MX51 */ - compatible = "fsl,imx51-i2c", "fsl,imx1-i2c"; + compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; reg = <0x83fc4000 0x4000>; interrupts = <63>; }; i2c@70038000 { /* HS-I2C on i.MX51 */ - compatible = "fsl,imx51-i2c", "fsl,imx1-i2c"; + compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; reg = <0x70038000 0x4000>; interrupts = <64>; clock-frequency = <400000>; diff --git a/MAINTAINERS b/MAINTAINERS index 59203e77ce9e..99199e63f349 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -797,7 +797,6 @@ L: [email protected] (moderated for non-subscribers) S: Maintained T: git git://git.pengutronix.de/git/imx/linux-2.6.git F: arch/arm/mach-imx/ -F: arch/arm/plat-mxc/ F: arch/arm/configs/imx*_defconfig ARM/FREESCALE IMX6 @@ -1,7 +1,7 @@ VERSION = 3 PATCHLEVEL = 7 SUBLEVEL = 0 -EXTRAVERSION = -rc4 +EXTRAVERSION = -rc5 NAME = Terrified Chipmunk # *DOCUMENTATION* diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 041cf0774776..d45ca1bf1de0 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -433,19 +433,6 @@ config ARCH_FOOTBRIDGE Support for systems based on the DC21285 companion chip ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. -config ARCH_MXC - bool "Freescale MXC/iMX-based" - select ARCH_REQUIRE_GPIOLIB - select CLKDEV_LOOKUP - select CLKSRC_MMIO - select GENERIC_CLOCKEVENTS - select GENERIC_IRQ_CHIP - select MULTI_IRQ_HANDLER - select SPARSE_IRQ - select USE_OF - help - Support for Freescale MXC/iMX-based family of processors - config ARCH_MXS bool "Freescale MXS-based" select ARCH_REQUIRE_GPIOLIB @@ -958,7 +945,6 @@ config ARCH_ZYNQ bool "Xilinx Zynq ARM Cortex A9 Platform" select ARM_AMBA select ARM_GIC - select CLKDEV_LOOKUP select CPU_V7 select GENERIC_CLOCKEVENTS select ICST @@ -1057,7 +1043,7 @@ source "arch/arm/mach-msm/Kconfig" source "arch/arm/mach-mv78xx0/Kconfig" -source "arch/arm/plat-mxc/Kconfig" +source "arch/arm/mach-imx/Kconfig" source "arch/arm/mach-mxs/Kconfig" @@ -1167,7 +1153,7 @@ config ARM_NR_BANKS config IWMMXT bool "Enable iWMMXt support" depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 - default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP + default y if PXA27x || PXA3xx || ARCH_MMP help Enable support for iWMMXt context switching at run time if running on a CPU that supports it. diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index b0f3857b3a4c..5566520686a5 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -412,6 +412,14 @@ endchoice config DEBUG_LL_INCLUDE string default "debug/icedcc.S" if DEBUG_ICEDCC + default "debug/imx.S" if DEBUG_IMX1_UART || \ + DEBUG_IMX25_UART || \ + DEBUG_IMX21_IMX27_UART || \ + DEBUG_IMX31_IMX35_UART || \ + DEBUG_IMX51_UART || \ + DEBUG_IMX50_IMX53_UART ||\ + DEBUG_IMX6Q_UART2 || \ + DEBUG_IMX6Q_UART4 default "debug/highbank.S" if DEBUG_HIGHBANK_UART default "debug/mvebu.S" if DEBUG_MVEBU_UART default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 5f914fca911b..97252d86a701 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -196,10 +196,8 @@ machine-$(CONFIG_ARCH_ZYNQ) += zynq # Platform directory name. This list is sorted alphanumerically # by CONFIG_* macro name. -plat-$(CONFIG_ARCH_MXC) += mxc plat-$(CONFIG_ARCH_OMAP) += omap plat-$(CONFIG_ARCH_S3C64XX) += samsung -plat-$(CONFIG_ARCH_ZYNQ) += versatile plat-$(CONFIG_PLAT_IOP) += iop plat-$(CONFIG_PLAT_NOMADIK) += nomadik plat-$(CONFIG_PLAT_ORION) += orion diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index a517153a13ea..537208f22e56 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile @@ -54,10 +54,6 @@ ifeq ($(CONFIG_ARCH_SA1100),y) OBJS += head-sa1100.o endif -ifeq ($(CONFIG_ARCH_VT8500),y) -OBJS += head-vt8500.o -endif - ifeq ($(CONFIG_CPU_XSCALE),y) OBJS += head-xscale.o endif diff --git a/arch/arm/boot/compressed/head-vt8500.S b/arch/arm/boot/compressed/head-vt8500.S deleted file mode 100644 index 1dc1e21a3be3..000000000000 --- a/arch/arm/boot/compressed/head-vt8500.S +++ /dev/null @@ -1,46 +0,0 @@ -/* - * linux/arch/arm/boot/compressed/head-vt8500.S - * - * Copyright (C) 2010 Alexey Charkov <[email protected]> - * - * VIA VT8500 specific tweaks. This is merged into head.S by the linker. - * - */ - -#include <linux/linkage.h> -#include <asm/mach-types.h> - - .section ".start", "ax" - -__VT8500_start: - @ Compare the SCC ID register against a list of known values - ldr r1, .SCCID - ldr r3, [r1] - - @ VT8500 override - ldr r4, .VT8500SCC - cmp r3, r4 - ldreq r7, .ID_BV07 - beq .Lendvt8500 - - @ WM8505 override - ldr r4, .WM8505SCC - cmp r3, r4 - ldreq r7, .ID_8505 - beq .Lendvt8500 - - @ Otherwise, leave the bootloader's machine id untouched - -.SCCID: - .word 0xd8120000 -.VT8500SCC: - .word 0x34000102 -.WM8505SCC: - .word 0x34260103 - -.ID_BV07: - .word MACH_TYPE_BV07 -.ID_8505: - .word MACH_TYPE_WM8505_7IN_NETBOOK - -.Lendvt8500: diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi index 3e54f1498841..67d672792b0d 100644 --- a/arch/arm/boot/dts/imx27.dtsi +++ b/arch/arm/boot/dts/imx27.dtsi @@ -113,7 +113,7 @@ i2c1: i2c@10012000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx27-i2c", "fsl,imx1-i2c"; + compatible = "fsl,imx27-i2c", "fsl,imx21-i2c"; reg = <0x10012000 0x1000>; interrupts = <12>; status = "disabled"; @@ -205,7 +205,7 @@ i2c2: i2c@1001d000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx27-i2c", "fsl,imx1-i2c"; + compatible = "fsl,imx27-i2c", "fsl,imx21-i2c"; reg = <0x1001d000 0x1000>; interrupts = <1>; status = "disabled"; diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi index 75d069fcf897..54aea74769a1 100644 --- a/arch/arm/boot/dts/imx51.dtsi +++ b/arch/arm/boot/dts/imx51.dtsi @@ -377,7 +377,7 @@ i2c@83fc4000 { /* I2C2 */ #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx51-i2c", "fsl,imx1-i2c"; + compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; reg = <0x83fc4000 0x4000>; interrupts = <63>; status = "disabled"; @@ -386,7 +386,7 @@ i2c@83fc8000 { /* I2C1 */ #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx51-i2c", "fsl,imx1-i2c"; + compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; reg = <0x83fc8000 0x4000>; interrupts = <62>; status = "disabled"; diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index 76ebb1ad2675..caf09ff73f10 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi @@ -432,7 +432,7 @@ i2c@53fec000 { /* I2C3 */ #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx53-i2c", "fsl,imx1-i2c"; + compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; reg = <0x53fec000 0x4000>; interrupts = <64>; status = "disabled"; @@ -488,7 +488,7 @@ i2c@63fc4000 { /* I2C2 */ #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx53-i2c", "fsl,imx1-i2c"; + compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; reg = <0x63fc4000 0x4000>; interrupts = <63>; status = "disabled"; @@ -497,7 +497,7 @@ i2c@63fc8000 { /* I2C1 */ #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx53-i2c", "fsl,imx1-i2c"; + compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; reg = <0x63fc8000 0x4000>; interrupts = <62>; status = "disabled"; diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index f3990b04fecf..f604a44a5c66 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -882,7 +882,7 @@ i2c@021a0000 { /* I2C1 */ #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c"; + compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; reg = <0x021a0000 0x4000>; interrupts = <0 36 0x04>; clocks = <&clks 125>; @@ -892,7 +892,7 @@ i2c@021a4000 { /* I2C2 */ #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c"; + compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; reg = <0x021a4000 0x4000>; interrupts = <0 37 0x04>; clocks = <&clks 126>; @@ -902,7 +902,7 @@ i2c@021a8000 { /* I2C3 */ #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c"; + compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; reg = <0x021a8000 0x4000>; interrupts = <0 38 0x04>; clocks = <&clks 127>; diff --git a/arch/arm/boot/dts/zynq-ep107.dts b/arch/arm/boot/dts/zynq-ep107.dts index 37ca192fb193..574bc044f572 100644 --- a/arch/arm/boot/dts/zynq-ep107.dts +++ b/arch/arm/boot/dts/zynq-ep107.dts @@ -36,16 +36,27 @@ ranges; intc: interrupt-controller@f8f01000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + #address-cells = <1>; interrupt-controller; - compatible = "arm,gic"; - reg = <0xF8F01000 0x1000>; - #interrupt-cells = <2>; + reg = <0xF8F01000 0x1000>, + <0xF8F00100 0x100>; + }; + + L2: cache-controller { + compatible = "arm,pl310-cache"; + reg = <0xF8F02000 0x1000>; + arm,data-latency = <2 3 2>; + arm,tag-latency = <2 3 2>; + cache-unified; + cache-level = <2>; }; uart0: uart@e0000000 { compatible = "xlnx,xuartps"; reg = <0xE0000000 0x1000>; - interrupts = <59 0>; + interrupts = <0 27 4>; clock = <50000000>; }; }; diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig index 78ed575feb1a..f71302c3ac33 100644 --- a/arch/arm/configs/imx_v4_v5_defconfig +++ b/arch/arm/configs/imx_v4_v5_defconfig @@ -18,7 +18,9 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_IOSCHED_DEADLINE is not set # CONFIG_IOSCHED_CFQ is not set CONFIG_ARCH_MXC=y -CONFIG_ARCH_IMX_V4_V5=y +CONFIG_ARCH_MULTI_V4T=y +CONFIG_ARCH_MULTI_V5=y +# CONFIG_ARCH_MULTI_V7 is not set CONFIG_ARCH_MX1ADS=y CONFIG_MACH_SCB9328=y CONFIG_MACH_APF9328=y diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig index 394ded624e37..44f117aab52c 100644 --- a/arch/arm/configs/imx_v6_v7_defconfig +++ b/arch/arm/configs/imx_v6_v7_defconfig @@ -17,6 +17,8 @@ CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y # CONFIG_BLK_DEV_BSG is not set CONFIG_ARCH_MXC=y +CONFIG_ARCH_MULTI_V6=y +CONFIG_ARCH_MULTI_V7=y CONFIG_MACH_MX31LILLY=y CONFIG_MACH_MX31LITE=y CONFIG_MACH_PCM037=y diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h index 23004847bb05..8ea02ac3ec1a 100644 --- a/arch/arm/include/asm/dma-mapping.h +++ b/arch/arm/include/asm/dma-mapping.h @@ -211,13 +211,6 @@ static inline void dma_free_writecombine(struct device *dev, size_t size, extern void __init init_dma_coherent_pool_size(unsigned long size); /* - * This can be called during boot to increase the size of the consistent - * DMA region above it's default value of 2MB. It must be called before the - * memory allocator is initialised, i.e. before any core_initcall. - */ -static inline void init_consistent_dma_size(unsigned long size) { } - -/* * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic" * and utilize bounce buffers as needed to work around limited DMA windows. * diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 35c1ed89b936..42f042ee4ada 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -64,7 +64,7 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen); static inline void __raw_writew(u16 val, volatile void __iomem *addr) { asm volatile("strh %1, %0" - : "+Qo" (*(volatile u16 __force *)addr) + : "+Q" (*(volatile u16 __force *)addr) : "r" (val)); } @@ -72,7 +72,7 @@ static inline u16 __raw_readw(const volatile void __iomem *addr) { u16 val; asm volatile("ldrh %1, %0" - : "+Qo" (*(volatile u16 __force *)addr), + : "+Q" (*(volatile u16 __force *)addr), "=r" (val)); return val; } diff --git a/arch/arm/include/asm/sched_clock.h b/arch/arm/include/asm/sched_clock.h index 05b8e82ec9f5..e3f757263438 100644 --- a/arch/arm/include/asm/sched_clock.h +++ b/arch/arm/include/asm/sched_clock.h @@ -10,7 +10,5 @@ extern void sched_clock_postinit(void); extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate); -extern void setup_sched_clock_needs_suspend(u32 (*read)(void), int bits, - unsigned long rate); #endif diff --git a/arch/arm/include/asm/vfpmacros.h b/arch/arm/include/asm/vfpmacros.h index 6a6f1e485f41..301c1db3e99b 100644 --- a/arch/arm/include/asm/vfpmacros.h +++ b/arch/arm/include/asm/vfpmacros.h @@ -27,9 +27,9 @@ #if __LINUX_ARM_ARCH__ <= 6 ldr \tmp, =elf_hwcap @ may not have MVFR regs ldr \tmp, [\tmp, #0] - tst \tmp, #HWCAP_VFPv3D16 - ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} - addne \base, \base, #32*4 @ step over unused register space + tst \tmp, #HWCAP_VFPD32 + ldcnel p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} + addeq \base, \base, #32*4 @ step over unused register space #else VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field @@ -51,9 +51,9 @@ #if __LINUX_ARM_ARCH__ <= 6 ldr \tmp, =elf_hwcap @ may not have MVFR regs ldr \tmp, [\tmp, #0] - tst \tmp, #HWCAP_VFPv3D16 - stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} - addne \base, \base, #32*4 @ step over unused register space + tst \tmp, #HWCAP_VFPD32 + stcnel p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} + addeq \base, \base, #32*4 @ step over unused register space #else VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/include/debug/imx.S index 761e45f9456f..0b65d792f664 100644 --- a/arch/arm/plat-mxc/include/mach/debug-macro.S +++ b/arch/arm/include/debug/imx.S @@ -10,27 +10,38 @@ * published by the Free Software Foundation. * */ -#include <mach/hardware.h> - #ifdef CONFIG_DEBUG_IMX1_UART -#define UART_PADDR MX1_UART1_BASE_ADDR +#define UART_PADDR 0x00206000 #elif defined (CONFIG_DEBUG_IMX25_UART) -#define UART_PADDR MX25_UART1_BASE_ADDR +#define UART_PADDR 0x43f90000 #elif defined (CONFIG_DEBUG_IMX21_IMX27_UART) -#define UART_PADDR MX2x_UART1_BASE_ADDR +#define UART_PADDR 0x1000a000 #elif defined (CONFIG_DEBUG_IMX31_IMX35_UART) -#define UART_PADDR MX3x_UART1_BASE_ADDR +#define UART_PADDR 0x43f90000 #elif defined (CONFIG_DEBUG_IMX51_UART) -#define UART_PADDR MX51_UART1_BASE_ADDR +#define UART_PADDR 0x73fbc000 #elif defined (CONFIG_DEBUG_IMX50_IMX53_UART) -#define UART_PADDR MX53_UART1_BASE_ADDR +#define UART_PADDR 0x53fbc000 #elif defined (CONFIG_DEBUG_IMX6Q_UART2) -#define UART_PADDR MX6Q_UART2_BASE_ADDR +#define UART_PADDR 0x021e8000 #elif defined (CONFIG_DEBUG_IMX6Q_UART4) -#define UART_PADDR MX6Q_UART4_BASE_ADDR +#define UART_PADDR 0x021f0000 #endif -#define UART_VADDR IMX_IO_ADDRESS(UART_PADDR) +/* + * FIXME: This is a copy of IMX_IO_P2V in hardware.h, and needs to + * stay sync with that. It's hard to maintain, and should be fixed + * globally for multi-platform build to use a fixed virtual address + * for low-level debug uart port across platforms. + */ +#define IMX_IO_P2V(x) ( \ + (((x) & 0x80000000) >> 7) | \ + (0xf4000000 + \ + (((x) & 0x50000000) >> 6) + \ + (((x) & 0x0b000000) >> 4) + \ + (((x) & 0x000fffff)))) + +#define UART_VADDR IMX_IO_P2V(UART_PADDR) .macro addruart, rp, rv, tmp ldr \rp, =UART_PADDR @ physical diff --git a/arch/arm/include/uapi/asm/hwcap.h b/arch/arm/include/uapi/asm/hwcap.h index f254f6503cce..3688fd15a32d 100644 --- a/arch/arm/include/uapi/asm/hwcap.h +++ b/arch/arm/include/uapi/asm/hwcap.h @@ -18,11 +18,12 @@ #define HWCAP_THUMBEE (1 << 11) #define HWCAP_NEON (1 << 12) #define HWCAP_VFPv3 (1 << 13) -#define HWCAP_VFPv3D16 (1 << 14) +#define HWCAP_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */ #define HWCAP_TLS (1 << 15) #define HWCAP_VFPv4 (1 << 16) #define HWCAP_IDIVA (1 << 17) #define HWCAP_IDIVT (1 << 18) +#define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs (not 16) */ #define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT) diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c index e21bac20d90d..fc6692e2b603 100644 --- a/arch/arm/kernel/sched_clock.c +++ b/arch/arm/kernel/sched_clock.c @@ -107,13 +107,6 @@ static void sched_clock_poll(unsigned long wrap_ticks) update_sched_clock(); } -void __init setup_sched_clock_needs_suspend(u32 (*read)(void), int bits, - unsigned long rate) -{ - setup_sched_clock(read, bits, rate); - cd.needs_suspend = true; -} - void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate) { unsigned long r, w; @@ -189,18 +182,15 @@ void __init sched_clock_postinit(void) static int sched_clock_suspend(void) { sched_clock_poll(sched_clock_timer.data); - if (cd.needs_suspend) - cd.suspended = true; + cd.suspended = true; return 0; } static void sched_clock_resume(void) { - if (cd.needs_suspend) { - cd.epoch_cyc = read_sched_clock(); - cd.epoch_cyc_copy = cd.epoch_cyc; - cd.suspended = false; - } + cd.epoch_cyc = read_sched_clock(); + cd.epoch_cyc_copy = cd.epoch_cyc; + cd.suspended = false; } static struct syscore_ops sched_clock_ops = { diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index 84af1b506d92..b7ae124c16e5 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c @@ -343,7 +343,6 @@ static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = { static void __init at91sam9g45_map_io(void) { at91_init_sram(0, AT91SAM9G45_SRAM_BASE, AT91SAM9G45_SRAM_SIZE); - init_consistent_dma_size(SZ_4M); } static void __init at91sam9g45_ioremap_registers(void) diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c index 1dbf85beed1b..9211e8800c79 100644 --- a/arch/arm/mach-davinci/board-dm646x-evm.c +++ b/arch/arm/mach-davinci/board-dm646x-evm.c @@ -194,7 +194,7 @@ static int evm_led_setup(struct i2c_client *client, int gpio, while (ngpio--) { leds->gpio = gpio++; leds++; - }; + } evm_led_dev = platform_device_alloc("leds-gpio", 0); platform_device_add_data(evm_led_dev, &evm_led_data, diff --git a/arch/arm/mach-davinci/common.c b/arch/arm/mach-davinci/common.c index 64b0f65a8639..a794f6d9d444 100644 --- a/arch/arm/mach-davinci/common.c +++ b/arch/arm/mach-davinci/common.c @@ -87,8 +87,6 @@ void __init davinci_common_init(struct davinci_soc_info *soc_info) iotable_init(davinci_soc_info.io_desc, davinci_soc_info.io_desc_num); - init_consistent_dma_size(14 << 20); - /* * Normally devicemaps_init() would flush caches and tlb after * mdesc->map_io(), but we must also do it here because of the CPU diff --git a/arch/arm/mach-davinci/usb.c b/arch/arm/mach-davinci/usb.c index f77b95336e2b..34509ffba221 100644 --- a/arch/arm/mach-davinci/usb.c +++ b/arch/arm/mach-davinci/usb.c @@ -42,14 +42,8 @@ static struct musb_hdrc_config musb_config = { }; static struct musb_hdrc_platform_data usb_data = { -#if defined(CONFIG_USB_MUSB_OTG) /* OTG requires a Mini-AB connector */ .mode = MUSB_OTG, -#elif defined(CONFIG_USB_MUSB_PERIPHERAL) - .mode = MUSB_PERIPHERAL, -#elif defined(CONFIG_USB_MUSB_HOST) - .mode = MUSB_HOST, -#endif .clock = "usb", .config = &musb_config, }; diff --git a/arch/arm/plat-mxc/3ds_debugboard.c b/arch/arm/mach-imx/3ds_debugboard.c index 5c10ad05df74..134377352966 100644 --- a/arch/arm/plat-mxc/3ds_debugboard.c +++ b/arch/arm/mach-imx/3ds_debugboard.c @@ -21,7 +21,7 @@ #include <linux/regulator/machine.h> #include <linux/regulator/fixed.h> -#include <mach/hardware.h> +#include "hardware.h" /* LAN9217 ethernet base address */ #define LAN9217_BASE_ADDR(n) (n + 0x0) diff --git a/arch/arm/plat-mxc/include/mach/3ds_debugboard.h b/arch/arm/mach-imx/3ds_debugboard.h index 9fd6cb3f8fad..9fd6cb3f8fad 100644 --- a/arch/arm/plat-mxc/include/mach/3ds_debugboard.h +++ b/arch/arm/mach-imx/3ds_debugboard.h diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 8d276584650e..f1bf610e2900 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -1,3 +1,70 @@ +config ARCH_MXC + bool "Freescale i.MX family" if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7 + select ARCH_REQUIRE_GPIOLIB + select ARM_PATCH_PHYS_VIRT + select AUTO_ZRELADDR if !ZBOOT_ROM + select CLKDEV_LOOKUP + select CLKSRC_MMIO + select GENERIC_CLOCKEVENTS + select GENERIC_IRQ_CHIP + select MULTI_IRQ_HANDLER + select SPARSE_IRQ + select USE_OF + help + Support for Freescale MXC/iMX-based family of processors + +menu "Freescale i.MX support" + depends on ARCH_MXC + +config MXC_IRQ_PRIOR + bool "Use IRQ priority" + help + Select this if you want to use prioritized IRQ handling. + This feature prevents higher priority ISR to be interrupted + by lower priority IRQ even IRQF_DISABLED flag is not set. + This may be useful in embedded applications, where are strong + requirements for timing. + Say N here, unless you have a specialized requirement. + +config MXC_TZIC + bool + +config MXC_AVIC + bool + +config MXC_DEBUG_BOARD + bool "Enable MXC debug board(for 3-stack)" + help + The debug board is an integral part of the MXC 3-stack(PDK) + platforms, it can be attached or removed from the peripheral + board. On debug board, several debug devices(ethernet, UART, + buttons, LEDs and JTAG) are implemented. Between the MCU and + these devices, a CPLD is added as a bridge which performs + data/address de-multiplexing and decode, signal level shift, + interrupt control and various board functions. + +config HAVE_EPIT + bool + +config MXC_USE_EPIT + bool "Use EPIT instead of GPT" + depends on HAVE_EPIT + help + Use EPIT as the system timer on systems that have it. Normally you + don't have a reason to do so as the EPIT has the same features and + uses the same clocks as the GPT. Anyway, on some systems the GPT + may be in use for other purposes. + +config MXC_ULPI + bool + +config ARCH_HAS_RNGA + bool + +config IRAM_ALLOC + bool + select GENERIC_ALLOCATOR + config HAVE_IMX_GPC bool @@ -5,6 +72,12 @@ config HAVE_IMX_MMDC bool config HAVE_IMX_SRC + def_bool y if SMP + +config IMX_HAVE_IOMUX_V1 + bool + +config ARCH_MXC_IOMUX_V3 bool config ARCH_MX1 @@ -104,7 +177,7 @@ config SOC_IMX51 select PINCTRL_IMX51 select SOC_IMX5 -if ARCH_IMX_V4_V5 +if ARCH_MULTI_V4T comment "MX1 platforms:" config MACH_MXLADS @@ -133,6 +206,10 @@ config MACH_APF9328 help Say Yes here if you are using the Armadeus APF9328 development board +endif + +if ARCH_MULTI_V5 + comment "MX21 platforms:" config MACH_MX21ADS @@ -384,7 +461,7 @@ config MACH_IMX27_DT endif -if ARCH_IMX_V6_V7 +if ARCH_MULTI_V6 comment "MX31 platforms:" @@ -649,6 +726,10 @@ config MACH_VPR200 Include support for VPR200 platform. This includes specific configurations for the board and its peripherals. +endif + +if ARCH_MULTI_V7 + comment "i.MX5 platforms:" config MACH_MX50_RDP @@ -756,7 +837,6 @@ config SOC_IMX6Q select HAVE_CAN_FLEXCAN if CAN select HAVE_IMX_GPC select HAVE_IMX_MMDC - select HAVE_IMX_SRC select HAVE_SMP select MFD_SYSCON select PINCTRL @@ -766,3 +846,7 @@ config SOC_IMX6Q This enables support for Freescale i.MX6 Quad processor. endif + +source "arch/arm/mach-imx/devices/Kconfig" + +endmenu diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 895754aeb4f3..fe47b71469c9 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -1,3 +1,5 @@ +obj-y := time.o cpu.o system.o irq-common.o + obj-$(CONFIG_SOC_IMX1) += clk-imx1.o mm-imx1.o obj-$(CONFIG_SOC_IMX21) += clk-imx21.o mm-imx21.o @@ -15,6 +17,24 @@ obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o $(i obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \ clk-pfd.o clk-busy.o clk.o +obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o +obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o + +obj-$(CONFIG_MXC_TZIC) += tzic.o +obj-$(CONFIG_MXC_AVIC) += avic.o + +obj-$(CONFIG_IRAM_ALLOC) += iram_alloc.o +obj-$(CONFIG_MXC_ULPI) += ulpi.o +obj-$(CONFIG_MXC_USE_EPIT) += epit.o +obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o +obj-$(CONFIG_CPU_FREQ_IMX) += cpufreq.o +obj-$(CONFIG_CPU_IDLE) += cpuidle.o + +ifdef CONFIG_SND_IMX_SOC +obj-y += ssi-fiq.o +obj-y += ssi-fiq-ksym.o +endif + # Support for CMOS sensor interface obj-$(CONFIG_MX1_VIDEO) += mx1-camera-fiq.o mx1-camera-fiq-ksym.o @@ -89,3 +109,5 @@ obj-$(CONFIG_MACH_MX50_RDP) += mach-mx50_rdp.o obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o obj-$(CONFIG_SOC_IMX53) += mach-imx53.o + +obj-y += devices/ diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/mach-imx/avic.c index cbd55c36def3..0eff23ed92b9 100644 --- a/arch/arm/plat-mxc/avic.c +++ b/arch/arm/mach-imx/avic.c @@ -22,12 +22,11 @@ #include <linux/irqdomain.h> #include <linux/io.h> #include <linux/of.h> -#include <mach/common.h> #include <asm/mach/irq.h> #include <asm/exception.h> -#include <mach/hardware.h> -#include <mach/irqs.h> +#include "common.h" +#include "hardware.h" #include "irq-common.h" #define AVIC_INTCNTL 0x00 /* int control reg */ diff --git a/arch/arm/plat-mxc/include/mach/board-mx31lilly.h b/arch/arm/mach-imx/board-mx31lilly.h index 0df71bfefbb1..0df71bfefbb1 100644 --- a/arch/arm/plat-mxc/include/mach/board-mx31lilly.h +++ b/arch/arm/mach-imx/board-mx31lilly.h diff --git a/arch/arm/plat-mxc/include/mach/board-mx31lite.h b/arch/arm/mach-imx/board-mx31lite.h index c1ad0ae807cc..c1ad0ae807cc 100644 --- a/arch/arm/plat-mxc/include/mach/board-mx31lite.h +++ b/arch/arm/mach-imx/board-mx31lite.h diff --git a/arch/arm/plat-mxc/include/mach/board-mx31moboard.h b/arch/arm/mach-imx/board-mx31moboard.h index de14543891cf..de14543891cf 100644 --- a/arch/arm/plat-mxc/include/mach/board-mx31moboard.h +++ b/arch/arm/mach-imx/board-mx31moboard.h diff --git a/arch/arm/plat-mxc/include/mach/board-pcm038.h b/arch/arm/mach-imx/board-pcm038.h index 6f371e35753d..6f371e35753d 100644 --- a/arch/arm/plat-mxc/include/mach/board-pcm038.h +++ b/arch/arm/mach-imx/board-pcm038.h diff --git a/arch/arm/mach-imx/clk-imx1.c b/arch/arm/mach-imx/clk-imx1.c index 516ddee1948e..15f9d223cf0b 100644 --- a/arch/arm/mach-imx/clk-imx1.c +++ b/arch/arm/mach-imx/clk-imx1.c @@ -22,9 +22,9 @@ #include <linux/clkdev.h> #include <linux/err.h> -#include <mach/hardware.h> -#include <mach/common.h> #include "clk.h" +#include "common.h" +#include "hardware.h" /* CCM register addresses */ #define IO_ADDR_CCM(off) (MX1_IO_ADDRESS(MX1_CCM_BASE_ADDR + (off))) @@ -82,7 +82,8 @@ int __init mx1_clocks_init(unsigned long fref) pr_err("imx1 clk %d: register failed with %ld\n", i, PTR_ERR(clk[i])); - clk_register_clkdev(clk[dma_gate], "ahb", "imx-dma"); + clk_register_clkdev(clk[dma_gate], "ahb", "imx1-dma"); + clk_register_clkdev(clk[hclk], "ipg", "imx1-dma"); clk_register_clkdev(clk[csi_gate], NULL, "mx1-camera.0"); clk_register_clkdev(clk[mma_gate], "mma", NULL); clk_register_clkdev(clk[usbd_gate], NULL, "imx_udc.0"); @@ -94,18 +95,18 @@ int __init mx1_clocks_init(unsigned long fref) clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.1"); clk_register_clkdev(clk[per1], "per", "imx1-uart.2"); clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.2"); - clk_register_clkdev(clk[hclk], NULL, "imx-i2c.0"); + clk_register_clkdev(clk[hclk], NULL, "imx1-i2c.0"); clk_register_clkdev(clk[per2], "per", "imx1-cspi.0"); clk_register_clkdev(clk[dummy], "ipg", "imx1-cspi.0"); clk_register_clkdev(clk[per2], "per", "imx1-cspi.1"); clk_register_clkdev(clk[dummy], "ipg", "imx1-cspi.1"); clk_register_clkdev(clk[per2], NULL, "imx-mmc.0"); - clk_register_clkdev(clk[per2], "per", "imx-fb.0"); - clk_register_clkdev(clk[dummy], "ipg", "imx-fb.0"); - clk_register_clkdev(clk[dummy], "ahb", "imx-fb.0"); + clk_register_clkdev(clk[per2], "per", "imx1-fb.0"); + clk_register_clkdev(clk[dummy], "ipg", "imx1-fb.0"); + clk_register_clkdev(clk[dummy], "ahb", "imx1-fb.0"); clk_register_clkdev(clk[hclk], "mshc", NULL); clk_register_clkdev(clk[per3], "ssi", NULL); - clk_register_clkdev(clk[clk32], NULL, "mxc_rtc.0"); + clk_register_clkdev(clk[clk32], NULL, "imx1-rtc.0"); clk_register_clkdev(clk[clko], "clko", NULL); mxc_timer_init(MX1_IO_ADDRESS(MX1_TIM1_BASE_ADDR), MX1_TIM1_INT); diff --git a/arch/arm/mach-imx/clk-imx21.c b/arch/arm/mach-imx/clk-imx21.c index cf65148bc519..d7ed66091a2a 100644 --- a/arch/arm/mach-imx/clk-imx21.c +++ b/arch/arm/mach-imx/clk-imx21.c @@ -25,9 +25,9 @@ #include <linux/module.h> #include <linux/err.h> -#include <mach/hardware.h> -#include <mach/common.h> #include "clk.h" +#include "common.h" +#include "hardware.h" #define IO_ADDR_CCM(off) (MX21_IO_ADDRESS(MX21_CCM_BASE_ADDR + (off))) @@ -156,16 +156,16 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href) clk_register_clkdev(clk[cspi2_ipg_gate], "ipg", "imx21-cspi.1"); clk_register_clkdev(clk[per2], "per", "imx21-cspi.2"); clk_register_clkdev(clk[cspi3_ipg_gate], "ipg", "imx21-cspi.2"); - clk_register_clkdev(clk[per3], "per", "imx-fb.0"); - clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx-fb.0"); - clk_register_clkdev(clk[lcdc_hclk_gate], "ahb", "imx-fb.0"); + clk_register_clkdev(clk[per3], "per", "imx21-fb.0"); + clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx21-fb.0"); + clk_register_clkdev(clk[lcdc_hclk_gate], "ahb", "imx21-fb.0"); clk_register_clkdev(clk[usb_gate], "per", "imx21-hcd.0"); clk_register_clkdev(clk[usb_hclk_gate], "ahb", "imx21-hcd.0"); - clk_register_clkdev(clk[nfc_gate], NULL, "mxc_nand.0"); - clk_register_clkdev(clk[dma_hclk_gate], "ahb", "imx-dma"); - clk_register_clkdev(clk[dma_gate], "ipg", "imx-dma"); + clk_register_clkdev(clk[nfc_gate], NULL, "imx21-nand.0"); + clk_register_clkdev(clk[dma_hclk_gate], "ahb", "imx21-dma"); + clk_register_clkdev(clk[dma_gate], "ipg", "imx21-dma"); clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0"); - clk_register_clkdev(clk[i2c_gate], NULL, "imx-i2c.0"); + clk_register_clkdev(clk[i2c_gate], NULL, "imx21-i2c.0"); clk_register_clkdev(clk[kpp_gate], NULL, "mxc-keypad"); clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0"); clk_register_clkdev(clk[brom_gate], "brom", NULL); diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c index 01e2f843bf2e..bc885801cd68 100644 --- a/arch/arm/mach-imx/clk-imx25.c +++ b/arch/arm/mach-imx/clk-imx25.c @@ -24,10 +24,10 @@ #include <linux/clkdev.h> #include <linux/err.h> -#include <mach/hardware.h> -#include <mach/common.h> -#include <mach/mx25.h> #include "clk.h" +#include "common.h" +#include "hardware.h" +#include "mx25.h" #define CRM_BASE MX25_IO_ADDRESS(MX25_CRM_BASE_ADDR) @@ -197,7 +197,7 @@ int __init mx25_clocks_init(void) clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc"); clk_register_clkdev(clk[usbotg_ahb], "ahb", "fsl-usb2-udc"); clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc"); - clk_register_clkdev(clk[nfc_ipg_per], NULL, "mxc_nand.0"); + clk_register_clkdev(clk[nfc_ipg_per], NULL, "imx25-nand.0"); /* i.mx25 has the i.mx35 type cspi */ clk_register_clkdev(clk[cspi1_ipg], NULL, "imx35-cspi.0"); clk_register_clkdev(clk[cspi2_ipg], NULL, "imx35-cspi.1"); @@ -212,15 +212,15 @@ int __init mx25_clocks_init(void) clk_register_clkdev(clk[per10], "per", "mxc_pwm.3"); clk_register_clkdev(clk[kpp_ipg], NULL, "imx-keypad"); clk_register_clkdev(clk[tsc_ipg], NULL, "mx25-adc"); - clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.0"); - clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.1"); - clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.2"); + clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.0"); + clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.1"); + clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.2"); clk_register_clkdev(clk[fec_ipg], "ipg", "imx25-fec.0"); clk_register_clkdev(clk[fec_ahb], "ahb", "imx25-fec.0"); clk_register_clkdev(clk[dryice_ipg], NULL, "imxdi_rtc.0"); - clk_register_clkdev(clk[lcdc_ipg_per], "per", "imx-fb.0"); - clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx-fb.0"); - clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx-fb.0"); + clk_register_clkdev(clk[lcdc_ipg_per], "per", "imx21-fb.0"); + clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx21-fb.0"); + clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx21-fb.0"); clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0"); clk_register_clkdev(clk[ssi1_ipg], NULL, "imx-ssi.0"); clk_register_clkdev(clk[ssi2_ipg], NULL, "imx-ssi.1"); @@ -230,9 +230,9 @@ int __init mx25_clocks_init(void) clk_register_clkdev(clk[esdhc2_ipg_per], "per", "sdhci-esdhc-imx25.1"); clk_register_clkdev(clk[esdhc2_ipg], "ipg", "sdhci-esdhc-imx25.1"); clk_register_clkdev(clk[esdhc2_ahb], "ahb", "sdhci-esdhc-imx25.1"); - clk_register_clkdev(clk[csi_ipg_per], "per", "mx2-camera.0"); - clk_register_clkdev(clk[csi_ipg], "ipg", "mx2-camera.0"); - clk_register_clkdev(clk[csi_ahb], "ahb", "mx2-camera.0"); + clk_register_clkdev(clk[csi_ipg_per], "per", "imx25-camera.0"); + clk_register_clkdev(clk[csi_ipg], "ipg", "imx25-camera.0"); + clk_register_clkdev(clk[csi_ahb], "ahb", "imx25-camera.0"); clk_register_clkdev(clk[dummy], "audmux", NULL); clk_register_clkdev(clk[can1_ipg], NULL, "flexcan.0"); clk_register_clkdev(clk[can2_ipg], NULL, "flexcan.1"); diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c index 366e5d59d886..585ab256c58f 100644 --- a/arch/arm/mach-imx/clk-imx27.c +++ b/arch/arm/mach-imx/clk-imx27.c @@ -6,9 +6,9 @@ #include <linux/clk-provider.h> #include <linux/of.h> -#include <mach/common.h> -#include <mach/hardware.h> #include "clk.h" +#include "common.h" +#include "hardware.h" #define IO_ADDR_CCM(off) (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR + (off))) @@ -211,19 +211,19 @@ int __init mx27_clocks_init(unsigned long fref) clk_register_clkdev(clk[gpt6_ipg_gate], "ipg", "imx-gpt.5"); clk_register_clkdev(clk[per1_gate], "per", "imx-gpt.5"); clk_register_clkdev(clk[pwm_ipg_gate], NULL, "mxc_pwm.0"); - clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.0"); - clk_register_clkdev(clk[sdhc1_ipg_gate], "ipg", "mxc-mmc.0"); - clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.1"); - clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "mxc-mmc.1"); - clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.2"); - clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "mxc-mmc.2"); + clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.0"); + clk_register_clkdev(clk[sdhc1_ipg_gate], "ipg", "imx21-mmc.0"); + clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.1"); + clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.1"); + clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.2"); + clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.2"); clk_register_clkdev(clk[cspi1_ipg_gate], NULL, "imx27-cspi.0"); clk_register_clkdev(clk[cspi2_ipg_gate], NULL, "imx27-cspi.1"); clk_register_clkdev(clk[cspi3_ipg_gate], NULL, "imx27-cspi.2"); - clk_register_clkdev(clk[per3_gate], "per", "imx-fb.0"); - clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx-fb.0"); - clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx-fb.0"); - clk_register_clkdev(clk[csi_ahb_gate], "ahb", "mx2-camera.0"); + clk_register_clkdev(clk[per3_gate], "per", "imx21-fb.0"); + clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx21-fb.0"); + clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx21-fb.0"); + clk_register_clkdev(clk[csi_ahb_gate], "ahb", "imx27-camera.0"); clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc"); clk_register_clkdev(clk[usb_ipg_gate], "ipg", "fsl-usb2-udc"); clk_register_clkdev(clk[usb_ahb_gate], "ahb", "fsl-usb2-udc"); @@ -238,27 +238,27 @@ int __init mx27_clocks_init(unsigned long fref) clk_register_clkdev(clk[usb_ahb_gate], "ahb", "mxc-ehci.2"); clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0"); clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1"); - clk_register_clkdev(clk[nfc_baud_gate], NULL, "mxc_nand.0"); + clk_register_clkdev(clk[nfc_baud_gate], NULL, "imx27-nand.0"); clk_register_clkdev(clk[vpu_baud_gate], "per", "coda-imx27.0"); clk_register_clkdev(clk[vpu_ahb_gate], "ahb", "coda-imx27.0"); - clk_register_clkdev(clk[dma_ahb_gate], "ahb", "imx-dma"); - clk_register_clkdev(clk[dma_ipg_gate], "ipg", "imx-dma"); + clk_register_clkdev(clk[dma_ahb_gate], "ahb", "imx27-dma"); + clk_register_clkdev(clk[dma_ipg_gate], "ipg", "imx27-dma"); clk_register_clkdev(clk[fec_ipg_gate], "ipg", "imx27-fec.0"); clk_register_clkdev(clk[fec_ahb_gate], "ahb", "imx27-fec.0"); clk_register_clkdev(clk[wdog_ipg_gate], NULL, "imx2-wdt.0"); - clk_register_clkdev(clk[i2c1_ipg_gate], NULL, "imx-i2c.0"); - clk_register_clkdev(clk[i2c2_ipg_gate], NULL, "imx-i2c.1"); + clk_register_clkdev(clk[i2c1_ipg_gate], NULL, "imx21-i2c.0"); + clk_register_clkdev(clk[i2c2_ipg_gate], NULL, "imx21-i2c.1"); clk_register_clkdev(clk[owire_ipg_gate], NULL, "mxc_w1.0"); clk_register_clkdev(clk[kpp_ipg_gate], NULL, "imx-keypad"); - clk_register_clkdev(clk[emma_ahb_gate], "emma-ahb", "mx2-camera.0"); - clk_register_clkdev(clk[emma_ipg_gate], "emma-ipg", "mx2-camera.0"); + clk_register_clkdev(clk[emma_ahb_gate], "emma-ahb", "imx27-camera.0"); + clk_register_clkdev(clk[emma_ipg_gate], "emma-ipg", "imx27-camera.0"); clk_register_clkdev(clk[emma_ahb_gate], "ahb", "m2m-emmaprp.0"); clk_register_clkdev(clk[emma_ipg_gate], "ipg", "m2m-emmaprp.0"); clk_register_clkdev(clk[iim_ipg_gate], "iim", NULL); clk_register_clkdev(clk[gpio_ipg_gate], "gpio", NULL); clk_register_clkdev(clk[brom_ahb_gate], "brom", NULL); clk_register_clkdev(clk[ata_ahb_gate], "ata", NULL); - clk_register_clkdev(clk[rtc_ipg_gate], NULL, "mxc_rtc"); + clk_register_clkdev(clk[rtc_ipg_gate], NULL, "imx21-rtc"); clk_register_clkdev(clk[scc_ipg_gate], "scc", NULL); clk_register_clkdev(clk[cpu_div], "cpu", NULL); clk_register_clkdev(clk[emi_ahb_gate], "emi_ahb" , NULL); diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c index 1253af2d9971..8be64e0a4ace 100644 --- a/arch/arm/mach-imx/clk-imx31.c +++ b/arch/arm/mach-imx/clk-imx31.c @@ -22,12 +22,11 @@ #include <linux/err.h> #include <linux/of.h> -#include <mach/hardware.h> -#include <mach/mx31.h> -#include <mach/common.h> - #include "clk.h" +#include "common.h" #include "crmregs-imx3.h" +#include "hardware.h" +#include "mx31.h" static const char *mcu_main_sel[] = { "spll", "mpll", }; static const char *per_sel[] = { "per_div", "ipg", }; @@ -124,10 +123,10 @@ int __init mx31_clocks_init(unsigned long fref) clk_register_clkdev(clk[cspi3_gate], NULL, "imx31-cspi.2"); clk_register_clkdev(clk[pwm_gate], "pwm", NULL); clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0"); - clk_register_clkdev(clk[rtc_gate], NULL, "mxc_rtc"); + clk_register_clkdev(clk[rtc_gate], NULL, "imx21-rtc"); clk_register_clkdev(clk[epit1_gate], "epit", NULL); clk_register_clkdev(clk[epit2_gate], "epit", NULL); - clk_register_clkdev(clk[nfc], NULL, "mxc_nand.0"); + clk_register_clkdev(clk[nfc], NULL, "imx27-nand.0"); clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core"); clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb"); clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad"); @@ -155,12 +154,12 @@ int __init mx31_clocks_init(unsigned long fref) clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.3"); clk_register_clkdev(clk[uart5_gate], "per", "imx21-uart.4"); clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.4"); - clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0"); - clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1"); - clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2"); + clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0"); + clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1"); + clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2"); clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0"); - clk_register_clkdev(clk[sdhc1_gate], NULL, "mxc-mmc.0"); - clk_register_clkdev(clk[sdhc2_gate], NULL, "mxc-mmc.1"); + clk_register_clkdev(clk[sdhc1_gate], NULL, "imx31-mmc.0"); + clk_register_clkdev(clk[sdhc2_gate], NULL, "imx31-mmc.1"); clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0"); clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1"); clk_register_clkdev(clk[firi_gate], "firi", NULL); diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c index 177259b523cd..66f3d65ea275 100644 --- a/arch/arm/mach-imx/clk-imx35.c +++ b/arch/arm/mach-imx/clk-imx35.c @@ -14,11 +14,10 @@ #include <linux/of.h> #include <linux/err.h> -#include <mach/hardware.h> -#include <mach/common.h> - #include "crmregs-imx3.h" #include "clk.h" +#include "common.h" +#include "hardware.h" struct arm_ahb_div { unsigned char arm, ahb, sel; @@ -226,9 +225,9 @@ int __init mx35_clocks_init() clk_register_clkdev(clk[fec_gate], NULL, "imx27-fec.0"); clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0"); clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0"); - clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0"); - clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1"); - clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2"); + clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0"); + clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1"); + clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2"); clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core"); clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb"); clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad"); @@ -256,7 +255,7 @@ int __init mx35_clocks_init() clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc"); clk_register_clkdev(clk[usbotg_gate], "ahb", "fsl-usb2-udc"); clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0"); - clk_register_clkdev(clk[nfc_div], NULL, "mxc_nand.0"); + clk_register_clkdev(clk[nfc_div], NULL, "imx25-nand.0"); clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0"); clk_prepare_enable(clk[spba_gate]); diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c index a0bf84803eac..abb71f6b4d60 100644 --- a/arch/arm/mach-imx/clk-imx51-imx53.c +++ b/arch/arm/mach-imx/clk-imx51-imx53.c @@ -14,11 +14,10 @@ #include <linux/of.h> #include <linux/err.h> -#include <mach/hardware.h> -#include <mach/common.h> - #include "crm-regs-imx5.h" #include "clk.h" +#include "common.h" +#include "hardware.h" /* Low-power Audio Playback Mode clock */ static const char *lp_apm_sel[] = { "osc", }; @@ -258,8 +257,8 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil, clk_register_clkdev(clk[cspi_ipg_gate], NULL, "imx35-cspi.2"); clk_register_clkdev(clk[pwm1_ipg_gate], "pwm", "mxc_pwm.0"); clk_register_clkdev(clk[pwm2_ipg_gate], "pwm", "mxc_pwm.1"); - clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0"); - clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1"); + clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0"); + clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1"); clk_register_clkdev(clk[usboh3_per_gate], "per", "mxc-ehci.0"); clk_register_clkdev(clk[usboh3_gate], "ipg", "mxc-ehci.0"); clk_register_clkdev(clk[usboh3_gate], "ahb", "mxc-ehci.0"); @@ -272,7 +271,7 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil, clk_register_clkdev(clk[usboh3_per_gate], "per", "fsl-usb2-udc"); clk_register_clkdev(clk[usboh3_gate], "ipg", "fsl-usb2-udc"); clk_register_clkdev(clk[usboh3_gate], "ahb", "fsl-usb2-udc"); - clk_register_clkdev(clk[nfc_gate], NULL, "mxc_nand"); + clk_register_clkdev(clk[nfc_gate], NULL, "imx51-nand"); clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0"); clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1"); clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "imx-ssi.2"); @@ -345,7 +344,7 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2); - clk_register_clkdev(clk[hsi2c_gate], NULL, "imx-i2c.2"); + clk_register_clkdev(clk[hsi2c_gate], NULL, "imx21-i2c.2"); clk_register_clkdev(clk[mx51_mipi], "mipi_hsp", NULL); clk_register_clkdev(clk[vpu_gate], NULL, "imx51-vpu.0"); clk_register_clkdev(clk[fec_gate], NULL, "imx27-fec.0"); @@ -440,7 +439,7 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2); clk_register_clkdev(clk[vpu_gate], NULL, "imx53-vpu.0"); - clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2"); + clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2"); clk_register_clkdev(clk[fec_gate], NULL, "imx25-fec.0"); clk_register_clkdev(clk[ipu_gate], "bus", "imx53-ipu"); clk_register_clkdev(clk[ipu_di0_gate], "di0", "imx53-ipu"); diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index 3ec242f3341e..e5a82bb95b52 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -19,8 +19,9 @@ #include <linux/of.h> #include <linux/of_address.h> #include <linux/of_irq.h> -#include <mach/common.h> + #include "clk.h" +#include "common.h" #define CCGR0 0x68 #define CCGR1 0x6c diff --git a/arch/arm/mach-imx/clk-pllv1.c b/arch/arm/mach-imx/clk-pllv1.c index 02be73178912..abff350ba24c 100644 --- a/arch/arm/mach-imx/clk-pllv1.c +++ b/arch/arm/mach-imx/clk-pllv1.c @@ -4,10 +4,10 @@ #include <linux/slab.h> #include <linux/kernel.h> #include <linux/err.h> -#include <mach/common.h> -#include <mach/hardware.h> #include "clk.h" +#include "common.h" +#include "hardware.h" /** * pll v1 diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/mach-imx/common.h index ead901814c0d..ef8db6b34841 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/mach-imx/common.h @@ -79,6 +79,7 @@ extern void mxc_arch_reset_init(void __iomem *); extern int mx53_revision(void); extern int mx53_display_revision(void); extern void imx_set_aips(void __iomem *); +extern int mxc_device_init(void); enum mxc_cpu_pwr_mode { WAIT_CLOCKED, /* wfi only */ diff --git a/arch/arm/mach-imx/cpu-imx25.c b/arch/arm/mach-imx/cpu-imx25.c index 6914bcbf84e4..96ec64b5ff7d 100644 --- a/arch/arm/mach-imx/cpu-imx25.c +++ b/arch/arm/mach-imx/cpu-imx25.c @@ -11,8 +11,9 @@ */ #include <linux/module.h> #include <linux/io.h> -#include <mach/hardware.h> -#include <mach/iim.h> + +#include "iim.h" +#include "hardware.h" static int mx25_cpu_rev = -1; diff --git a/arch/arm/mach-imx/cpu-imx27.c b/arch/arm/mach-imx/cpu-imx27.c index ff38e1505f67..fe8d36f7e30e 100644 --- a/arch/arm/mach-imx/cpu-imx27.c +++ b/arch/arm/mach-imx/cpu-imx27.c @@ -24,7 +24,7 @@ #include <linux/io.h> #include <linux/module.h> -#include <mach/hardware.h> +#include "hardware.h" static int mx27_cpu_rev = -1; static int mx27_cpu_partnumber; diff --git a/arch/arm/mach-imx/cpu-imx31.c b/arch/arm/mach-imx/cpu-imx31.c index 3f2345f0cdaf..fde1860a2521 100644 --- a/arch/arm/mach-imx/cpu-imx31.c +++ b/arch/arm/mach-imx/cpu-imx31.c @@ -11,9 +11,10 @@ #include <linux/module.h> #include <linux/io.h> -#include <mach/hardware.h> -#include <mach/iim.h> -#include <mach/common.h> + +#include "common.h" +#include "hardware.h" +#include "iim.h" static int mx31_cpu_rev = -1; diff --git a/arch/arm/mach-imx/cpu-imx35.c b/arch/arm/mach-imx/cpu-imx35.c index 846e46eb8cbf..ec3aaa098c17 100644 --- a/arch/arm/mach-imx/cpu-imx35.c +++ b/arch/arm/mach-imx/cpu-imx35.c @@ -10,8 +10,9 @@ */ #include <linux/module.h> #include <linux/io.h> -#include <mach/hardware.h> -#include <mach/iim.h> + +#include "hardware.h" +#include "iim.h" static int mx35_cpu_rev = -1; diff --git a/arch/arm/mach-imx/cpu-imx5.c b/arch/arm/mach-imx/cpu-imx5.c index 8eb15a2fcaf9..d88760014ff9 100644 --- a/arch/arm/mach-imx/cpu-imx5.c +++ b/arch/arm/mach-imx/cpu-imx5.c @@ -15,9 +15,10 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/module.h> -#include <mach/hardware.h> #include <linux/io.h> +#include "hardware.h" + static int mx5_cpu_rev = -1; #define IIM_SREV 0x24 diff --git a/arch/arm/plat-mxc/cpu.c b/arch/arm/mach-imx/cpu.c index 220dd6f93126..03fcbd082593 100644 --- a/arch/arm/plat-mxc/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -1,7 +1,8 @@ #include <linux/module.h> #include <linux/io.h> -#include <mach/hardware.h> + +#include "hardware.h" unsigned int __mxc_cpu_type; EXPORT_SYMBOL(__mxc_cpu_type); diff --git a/arch/arm/mach-imx/cpu_op-mx51.c b/arch/arm/mach-imx/cpu_op-mx51.c index 7b92cd6da6d3..b9ef692b61a2 100644 --- a/arch/arm/mach-imx/cpu_op-mx51.c +++ b/arch/arm/mach-imx/cpu_op-mx51.c @@ -13,9 +13,10 @@ #include <linux/bug.h> #include <linux/types.h> -#include <mach/hardware.h> #include <linux/kernel.h> +#include "hardware.h" + static struct cpu_op mx51_cpu_op[] = { { .cpu_rate = 160000000,}, diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/mach-imx/cpufreq.c index b5b6f8083130..36e8b3994470 100644 --- a/arch/arm/plat-mxc/cpufreq.c +++ b/arch/arm/mach-imx/cpufreq.c @@ -22,7 +22,8 @@ #include <linux/clk.h> #include <linux/err.h> #include <linux/slab.h> -#include <mach/hardware.h> + +#include "hardware.h" #define CLK32_FREQ 32768 #define NANOSECOND (1000 * 1000 * 1000) diff --git a/arch/arm/plat-mxc/cpuidle.c b/arch/arm/mach-imx/cpuidle.c index d4cb511a44a8..d4cb511a44a8 100644 --- a/arch/arm/plat-mxc/cpuidle.c +++ b/arch/arm/mach-imx/cpuidle.c diff --git a/arch/arm/plat-mxc/include/mach/cpuidle.h b/arch/arm/mach-imx/cpuidle.h index bc932d1af372..bc932d1af372 100644 --- a/arch/arm/plat-mxc/include/mach/cpuidle.h +++ b/arch/arm/mach-imx/cpuidle.h diff --git a/arch/arm/mach-imx/devices-imx1.h b/arch/arm/mach-imx/devices-imx1.h index 3aad1e70de96..f9b5afc6bcd1 100644 --- a/arch/arm/mach-imx/devices-imx1.h +++ b/arch/arm/mach-imx/devices-imx1.h @@ -6,8 +6,7 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include <mach/mx1.h> -#include <mach/devices-common.h> +#include "devices/devices-common.h" extern const struct imx_imx_fb_data imx1_imx_fb_data; #define imx1_add_imx_fb(pdata) \ diff --git a/arch/arm/mach-imx/devices-imx21.h b/arch/arm/mach-imx/devices-imx21.h index 93ece55f75df..bd9393280159 100644 --- a/arch/arm/mach-imx/devices-imx21.h +++ b/arch/arm/mach-imx/devices-imx21.h @@ -6,8 +6,7 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include <mach/mx21.h> -#include <mach/devices-common.h> +#include "devices/devices-common.h" extern const struct imx_imx21_hcd_data imx21_imx21_hcd_data; #define imx21_add_imx21_hcd(pdata) \ diff --git a/arch/arm/mach-imx/devices-imx25.h b/arch/arm/mach-imx/devices-imx25.h index f8e03dd1f116..0d2922bc575c 100644 --- a/arch/arm/mach-imx/devices-imx25.h +++ b/arch/arm/mach-imx/devices-imx25.h @@ -6,8 +6,7 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include <mach/mx25.h> -#include <mach/devices-common.h> +#include "devices/devices-common.h" extern const struct imx_fec_data imx25_fec_data; #define imx25_add_fec(pdata) \ diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h index 04822932cdd1..8a1ad7972d4c 100644 --- a/arch/arm/mach-imx/devices-imx27.h +++ b/arch/arm/mach-imx/devices-imx27.h @@ -6,8 +6,7 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include <mach/mx27.h> -#include <mach/devices-common.h> +#include "devices/devices-common.h" extern const struct imx_fec_data imx27_fec_data; #define imx27_add_fec(pdata) \ diff --git a/arch/arm/mach-imx/devices-imx31.h b/arch/arm/mach-imx/devices-imx31.h index 8b2ceb45bb83..e8d1611bbc8e 100644 --- a/arch/arm/mach-imx/devices-imx31.h +++ b/arch/arm/mach-imx/devices-imx31.h @@ -6,8 +6,7 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include <mach/mx31.h> -#include <mach/devices-common.h> +#include "devices/devices-common.h" extern const struct imx_fsl_usb2_udc_data imx31_fsl_usb2_udc_data; #define imx31_add_fsl_usb2_udc(pdata) \ diff --git a/arch/arm/mach-imx/devices-imx35.h b/arch/arm/mach-imx/devices-imx35.h index c3e9f206ac2b..e2675f1b141c 100644 --- a/arch/arm/mach-imx/devices-imx35.h +++ b/arch/arm/mach-imx/devices-imx35.h @@ -6,8 +6,7 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include <mach/mx35.h> -#include <mach/devices-common.h> +#include "devices/devices-common.h" extern const struct imx_fec_data imx35_fec_data; #define imx35_add_fec(pdata) \ diff --git a/arch/arm/mach-imx/devices-imx50.h b/arch/arm/mach-imx/devices-imx50.h index 7216667eaafc..2c290391f298 100644 --- a/arch/arm/mach-imx/devices-imx50.h +++ b/arch/arm/mach-imx/devices-imx50.h @@ -18,8 +18,7 @@ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. */ -#include <mach/mx50.h> -#include <mach/devices-common.h> +#include "devices/devices-common.h" extern const struct imx_imx_uart_1irq_data imx50_imx_uart_data[]; #define imx50_add_imx_uart(id, pdata) \ diff --git a/arch/arm/mach-imx/devices-imx51.h b/arch/arm/mach-imx/devices-imx51.h index 9f1718725195..deee5baee88c 100644 --- a/arch/arm/mach-imx/devices-imx51.h +++ b/arch/arm/mach-imx/devices-imx51.h @@ -6,8 +6,7 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include <mach/mx51.h> -#include <mach/devices-common.h> +#include "devices/devices-common.h" extern const struct imx_fec_data imx51_fec_data; #define imx51_add_fec(pdata) \ diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/mach-imx/devices/Kconfig index a35d9841f494..a35d9841f494 100644 --- a/arch/arm/plat-mxc/devices/Kconfig +++ b/arch/arm/mach-imx/devices/Kconfig diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/mach-imx/devices/Makefile index 76f3195475d0..2abe2a5144d0 100644 --- a/arch/arm/plat-mxc/devices/Makefile +++ b/arch/arm/mach-imx/devices/Makefile @@ -1,3 +1,5 @@ +obj-y := devices.o + obj-$(CONFIG_IMX_HAVE_PLATFORM_FEC) += platform-fec.o obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o obj-$(CONFIG_IMX_HAVE_PLATFORM_FSL_USB2_UDC) += platform-fsl-usb2-udc.o diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/mach-imx/devices/devices-common.h index eaf79d220c9a..e4b790b9e2aa 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/mach-imx/devices/devices-common.h @@ -108,6 +108,7 @@ struct platform_device *__init imx_add_imxdi_rtc( #include <linux/platform_data/video-imxfb.h> struct imx_imx_fb_data { + const char *devid; resource_size_t iobase; resource_size_t iosize; resource_size_t irq; @@ -118,6 +119,7 @@ struct platform_device *__init imx_add_imx_fb( #include <linux/platform_data/i2c-imx.h> struct imx_imx_i2c_data { + const char *devid; int id; resource_size_t iobase; resource_size_t iosize; @@ -219,6 +221,7 @@ struct platform_device *__init imx_add_mx1_camera( #include <linux/platform_data/camera-mx2.h> struct imx_mx2_camera_data { + const char *devid; resource_size_t iobasecsi; resource_size_t iosizecsi; resource_size_t irqcsi; @@ -244,6 +247,7 @@ struct platform_device *__init imx_add_mxc_ehci( #include <linux/platform_data/mmc-mxcmmc.h> struct imx_mxc_mmc_data { + const char *devid; int id; resource_size_t iobase; resource_size_t iosize; @@ -256,6 +260,7 @@ struct platform_device *__init imx_add_mxc_mmc( #include <linux/platform_data/mtd-mxc_nand.h> struct imx_mxc_nand_data { + const char *devid; /* * id is traditionally 0, but -1 is more appropriate. We use -1 for new * machines but don't change existing devices as the nand device usually @@ -290,6 +295,7 @@ struct platform_device *__init imx_add_mxc_pwm( /* mxc_rtc */ struct imx_mxc_rtc_data { + const char *devid; resource_size_t iobase; resource_size_t irq; }; @@ -326,7 +332,8 @@ struct platform_device *__init imx_add_spi_imx( const struct imx_spi_imx_data *data, const struct spi_imx_master *pdata); -struct platform_device *imx_add_imx_dma(void); +struct platform_device *imx_add_imx_dma(char *name, resource_size_t iobase, + int irq, int irq_err); struct platform_device *imx_add_imx_sdma(char *name, resource_size_t iobase, int irq, struct sdma_platform_data *pdata); diff --git a/arch/arm/plat-mxc/devices.c b/arch/arm/mach-imx/devices/devices.c index 4d55a7a26e98..1b37482407f9 100644 --- a/arch/arm/plat-mxc/devices.c +++ b/arch/arm/mach-imx/devices/devices.c @@ -21,7 +21,6 @@ #include <linux/init.h> #include <linux/err.h> #include <linux/platform_device.h> -#include <mach/common.h> struct device mxc_aips_bus = { .init_name = "mxc_aips", @@ -33,7 +32,7 @@ struct device mxc_ahb_bus = { .parent = &platform_bus, }; -static int __init mxc_device_init(void) +int __init mxc_device_init(void) { int ret; @@ -46,4 +45,3 @@ static int __init mxc_device_init(void) done: return ret; } -core_initcall(mxc_device_init); diff --git a/arch/arm/plat-mxc/devices/platform-ahci-imx.c b/arch/arm/mach-imx/devices/platform-ahci-imx.c index ade4a1c4e2a3..3d87dd9c284a 100644 --- a/arch/arm/plat-mxc/devices/platform-ahci-imx.c +++ b/arch/arm/mach-imx/devices/platform-ahci-imx.c @@ -24,8 +24,9 @@ #include <linux/device.h> #include <linux/dma-mapping.h> #include <asm/sizes.h> -#include <mach/hardware.h> -#include <mach/devices-common.h> + +#include "../hardware.h" +#include "devices-common.h" #define imx_ahci_imx_data_entry_single(soc, _devid) \ { \ diff --git a/arch/arm/plat-mxc/devices/platform-fec.c b/arch/arm/mach-imx/devices/platform-fec.c index 0bae44e890db..2cb188ad9a0a 100644 --- a/arch/arm/plat-mxc/devices/platform-fec.c +++ b/arch/arm/mach-imx/devices/platform-fec.c @@ -8,8 +8,9 @@ */ #include <linux/dma-mapping.h> #include <asm/sizes.h> -#include <mach/hardware.h> -#include <mach/devices-common.h> + +#include "../hardware.h" +#include "devices-common.h" #define imx_fec_data_entry_single(soc, _devid) \ { \ diff --git a/arch/arm/plat-mxc/devices/platform-flexcan.c b/arch/arm/mach-imx/devices/platform-flexcan.c index 4e8497af2eb1..1078bf0a94ef 100644 --- a/arch/arm/plat-mxc/devices/platform-flexcan.c +++ b/arch/arm/mach-imx/devices/platform-flexcan.c @@ -5,8 +5,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include <mach/hardware.h> -#include <mach/devices-common.h> +#include "../hardware.h" +#include "devices-common.h" #define imx_flexcan_data_entry_single(soc, _id, _hwid, _size) \ { \ diff --git a/arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c b/arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c index 848038f301fd..37e44398197b 100644 --- a/arch/arm/plat-mxc/devices/platform-fsl-usb2-udc.c +++ b/arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c @@ -7,8 +7,9 @@ * Free Software Foundation. */ #include <linux/dma-mapping.h> -#include <mach/hardware.h> -#include <mach/devices-common.h> + +#include "../hardware.h" +#include "devices-common.h" #define imx_fsl_usb2_udc_data_entry_single(soc) \ { \ diff --git a/arch/arm/plat-mxc/devices/platform-gpio-mxc.c b/arch/arm/mach-imx/devices/platform-gpio-mxc.c index a7919a241032..26483fa94b75 100644 --- a/arch/arm/plat-mxc/devices/platform-gpio-mxc.c +++ b/arch/arm/mach-imx/devices/platform-gpio-mxc.c @@ -6,7 +6,7 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include <mach/devices-common.h> +#include "devices-common.h" struct platform_device *__init mxc_register_gpio(char *name, int id, resource_size_t iobase, resource_size_t iosize, int irq, int irq_high) diff --git a/arch/arm/plat-mxc/devices/platform-gpio_keys.c b/arch/arm/mach-imx/devices/platform-gpio_keys.c index 1c53a532ea0e..486282539c76 100644 --- a/arch/arm/plat-mxc/devices/platform-gpio_keys.c +++ b/arch/arm/mach-imx/devices/platform-gpio_keys.c @@ -16,8 +16,9 @@ * Boston, MA 02110-1301, USA. */ #include <asm/sizes.h> -#include <mach/hardware.h> -#include <mach/devices-common.h> + +#include "../hardware.h" +#include "devices-common.h" struct platform_device *__init imx_add_gpio_keys( const struct gpio_keys_platform_data *pdata) diff --git a/arch/arm/plat-mxc/devices/platform-imx-dma.c b/arch/arm/mach-imx/devices/platform-imx-dma.c index 7fa7e9c92468..ccdb5dc4ddbd 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-dma.c +++ b/arch/arm/mach-imx/devices/platform-imx-dma.c @@ -6,12 +6,29 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include <mach/devices-common.h> +#include "devices-common.h" -struct platform_device __init __maybe_unused *imx_add_imx_dma(void) +struct platform_device __init __maybe_unused *imx_add_imx_dma(char *name, + resource_size_t iobase, int irq, int irq_err) { + struct resource res[] = { + { + .start = iobase, + .end = iobase + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, { + .start = irq, + .end = irq, + .flags = IORESOURCE_IRQ, + }, { + .start = irq_err, + .end = irq_err, + .flags = IORESOURCE_IRQ, + }, + }; + return platform_device_register_resndata(&mxc_ahb_bus, - "imx-dma", -1, NULL, 0, NULL, 0); + name, -1, res, ARRAY_SIZE(res), NULL, 0); } struct platform_device __init __maybe_unused *imx_add_imx_sdma(char *name, diff --git a/arch/arm/plat-mxc/devices/platform-imx-fb.c b/arch/arm/mach-imx/devices/platform-imx-fb.c index 2b0b5e0aa998..10b0ed39f07f 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-fb.c +++ b/arch/arm/mach-imx/devices/platform-imx-fb.c @@ -7,11 +7,13 @@ * Free Software Foundation. */ #include <linux/dma-mapping.h> -#include <mach/hardware.h> -#include <mach/devices-common.h> -#define imx_imx_fb_data_entry_single(soc, _size) \ +#include "../hardware.h" +#include "devices-common.h" + +#define imx_imx_fb_data_entry_single(soc, _devid, _size) \ { \ + .devid = _devid, \ .iobase = soc ## _LCDC_BASE_ADDR, \ .iosize = _size, \ .irq = soc ## _INT_LCDC, \ @@ -19,22 +21,22 @@ #ifdef CONFIG_SOC_IMX1 const struct imx_imx_fb_data imx1_imx_fb_data __initconst = - imx_imx_fb_data_entry_single(MX1, SZ_4K); + imx_imx_fb_data_entry_single(MX1, "imx1-fb", SZ_4K); #endif /* ifdef CONFIG_SOC_IMX1 */ #ifdef CONFIG_SOC_IMX21 const struct imx_imx_fb_data imx21_imx_fb_data __initconst = - imx_imx_fb_data_entry_single(MX21, SZ_4K); + imx_imx_fb_data_entry_single(MX21, "imx21-fb", SZ_4K); #endif /* ifdef CONFIG_SOC_IMX21 */ #ifdef CONFIG_SOC_IMX25 const struct imx_imx_fb_data imx25_imx_fb_data __initconst = - imx_imx_fb_data_entry_single(MX25, SZ_16K); + imx_imx_fb_data_entry_single(MX25, "imx21-fb", SZ_16K); #endif /* ifdef CONFIG_SOC_IMX25 */ #ifdef CONFIG_SOC_IMX27 const struct imx_imx_fb_data imx27_imx_fb_data __initconst = - imx_imx_fb_data_entry_single(MX27, SZ_4K); + imx_imx_fb_data_entry_single(MX27, "imx21-fb", SZ_4K); #endif /* ifdef CONFIG_SOC_IMX27 */ struct platform_device *__init imx_add_imx_fb( diff --git a/arch/arm/plat-mxc/devices/platform-imx-i2c.c b/arch/arm/mach-imx/devices/platform-imx-i2c.c index 19ad580c0be3..8e30e5703cd2 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-i2c.c +++ b/arch/arm/mach-imx/devices/platform-imx-i2c.c @@ -6,34 +6,35 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include <mach/hardware.h> -#include <mach/devices-common.h> +#include "../hardware.h" +#include "devices-common.h" -#define imx_imx_i2c_data_entry_single(soc, _id, _hwid, _size) \ +#define imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size) \ { \ + .devid = _devid, \ .id = _id, \ .iobase = soc ## _I2C ## _hwid ## _BASE_ADDR, \ .iosize = _size, \ .irq = soc ## _INT_I2C ## _hwid, \ } -#define imx_imx_i2c_data_entry(soc, _id, _hwid, _size) \ - [_id] = imx_imx_i2c_data_entry_single(soc, _id, _hwid, _size) +#define imx_imx_i2c_data_entry(soc, _devid, _id, _hwid, _size) \ + [_id] = imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size) #ifdef CONFIG_SOC_IMX1 const struct imx_imx_i2c_data imx1_imx_i2c_data __initconst = - imx_imx_i2c_data_entry_single(MX1, 0, , SZ_4K); + imx_imx_i2c_data_entry_single(MX1, "imx1-i2c", 0, , SZ_4K); #endif /* ifdef CONFIG_SOC_IMX1 */ #ifdef CONFIG_SOC_IMX21 const struct imx_imx_i2c_data imx21_imx_i2c_data __initconst = - imx_imx_i2c_data_entry_single(MX21, 0, , SZ_4K); + imx_imx_i2c_data_entry_single(MX21, "imx21-i2c", 0, , SZ_4K); #endif /* ifdef CONFIG_SOC_IMX21 */ #ifdef CONFIG_SOC_IMX25 const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst = { #define imx25_imx_i2c_data_entry(_id, _hwid) \ - imx_imx_i2c_data_entry(MX25, _id, _hwid, SZ_16K) + imx_imx_i2c_data_entry(MX25, "imx21-i2c", _id, _hwid, SZ_16K) imx25_imx_i2c_data_entry(0, 1), imx25_imx_i2c_data_entry(1, 2), imx25_imx_i2c_data_entry(2, 3), @@ -43,7 +44,7 @@ const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst = { #ifdef CONFIG_SOC_IMX27 const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst = { #define imx27_imx_i2c_data_entry(_id, _hwid) \ - imx_imx_i2c_data_entry(MX27, _id, _hwid, SZ_4K) + imx_imx_i2c_data_entry(MX27, "imx21-i2c", _id, _hwid, SZ_4K) imx27_imx_i2c_data_entry(0, 1), imx27_imx_i2c_data_entry(1, 2), }; @@ -52,7 +53,7 @@ const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst = { #ifdef CONFIG_SOC_IMX31 const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst = { #define imx31_imx_i2c_data_entry(_id, _hwid) \ - imx_imx_i2c_data_entry(MX31, _id, _hwid, SZ_4K) + imx_imx_i2c_data_entry(MX31, "imx21-i2c", _id, _hwid, SZ_4K) imx31_imx_i2c_data_entry(0, 1), imx31_imx_i2c_data_entry(1, 2), imx31_imx_i2c_data_entry(2, 3), @@ -62,7 +63,7 @@ const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst = { #ifdef CONFIG_SOC_IMX35 const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst = { #define imx35_imx_i2c_data_entry(_id, _hwid) \ - imx_imx_i2c_data_entry(MX35, _id, _hwid, SZ_4K) + imx_imx_i2c_data_entry(MX35, "imx21-i2c", _id, _hwid, SZ_4K) imx35_imx_i2c_data_entry(0, 1), imx35_imx_i2c_data_entry(1, 2), imx35_imx_i2c_data_entry(2, 3), @@ -72,7 +73,7 @@ const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst = { #ifdef CONFIG_SOC_IMX50 const struct imx_imx_i2c_data imx50_imx_i2c_data[] __initconst = { #define imx50_imx_i2c_data_entry(_id, _hwid) \ - imx_imx_i2c_data_entry(MX50, _id, _hwid, SZ_4K) + imx_imx_i2c_data_entry(MX50, "imx21-i2c", _id, _hwid, SZ_4K) imx50_imx_i2c_data_entry(0, 1), imx50_imx_i2c_data_entry(1, 2), imx50_imx_i2c_data_entry(2, 3), @@ -82,10 +83,11 @@ const struct imx_imx_i2c_data imx50_imx_i2c_data[] __initconst = { #ifdef CONFIG_SOC_IMX51 const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst = { #define imx51_imx_i2c_data_entry(_id, _hwid) \ - imx_imx_i2c_data_entry(MX51, _id, _hwid, SZ_4K) + imx_imx_i2c_data_entry(MX51, "imx21-i2c", _id, _hwid, SZ_4K) imx51_imx_i2c_data_entry(0, 1), imx51_imx_i2c_data_entry(1, 2), { + .devid = "imx21-i2c", .id = 2, .iobase = MX51_HSI2C_DMA_BASE_ADDR, .iosize = SZ_16K, @@ -97,7 +99,7 @@ const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst = { #ifdef CONFIG_SOC_IMX53 const struct imx_imx_i2c_data imx53_imx_i2c_data[] __initconst = { #define imx53_imx_i2c_data_entry(_id, _hwid) \ - imx_imx_i2c_data_entry(MX53, _id, _hwid, SZ_4K) + imx_imx_i2c_data_entry(MX53, "imx21-i2c", _id, _hwid, SZ_4K) imx53_imx_i2c_data_entry(0, 1), imx53_imx_i2c_data_entry(1, 2), imx53_imx_i2c_data_entry(2, 3), @@ -120,7 +122,7 @@ struct platform_device *__init imx_add_imx_i2c( }, }; - return imx_add_platform_device("imx-i2c", data->id, + return imx_add_platform_device(data->devid, data->id, res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); } diff --git a/arch/arm/plat-mxc/devices/platform-imx-keypad.c b/arch/arm/mach-imx/devices/platform-imx-keypad.c index 479c3e9f771f..8f22a4c98a4c 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-keypad.c +++ b/arch/arm/mach-imx/devices/platform-imx-keypad.c @@ -6,8 +6,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include <mach/hardware.h> -#include <mach/devices-common.h> +#include "../hardware.h" +#include "devices-common.h" #define imx_imx_keypad_data_entry_single(soc, _size) \ { \ diff --git a/arch/arm/plat-mxc/devices/platform-imx-ssi.c b/arch/arm/mach-imx/devices/platform-imx-ssi.c index 21c6f30e1017..bfcb8f3dfa8d 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-ssi.c +++ b/arch/arm/mach-imx/devices/platform-imx-ssi.c @@ -6,8 +6,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include <mach/hardware.h> -#include <mach/devices-common.h> +#include "../hardware.h" +#include "devices-common.h" #define imx_imx_ssi_data_entry(soc, _id, _hwid, _size) \ [_id] = { \ diff --git a/arch/arm/plat-mxc/devices/platform-imx-uart.c b/arch/arm/mach-imx/devices/platform-imx-uart.c index d390f00bd294..67bf866a2cb6 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-uart.c +++ b/arch/arm/mach-imx/devices/platform-imx-uart.c @@ -6,8 +6,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include <mach/hardware.h> -#include <mach/devices-common.h> +#include "../hardware.h" +#include "devices-common.h" #define imx_imx_uart_3irq_data_entry(soc, _id, _hwid, _size) \ [_id] = { \ diff --git a/arch/arm/plat-mxc/devices/platform-imx2-wdt.c b/arch/arm/mach-imx/devices/platform-imx2-wdt.c index 5e07ef2bf1c4..ec75d6413686 100644 --- a/arch/arm/plat-mxc/devices/platform-imx2-wdt.c +++ b/arch/arm/mach-imx/devices/platform-imx2-wdt.c @@ -7,8 +7,9 @@ * Free Software Foundation. */ #include <asm/sizes.h> -#include <mach/hardware.h> -#include <mach/devices-common.h> + +#include "../hardware.h" +#include "devices-common.h" #define imx_imx2_wdt_data_entry_single(soc, _id, _hwid, _size) \ { \ diff --git a/arch/arm/plat-mxc/devices/platform-imx21-hcd.c b/arch/arm/mach-imx/devices/platform-imx21-hcd.c index 5770a42f33bf..30c81616a9a1 100644 --- a/arch/arm/plat-mxc/devices/platform-imx21-hcd.c +++ b/arch/arm/mach-imx/devices/platform-imx21-hcd.c @@ -6,8 +6,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include <mach/hardware.h> -#include <mach/devices-common.h> +#include "../hardware.h" +#include "devices-common.h" #define imx_imx21_hcd_data_entry_single(soc) \ { \ diff --git a/arch/arm/plat-mxc/devices/platform-imx27-coda.c b/arch/arm/mach-imx/devices/platform-imx27-coda.c index 8b12aacdf396..25bebc29e546 100644 --- a/arch/arm/plat-mxc/devices/platform-imx27-coda.c +++ b/arch/arm/mach-imx/devices/platform-imx27-coda.c @@ -7,8 +7,8 @@ * Free Software Foundation. */ -#include <mach/hardware.h> -#include <mach/devices-common.h> +#include "../hardware.h" +#include "devices-common.h" #ifdef CONFIG_SOC_IMX27 const struct imx_imx27_coda_data imx27_coda_data __initconst = { diff --git a/arch/arm/plat-mxc/devices/platform-imx_udc.c b/arch/arm/mach-imx/devices/platform-imx_udc.c index 6fd675dfce14..5ced7e4e2c71 100644 --- a/arch/arm/plat-mxc/devices/platform-imx_udc.c +++ b/arch/arm/mach-imx/devices/platform-imx_udc.c @@ -6,8 +6,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include <mach/hardware.h> -#include <mach/devices-common.h> +#include "../hardware.h" +#include "devices-common.h" #define imx_imx_udc_data_entry_single(soc, _size) \ { \ diff --git a/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c b/arch/arm/mach-imx/devices/platform-imxdi_rtc.c index 805336fdc252..5bb490d556ea 100644 --- a/arch/arm/plat-mxc/devices/platform-imxdi_rtc.c +++ b/arch/arm/mach-imx/devices/platform-imxdi_rtc.c @@ -7,8 +7,9 @@ * Free Software Foundation. */ #include <asm/sizes.h> -#include <mach/hardware.h> -#include <mach/devices-common.h> + +#include "../hardware.h" +#include "devices-common.h" #define imx_imxdi_rtc_data_entry_single(soc) \ { \ diff --git a/arch/arm/plat-mxc/devices/platform-ipu-core.c b/arch/arm/mach-imx/devices/platform-ipu-core.c index d1e33cc6f12e..fc4dd7cedc11 100644 --- a/arch/arm/plat-mxc/devices/platform-ipu-core.c +++ b/arch/arm/mach-imx/devices/platform-ipu-core.c @@ -7,8 +7,9 @@ * Free Software Foundation. */ #include <linux/dma-mapping.h> -#include <mach/hardware.h> -#include <mach/devices-common.h> + +#include "../hardware.h" +#include "devices-common.h" #define imx_ipu_core_entry_single(soc) \ { \ diff --git a/arch/arm/plat-mxc/devices/platform-mx1-camera.c b/arch/arm/mach-imx/devices/platform-mx1-camera.c index edcc581a30a9..2c6788131080 100644 --- a/arch/arm/plat-mxc/devices/platform-mx1-camera.c +++ b/arch/arm/mach-imx/devices/platform-mx1-camera.c @@ -6,8 +6,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include <mach/hardware.h> -#include <mach/devices-common.h> +#include "../hardware.h" +#include "devices-common.h" #define imx_mx1_camera_data_entry_single(soc, _size) \ { \ diff --git a/arch/arm/plat-mxc/devices/platform-mx2-camera.c b/arch/arm/mach-imx/devices/platform-mx2-camera.c index 11eace953a09..f4910160346b 100644 --- a/arch/arm/plat-mxc/devices/platform-mx2-camera.c +++ b/arch/arm/mach-imx/devices/platform-mx2-camera.c @@ -6,17 +6,19 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include <mach/hardware.h> -#include <mach/devices-common.h> +#include "../hardware.h" +#include "devices-common.h" -#define imx_mx2_camera_data_entry_single(soc) \ +#define imx_mx2_camera_data_entry_single(soc, _devid) \ { \ + .devid = _devid, \ .iobasecsi = soc ## _CSI_BASE_ADDR, \ .iosizecsi = SZ_4K, \ .irqcsi = soc ## _INT_CSI, \ } -#define imx_mx2_camera_data_entry_single_emma(soc) \ +#define imx_mx2_camera_data_entry_single_emma(soc, _devid) \ { \ + .devid = _devid, \ .iobasecsi = soc ## _CSI_BASE_ADDR, \ .iosizecsi = SZ_32, \ .irqcsi = soc ## _INT_CSI, \ @@ -27,12 +29,12 @@ #ifdef CONFIG_SOC_IMX25 const struct imx_mx2_camera_data imx25_mx2_camera_data __initconst = - imx_mx2_camera_data_entry_single(MX25); + imx_mx2_camera_data_entry_single(MX25, "imx25-camera"); #endif /* ifdef CONFIG_SOC_IMX25 */ #ifdef CONFIG_SOC_IMX27 const struct imx_mx2_camera_data imx27_mx2_camera_data __initconst = - imx_mx2_camera_data_entry_single_emma(MX27); + imx_mx2_camera_data_entry_single_emma(MX27, "imx27-camera"); #endif /* ifdef CONFIG_SOC_IMX27 */ struct platform_device *__init imx_add_mx2_camera( @@ -58,7 +60,7 @@ struct platform_device *__init imx_add_mx2_camera( .flags = IORESOURCE_IRQ, }, }; - return imx_add_platform_device_dmamask("mx2-camera", 0, + return imx_add_platform_device_dmamask(data->devid, 0, res, data->iobaseemmaprp ? 4 : 2, pdata, sizeof(*pdata), DMA_BIT_MASK(32)); } diff --git a/arch/arm/plat-mxc/devices/platform-mxc-ehci.c b/arch/arm/mach-imx/devices/platform-mxc-ehci.c index 35851d889aca..5d4bbbfde641 100644 --- a/arch/arm/plat-mxc/devices/platform-mxc-ehci.c +++ b/arch/arm/mach-imx/devices/platform-mxc-ehci.c @@ -7,8 +7,9 @@ * Free Software Foundation. */ #include <linux/dma-mapping.h> -#include <mach/hardware.h> -#include <mach/devices-common.h> + +#include "../hardware.h" +#include "devices-common.h" #define imx_mxc_ehci_data_entry_single(soc, _id, hs) \ { \ diff --git a/arch/arm/plat-mxc/devices/platform-mxc-mmc.c b/arch/arm/mach-imx/devices/platform-mxc-mmc.c index e7b920b58675..b8203c760c8f 100644 --- a/arch/arm/plat-mxc/devices/platform-mxc-mmc.c +++ b/arch/arm/mach-imx/devices/platform-mxc-mmc.c @@ -7,24 +7,26 @@ * Free Software Foundation. */ #include <linux/dma-mapping.h> -#include <mach/hardware.h> -#include <mach/devices-common.h> -#define imx_mxc_mmc_data_entry_single(soc, _id, _hwid, _size) \ +#include "../hardware.h" +#include "devices-common.h" + +#define imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size) \ { \ + .devid = _devid, \ .id = _id, \ .iobase = soc ## _SDHC ## _hwid ## _BASE_ADDR, \ .iosize = _size, \ .irq = soc ## _INT_SDHC ## _hwid, \ .dmareq = soc ## _DMA_REQ_SDHC ## _hwid, \ } -#define imx_mxc_mmc_data_entry(soc, _id, _hwid, _size) \ - [_id] = imx_mxc_mmc_data_entry_single(soc, _id, _hwid, _size) +#define imx_mxc_mmc_data_entry(soc, _devid, _id, _hwid, _size) \ + [_id] = imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size) #ifdef CONFIG_SOC_IMX21 const struct imx_mxc_mmc_data imx21_mxc_mmc_data[] __initconst = { #define imx21_mxc_mmc_data_entry(_id, _hwid) \ - imx_mxc_mmc_data_entry(MX21, _id, _hwid, SZ_4K) + imx_mxc_mmc_data_entry(MX21, "imx21-mmc", _id, _hwid, SZ_4K) imx21_mxc_mmc_data_entry(0, 1), imx21_mxc_mmc_data_entry(1, 2), }; @@ -33,7 +35,7 @@ const struct imx_mxc_mmc_data imx21_mxc_mmc_data[] __initconst = { #ifdef CONFIG_SOC_IMX27 const struct imx_mxc_mmc_data imx27_mxc_mmc_data[] __initconst = { #define imx27_mxc_mmc_data_entry(_id, _hwid) \ - imx_mxc_mmc_data_entry(MX27, _id, _hwid, SZ_4K) + imx_mxc_mmc_data_entry(MX27, "imx21-mmc", _id, _hwid, SZ_4K) imx27_mxc_mmc_data_entry(0, 1), imx27_mxc_mmc_data_entry(1, 2), }; @@ -42,7 +44,7 @@ const struct imx_mxc_mmc_data imx27_mxc_mmc_data[] __initconst = { #ifdef CONFIG_SOC_IMX31 const struct imx_mxc_mmc_data imx31_mxc_mmc_data[] __initconst = { #define imx31_mxc_mmc_data_entry(_id, _hwid) \ - imx_mxc_mmc_data_entry(MX31, _id, _hwid, SZ_16K) + imx_mxc_mmc_data_entry(MX31, "imx31-mmc", _id, _hwid, SZ_16K) imx31_mxc_mmc_data_entry(0, 1), imx31_mxc_mmc_data_entry(1, 2), }; @@ -67,7 +69,7 @@ struct platform_device *__init imx_add_mxc_mmc( .flags = IORESOURCE_DMA, }, }; - return imx_add_platform_device_dmamask("mxc-mmc", data->id, + return imx_add_platform_device_dmamask(data->devid, data->id, res, ARRAY_SIZE(res), pdata, sizeof(*pdata), DMA_BIT_MASK(32)); } diff --git a/arch/arm/plat-mxc/devices/platform-mxc_nand.c b/arch/arm/mach-imx/devices/platform-mxc_nand.c index 95b75cc70515..7af1c53e42b5 100644 --- a/arch/arm/plat-mxc/devices/platform-mxc_nand.c +++ b/arch/arm/mach-imx/devices/platform-mxc_nand.c @@ -7,18 +7,21 @@ * Free Software Foundation. */ #include <asm/sizes.h> -#include <mach/hardware.h> -#include <mach/devices-common.h> -#define imx_mxc_nand_data_entry_single(soc, _size) \ +#include "../hardware.h" +#include "devices-common.h" + +#define imx_mxc_nand_data_entry_single(soc, _devid, _size) \ { \ + .devid = _devid, \ .iobase = soc ## _NFC_BASE_ADDR, \ .iosize = _size, \ .irq = soc ## _INT_NFC \ } -#define imx_mxc_nandv3_data_entry_single(soc, _size) \ +#define imx_mxc_nandv3_data_entry_single(soc, _devid, _size) \ { \ + .devid = _devid, \ .id = -1, \ .iobase = soc ## _NFC_BASE_ADDR, \ .iosize = _size, \ @@ -28,32 +31,32 @@ #ifdef CONFIG_SOC_IMX21 const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst = - imx_mxc_nand_data_entry_single(MX21, SZ_4K); + imx_mxc_nand_data_entry_single(MX21, "imx21-nand", SZ_4K); #endif /* ifdef CONFIG_SOC_IMX21 */ #ifdef CONFIG_SOC_IMX25 const struct imx_mxc_nand_data imx25_mxc_nand_data __initconst = - imx_mxc_nand_data_entry_single(MX25, SZ_8K); + imx_mxc_nand_data_entry_single(MX25, "imx25-nand", SZ_8K); #endif /* ifdef CONFIG_SOC_IMX25 */ #ifdef CONFIG_SOC_IMX27 const struct imx_mxc_nand_data imx27_mxc_nand_data __initconst = - imx_mxc_nand_data_entry_single(MX27, SZ_4K); + imx_mxc_nand_data_entry_single(MX27, "imx27-nand", SZ_4K); #endif /* ifdef CONFIG_SOC_IMX27 */ #ifdef CONFIG_SOC_IMX31 const struct imx_mxc_nand_data imx31_mxc_nand_data __initconst = - imx_mxc_nand_data_entry_single(MX31, SZ_4K); + imx_mxc_nand_data_entry_single(MX31, "imx27-nand", SZ_4K); #endif #ifdef CONFIG_SOC_IMX35 const struct imx_mxc_nand_data imx35_mxc_nand_data __initconst = - imx_mxc_nand_data_entry_single(MX35, SZ_8K); + imx_mxc_nand_data_entry_single(MX35, "imx25-nand", SZ_8K); #endif #ifdef CONFIG_SOC_IMX51 const struct imx_mxc_nand_data imx51_mxc_nand_data __initconst = - imx_mxc_nandv3_data_entry_single(MX51, SZ_16K); + imx_mxc_nandv3_data_entry_single(MX51, "imx51-nand", SZ_16K); #endif struct platform_device *__init imx_add_mxc_nand( @@ -76,7 +79,7 @@ struct platform_device *__init imx_add_mxc_nand( .flags = IORESOURCE_MEM, }, }; - return imx_add_platform_device("mxc_nand", data->id, + return imx_add_platform_device(data->devid, data->id, res, ARRAY_SIZE(res) - !data->axibase, pdata, sizeof(*pdata)); } diff --git a/arch/arm/plat-mxc/devices/platform-mxc_pwm.c b/arch/arm/mach-imx/devices/platform-mxc_pwm.c index b0c4ae298111..dcd289777687 100644 --- a/arch/arm/plat-mxc/devices/platform-mxc_pwm.c +++ b/arch/arm/mach-imx/devices/platform-mxc_pwm.c @@ -6,8 +6,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include <mach/hardware.h> -#include <mach/devices-common.h> +#include "../hardware.h" +#include "devices-common.h" #define imx_mxc_pwm_data_entry_single(soc, _id, _hwid, _size) \ { \ diff --git a/arch/arm/plat-mxc/devices/platform-mxc_rnga.c b/arch/arm/mach-imx/devices/platform-mxc_rnga.c index b4b7612b6e17..c58404badb59 100644 --- a/arch/arm/plat-mxc/devices/platform-mxc_rnga.c +++ b/arch/arm/mach-imx/devices/platform-mxc_rnga.c @@ -6,8 +6,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include <mach/hardware.h> -#include <mach/devices-common.h> +#include "../hardware.h" +#include "devices-common.h" struct imx_mxc_rnga_data { resource_size_t iobase; diff --git a/arch/arm/plat-mxc/devices/platform-mxc_rtc.c b/arch/arm/mach-imx/devices/platform-mxc_rtc.c index a5c9ad5721c2..c7fffaadf847 100644 --- a/arch/arm/plat-mxc/devices/platform-mxc_rtc.c +++ b/arch/arm/mach-imx/devices/platform-mxc_rtc.c @@ -6,23 +6,24 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include <mach/hardware.h> -#include <mach/devices-common.h> +#include "../hardware.h" +#include "devices-common.h" -#define imx_mxc_rtc_data_entry_single(soc) \ +#define imx_mxc_rtc_data_entry_single(soc, _devid) \ { \ + .devid = _devid, \ .iobase = soc ## _RTC_BASE_ADDR, \ .irq = soc ## _INT_RTC, \ } #ifdef CONFIG_SOC_IMX31 const struct imx_mxc_rtc_data imx31_mxc_rtc_data __initconst = - imx_mxc_rtc_data_entry_single(MX31); + imx_mxc_rtc_data_entry_single(MX31, "imx21-rtc"); #endif /* ifdef CONFIG_SOC_IMX31 */ #ifdef CONFIG_SOC_IMX35 const struct imx_mxc_rtc_data imx35_mxc_rtc_data __initconst = - imx_mxc_rtc_data_entry_single(MX35); + imx_mxc_rtc_data_entry_single(MX35, "imx21-rtc"); #endif /* ifdef CONFIG_SOC_IMX35 */ struct platform_device *__init imx_add_mxc_rtc( @@ -40,6 +41,6 @@ struct platform_device *__init imx_add_mxc_rtc( }, }; - return imx_add_platform_device("mxc_rtc", -1, + return imx_add_platform_device(data->devid, -1, res, ARRAY_SIZE(res), NULL, 0); } diff --git a/arch/arm/plat-mxc/devices/platform-mxc_w1.c b/arch/arm/mach-imx/devices/platform-mxc_w1.c index 96fa5ea91fe8..88c18b720d63 100644 --- a/arch/arm/plat-mxc/devices/platform-mxc_w1.c +++ b/arch/arm/mach-imx/devices/platform-mxc_w1.c @@ -6,8 +6,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include <mach/hardware.h> -#include <mach/devices-common.h> +#include "../hardware.h" +#include "devices-common.h" #define imx_mxc_w1_data_entry_single(soc) \ { \ diff --git a/arch/arm/plat-mxc/devices/platform-pata_imx.c b/arch/arm/mach-imx/devices/platform-pata_imx.c index 70e2f2a44714..e4ec11c8ce55 100644 --- a/arch/arm/plat-mxc/devices/platform-pata_imx.c +++ b/arch/arm/mach-imx/devices/platform-pata_imx.c @@ -3,8 +3,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include <mach/hardware.h> -#include <mach/devices-common.h> +#include "../hardware.h" +#include "devices-common.h" #define imx_pata_imx_data_entry_single(soc, _size) \ { \ diff --git a/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c b/arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c index 3793e475cd95..e66a4e316311 100644 --- a/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c +++ b/arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c @@ -6,10 +6,11 @@ * Free Software Foundation. */ -#include <mach/hardware.h> -#include <mach/devices-common.h> #include <linux/platform_data/mmc-esdhc-imx.h> +#include "../hardware.h" +#include "devices-common.h" + #define imx_sdhci_esdhc_imx_data_entry_single(soc, _devid, _id, hwid) \ { \ .devid = _devid, \ diff --git a/arch/arm/plat-mxc/devices/platform-spi_imx.c b/arch/arm/mach-imx/devices/platform-spi_imx.c index 9c50c14c8f92..8880bcb11e05 100644 --- a/arch/arm/plat-mxc/devices/platform-spi_imx.c +++ b/arch/arm/mach-imx/devices/platform-spi_imx.c @@ -6,8 +6,8 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include <mach/hardware.h> -#include <mach/devices-common.h> +#include "../hardware.h" +#include "devices-common.h" #define imx_spi_imx_data_entry_single(soc, type, _devid, _id, hwid, _size) \ { \ diff --git a/arch/arm/mach-imx/ehci-imx25.c b/arch/arm/mach-imx/ehci-imx25.c index 412c583a24b0..27e40d17de99 100644 --- a/arch/arm/mach-imx/ehci-imx25.c +++ b/arch/arm/mach-imx/ehci-imx25.c @@ -15,10 +15,10 @@ #include <linux/platform_device.h> #include <linux/io.h> - -#include <mach/hardware.h> #include <linux/platform_data/usb-ehci-mxc.h> +#include "hardware.h" + #define USBCTRL_OTGBASE_OFFSET 0x600 #define MX25_OTG_SIC_SHIFT 29 diff --git a/arch/arm/mach-imx/ehci-imx27.c b/arch/arm/mach-imx/ehci-imx27.c index cd6e1f81508d..448d9115539d 100644 --- a/arch/arm/mach-imx/ehci-imx27.c +++ b/arch/arm/mach-imx/ehci-imx27.c @@ -15,10 +15,10 @@ #include <linux/platform_device.h> #include <linux/io.h> - -#include <mach/hardware.h> #include <linux/platform_data/usb-ehci-mxc.h> +#include "hardware.h" + #define USBCTRL_OTGBASE_OFFSET 0x600 #define MX27_OTG_SIC_SHIFT 29 diff --git a/arch/arm/mach-imx/ehci-imx31.c b/arch/arm/mach-imx/ehci-imx31.c index 9a880c78af34..05de4e1e39d7 100644 --- a/arch/arm/mach-imx/ehci-imx31.c +++ b/arch/arm/mach-imx/ehci-imx31.c @@ -15,10 +15,10 @@ #include <linux/platform_device.h> #include <linux/io.h> - -#include <mach/hardware.h> #include <linux/platform_data/usb-ehci-mxc.h> +#include "hardware.h" + #define USBCTRL_OTGBASE_OFFSET 0x600 #define MX31_OTG_SIC_SHIFT 29 diff --git a/arch/arm/mach-imx/ehci-imx35.c b/arch/arm/mach-imx/ehci-imx35.c index 779e16eb65cb..a596f709a937 100644 --- a/arch/arm/mach-imx/ehci-imx35.c +++ b/arch/arm/mach-imx/ehci-imx35.c @@ -15,10 +15,10 @@ #include <linux/platform_device.h> #include <linux/io.h> - -#include <mach/hardware.h> #include <linux/platform_data/usb-ehci-mxc.h> +#include "hardware.h" + #define USBCTRL_OTGBASE_OFFSET 0x600 #define MX35_OTG_SIC_SHIFT 29 diff --git a/arch/arm/mach-imx/ehci-imx5.c b/arch/arm/mach-imx/ehci-imx5.c index cf8d00e5cce1..e49710b10c68 100644 --- a/arch/arm/mach-imx/ehci-imx5.c +++ b/arch/arm/mach-imx/ehci-imx5.c @@ -15,10 +15,10 @@ #include <linux/platform_device.h> #include <linux/io.h> - -#include <mach/hardware.h> #include <linux/platform_data/usb-ehci-mxc.h> +#include "hardware.h" + #define MXC_OTG_OFFSET 0 #define MXC_H1_OFFSET 0x200 #define MXC_H2_OFFSET 0x400 diff --git a/arch/arm/plat-mxc/epit.c b/arch/arm/mach-imx/epit.c index 88726f4dbbfa..04a5961beeac 100644 --- a/arch/arm/plat-mxc/epit.c +++ b/arch/arm/mach-imx/epit.c @@ -51,10 +51,10 @@ #include <linux/clockchips.h> #include <linux/clk.h> #include <linux/err.h> - -#include <mach/hardware.h> #include <asm/mach/time.h> -#include <mach/common.h> + +#include "common.h" +#include "hardware.h" static struct clock_event_device clockevent_epit; static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED; diff --git a/arch/arm/plat-mxc/include/mach/eukrea-baseboards.h b/arch/arm/mach-imx/eukrea-baseboards.h index a21d3313f994..a21d3313f994 100644 --- a/arch/arm/plat-mxc/include/mach/eukrea-baseboards.h +++ b/arch/arm/mach-imx/eukrea-baseboards.h diff --git a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c index 98aef571b9f8..b4c70028d359 100644 --- a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c @@ -29,11 +29,10 @@ #include <asm/mach/arch.h> -#include <mach/common.h> -#include <mach/iomux-mx27.h> -#include <mach/hardware.h> - +#include "common.h" #include "devices-imx27.h" +#include "hardware.h" +#include "iomux-mx27.h" static const int eukrea_mbimx27_pins[] __initconst = { /* UART2 */ diff --git a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c index 0b84666792f0..e2b70f4c1a2c 100644 --- a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c @@ -26,14 +26,14 @@ #include <linux/spi/spi.h> #include <video/platform_lcd.h> -#include <mach/hardware.h> -#include <mach/iomux-mx25.h> -#include <mach/common.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <mach/mx25.h> +#include "common.h" #include "devices-imx25.h" +#include "hardware.h" +#include "iomux-mx25.h" +#include "mx25.h" static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = { /* LCD */ diff --git a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c index c6532a007d46..5a2d5ef12dd5 100644 --- a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c @@ -36,11 +36,10 @@ #include <asm/mach/time.h> #include <asm/mach/map.h> -#include <mach/hardware.h> -#include <mach/common.h> -#include <mach/iomux-mx35.h> - +#include "common.h" #include "devices-imx35.h" +#include "hardware.h" +#include "iomux-mx35.h" static const struct fb_videomode fb_modedb[] = { { diff --git a/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c index 8b0de30d7a3f..9be6c1e69d68 100644 --- a/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c @@ -36,11 +36,10 @@ #include <asm/mach/time.h> #include <asm/mach/map.h> -#include <mach/hardware.h> -#include <mach/common.h> -#include <mach/iomux-mx51.h> - +#include "common.h" #include "devices-imx51.h" +#include "hardware.h" +#include "iomux-mx51.h" static iomux_v3_cfg_t eukrea_mbimxsd51_pads[] = { /* LED */ diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/mach-imx/hardware.h index ebf10654bb42..3ce7fa3bd43f 100644 --- a/arch/arm/plat-mxc/include/mach/hardware.h +++ b/arch/arm/mach-imx/hardware.h @@ -105,20 +105,20 @@ #define IMX_IO_ADDRESS(x) IOMEM(IMX_IO_P2V(x)) -#include <mach/mxc.h> +#include "mxc.h" -#include <mach/mx6q.h> -#include <mach/mx50.h> -#include <mach/mx51.h> -#include <mach/mx53.h> -#include <mach/mx3x.h> -#include <mach/mx31.h> -#include <mach/mx35.h> -#include <mach/mx2x.h> -#include <mach/mx21.h> -#include <mach/mx27.h> -#include <mach/mx1.h> -#include <mach/mx25.h> +#include "mx6q.h" +#include "mx50.h" +#include "mx51.h" +#include "mx53.h" +#include "mx3x.h" +#include "mx31.h" +#include "mx35.h" +#include "mx2x.h" +#include "mx21.h" +#include "mx27.h" +#include "mx1.h" +#include "mx25.h" #define imx_map_entry(soc, name, _type) { \ .virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR), \ diff --git a/arch/arm/mach-imx/hotplug.c b/arch/arm/mach-imx/hotplug.c index b07b778dc9a8..3dec962b0770 100644 --- a/arch/arm/mach-imx/hotplug.c +++ b/arch/arm/mach-imx/hotplug.c @@ -13,7 +13,8 @@ #include <linux/errno.h> #include <asm/cacheflush.h> #include <asm/cp15.h> -#include <mach/common.h> + +#include "common.h" static inline void cpu_enter_lowpower(void) { diff --git a/arch/arm/plat-mxc/include/mach/iim.h b/arch/arm/mach-imx/iim.h index 315bffadafda..315bffadafda 100644 --- a/arch/arm/plat-mxc/include/mach/iim.h +++ b/arch/arm/mach-imx/iim.h diff --git a/arch/arm/mach-imx/imx27-dt.c b/arch/arm/mach-imx/imx27-dt.c index e80d5235dac0..ebfae96543c4 100644 --- a/arch/arm/mach-imx/imx27-dt.c +++ b/arch/arm/mach-imx/imx27-dt.c @@ -14,21 +14,22 @@ #include <linux/of_platform.h> #include <asm/mach/arch.h> #include <asm/mach/time.h> -#include <mach/common.h> -#include <mach/mx27.h> + +#include "common.h" +#include "mx27.h" static const struct of_dev_auxdata imx27_auxdata_lookup[] __initconst = { OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART1_BASE_ADDR, "imx21-uart.0", NULL), OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART2_BASE_ADDR, "imx21-uart.1", NULL), OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART3_BASE_ADDR, "imx21-uart.2", NULL), OF_DEV_AUXDATA("fsl,imx27-fec", MX27_FEC_BASE_ADDR, "imx27-fec.0", NULL), - OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C1_BASE_ADDR, "imx-i2c.0", NULL), - OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C2_BASE_ADDR, "imx-i2c.1", NULL), + OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C1_BASE_ADDR, "imx21-i2c.0", NULL), + OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C2_BASE_ADDR, "imx21-i2c.1", NULL), OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI1_BASE_ADDR, "imx27-cspi.0", NULL), OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI2_BASE_ADDR, "imx27-cspi.1", NULL), OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI3_BASE_ADDR, "imx27-cspi.2", NULL), OF_DEV_AUXDATA("fsl,imx27-wdt", MX27_WDOG_BASE_ADDR, "imx2-wdt.0", NULL), - OF_DEV_AUXDATA("fsl,imx27-nand", MX27_NFC_BASE_ADDR, "mxc_nand.0", NULL), + OF_DEV_AUXDATA("fsl,imx27-nand", MX27_NFC_BASE_ADDR, "imx27-nand.0", NULL), { /* sentinel */ } }; diff --git a/arch/arm/mach-imx/imx31-dt.c b/arch/arm/mach-imx/imx31-dt.c index a68ba207b2b7..af476de2570e 100644 --- a/arch/arm/mach-imx/imx31-dt.c +++ b/arch/arm/mach-imx/imx31-dt.c @@ -14,8 +14,9 @@ #include <linux/of_platform.h> #include <asm/mach/arch.h> #include <asm/mach/time.h> -#include <mach/common.h> -#include <mach/mx31.h> + +#include "common.h" +#include "mx31.h" static const struct of_dev_auxdata imx31_auxdata_lookup[] __initconst = { OF_DEV_AUXDATA("fsl,imx31-uart", MX31_UART1_BASE_ADDR, diff --git a/arch/arm/mach-imx/imx51-dt.c b/arch/arm/mach-imx/imx51-dt.c index f233b4bb2342..50742990a136 100644 --- a/arch/arm/mach-imx/imx51-dt.c +++ b/arch/arm/mach-imx/imx51-dt.c @@ -15,8 +15,9 @@ #include <linux/of_platform.h> #include <asm/mach/arch.h> #include <asm/mach/time.h> -#include <mach/common.h> -#include <mach/mx51.h> + +#include "common.h" +#include "mx51.h" /* * Lookup table for attaching a specific name and platform_data pointer to @@ -36,8 +37,8 @@ static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = { OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL), OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL), OF_DEV_AUXDATA("fsl,imx51-cspi", MX51_CSPI_BASE_ADDR, "imx35-cspi.0", NULL), - OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C1_BASE_ADDR, "imx-i2c.0", NULL), - OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C2_BASE_ADDR, "imx-i2c.1", NULL), + OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C1_BASE_ADDR, "imx21-i2c.0", NULL), + OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C2_BASE_ADDR, "imx21-i2c.1", NULL), OF_DEV_AUXDATA("fsl,imx51-sdma", MX51_SDMA_BASE_ADDR, "imx35-sdma", NULL), OF_DEV_AUXDATA("fsl,imx51-wdt", MX51_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL), { /* sentinel */ } diff --git a/arch/arm/mach-imx/include/mach/dma-mx1-mx2.h b/arch/arm/mach-imx/include/mach/dma-mx1-mx2.h deleted file mode 100644 index df5f522da6b3..000000000000 --- a/arch/arm/mach-imx/include/mach/dma-mx1-mx2.h +++ /dev/null @@ -1,10 +0,0 @@ -#ifndef __MACH_DMA_MX1_MX2_H__ -#define __MACH_DMA_MX1_MX2_H__ -/* - * Don't use this header in new code, it will go away when all users are - * converted to mach/dma-v1.h - */ - -#include <mach/dma-v1.h> - -#endif /* ifndef __MACH_DMA_MX1_MX2_H__ */ diff --git a/arch/arm/mach-imx/iomux-imx31.c b/arch/arm/mach-imx/iomux-imx31.c index 82bd4403b450..cabefbc5e7c1 100644 --- a/arch/arm/mach-imx/iomux-imx31.c +++ b/arch/arm/mach-imx/iomux-imx31.c @@ -22,8 +22,9 @@ #include <linux/spinlock.h> #include <linux/io.h> #include <linux/kernel.h> -#include <mach/hardware.h> -#include <mach/iomux-mx3.h> + +#include "hardware.h" +#include "iomux-mx3.h" /* * IOMUX register (base) addresses diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx1.h b/arch/arm/mach-imx/iomux-mx1.h index 6b1507cf378e..95f4681d85d7 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx1.h +++ b/arch/arm/mach-imx/iomux-mx1.h @@ -18,7 +18,7 @@ #ifndef __MACH_IOMUX_MX1_H__ #define __MACH_IOMUX_MX1_H__ -#include <mach/iomux-v1.h> +#include "iomux-v1.h" #define PA0_AIN_SPI2_CLK (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 0) #define PA0_AF_ETMTRACESYNC (GPIO_PORTA | GPIO_AF | 0) diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx21.h b/arch/arm/mach-imx/iomux-mx21.h index 1495dfda7834..a70cffceb085 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx21.h +++ b/arch/arm/mach-imx/iomux-mx21.h @@ -18,8 +18,8 @@ #ifndef __MACH_IOMUX_MX21_H__ #define __MACH_IOMUX_MX21_H__ -#include <mach/iomux-mx2x.h> -#include <mach/iomux-v1.h> +#include "iomux-mx2x.h" +#include "iomux-v1.h" /* Primary GPIO pin functions */ diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx25.h b/arch/arm/mach-imx/iomux-mx25.h index c61ec0fc10d4..be51e838375c 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx25.h +++ b/arch/arm/mach-imx/iomux-mx25.h @@ -19,7 +19,7 @@ #ifndef __MACH_IOMUX_MX25_H__ #define __MACH_IOMUX_MX25_H__ -#include <mach/iomux-v3.h> +#include "iomux-v3.h" /* * IOMUX/PAD Bit field definitions diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx27.h b/arch/arm/mach-imx/iomux-mx27.h index d9f9a6e32d80..218e99e89e86 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx27.h +++ b/arch/arm/mach-imx/iomux-mx27.h @@ -19,8 +19,8 @@ #ifndef __MACH_IOMUX_MX27_H__ #define __MACH_IOMUX_MX27_H__ -#include <mach/iomux-mx2x.h> -#include <mach/iomux-v1.h> +#include "iomux-mx2x.h" +#include "iomux-v1.h" /* Primary GPIO pin functions */ diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h b/arch/arm/mach-imx/iomux-mx2x.h index 7a9b20abda09..7a9b20abda09 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx2x.h +++ b/arch/arm/mach-imx/iomux-mx2x.h diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/mach-imx/iomux-mx3.h index f79f78a1c0ed..f79f78a1c0ed 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h +++ b/arch/arm/mach-imx/iomux-mx3.h diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx35.h b/arch/arm/mach-imx/iomux-mx35.h index 3117c18bbbd9..90bfa6b5be6a 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx35.h +++ b/arch/arm/mach-imx/iomux-mx35.h @@ -19,7 +19,7 @@ #ifndef __MACH_IOMUX_MX35_H__ #define __MACH_IOMUX_MX35_H__ -#include <mach/iomux-v3.h> +#include "iomux-v3.h" /* * The naming convention for the pad modes is MX35_PAD_<padname>__<padmode> diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx50.h b/arch/arm/mach-imx/iomux-mx50.h index 98e7fd0b9083..00f56e0e8009 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx50.h +++ b/arch/arm/mach-imx/iomux-mx50.h @@ -19,7 +19,7 @@ #ifndef __MACH_IOMUX_MX50_H__ #define __MACH_IOMUX_MX50_H__ -#include <mach/iomux-v3.h> +#include "iomux-v3.h" #define MX50_ELCDIF_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_DSE_HIGH) diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx51.h b/arch/arm/mach-imx/iomux-mx51.h index 2623e7a2e190..75bbcc4aa2d2 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx51.h +++ b/arch/arm/mach-imx/iomux-mx51.h @@ -13,7 +13,7 @@ #ifndef __MACH_IOMUX_MX51_H__ #define __MACH_IOMUX_MX51_H__ -#include <mach/iomux-v3.h> +#include "iomux-v3.h" #define __NA_ 0x000 diff --git a/arch/arm/plat-mxc/iomux-v1.c b/arch/arm/mach-imx/iomux-v1.c index 1f73963bc13e..2b156d1d9e21 100644 --- a/arch/arm/plat-mxc/iomux-v1.c +++ b/arch/arm/mach-imx/iomux-v1.c @@ -28,9 +28,10 @@ #include <linux/string.h> #include <linux/gpio.h> -#include <mach/hardware.h> #include <asm/mach/map.h> -#include <mach/iomux-v1.h> + +#include "hardware.h" +#include "iomux-v1.h" static void __iomem *imx_iomuxv1_baseaddr; static unsigned imx_iomuxv1_numports; diff --git a/arch/arm/plat-mxc/include/mach/iomux-v1.h b/arch/arm/mach-imx/iomux-v1.h index 02651a40fe23..02651a40fe23 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-v1.h +++ b/arch/arm/mach-imx/iomux-v1.h diff --git a/arch/arm/plat-mxc/iomux-v3.c b/arch/arm/mach-imx/iomux-v3.c index 99a9cdb9d6be..9dae74bf47fc 100644 --- a/arch/arm/plat-mxc/iomux-v3.c +++ b/arch/arm/mach-imx/iomux-v3.c @@ -25,9 +25,10 @@ #include <linux/string.h> #include <linux/gpio.h> -#include <mach/hardware.h> #include <asm/mach/map.h> -#include <mach/iomux-v3.h> + +#include "hardware.h" +#include "iomux-v3.h" static void __iomem *base; diff --git a/arch/arm/plat-mxc/include/mach/iomux-v3.h b/arch/arm/mach-imx/iomux-v3.h index 2fa3b5430102..2fa3b5430102 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-v3.h +++ b/arch/arm/mach-imx/iomux-v3.h diff --git a/arch/arm/plat-mxc/include/mach/iram.h b/arch/arm/mach-imx/iram.h index 022690c33702..022690c33702 100644 --- a/arch/arm/plat-mxc/include/mach/iram.h +++ b/arch/arm/mach-imx/iram.h diff --git a/arch/arm/plat-mxc/iram_alloc.c b/arch/arm/mach-imx/iram_alloc.c index 074c3869626a..6c80424f678e 100644 --- a/arch/arm/plat-mxc/iram_alloc.c +++ b/arch/arm/mach-imx/iram_alloc.c @@ -22,7 +22,8 @@ #include <linux/module.h> #include <linux/spinlock.h> #include <linux/genalloc.h> -#include <mach/iram.h> + +#include "iram.h" static unsigned long iram_phys_base; static void __iomem *iram_virt_base; diff --git a/arch/arm/plat-mxc/irq-common.c b/arch/arm/mach-imx/irq-common.c index b6e11458e5ae..b6e11458e5ae 100644 --- a/arch/arm/plat-mxc/irq-common.c +++ b/arch/arm/mach-imx/irq-common.c diff --git a/arch/arm/plat-mxc/irq-common.h b/arch/arm/mach-imx/irq-common.h index 6ccb3a14c693..5b2dabba330f 100644 --- a/arch/arm/plat-mxc/irq-common.h +++ b/arch/arm/mach-imx/irq-common.h @@ -19,6 +19,9 @@ #ifndef __PLAT_MXC_IRQ_COMMON_H__ #define __PLAT_MXC_IRQ_COMMON_H__ +/* all normal IRQs can be FIQs */ +#define FIQ_START 0 + struct mxc_extra_irq { int (*set_priority)(unsigned char irq, unsigned char prio); diff --git a/arch/arm/mach-imx/lluart.c b/arch/arm/mach-imx/lluart.c index c40a34c00489..5f1510363ee7 100644 --- a/arch/arm/mach-imx/lluart.c +++ b/arch/arm/mach-imx/lluart.c @@ -14,7 +14,8 @@ #include <asm/page.h> #include <asm/sizes.h> #include <asm/mach/map.h> -#include <mach/hardware.h> + +#include "hardware.h" static struct map_desc imx_lluart_desc = { #ifdef CONFIG_DEBUG_IMX6Q_UART2 diff --git a/arch/arm/mach-imx/mach-apf9328.c b/arch/arm/mach-imx/mach-apf9328.c index 7b99a79722b6..5c9bd2c66e6d 100644 --- a/arch/arm/mach-imx/mach-apf9328.c +++ b/arch/arm/mach-imx/mach-apf9328.c @@ -25,11 +25,10 @@ #include <asm/mach/arch.h> #include <asm/mach/time.h> -#include <mach/common.h> -#include <mach/hardware.h> -#include <mach/iomux-mx1.h> - +#include "common.h" #include "devices-imx1.h" +#include "hardware.h" +#include "iomux-mx1.h" static const int apf9328_pins[] __initconst = { /* UART1 */ diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c index 5985ed1b8c98..59bd6b06a6b5 100644 --- a/arch/arm/mach-imx/mach-armadillo5x0.c +++ b/arch/arm/mach-imx/mach-armadillo5x0.c @@ -41,19 +41,18 @@ #include <linux/regulator/machine.h> #include <linux/regulator/fixed.h> -#include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/time.h> #include <asm/memory.h> #include <asm/mach/map.h> -#include <mach/common.h> -#include <mach/iomux-mx3.h> -#include <mach/ulpi.h> - +#include "common.h" #include "devices-imx31.h" #include "crmregs-imx3.h" +#include "hardware.h" +#include "iomux-mx3.h" +#include "ulpi.h" static int armadillo5x0_pins[] = { /* UART1 */ diff --git a/arch/arm/mach-imx/mach-bug.c b/arch/arm/mach-imx/mach-bug.c index 9a9897749dd6..3a39d5aec07a 100644 --- a/arch/arm/mach-imx/mach-bug.c +++ b/arch/arm/mach-imx/mach-bug.c @@ -19,15 +19,14 @@ #include <linux/init.h> #include <linux/platform_device.h> -#include <mach/iomux-mx3.h> -#include <mach/hardware.h> -#include <mach/common.h> - #include <asm/mach/time.h> #include <asm/mach/arch.h> #include <asm/mach-types.h> +#include "common.h" #include "devices-imx31.h" +#include "hardware.h" +#include "iomux-mx3.h" static const struct imxuart_platform_data uart_pdata __initconst = { .flags = IMXUART_HAVE_RTSCTS, diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c index 2bb9e18d9ee1..12a370646b45 100644 --- a/arch/arm/mach-imx/mach-cpuimx27.c +++ b/arch/arm/mach-imx/mach-cpuimx27.c @@ -34,13 +34,12 @@ #include <asm/mach/time.h> #include <asm/mach/map.h> -#include <mach/eukrea-baseboards.h> -#include <mach/common.h> -#include <mach/hardware.h> -#include <mach/iomux-mx27.h> -#include <mach/ulpi.h> - +#include "common.h" #include "devices-imx27.h" +#include "eukrea-baseboards.h" +#include "hardware.h" +#include "iomux-mx27.h" +#include "ulpi.h" static const int eukrea_cpuimx27_pins[] __initconst = { /* UART1 */ diff --git a/arch/arm/mach-imx/mach-cpuimx35.c b/arch/arm/mach-imx/mach-cpuimx35.c index d49b0ec6bdec..5a31bf8c8f4c 100644 --- a/arch/arm/mach-imx/mach-cpuimx35.c +++ b/arch/arm/mach-imx/mach-cpuimx35.c @@ -37,12 +37,11 @@ #include <asm/mach/time.h> #include <asm/mach/map.h> -#include <mach/eukrea-baseboards.h> -#include <mach/hardware.h> -#include <mach/common.h> -#include <mach/iomux-mx35.h> - +#include "common.h" #include "devices-imx35.h" +#include "eukrea-baseboards.h" +#include "hardware.h" +#include "iomux-mx35.h" static const struct imxuart_platform_data uart_pdata __initconst = { .flags = IMXUART_HAVE_RTSCTS, diff --git a/arch/arm/mach-imx/mach-cpuimx51sd.c b/arch/arm/mach-imx/mach-cpuimx51sd.c index b87cc49ab1e8..b727de029c8f 100644 --- a/arch/arm/mach-imx/mach-cpuimx51sd.c +++ b/arch/arm/mach-imx/mach-cpuimx51sd.c @@ -26,18 +26,17 @@ #include <linux/spi/spi.h> #include <linux/can/platform/mcp251x.h> -#include <mach/eukrea-baseboards.h> -#include <mach/common.h> -#include <mach/hardware.h> -#include <mach/iomux-mx51.h> - #include <asm/setup.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/time.h> +#include "common.h" #include "devices-imx51.h" #include "cpu_op-mx51.h" +#include "eukrea-baseboards.h" +#include "hardware.h" +#include "iomux-mx51.h" #define USBH1_RST IMX_GPIO_NR(2, 28) #define ETH_RST IMX_GPIO_NR(2, 31) diff --git a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c index 017bbb70ea41..75027a5ad8b7 100644 --- a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c +++ b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c @@ -27,18 +27,18 @@ #include <linux/usb/otg.h> #include <linux/usb/ulpi.h> -#include <mach/eukrea-baseboards.h> -#include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/time.h> #include <asm/memory.h> #include <asm/mach/map.h> -#include <mach/common.h> -#include <mach/mx25.h> -#include <mach/iomux-mx25.h> +#include "common.h" #include "devices-imx25.h" +#include "eukrea-baseboards.h" +#include "hardware.h" +#include "iomux-mx25.h" +#include "mx25.h" static const struct imxuart_platform_data uart_pdata __initconst = { .flags = IMXUART_HAVE_RTSCTS, diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c index 141756f00ae5..b74422679126 100644 --- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c +++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c @@ -40,11 +40,11 @@ #include <asm/mach/time.h> #include <asm/system_info.h> #include <asm/memblock.h> -#include <mach/common.h> -#include <mach/hardware.h> -#include <mach/iomux-mx27.h> +#include "common.h" #include "devices-imx27.h" +#include "hardware.h" +#include "iomux-mx27.h" #define TVP5150_RSTN (GPIO_PORTC + 18) #define TVP5150_PWDN (GPIO_PORTC + 19) diff --git a/arch/arm/mach-imx/mach-imx27ipcam.c b/arch/arm/mach-imx/mach-imx27ipcam.c index 7381387a8905..53a860112938 100644 --- a/arch/arm/mach-imx/mach-imx27ipcam.c +++ b/arch/arm/mach-imx/mach-imx27ipcam.c @@ -17,11 +17,11 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/time.h> -#include <mach/hardware.h> -#include <mach/common.h> -#include <mach/iomux-mx27.h> +#include "hardware.h" +#include "common.h" #include "devices-imx27.h" +#include "iomux-mx27.h" static const int mx27ipcam_pins[] __initconst = { /* UART1 */ diff --git a/arch/arm/mach-imx/mach-imx27lite.c b/arch/arm/mach-imx/mach-imx27lite.c index 1f45b9189229..fc8dce931378 100644 --- a/arch/arm/mach-imx/mach-imx27lite.c +++ b/arch/arm/mach-imx/mach-imx27lite.c @@ -20,11 +20,11 @@ #include <asm/mach/arch.h> #include <asm/mach/time.h> #include <asm/mach/map.h> -#include <mach/hardware.h> -#include <mach/common.h> -#include <mach/iomux-mx27.h> +#include "common.h" #include "devices-imx27.h" +#include "hardware.h" +#include "iomux-mx27.h" static const int mx27lite_pins[] __initconst = { /* UART1 */ diff --git a/arch/arm/mach-imx/mach-imx53.c b/arch/arm/mach-imx/mach-imx53.c index 29711e95579f..e71e62610eba 100644 --- a/arch/arm/mach-imx/mach-imx53.c +++ b/arch/arm/mach-imx/mach-imx53.c @@ -19,8 +19,9 @@ #include <linux/of_platform.h> #include <asm/mach/arch.h> #include <asm/mach/time.h> -#include <mach/common.h> -#include <mach/mx53.h> + +#include "common.h" +#include "mx53.h" /* * Lookup table for attaching a specific name and platform_data pointer to @@ -42,9 +43,9 @@ static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = { OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL), OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL), OF_DEV_AUXDATA("fsl,imx53-cspi", MX53_CSPI_BASE_ADDR, "imx35-cspi.0", NULL), - OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C1_BASE_ADDR, "imx-i2c.0", NULL), - OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C2_BASE_ADDR, "imx-i2c.1", NULL), - OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C3_BASE_ADDR, "imx-i2c.2", NULL), + OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C1_BASE_ADDR, "imx21-i2c.0", NULL), + OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C2_BASE_ADDR, "imx21-i2c.1", NULL), + OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C3_BASE_ADDR, "imx21-i2c.2", NULL), OF_DEV_AUXDATA("fsl,imx53-sdma", MX53_SDMA_BASE_ADDR, "imx35-sdma", NULL), OF_DEV_AUXDATA("fsl,imx53-wdt", MX53_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL), { /* sentinel */ } diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 47c91f7185d2..978b6dd00de4 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -33,10 +33,10 @@ #include <asm/mach/arch.h> #include <asm/mach/time.h> #include <asm/system_misc.h> -#include <mach/common.h> -#include <mach/cpuidle.h> -#include <mach/hardware.h> +#include "common.h" +#include "cpuidle.h" +#include "hardware.h" void imx6q_restart(char mode, const char *cmd) { diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c index 0330078ff788..2e536ea53444 100644 --- a/arch/arm/mach-imx/mach-kzm_arm11_01.c +++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c @@ -36,11 +36,10 @@ #include <asm/mach/map.h> #include <asm/mach/time.h> -#include <mach/common.h> -#include <mach/hardware.h> -#include <mach/iomux-mx3.h> - +#include "common.h" #include "devices-imx31.h" +#include "hardware.h" +#include "iomux-mx3.h" #define KZM_ARM11_IO_ADDRESS(x) (IOMEM( \ IMX_IO_P2V_MODULE(x, MX31_CS4) ?: \ diff --git a/arch/arm/mach-imx/mach-mx1ads.c b/arch/arm/mach-imx/mach-mx1ads.c index 667f359a2e8b..06b483783e68 100644 --- a/arch/arm/mach-imx/mach-mx1ads.c +++ b/arch/arm/mach-imx/mach-mx1ads.c @@ -23,11 +23,10 @@ #include <asm/mach/arch.h> #include <asm/mach/time.h> -#include <mach/common.h> -#include <mach/hardware.h> -#include <mach/iomux-mx1.h> - +#include "common.h" #include "devices-imx1.h" +#include "hardware.h" +#include "iomux-mx1.h" static const int mx1ads_pins[] __initconst = { /* UART1 */ diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c index ed22e3fe6ec8..6adb3136bb08 100644 --- a/arch/arm/mach-imx/mach-mx21ads.c +++ b/arch/arm/mach-imx/mach-mx21ads.c @@ -18,15 +18,15 @@ #include <linux/mtd/mtd.h> #include <linux/mtd/physmap.h> #include <linux/gpio.h> -#include <mach/common.h> -#include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/time.h> #include <asm/mach/map.h> -#include <mach/iomux-mx21.h> +#include "common.h" #include "devices-imx21.h" +#include "hardware.h" +#include "iomux-mx21.h" /* * Memory-mapped I/O on MX21ADS base board diff --git a/arch/arm/mach-imx/mach-mx25_3ds.c b/arch/arm/mach-imx/mach-mx25_3ds.c index ce247fd1269a..b1b03aa55bb8 100644 --- a/arch/arm/mach-imx/mach-mx25_3ds.c +++ b/arch/arm/mach-imx/mach-mx25_3ds.c @@ -31,17 +31,17 @@ #include <linux/platform_device.h> #include <linux/usb/otg.h> -#include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/time.h> #include <asm/memory.h> #include <asm/mach/map.h> -#include <mach/common.h> -#include <mach/mx25.h> -#include <mach/iomux-mx25.h> +#include "common.h" #include "devices-imx25.h" +#include "hardware.h" +#include "iomux-mx25.h" +#include "mx25.h" #define MX25PDK_CAN_PWDN IMX_GPIO_NR(4, 6) diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index 05996f39005c..d0e547fa925f 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -36,13 +36,13 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/time.h> -#include <mach/hardware.h> -#include <mach/common.h> -#include <mach/iomux-mx27.h> -#include <mach/ulpi.h> -#include <mach/3ds_debugboard.h> +#include "3ds_debugboard.h" +#include "common.h" #include "devices-imx27.h" +#include "hardware.h" +#include "iomux-mx27.h" +#include "ulpi.h" #define SD1_EN_GPIO IMX_GPIO_NR(2, 25) #define OTG_PHY_RESET_GPIO IMX_GPIO_NR(2, 23) diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c index 7dc59bac0e55..3d036f57f0e6 100644 --- a/arch/arm/mach-imx/mach-mx27ads.c +++ b/arch/arm/mach-imx/mach-mx27ads.c @@ -21,15 +21,15 @@ #include <linux/mtd/physmap.h> #include <linux/i2c.h> #include <linux/irq.h> -#include <mach/common.h> -#include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/time.h> #include <asm/mach/map.h> -#include <mach/iomux-mx27.h> +#include "common.h" #include "devices-imx27.h" +#include "hardware.h" +#include "iomux-mx27.h" /* * Base address of PBC controller, CS4 diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c index 8915f937b7d5..bc301befdd06 100644 --- a/arch/arm/mach-imx/mach-mx31_3ds.c +++ b/arch/arm/mach-imx/mach-mx31_3ds.c @@ -30,19 +30,19 @@ #include <media/soc_camera.h> -#include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/time.h> #include <asm/memory.h> #include <asm/mach/map.h> #include <asm/memblock.h> -#include <mach/common.h> -#include <mach/iomux-mx3.h> -#include <mach/3ds_debugboard.h> -#include <mach/ulpi.h> +#include "3ds_debugboard.h" +#include "common.h" #include "devices-imx31.h" +#include "hardware.h" +#include "iomux-mx3.h" +#include "ulpi.h" static int mx31_3ds_pins[] = { /* UART1 */ @@ -393,7 +393,7 @@ static struct regulator_init_data gpo_init = { }; static struct regulator_consumer_supply vmmc2_consumers[] = { - REGULATOR_SUPPLY("vmmc", "mxc-mmc.0"), + REGULATOR_SUPPLY("vmmc", "imx31-mmc.0"), }; static struct regulator_init_data vmmc2_init = { diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c index e774b07f48d3..8b56f8883f32 100644 --- a/arch/arm/mach-imx/mach-mx31ads.c +++ b/arch/arm/mach-imx/mach-mx31ads.c @@ -28,8 +28,6 @@ #include <asm/mach/time.h> #include <asm/memory.h> #include <asm/mach/map.h> -#include <mach/common.h> -#include <mach/iomux-mx3.h> #ifdef CONFIG_MACH_MX31ADS_WM1133_EV1 #include <linux/mfd/wm8350/audio.h> @@ -37,7 +35,10 @@ #include <linux/mfd/wm8350/pmic.h> #endif +#include "common.h" #include "devices-imx31.h" +#include "hardware.h" +#include "iomux-mx3.h" /* Base address of PBC controller */ #define PBC_BASE_ADDRESS MX31_CS4_BASE_ADDR_VIRT diff --git a/arch/arm/mach-imx/mach-mx31lilly.c b/arch/arm/mach-imx/mach-mx31lilly.c index 34b9bf075daf..08b9965c8b36 100644 --- a/arch/arm/mach-imx/mach-mx31lilly.c +++ b/arch/arm/mach-imx/mach-mx31lilly.c @@ -42,13 +42,12 @@ #include <asm/mach/time.h> #include <asm/mach/map.h> -#include <mach/hardware.h> -#include <mach/common.h> -#include <mach/iomux-mx3.h> -#include <mach/board-mx31lilly.h> -#include <mach/ulpi.h> - +#include "board-mx31lilly.h" +#include "common.h" #include "devices-imx31.h" +#include "hardware.h" +#include "iomux-mx3.h" +#include "ulpi.h" /* * This file contains module-specific initialization routines for LILLY-1131. diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c index ef57cff5abfb..bdcd92e59518 100644 --- a/arch/arm/mach-imx/mach-mx31lite.c +++ b/arch/arm/mach-imx/mach-mx31lite.c @@ -39,13 +39,12 @@ #include <asm/page.h> #include <asm/setup.h> -#include <mach/hardware.h> -#include <mach/common.h> -#include <mach/board-mx31lite.h> -#include <mach/iomux-mx3.h> -#include <mach/ulpi.h> - +#include "board-mx31lite.h" +#include "common.h" #include "devices-imx31.h" +#include "hardware.h" +#include "iomux-mx3.h" +#include "ulpi.h" /* * This file contains the module-specific initialization routines. diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c index 459e754ef8c9..2517cfa9f26b 100644 --- a/arch/arm/mach-imx/mach-mx31moboard.c +++ b/arch/arm/mach-imx/mach-mx31moboard.c @@ -42,14 +42,14 @@ #include <asm/mach/time.h> #include <asm/mach/map.h> #include <asm/memblock.h> -#include <mach/board-mx31moboard.h> -#include <mach/common.h> -#include <mach/hardware.h> -#include <mach/iomux-mx3.h> -#include <mach/ulpi.h> #include <linux/platform_data/asoc-imx-ssi.h> +#include "board-mx31moboard.h" +#include "common.h" #include "devices-imx31.h" +#include "hardware.h" +#include "iomux-mx3.h" +#include "ulpi.h" static unsigned int moboard_pins[] = { /* UART0 */ @@ -175,11 +175,11 @@ static const struct spi_imx_master moboard_spi1_pdata __initconst = { static struct regulator_consumer_supply sdhc_consumers[] = { { - .dev_name = "mxc-mmc.0", + .dev_name = "imx31-mmc.0", .supply = "sdhc0_vcc", }, { - .dev_name = "mxc-mmc.1", + .dev_name = "imx31-mmc.1", .supply = "sdhc1_vcc", }, }; diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c index 504983c68aa8..5277da45d60c 100644 --- a/arch/arm/mach-imx/mach-mx35_3ds.c +++ b/arch/arm/mach-imx/mach-mx35_3ds.c @@ -43,15 +43,15 @@ #include <asm/mach/map.h> #include <asm/memblock.h> -#include <mach/hardware.h> -#include <mach/common.h> -#include <mach/iomux-mx35.h> -#include <mach/3ds_debugboard.h> #include <video/platform_lcd.h> #include <media/soc_camera.h> +#include "3ds_debugboard.h" +#include "common.h" #include "devices-imx35.h" +#include "hardware.h" +#include "iomux-mx35.h" #define GPIO_MC9S08DZ60_GPS_ENABLE 0 #define GPIO_MC9S08DZ60_HDD_ENABLE 4 diff --git a/arch/arm/mach-imx/mach-mx50_rdp.c b/arch/arm/mach-imx/mach-mx50_rdp.c index 42b66e8d9615..0c1f88a80bdc 100644 --- a/arch/arm/mach-imx/mach-mx50_rdp.c +++ b/arch/arm/mach-imx/mach-mx50_rdp.c @@ -24,17 +24,16 @@ #include <linux/delay.h> #include <linux/io.h> -#include <mach/common.h> -#include <mach/hardware.h> -#include <mach/iomux-mx50.h> - #include <asm/irq.h> #include <asm/setup.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/time.h> +#include "common.h" #include "devices-imx50.h" +#include "hardware.h" +#include "iomux-mx50.h" #define FEC_EN IMX_GPIO_NR(6, 23) #define FEC_RESET_B IMX_GPIO_NR(4, 12) diff --git a/arch/arm/mach-imx/mach-mx51_3ds.c b/arch/arm/mach-imx/mach-mx51_3ds.c index 9ee84a4af639..abc25bd1107b 100644 --- a/arch/arm/mach-imx/mach-mx51_3ds.c +++ b/arch/arm/mach-imx/mach-mx51_3ds.c @@ -19,12 +19,11 @@ #include <asm/mach/arch.h> #include <asm/mach/time.h> -#include <mach/hardware.h> -#include <mach/common.h> -#include <mach/iomux-mx51.h> -#include <mach/3ds_debugboard.h> - +#include "3ds_debugboard.h" +#include "common.h" #include "devices-imx51.h" +#include "hardware.h" +#include "iomux-mx51.h" #define MX51_3DS_ECSPI2_CS (GPIO_PORTC + 28) diff --git a/arch/arm/mach-imx/mach-mx51_babbage.c b/arch/arm/mach-imx/mach-mx51_babbage.c index 7b31cbde8775..d9a84ca2199a 100644 --- a/arch/arm/mach-imx/mach-mx51_babbage.c +++ b/arch/arm/mach-imx/mach-mx51_babbage.c @@ -20,17 +20,16 @@ #include <linux/spi/flash.h> #include <linux/spi/spi.h> -#include <mach/common.h> -#include <mach/hardware.h> -#include <mach/iomux-mx51.h> - #include <asm/setup.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/time.h> +#include "common.h" #include "devices-imx51.h" #include "cpu_op-mx51.h" +#include "hardware.h" +#include "iomux-mx51.h" #define BABBAGE_USB_HUB_RESET IMX_GPIO_NR(1, 7) #define BABBAGE_USBH1_STP IMX_GPIO_NR(1, 27) diff --git a/arch/arm/mach-imx/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c index 0bf6d30aa32d..f4a8c7e108e1 100644 --- a/arch/arm/mach-imx/mach-mxt_td60.c +++ b/arch/arm/mach-imx/mach-mxt_td60.c @@ -21,17 +21,17 @@ #include <linux/mtd/physmap.h> #include <linux/i2c.h> #include <linux/irq.h> -#include <mach/common.h> -#include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/time.h> #include <asm/mach/map.h> #include <linux/gpio.h> -#include <mach/iomux-mx27.h> #include <linux/i2c/pca953x.h> +#include "common.h" #include "devices-imx27.h" +#include "hardware.h" +#include "iomux-mx27.h" static const int mxt_td60_pins[] __initconst = { /* UART0 */ diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c index de8516b7d69f..eee369fa94a2 100644 --- a/arch/arm/mach-imx/mach-pca100.c +++ b/arch/arm/mach-imx/mach-pca100.c @@ -32,13 +32,13 @@ #include <asm/mach/arch.h> #include <asm/mach-types.h> -#include <mach/common.h> -#include <mach/hardware.h> -#include <mach/iomux-mx27.h> #include <asm/mach/time.h> -#include <mach/ulpi.h> +#include "common.h" #include "devices-imx27.h" +#include "hardware.h" +#include "iomux-mx27.h" +#include "ulpi.h" #define OTG_PHY_CS_GPIO (GPIO_PORTB + 23) #define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24) diff --git a/arch/arm/mach-imx/mach-pcm037.c b/arch/arm/mach-imx/mach-pcm037.c index e3c45130fb3c..547fef133f65 100644 --- a/arch/arm/mach-imx/mach-pcm037.c +++ b/arch/arm/mach-imx/mach-pcm037.c @@ -42,13 +42,13 @@ #include <asm/mach/time.h> #include <asm/mach/map.h> #include <asm/memblock.h> -#include <mach/common.h> -#include <mach/hardware.h> -#include <mach/iomux-mx3.h> -#include <mach/ulpi.h> +#include "common.h" #include "devices-imx31.h" +#include "hardware.h" +#include "iomux-mx3.h" #include "pcm037.h" +#include "ulpi.h" static enum pcm037_board_variant pcm037_instance = PCM037_PCM970; diff --git a/arch/arm/mach-imx/mach-pcm037_eet.c b/arch/arm/mach-imx/mach-pcm037_eet.c index 11ffa81ad17d..8fd8255068ee 100644 --- a/arch/arm/mach-imx/mach-pcm037_eet.c +++ b/arch/arm/mach-imx/mach-pcm037_eet.c @@ -11,13 +11,12 @@ #include <linux/platform_device.h> #include <linux/spi/spi.h> -#include <mach/common.h> -#include <mach/iomux-mx3.h> - #include <asm/mach-types.h> #include "pcm037.h" +#include "common.h" #include "devices-imx31.h" +#include "iomux-mx3.h" static unsigned int pcm037_eet_pins[] = { /* Reserve and hardwire GPIO 57 high - S6E63D6 chipselect */ diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c index 95f49d936fd3..4aa0d0798605 100644 --- a/arch/arm/mach-imx/mach-pcm038.c +++ b/arch/arm/mach-imx/mach-pcm038.c @@ -33,13 +33,12 @@ #include <asm/mach/arch.h> #include <asm/mach/time.h> -#include <mach/board-pcm038.h> -#include <mach/common.h> -#include <mach/hardware.h> -#include <mach/iomux-mx27.h> -#include <mach/ulpi.h> - +#include "board-pcm038.h" +#include "common.h" #include "devices-imx27.h" +#include "hardware.h" +#include "iomux-mx27.h" +#include "ulpi.h" static const int pcm038_pins[] __initconst = { /* UART1 */ @@ -212,7 +211,7 @@ static const struct spi_imx_master pcm038_spi0_data __initconst = { static struct regulator_consumer_supply sdhc1_consumers[] = { { - .dev_name = "mxc-mmc.1", + .dev_name = "imx21-mmc.1", .supply = "sdhc_vcc", }, }; diff --git a/arch/arm/mach-imx/mach-pcm043.c b/arch/arm/mach-imx/mach-pcm043.c index e4bd4387e344..92445440221e 100644 --- a/arch/arm/mach-imx/mach-pcm043.c +++ b/arch/arm/mach-imx/mach-pcm043.c @@ -33,12 +33,11 @@ #include <asm/mach/time.h> #include <asm/mach/map.h> -#include <mach/hardware.h> -#include <mach/common.h> -#include <mach/iomux-mx35.h> -#include <mach/ulpi.h> - +#include "common.h" #include "devices-imx35.h" +#include "hardware.h" +#include "iomux-mx35.h" +#include "ulpi.h" static const struct fb_videomode fb_modedb[] = { { diff --git a/arch/arm/mach-imx/mach-qong.c b/arch/arm/mach-imx/mach-qong.c index fb25fbd31226..96d9a91f8a3b 100644 --- a/arch/arm/mach-imx/mach-qong.c +++ b/arch/arm/mach-imx/mach-qong.c @@ -21,17 +21,17 @@ #include <linux/mtd/nand.h> #include <linux/gpio.h> -#include <mach/hardware.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/time.h> #include <asm/mach/map.h> -#include <mach/common.h> #include <asm/page.h> #include <asm/setup.h> -#include <mach/iomux-mx3.h> +#include "common.h" #include "devices-imx31.h" +#include "hardware.h" +#include "iomux-mx3.h" /* FPGA defines */ #define QONG_FPGA_VERSION(major, minor, rev) \ diff --git a/arch/arm/mach-imx/mach-scb9328.c b/arch/arm/mach-imx/mach-scb9328.c index 67ff38e9a3ca..fc970409dbaf 100644 --- a/arch/arm/mach-imx/mach-scb9328.c +++ b/arch/arm/mach-imx/mach-scb9328.c @@ -20,11 +20,10 @@ #include <asm/mach/arch.h> #include <asm/mach/time.h> -#include <mach/common.h> -#include <mach/hardware.h> -#include <mach/iomux-mx1.h> - +#include "common.h" #include "devices-imx1.h" +#include "hardware.h" +#include "iomux-mx1.h" /* * This scb9328 has a 32MiB flash diff --git a/arch/arm/mach-imx/mach-vpr200.c b/arch/arm/mach-imx/mach-vpr200.c index 39eb7960e2a4..3aecf91e4289 100644 --- a/arch/arm/mach-imx/mach-vpr200.c +++ b/arch/arm/mach-imx/mach-vpr200.c @@ -28,15 +28,14 @@ #include <asm/mach/arch.h> #include <asm/mach/time.h> -#include <mach/hardware.h> -#include <mach/common.h> -#include <mach/iomux-mx35.h> - #include <linux/i2c.h> #include <linux/i2c/at24.h> #include <linux/mfd/mc13xxx.h> +#include "common.h" #include "devices-imx35.h" +#include "hardware.h" +#include "iomux-mx35.h" #define GPIO_LCDPWR IMX_GPIO_NR(1, 2) #define GPIO_PMIC_INT IMX_GPIO_NR(2, 0) diff --git a/arch/arm/mach-imx/mm-imx1.c b/arch/arm/mach-imx/mm-imx1.c index 6d60d51868bc..7a146671e65a 100644 --- a/arch/arm/mach-imx/mm-imx1.c +++ b/arch/arm/mach-imx/mm-imx1.c @@ -22,9 +22,10 @@ #include <asm/mach/map.h> -#include <mach/common.h> -#include <mach/hardware.h> -#include <mach/iomux-v1.h> +#include "common.h" +#include "devices/devices-common.h" +#include "hardware.h" +#include "iomux-v1.h" static struct map_desc imx_io_desc[] __initdata = { imx_map_entry(MX1, IO, MT_DEVICE), @@ -58,5 +59,7 @@ void __init imx1_soc_init(void) MX1_GPIO_INT_PORTC, 0); mxc_register_gpio("imx1-gpio", 3, MX1_GPIO4_BASE_ADDR, SZ_256, MX1_GPIO_INT_PORTD, 0); + imx_add_imx_dma("imx1-dma", MX1_DMA_BASE_ADDR, + MX1_DMA_INT, MX1_DMA_ERR); pinctrl_provide_dummies(); } diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c index d056dad0940d..d8ccd3a8ec53 100644 --- a/arch/arm/mach-imx/mm-imx21.c +++ b/arch/arm/mach-imx/mm-imx21.c @@ -21,12 +21,13 @@ #include <linux/mm.h> #include <linux/init.h> #include <linux/pinctrl/machine.h> -#include <mach/hardware.h> -#include <mach/common.h> -#include <mach/devices-common.h> #include <asm/pgtable.h> #include <asm/mach/map.h> -#include <mach/iomux-v1.h> + +#include "common.h" +#include "devices/devices-common.h" +#include "hardware.h" +#include "iomux-v1.h" /* MX21 memory map definition */ static struct map_desc imx21_io_desc[] __initdata = { @@ -81,6 +82,8 @@ static const struct resource imx21_audmux_res[] __initconst = { void __init imx21_soc_init(void) { + mxc_device_init(); + mxc_register_gpio("imx21-gpio", 0, MX21_GPIO1_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); mxc_register_gpio("imx21-gpio", 1, MX21_GPIO2_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); mxc_register_gpio("imx21-gpio", 2, MX21_GPIO3_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); @@ -89,7 +92,8 @@ void __init imx21_soc_init(void) mxc_register_gpio("imx21-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); pinctrl_provide_dummies(); - imx_add_imx_dma(); + imx_add_imx_dma("imx21-dma", MX21_DMA_BASE_ADDR, + MX21_INT_DMACH0, 0); /* No ERR irq */ platform_device_register_simple("imx21-audmux", 0, imx21_audmux_res, ARRAY_SIZE(imx21_audmux_res)); } diff --git a/arch/arm/mach-imx/mm-imx25.c b/arch/arm/mach-imx/mm-imx25.c index f3f5c6542ab4..9357707bb7af 100644 --- a/arch/arm/mach-imx/mm-imx25.c +++ b/arch/arm/mach-imx/mm-imx25.c @@ -24,11 +24,11 @@ #include <asm/pgtable.h> #include <asm/mach/map.h> -#include <mach/common.h> -#include <mach/devices-common.h> -#include <mach/hardware.h> -#include <mach/mx25.h> -#include <mach/iomux-v3.h> +#include "common.h" +#include "devices/devices-common.h" +#include "hardware.h" +#include "iomux-v3.h" +#include "mx25.h" /* * This table defines static virtual address mappings for I/O regions. @@ -89,6 +89,8 @@ static const struct resource imx25_audmux_res[] __initconst = { void __init imx25_soc_init(void) { + mxc_device_init(); + /* i.mx25 has the i.mx35 type gpio */ mxc_register_gpio("imx35-gpio", 0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0); mxc_register_gpio("imx35-gpio", 1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0); diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c index e7e24afc45ed..4f1be65a7b5f 100644 --- a/arch/arm/mach-imx/mm-imx27.c +++ b/arch/arm/mach-imx/mm-imx27.c @@ -21,12 +21,13 @@ #include <linux/mm.h> #include <linux/init.h> #include <linux/pinctrl/machine.h> -#include <mach/hardware.h> -#include <mach/common.h> -#include <mach/devices-common.h> #include <asm/pgtable.h> #include <asm/mach/map.h> -#include <mach/iomux-v1.h> + +#include "common.h" +#include "devices/devices-common.h" +#include "hardware.h" +#include "iomux-v1.h" /* MX27 memory map definition */ static struct map_desc imx27_io_desc[] __initdata = { @@ -81,6 +82,8 @@ static const struct resource imx27_audmux_res[] __initconst = { void __init imx27_soc_init(void) { + mxc_device_init(); + /* i.mx27 has the i.mx21 type gpio */ mxc_register_gpio("imx21-gpio", 0, MX27_GPIO1_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); mxc_register_gpio("imx21-gpio", 1, MX27_GPIO2_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); @@ -90,7 +93,8 @@ void __init imx27_soc_init(void) mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); pinctrl_provide_dummies(); - imx_add_imx_dma(); + imx_add_imx_dma("imx27-dma", MX27_DMA_BASE_ADDR, + MX27_INT_DMACH0, 0); /* No ERR irq */ /* imx27 has the imx21 type audmux */ platform_device_register_simple("imx21-audmux", 0, imx27_audmux_res, ARRAY_SIZE(imx27_audmux_res)); diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c index b5deb0554552..cefa047c4053 100644 --- a/arch/arm/mach-imx/mm-imx3.c +++ b/arch/arm/mach-imx/mm-imx3.c @@ -26,12 +26,11 @@ #include <asm/hardware/cache-l2x0.h> #include <asm/mach/map.h> -#include <mach/common.h> -#include <mach/devices-common.h> -#include <mach/hardware.h> -#include <mach/iomux-v3.h> - +#include "common.h" #include "crmregs-imx3.h" +#include "devices/devices-common.h" +#include "hardware.h" +#include "iomux-v3.h" void __iomem *mx3_ccm_base; @@ -175,6 +174,8 @@ void __init imx31_soc_init(void) imx3_init_l2x0(); + mxc_device_init(); + mxc_register_gpio("imx31-gpio", 0, MX31_GPIO1_BASE_ADDR, SZ_16K, MX31_INT_GPIO1, 0); mxc_register_gpio("imx31-gpio", 1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0); mxc_register_gpio("imx31-gpio", 2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0); @@ -271,6 +272,8 @@ void __init imx35_soc_init(void) imx3_init_l2x0(); + mxc_device_init(); + mxc_register_gpio("imx35-gpio", 0, MX35_GPIO1_BASE_ADDR, SZ_16K, MX35_INT_GPIO1, 0); mxc_register_gpio("imx35-gpio", 1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0); mxc_register_gpio("imx35-gpio", 2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0); diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c index acb0aadb4255..f92caf1b30ba 100644 --- a/arch/arm/mach-imx/mm-imx5.c +++ b/arch/arm/mach-imx/mm-imx5.c @@ -18,10 +18,10 @@ #include <asm/mach/map.h> -#include <mach/hardware.h> -#include <mach/common.h> -#include <mach/devices-common.h> -#include <mach/iomux-v3.h> +#include "common.h" +#include "devices/devices-common.h" +#include "hardware.h" +#include "iomux-v3.h" /* * Define the MX50 memory map. @@ -138,6 +138,8 @@ static const struct resource imx51_audmux_res[] __initconst = { void __init imx50_soc_init(void) { + mxc_device_init(); + /* i.mx50 has the i.mx35 type gpio */ mxc_register_gpio("imx35-gpio", 0, MX50_GPIO1_BASE_ADDR, SZ_16K, MX50_INT_GPIO1_LOW, MX50_INT_GPIO1_HIGH); mxc_register_gpio("imx35-gpio", 1, MX50_GPIO2_BASE_ADDR, SZ_16K, MX50_INT_GPIO2_LOW, MX50_INT_GPIO2_HIGH); @@ -153,6 +155,8 @@ void __init imx50_soc_init(void) void __init imx51_soc_init(void) { + mxc_device_init(); + /* i.mx51 has the i.mx35 type gpio */ mxc_register_gpio("imx35-gpio", 0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_INT_GPIO1_LOW, MX51_INT_GPIO1_HIGH); mxc_register_gpio("imx35-gpio", 1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_INT_GPIO2_LOW, MX51_INT_GPIO2_HIGH); diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/mach-imx/mx1.h index 45bd31cc34d6..45bd31cc34d6 100644 --- a/arch/arm/plat-mxc/include/mach/mx1.h +++ b/arch/arm/mach-imx/mx1.h diff --git a/arch/arm/plat-mxc/include/mach/mx21.h b/arch/arm/mach-imx/mx21.h index 468738aa997f..468738aa997f 100644 --- a/arch/arm/plat-mxc/include/mach/mx21.h +++ b/arch/arm/mach-imx/mx21.h diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/mach-imx/mx25.h index ec466400a200..ec466400a200 100644 --- a/arch/arm/plat-mxc/include/mach/mx25.h +++ b/arch/arm/mach-imx/mx25.h diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/mach-imx/mx27.h index e074616d54ca..e074616d54ca 100644 --- a/arch/arm/plat-mxc/include/mach/mx27.h +++ b/arch/arm/mach-imx/mx27.h diff --git a/arch/arm/plat-mxc/include/mach/mx2x.h b/arch/arm/mach-imx/mx2x.h index 11642f5b224c..11642f5b224c 100644 --- a/arch/arm/plat-mxc/include/mach/mx2x.h +++ b/arch/arm/mach-imx/mx2x.h diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/mach-imx/mx31.h index ee9b1f9215df..ee9b1f9215df 100644 --- a/arch/arm/plat-mxc/include/mach/mx31.h +++ b/arch/arm/mach-imx/mx31.h diff --git a/arch/arm/mach-imx/mx31lilly-db.c b/arch/arm/mach-imx/mx31lilly-db.c index 29e890f92055..d4361b80c5fb 100644 --- a/arch/arm/mach-imx/mx31lilly-db.c +++ b/arch/arm/mach-imx/mx31lilly-db.c @@ -30,12 +30,11 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <mach/hardware.h> -#include <mach/common.h> -#include <mach/iomux-mx3.h> -#include <mach/board-mx31lilly.h> - +#include "board-mx31lilly.h" +#include "common.h" #include "devices-imx31.h" +#include "hardware.h" +#include "iomux-mx3.h" /* * This file contains board-specific initialization routines for the diff --git a/arch/arm/mach-imx/mx31lite-db.c b/arch/arm/mach-imx/mx31lite-db.c index 83d17d9e0bc8..5a160b7e4fce 100644 --- a/arch/arm/mach-imx/mx31lite-db.c +++ b/arch/arm/mach-imx/mx31lite-db.c @@ -31,12 +31,11 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <mach/hardware.h> -#include <mach/common.h> -#include <mach/iomux-mx3.h> -#include <mach/board-mx31lite.h> - +#include "board-mx31lite.h" +#include "common.h" #include "devices-imx31.h" +#include "hardware.h" +#include "iomux-mx3.h" /* * This file contains board-specific initialization routines for the diff --git a/arch/arm/mach-imx/mx31moboard-devboard.c b/arch/arm/mach-imx/mx31moboard-devboard.c index cc285e507286..52d5b1574721 100644 --- a/arch/arm/mach-imx/mx31moboard-devboard.c +++ b/arch/arm/mach-imx/mx31moboard-devboard.c @@ -22,12 +22,11 @@ #include <linux/usb/otg.h> -#include <mach/common.h> -#include <mach/iomux-mx3.h> -#include <mach/hardware.h> -#include <mach/ulpi.h> - +#include "common.h" #include "devices-imx31.h" +#include "hardware.h" +#include "iomux-mx3.h" +#include "ulpi.h" static unsigned int devboard_pins[] = { /* UART1 */ diff --git a/arch/arm/mach-imx/mx31moboard-marxbot.c b/arch/arm/mach-imx/mx31moboard-marxbot.c index 135c90e3a45f..a4f43e90f3c1 100644 --- a/arch/arm/mach-imx/mx31moboard-marxbot.c +++ b/arch/arm/mach-imx/mx31moboard-marxbot.c @@ -24,14 +24,13 @@ #include <linux/usb/otg.h> -#include <mach/common.h> -#include <mach/hardware.h> -#include <mach/iomux-mx3.h> -#include <mach/ulpi.h> - #include <media/soc_camera.h> +#include "common.h" #include "devices-imx31.h" +#include "hardware.h" +#include "iomux-mx3.h" +#include "ulpi.h" static unsigned int marxbot_pins[] = { /* SDHC2 */ diff --git a/arch/arm/mach-imx/mx31moboard-smartbot.c b/arch/arm/mach-imx/mx31moboard-smartbot.c index fabb801e7994..04ae45dbfaa7 100644 --- a/arch/arm/mach-imx/mx31moboard-smartbot.c +++ b/arch/arm/mach-imx/mx31moboard-smartbot.c @@ -23,15 +23,14 @@ #include <linux/usb/otg.h> #include <linux/usb/ulpi.h> -#include <mach/common.h> -#include <mach/hardware.h> -#include <mach/iomux-mx3.h> -#include <mach/board-mx31moboard.h> -#include <mach/ulpi.h> - #include <media/soc_camera.h> +#include "board-mx31moboard.h" +#include "common.h" #include "devices-imx31.h" +#include "hardware.h" +#include "iomux-mx3.h" +#include "ulpi.h" static unsigned int smartbot_pins[] = { /* UART1 */ diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/mach-imx/mx35.h index 2af5d3a699c7..2af5d3a699c7 100644 --- a/arch/arm/plat-mxc/include/mach/mx35.h +++ b/arch/arm/mach-imx/mx35.h diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/mach-imx/mx3x.h index 96fb4fbc8ad7..96fb4fbc8ad7 100644 --- a/arch/arm/plat-mxc/include/mach/mx3x.h +++ b/arch/arm/mach-imx/mx3x.h diff --git a/arch/arm/plat-mxc/include/mach/mx50.h b/arch/arm/mach-imx/mx50.h index 09ac19c1570c..09ac19c1570c 100644 --- a/arch/arm/plat-mxc/include/mach/mx50.h +++ b/arch/arm/mach-imx/mx50.h diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/mach-imx/mx51.h index af844f76261a..af844f76261a 100644 --- a/arch/arm/plat-mxc/include/mach/mx51.h +++ b/arch/arm/mach-imx/mx51.h diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/mach-imx/mx53.h index f829d1c22501..f829d1c22501 100644 --- a/arch/arm/plat-mxc/include/mach/mx53.h +++ b/arch/arm/mach-imx/mx53.h diff --git a/arch/arm/plat-mxc/include/mach/mx6q.h b/arch/arm/mach-imx/mx6q.h index f7e7dbac8f4b..f7e7dbac8f4b 100644 --- a/arch/arm/plat-mxc/include/mach/mx6q.h +++ b/arch/arm/mach-imx/mx6q.h diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/mach-imx/mxc.h index d78298366a91..d78298366a91 100644 --- a/arch/arm/plat-mxc/include/mach/mxc.h +++ b/arch/arm/mach-imx/mxc.h diff --git a/arch/arm/mach-imx/pcm970-baseboard.c b/arch/arm/mach-imx/pcm970-baseboard.c index 9917e2ff51da..51c608234089 100644 --- a/arch/arm/mach-imx/pcm970-baseboard.c +++ b/arch/arm/mach-imx/pcm970-baseboard.c @@ -23,11 +23,10 @@ #include <asm/mach/arch.h> -#include <mach/common.h> -#include <mach/iomux-mx27.h> -#include <mach/hardware.h> - +#include "common.h" #include "devices-imx27.h" +#include "hardware.h" +#include "iomux-mx27.h" static const int pcm970_pins[] __initconst = { /* SDHC */ diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c index 2ac43e1a2dfd..3777b805b76b 100644 --- a/arch/arm/mach-imx/platsmp.c +++ b/arch/arm/mach-imx/platsmp.c @@ -16,8 +16,9 @@ #include <asm/smp_scu.h> #include <asm/hardware/gic.h> #include <asm/mach/map.h> -#include <mach/common.h> -#include <mach/hardware.h> + +#include "common.h" +#include "hardware.h" static void __iomem *scu_base; diff --git a/arch/arm/mach-imx/pm-imx27.c b/arch/arm/mach-imx/pm-imx27.c index 6fcffa7db978..56d02d064fbf 100644 --- a/arch/arm/mach-imx/pm-imx27.c +++ b/arch/arm/mach-imx/pm-imx27.c @@ -10,7 +10,8 @@ #include <linux/kernel.h> #include <linux/suspend.h> #include <linux/io.h> -#include <mach/hardware.h> + +#include "hardware.h" static int mx27_suspend_enter(suspend_state_t state) { diff --git a/arch/arm/mach-imx/pm-imx3.c b/arch/arm/mach-imx/pm-imx3.c index 822103bdb709..6a07006ff0f4 100644 --- a/arch/arm/mach-imx/pm-imx3.c +++ b/arch/arm/mach-imx/pm-imx3.c @@ -9,10 +9,11 @@ * http://www.gnu.org/copyleft/gpl.html */ #include <linux/io.h> -#include <mach/common.h> -#include <mach/hardware.h> -#include <mach/devices-common.h> + +#include "common.h" #include "crmregs-imx3.h" +#include "devices/devices-common.h" +#include "hardware.h" /* * Set cpu low power mode before WFI instruction. This function is called diff --git a/arch/arm/mach-imx/pm-imx5.c b/arch/arm/mach-imx/pm-imx5.c index 19621ed1ffa5..2e063c2deb9e 100644 --- a/arch/arm/mach-imx/pm-imx5.c +++ b/arch/arm/mach-imx/pm-imx5.c @@ -16,10 +16,11 @@ #include <asm/cacheflush.h> #include <asm/system_misc.h> #include <asm/tlbflush.h> -#include <mach/common.h> -#include <mach/cpuidle.h> -#include <mach/hardware.h> + +#include "common.h" +#include "cpuidle.h" #include "crm-regs-imx5.h" +#include "hardware.h" /* * The WAIT_UNCLOCKED_POWER_OFF state only requires <= 500ns to exit. diff --git a/arch/arm/mach-imx/pm-imx6q.c b/arch/arm/mach-imx/pm-imx6q.c index f7b0c2b1b905..a17543da602d 100644 --- a/arch/arm/mach-imx/pm-imx6q.c +++ b/arch/arm/mach-imx/pm-imx6q.c @@ -18,8 +18,9 @@ #include <asm/proc-fns.h> #include <asm/suspend.h> #include <asm/hardware/cache-l2x0.h> -#include <mach/common.h> -#include <mach/hardware.h> + +#include "common.h" +#include "hardware.h" extern unsigned long phys_l2x0_saved_regs; diff --git a/arch/arm/plat-mxc/ssi-fiq-ksym.c b/arch/arm/mach-imx/ssi-fiq-ksym.c index 792090f9a032..792090f9a032 100644 --- a/arch/arm/plat-mxc/ssi-fiq-ksym.c +++ b/arch/arm/mach-imx/ssi-fiq-ksym.c diff --git a/arch/arm/plat-mxc/ssi-fiq.S b/arch/arm/mach-imx/ssi-fiq.S index a8b93c5f29b5..a8b93c5f29b5 100644 --- a/arch/arm/plat-mxc/ssi-fiq.S +++ b/arch/arm/mach-imx/ssi-fiq.S diff --git a/arch/arm/plat-mxc/system.c b/arch/arm/mach-imx/system.c index 3da78cfc5a94..695e0d73bf85 100644 --- a/arch/arm/plat-mxc/system.c +++ b/arch/arm/mach-imx/system.c @@ -22,12 +22,13 @@ #include <linux/err.h> #include <linux/delay.h> -#include <mach/hardware.h> -#include <mach/common.h> #include <asm/system_misc.h> #include <asm/proc-fns.h> #include <asm/mach-types.h> +#include "common.h" +#include "hardware.h" + static void __iomem *wdog_base; /* diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/mach-imx/time.c index a17abcf98325..f017302f6d09 100644 --- a/arch/arm/plat-mxc/time.c +++ b/arch/arm/mach-imx/time.c @@ -27,10 +27,11 @@ #include <linux/clk.h> #include <linux/err.h> -#include <mach/hardware.h> #include <asm/sched_clock.h> #include <asm/mach/time.h> -#include <mach/common.h> + +#include "common.h" +#include "hardware.h" /* * There are 2 versions of the timer hardware on Freescale MXC hardware. diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/mach-imx/tzic.c index 3ed1adbc09f8..9721161f208f 100644 --- a/arch/arm/plat-mxc/tzic.c +++ b/arch/arm/mach-imx/tzic.c @@ -21,10 +21,8 @@ #include <asm/mach/irq.h> #include <asm/exception.h> -#include <mach/hardware.h> -#include <mach/common.h> -#include <mach/irqs.h> - +#include "common.h" +#include "hardware.h" #include "irq-common.h" /* diff --git a/arch/arm/plat-mxc/ulpi.c b/arch/arm/mach-imx/ulpi.c index d2963427184f..0f051957d10c 100644 --- a/arch/arm/plat-mxc/ulpi.c +++ b/arch/arm/mach-imx/ulpi.c @@ -24,7 +24,7 @@ #include <linux/usb/otg.h> #include <linux/usb/ulpi.h> -#include <mach/ulpi.h> +#include "ulpi.h" /* ULPIVIEW register bits */ #define ULPIVW_WU (1 << 31) /* Wakeup */ diff --git a/arch/arm/plat-mxc/include/mach/ulpi.h b/arch/arm/mach-imx/ulpi.h index 42bdaca6d7d9..42bdaca6d7d9 100644 --- a/arch/arm/plat-mxc/include/mach/ulpi.h +++ b/arch/arm/mach-imx/ulpi.h diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h index fc8c9449eba8..b53e0854422f 100644 --- a/arch/arm/mach-omap1/common.h +++ b/arch/arm/mach-omap1/common.h @@ -93,4 +93,6 @@ extern int ocpi_enable(void); static inline int ocpi_enable(void) { return 0; } #endif +extern u32 omap1_get_reset_sources(void); + #endif /* __ARCH_ARM_MACH_OMAP1_COMMON_H */ diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index 7155ed8b97f8..0af635205e8a 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c @@ -17,6 +17,8 @@ #include <linux/platform_device.h> #include <linux/spi/spi.h> +#include <linux/platform_data/omap-wd-timer.h> + #include <asm/mach/map.h> #include <mach/tc.h> @@ -447,18 +449,31 @@ static struct resource wdt_resources[] = { }; static struct platform_device omap_wdt_device = { - .name = "omap_wdt", - .id = -1, + .name = "omap_wdt", + .id = -1, .num_resources = ARRAY_SIZE(wdt_resources), .resource = wdt_resources, }; static int __init omap_init_wdt(void) { + struct omap_wd_timer_platform_data pdata; + int ret; + if (!cpu_is_omap16xx()) return -ENODEV; - return platform_device_register(&omap_wdt_device); + pdata.read_reset_sources = omap1_get_reset_sources; + + ret = platform_device_register(&omap_wdt_device); + if (!ret) { + ret = platform_device_add_data(&omap_wdt_device, &pdata, + sizeof(pdata)); + if (ret) + platform_device_del(&omap_wdt_device); + } + + return ret; } subsys_initcall(omap_init_wdt); #endif diff --git a/arch/arm/mach-omap1/reset.c b/arch/arm/mach-omap1/reset.c index b17709103866..5eebd7e889d0 100644 --- a/arch/arm/mach-omap1/reset.c +++ b/arch/arm/mach-omap1/reset.c @@ -4,12 +4,24 @@ #include <linux/kernel.h> #include <linux/io.h> -#include <plat/prcm.h> - #include <mach/hardware.h> +#include "iomap.h" #include "common.h" +/* ARM_SYSST bit shifts related to SoC reset sources */ +#define ARM_SYSST_POR_SHIFT 5 +#define ARM_SYSST_EXT_RST_SHIFT 4 +#define ARM_SYSST_ARM_WDRST_SHIFT 2 +#define ARM_SYSST_GLOB_SWRST_SHIFT 1 + +/* Standardized reset source bits (across all OMAP SoCs) */ +#define OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT 0 +#define OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT 1 +#define OMAP_MPU_WD_RST_SRC_ID_SHIFT 3 +#define OMAP_EXTWARM_RST_SRC_ID_SHIFT 5 + + void omap1_restart(char mode, const char *cmd) { /* @@ -23,3 +35,28 @@ void omap1_restart(char mode, const char *cmd) omap_writew(1, ARM_RSTCT1); } + +/** + * omap1_get_reset_sources - return the source of the SoC's last reset + * + * Returns bits that represent the last reset source for the SoC. The + * format is standardized across OMAPs for use by the OMAP watchdog. + */ +u32 omap1_get_reset_sources(void) +{ + u32 ret = 0; + u16 rs; + + rs = __raw_readw(OMAP1_IO_ADDRESS(ARM_SYSST)); + + if (rs & (1 << ARM_SYSST_POR_SHIFT)) + ret |= 1 << OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT; + if (rs & (1 << ARM_SYSST_EXT_RST_SHIFT)) + ret |= 1 << OMAP_EXTWARM_RST_SRC_ID_SHIFT; + if (rs & (1 << ARM_SYSST_ARM_WDRST_SHIFT)) + ret |= 1 << OMAP_MPU_WD_RST_SRC_ID_SHIFT; + if (rs & (1 << ARM_SYSST_GLOB_SWRST_SHIFT)) + ret |= 1 << OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT; + + return ret; +} diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index ada6006ab2f3..dd76ff77760b 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -7,28 +7,34 @@ obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \ common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \ omap_device.o sram.o -# INTCPS IP block support - XXX should be moved to drivers/ -obj-$(CONFIG_ARCH_OMAP2) += irq.o -obj-$(CONFIG_ARCH_OMAP3) += irq.o -obj-$(CONFIG_SOC_AM33XX) += irq.o - -# Secure monitor API support -obj-$(CONFIG_ARCH_OMAP3) += omap-smc.o omap-secure.o -obj-$(CONFIG_ARCH_OMAP4) += omap-smc.o omap-secure.o -obj-$(CONFIG_SOC_OMAP5) += omap-smc.o omap-secure.o +omap-2-3-common = irq.o +hwmod-common = omap_hwmod.o \ + omap_hwmod_common_data.o +clock-common = clock.o clock_common_data.o \ + clkt_dpll.o clkt_clksel.o +secure-common = omap-smc.o omap-secure.o + +obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common) +obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common) +obj-$(CONFIG_ARCH_OMAP4) += prm44xx.o $(hwmod-common) $(secure-common) +obj-$(CONFIG_SOC_AM33XX) += irq.o $(hwmod-common) +obj-$(CONFIG_SOC_OMAP5) += prm44xx.o $(hwmod-common) $(secure-common) ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),) obj-y += mcbsp.o endif -obj-$(CONFIG_TWL4030_CORE) += omap_twl.o +obj-$(CONFIG_TWL4030_CORE) += omap_twl.o +obj-$(CONFIG_SOC_HAS_OMAP2_SDRC) += sdrc.o # SMP support ONLY available for OMAP4 obj-$(CONFIG_SMP) += omap-smp.o omap-headsmp.o obj-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o -obj-$(CONFIG_ARCH_OMAP4) += omap4-common.o omap-wakeupgen.o -obj-$(CONFIG_SOC_OMAP5) += omap4-common.o omap-wakeupgen.o +omap-4-5-common = omap4-common.o omap-wakeupgen.o \ + sleep44xx.o +obj-$(CONFIG_ARCH_OMAP4) += $(omap-4-5-common) +obj-$(CONFIG_SOC_OMAP5) += $(omap-4-5-common) plus_sec := $(call as-instr,.arch_extension sec,+sec) AFLAGS_omap-headsmp.o :=-Wa,-march=armv7-a$(plus_sec) @@ -44,6 +50,11 @@ AFLAGS_sram242x.o :=-Wa,-march=armv6 AFLAGS_sram243x.o :=-Wa,-march=armv6 AFLAGS_sram34xx.o :=-Wa,-march=armv7-a +# Restart code (OMAP4/5 currently in omap4-common.c) +obj-$(CONFIG_SOC_OMAP2420) += omap2-restart.o +obj-$(CONFIG_SOC_OMAP2430) += omap2-restart.o +obj-$(CONFIG_ARCH_OMAP3) += omap3-restart.o + # Pin multiplexing obj-$(CONFIG_SOC_OMAP2420) += mux2420.o obj-$(CONFIG_SOC_OMAP2430) += mux2430.o @@ -53,7 +64,6 @@ obj-$(CONFIG_ARCH_OMAP4) += mux44xx.o # SMS/SDRC obj-$(CONFIG_ARCH_OMAP2) += sdrc2xxx.o # obj-$(CONFIG_ARCH_OMAP3) += sdrc3xxx.o -obj-$(CONFIG_SOC_HAS_OMAP2_SDRC) += sdrc.o # OPP table initialization ifeq ($(CONFIG_PM_OPP),y) @@ -66,15 +76,15 @@ endif obj-$(CONFIG_OMAP_PM_NOOP) += omap-pm-noop.o ifeq ($(CONFIG_PM),y) -obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o sleep24xx.o +obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o +obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o omap-mpuss-lowpower.o -obj-$(CONFIG_ARCH_OMAP4) += sleep44xx.o -obj-$(CONFIG_SOC_OMAP5) += omap-mpuss-lowpower.o sleep44xx.o +obj-$(CONFIG_SOC_OMAP5) += omap-mpuss-lowpower.o obj-$(CONFIG_PM_DEBUG) += pm-debug.o obj-$(CONFIG_POWER_AVS_OMAP) += sr_device.o -obj-$(CONFIG_POWER_AVS_OMAP_CLASS3) += smartreflex-class3.o +obj-$(CONFIG_POWER_AVS_OMAP_CLASS3) += smartreflex-class3.o AFLAGS_sleep24xx.o :=-Wa,-march=armv6 AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a$(plus_sec) @@ -86,76 +96,82 @@ endif endif ifeq ($(CONFIG_CPU_IDLE),y) -obj-$(CONFIG_ARCH_OMAP3) += cpuidle34xx.o -obj-$(CONFIG_ARCH_OMAP4) += cpuidle44xx.o +obj-$(CONFIG_ARCH_OMAP3) += cpuidle34xx.o +obj-$(CONFIG_ARCH_OMAP4) += cpuidle44xx.o endif # PRCM -obj-y += prcm.o prm_common.o -obj-$(CONFIG_ARCH_OMAP2) += cm2xxx_3xxx.o prm2xxx_3xxx.o -obj-$(CONFIG_ARCH_OMAP3) += cm2xxx_3xxx.o prm2xxx_3xxx.o +obj-y += prm_common.o cm_common.o +obj-$(CONFIG_ARCH_OMAP2) += prm2xxx_3xxx.o prm2xxx.o cm2xxx.o +obj-$(CONFIG_ARCH_OMAP3) += prm2xxx_3xxx.o prm3xxx.o cm3xxx.o obj-$(CONFIG_ARCH_OMAP3) += vc3xxx_data.o vp3xxx_data.o obj-$(CONFIG_SOC_AM33XX) += prm33xx.o cm33xx.o omap-prcm-4-5-common = cminst44xx.o cm44xx.o prm44xx.o \ prcm_mpu44xx.o prminst44xx.o \ - vc44xx_data.o vp44xx_data.o \ - prm44xx.o + vc44xx_data.o vp44xx_data.o obj-$(CONFIG_ARCH_OMAP4) += $(omap-prcm-4-5-common) obj-$(CONFIG_SOC_OMAP5) += $(omap-prcm-4-5-common) # OMAP voltage domains -obj-y += voltage.o vc.o vp.o +voltagedomain-common := voltage.o vc.o vp.o +obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) obj-$(CONFIG_ARCH_OMAP2) += voltagedomains2xxx_data.o +obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) obj-$(CONFIG_ARCH_OMAP3) += voltagedomains3xxx_data.o +obj-$(CONFIG_ARCH_OMAP4) += $(voltagedomain-common) obj-$(CONFIG_ARCH_OMAP4) += voltagedomains44xx_data.o -obj-$(CONFIG_SOC_AM33XX) += voltagedomains33xx_data.o +obj-$(CONFIG_SOC_AM33XX) += $(voltagedomain-common) +obj-$(CONFIG_SOC_AM33XX) += voltagedomains33xx_data.o +obj-$(CONFIG_SOC_OMAP5) += $(voltagedomain-common) # OMAP powerdomain framework -obj-y += powerdomain.o powerdomain-common.o +powerdomain-common += powerdomain.o powerdomain-common.o +obj-$(CONFIG_ARCH_OMAP2) += $(powerdomain-common) obj-$(CONFIG_ARCH_OMAP2) += powerdomains2xxx_data.o -obj-$(CONFIG_ARCH_OMAP2) += powerdomain2xxx_3xxx.o obj-$(CONFIG_ARCH_OMAP2) += powerdomains2xxx_3xxx_data.o -obj-$(CONFIG_ARCH_OMAP3) += powerdomain2xxx_3xxx.o +obj-$(CONFIG_ARCH_OMAP3) += $(powerdomain-common) obj-$(CONFIG_ARCH_OMAP3) += powerdomains3xxx_data.o obj-$(CONFIG_ARCH_OMAP3) += powerdomains2xxx_3xxx_data.o -obj-$(CONFIG_ARCH_OMAP4) += powerdomain44xx.o +obj-$(CONFIG_ARCH_OMAP4) += $(powerdomain-common) obj-$(CONFIG_ARCH_OMAP4) += powerdomains44xx_data.o -obj-$(CONFIG_SOC_AM33XX) += powerdomain33xx.o +obj-$(CONFIG_SOC_AM33XX) += $(powerdomain-common) obj-$(CONFIG_SOC_AM33XX) += powerdomains33xx_data.o -obj-$(CONFIG_SOC_OMAP5) += powerdomain44xx.o +obj-$(CONFIG_SOC_OMAP5) += $(powerdomain-common) # PRCM clockdomain control -obj-y += clockdomain.o -obj-$(CONFIG_ARCH_OMAP2) += clockdomain2xxx_3xxx.o +clockdomain-common += clockdomain.o +obj-$(CONFIG_ARCH_OMAP2) += $(clockdomain-common) obj-$(CONFIG_ARCH_OMAP2) += clockdomains2xxx_3xxx_data.o obj-$(CONFIG_SOC_OMAP2420) += clockdomains2420_data.o obj-$(CONFIG_SOC_OMAP2430) += clockdomains2430_data.o -obj-$(CONFIG_ARCH_OMAP3) += clockdomain2xxx_3xxx.o +obj-$(CONFIG_ARCH_OMAP3) += $(clockdomain-common) obj-$(CONFIG_ARCH_OMAP3) += clockdomains2xxx_3xxx_data.o obj-$(CONFIG_ARCH_OMAP3) += clockdomains3xxx_data.o -obj-$(CONFIG_ARCH_OMAP4) += clockdomain44xx.o +obj-$(CONFIG_ARCH_OMAP4) += $(clockdomain-common) obj-$(CONFIG_ARCH_OMAP4) += clockdomains44xx_data.o -obj-$(CONFIG_SOC_AM33XX) += clockdomain33xx.o +obj-$(CONFIG_SOC_AM33XX) += $(clockdomain-common) obj-$(CONFIG_SOC_AM33XX) += clockdomains33xx_data.o -obj-$(CONFIG_SOC_OMAP5) += clockdomain44xx.o +obj-$(CONFIG_SOC_OMAP5) += $(clockdomain-common) # Clock framework -obj-y += clock.o clock_common_data.o \ - clkt_dpll.o clkt_clksel.o -obj-$(CONFIG_ARCH_OMAP2) += clock2xxx.o -obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_dpllcore.o clkt2xxx_sys.o +obj-$(CONFIG_ARCH_OMAP2) += $(clock-common) clock2xxx.o +obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_sys.o +obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_dpllcore.o obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_virt_prcm_set.o obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_apll.o clkt2xxx_osc.o obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_dpll.o clkt_iclk.o obj-$(CONFIG_SOC_OMAP2420) += clock2420_data.o obj-$(CONFIG_SOC_OMAP2430) += clock2430.o clock2430_data.o -obj-$(CONFIG_ARCH_OMAP3) += clock3xxx.o +obj-$(CONFIG_ARCH_OMAP3) += $(clock-common) clock3xxx.o obj-$(CONFIG_ARCH_OMAP3) += clock34xx.o clkt34xx_dpll3m2.o -obj-$(CONFIG_ARCH_OMAP3) += clock3517.o clock36xx.o clkt_iclk.o +obj-$(CONFIG_ARCH_OMAP3) += clock3517.o clock36xx.o obj-$(CONFIG_ARCH_OMAP3) += dpll3xxx.o clock3xxx_data.o -obj-$(CONFIG_ARCH_OMAP4) += clock44xx_data.o +obj-$(CONFIG_ARCH_OMAP3) += clkt_iclk.o +obj-$(CONFIG_ARCH_OMAP4) += $(clock-common) clock44xx_data.o obj-$(CONFIG_ARCH_OMAP4) += dpll3xxx.o dpll44xx.o -obj-$(CONFIG_SOC_AM33XX) += dpll3xxx.o clock33xx_data.o +obj-$(CONFIG_SOC_AM33XX) += $(clock-common) dpll3xxx.o +obj-$(CONFIG_SOC_AM33XX) += clock33xx_data.o +obj-$(CONFIG_SOC_OMAP5) += $(clock-common) obj-$(CONFIG_SOC_OMAP5) += dpll3xxx.o dpll44xx.o # OMAP2 clock rate set data (old "OPP" data) @@ -163,7 +179,6 @@ obj-$(CONFIG_SOC_OMAP2420) += opp2420_data.o obj-$(CONFIG_SOC_OMAP2430) += opp2430_data.o # hwmod data -obj-y += omap_hwmod_common_data.o obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_ipblock_data.o obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_3xxx_ipblock_data.o obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_interconnect_data.o @@ -209,10 +224,10 @@ obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o obj-$(CONFIG_MACH_OMAP_2430SDP) += board-2430sdp.o obj-$(CONFIG_MACH_OMAP_APOLLON) += board-apollon.o obj-$(CONFIG_MACH_OMAP3_BEAGLE) += board-omap3beagle.o -obj-$(CONFIG_MACH_DEVKIT8000) += board-devkit8000.o +obj-$(CONFIG_MACH_DEVKIT8000) += board-devkit8000.o obj-$(CONFIG_MACH_OMAP_LDP) += board-ldp.o -obj-$(CONFIG_MACH_OMAP3530_LV_SOM) += board-omap3logic.o -obj-$(CONFIG_MACH_OMAP3_TORPEDO) += board-omap3logic.o +obj-$(CONFIG_MACH_OMAP3530_LV_SOM) += board-omap3logic.o +obj-$(CONFIG_MACH_OMAP3_TORPEDO) += board-omap3logic.o obj-$(CONFIG_MACH_ENCORE) += board-omap3encore.o obj-$(CONFIG_MACH_OVERO) += board-overo.o obj-$(CONFIG_MACH_OMAP3EVM) += board-omap3evm.o diff --git a/arch/arm/mach-omap2/am33xx.h b/arch/arm/mach-omap2/am33xx.h index 06c19bb7bca6..43296c1af9ee 100644 --- a/arch/arm/mach-omap2/am33xx.h +++ b/arch/arm/mach-omap2/am33xx.h @@ -21,5 +21,6 @@ #define AM33XX_SCM_BASE 0x44E10000 #define AM33XX_CTRL_BASE AM33XX_SCM_BASE #define AM33XX_PRCM_BASE 0x44E00000 +#define AM33XX_TAP_BASE (AM33XX_CTRL_BASE + 0x3FC) #endif /* __ASM_ARCH_AM33XX_H */ diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index d1c01625fe5a..4815ea6f8f5d 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c @@ -285,5 +285,5 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") .init_machine = omap_2430sdp_init, .init_late = omap2430_init_late, .timer = &omap2_timer, - .restart = omap_prcm_restart, + .restart = omap2xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index 79fd9048fd79..6601754f9512 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c @@ -597,5 +597,5 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board") .init_machine = omap_3430sdp_init, .init_late = omap3430_init_late, .timer = &omap3_timer, - .restart = omap_prcm_restart, + .restart = omap3xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c index 81871b1c735c..050aaa771254 100644 --- a/arch/arm/mach-omap2/board-3630sdp.c +++ b/arch/arm/mach-omap2/board-3630sdp.c @@ -212,5 +212,5 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board") .init_machine = omap_sdp_init, .init_late = omap3630_init_late, .timer = &omap3_timer, - .restart = omap_prcm_restart, + .restart = omap3xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index fd80d976872d..85dfa71e0dc6 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c @@ -881,5 +881,5 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board") .init_machine = omap_4430sdp_init, .init_late = omap4430_init_late, .timer = &omap4_timer, - .restart = omap_prcm_restart, + .restart = omap44xx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c index 603503c587b7..51b96a1206d1 100644 --- a/arch/arm/mach-omap2/board-am3517crane.c +++ b/arch/arm/mach-omap2/board-am3517crane.c @@ -93,5 +93,5 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD") .init_machine = am3517_crane_init, .init_late = am35xx_init_late, .timer = &omap3_timer, - .restart = omap_prcm_restart, + .restart = omap3xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c index 96d6c5ab5d4c..4be58fd071f6 100644 --- a/arch/arm/mach-omap2/board-am3517evm.c +++ b/arch/arm/mach-omap2/board-am3517evm.c @@ -393,5 +393,5 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") .init_machine = am3517_evm_init, .init_late = am35xx_init_late, .timer = &omap3_timer, - .restart = omap_prcm_restart, + .restart = omap3xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index 64cf1bde0f3b..5d0a61f54165 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c @@ -338,5 +338,5 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon") .init_machine = omap_apollon_init, .init_late = omap2420_init_late, .timer = &omap2_timer, - .restart = omap_prcm_restart, + .restart = omap2xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c index a8cad2237a2a..c8e37dc00892 100644 --- a/arch/arm/mach-omap2/board-cm-t35.c +++ b/arch/arm/mach-omap2/board-cm-t35.c @@ -751,18 +751,18 @@ MACHINE_START(CM_T35, "Compulab CM-T35") .init_machine = cm_t35_init, .init_late = omap35xx_init_late, .timer = &omap3_timer, - .restart = omap_prcm_restart, + .restart = omap3xxx_restart, MACHINE_END MACHINE_START(CM_T3730, "Compulab CM-T3730") - .atag_offset = 0x100, - .reserve = omap_reserve, - .map_io = omap3_map_io, - .init_early = omap3630_init_early, - .init_irq = omap3_init_irq, + .atag_offset = 0x100, + .reserve = omap_reserve, + .map_io = omap3_map_io, + .init_early = omap3630_init_early, + .init_irq = omap3_init_irq, .handle_irq = omap3_intc_handle_irq, - .init_machine = cm_t3730_init, + .init_machine = cm_t3730_init, .init_late = omap3630_init_late, - .timer = &omap3_timer, - .restart = omap_prcm_restart, + .timer = &omap3_timer, + .restart = omap3xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c index 278664731d2c..699caec8f9e2 100644 --- a/arch/arm/mach-omap2/board-cm-t3517.c +++ b/arch/arm/mach-omap2/board-cm-t3517.c @@ -298,5 +298,5 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517") .init_machine = cm_t3517_init, .init_late = am35xx_init_late, .timer = &omap3_timer, - .restart = omap_prcm_restart, + .restart = omap3xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c index 933479e36737..7667eb749522 100644 --- a/arch/arm/mach-omap2/board-devkit8000.c +++ b/arch/arm/mach-omap2/board-devkit8000.c @@ -643,5 +643,5 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000") .init_machine = devkit8000_init, .init_late = omap35xx_init_late, .timer = &omap3_secure_timer, - .restart = omap_prcm_restart, + .restart = omap3xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 601ecdfb1cf9..475e14f07216 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -57,7 +57,7 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)") .init_machine = omap_generic_init, .timer = &omap2_timer, .dt_compat = omap242x_boards_compat, - .restart = omap_prcm_restart, + .restart = omap2xxx_restart, MACHINE_END #endif @@ -76,7 +76,7 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)") .init_machine = omap_generic_init, .timer = &omap2_timer, .dt_compat = omap243x_boards_compat, - .restart = omap_prcm_restart, + .restart = omap2xxx_restart, MACHINE_END #endif @@ -95,7 +95,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") .init_machine = omap_generic_init, .timer = &omap3_timer, .dt_compat = omap3_boards_compat, - .restart = omap_prcm_restart, + .restart = omap3xxx_restart, MACHINE_END #endif @@ -134,7 +134,7 @@ DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)") .init_late = omap4430_init_late, .timer = &omap4_timer, .dt_compat = omap4_boards_compat, - .restart = omap_prcm_restart, + .restart = omap44xx_restart, MACHINE_END #endif @@ -154,6 +154,6 @@ DT_MACHINE_START(OMAP5_DT, "Generic OMAP5 (Flattened Device Tree)") .init_machine = omap_generic_init, .timer = &omap5_timer, .dt_compat = omap5_boards_compat, - .restart = omap_prcm_restart, + .restart = omap44xx_restart, MACHINE_END #endif diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index 8668c72ee810..b626dbe6f7bc 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c @@ -386,5 +386,5 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board") .init_machine = omap_h4_init, .init_late = omap2420_init_late, .timer = &omap2_timer, - .restart = omap_prcm_restart, + .restart = omap2xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c index dbc705ac4334..cea5d5292628 100644 --- a/arch/arm/mach-omap2/board-igep0020.c +++ b/arch/arm/mach-omap2/board-igep0020.c @@ -651,7 +651,7 @@ MACHINE_START(IGEP0020, "IGEP v2 board") .init_machine = igep_init, .init_late = omap35xx_init_late, .timer = &omap3_timer, - .restart = omap_prcm_restart, + .restart = omap3xxx_restart, MACHINE_END MACHINE_START(IGEP0030, "IGEP OMAP3 module") @@ -664,5 +664,5 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module") .init_machine = igep_init, .init_late = omap35xx_init_late, .timer = &omap3_timer, - .restart = omap_prcm_restart, + .restart = omap3xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index 1164b1061038..0869f4f3d3e1 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c @@ -436,5 +436,5 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board") .init_machine = omap_ldp_init, .init_late = omap3430_init_late, .timer = &omap3_timer, - .restart = omap_prcm_restart, + .restart = omap3xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c index e3efcb88cb3b..a4e167c55c1d 100644 --- a/arch/arm/mach-omap2/board-n8x0.c +++ b/arch/arm/mach-omap2/board-n8x0.c @@ -690,7 +690,7 @@ MACHINE_START(NOKIA_N800, "Nokia N800") .init_machine = n8x0_init_machine, .init_late = omap2420_init_late, .timer = &omap2_timer, - .restart = omap_prcm_restart, + .restart = omap2xxx_restart, MACHINE_END MACHINE_START(NOKIA_N810, "Nokia N810") @@ -703,7 +703,7 @@ MACHINE_START(NOKIA_N810, "Nokia N810") .init_machine = n8x0_init_machine, .init_late = omap2420_init_late, .timer = &omap2_timer, - .restart = omap_prcm_restart, + .restart = omap2xxx_restart, MACHINE_END MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") @@ -716,5 +716,5 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") .init_machine = n8x0_init_machine, .init_late = omap2420_init_late, .timer = &omap2_timer, - .restart = omap_prcm_restart, + .restart = omap2xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 5a3800da903f..22c483d5dfa8 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -545,5 +545,5 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") .init_machine = omap3_beagle_init, .init_late = omap3_init_late, .timer = &omap3_secure_timer, - .restart = omap_prcm_restart, + .restart = omap3xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index 3c0b9a90f3b3..54647d6286b4 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -757,5 +757,5 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM") .init_machine = omap3_evm_init, .init_late = omap35xx_init_late, .timer = &omap3_timer, - .restart = omap_prcm_restart, + .restart = omap3xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c index e84e2a875378..2a065ba6eb58 100644 --- a/arch/arm/mach-omap2/board-omap3logic.c +++ b/arch/arm/mach-omap2/board-omap3logic.c @@ -232,7 +232,7 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board") .init_machine = omap3logic_init, .init_late = omap35xx_init_late, .timer = &omap3_timer, - .restart = omap_prcm_restart, + .restart = omap3xxx_restart, MACHINE_END MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") @@ -245,5 +245,5 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") .init_machine = omap3logic_init, .init_late = omap35xx_init_late, .timer = &omap3_timer, - .restart = omap_prcm_restart, + .restart = omap3xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index ce31bd329f38..a53a6683c1b8 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c @@ -619,5 +619,5 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console") .init_machine = omap3pandora_init, .init_late = omap35xx_init_late, .timer = &omap3_timer, - .restart = omap_prcm_restart, + .restart = omap3xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c index ba1124538b9c..d8638b3b4f94 100644 --- a/arch/arm/mach-omap2/board-omap3stalker.c +++ b/arch/arm/mach-omap2/board-omap3stalker.c @@ -427,5 +427,5 @@ MACHINE_START(SBC3530, "OMAP3 STALKER") .init_machine = omap3_stalker_init, .init_late = omap35xx_init_late, .timer = &omap3_secure_timer, - .restart = omap_prcm_restart, + .restart = omap3xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c index a225d819633f..263cb9cfbf37 100644 --- a/arch/arm/mach-omap2/board-omap3touchbook.c +++ b/arch/arm/mach-omap2/board-omap3touchbook.c @@ -387,5 +387,5 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board") .init_machine = omap3_touchbook_init, .init_late = omap3430_init_late, .timer = &omap3_secure_timer, - .restart = omap_prcm_restart, + .restart = omap3xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c index 8c00b99cd2a3..12a3a24d5bb5 100644 --- a/arch/arm/mach-omap2/board-omap4panda.c +++ b/arch/arm/mach-omap2/board-omap4panda.c @@ -524,5 +524,5 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board") .init_machine = omap4_panda_init, .init_late = omap4430_init_late, .timer = &omap4_timer, - .restart = omap_prcm_restart, + .restart = omap44xx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index f5ba43fa0400..c8fde3e56441 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c @@ -552,5 +552,5 @@ MACHINE_START(OVERO, "Gumstix Overo") .init_machine = overo_init, .init_late = omap35xx_init_late, .timer = &omap3_timer, - .restart = omap_prcm_restart, + .restart = omap3xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c index 1997e0e722a1..cbcb1b2dc31f 100644 --- a/arch/arm/mach-omap2/board-rm680.c +++ b/arch/arm/mach-omap2/board-rm680.c @@ -148,7 +148,7 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board") .init_machine = rm680_init, .init_late = omap3630_init_late, .timer = &omap3_timer, - .restart = omap_prcm_restart, + .restart = omap3xxx_restart, MACHINE_END MACHINE_START(NOKIA_RM696, "Nokia RM-696 board") @@ -161,5 +161,5 @@ MACHINE_START(NOKIA_RM696, "Nokia RM-696 board") .init_machine = rm680_init, .init_late = omap3630_init_late, .timer = &omap3_timer, - .restart = omap_prcm_restart, + .restart = omap3xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index c388aec14799..bf8f74b0ce3e 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c @@ -127,5 +127,5 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board") .init_machine = rx51_init, .init_late = omap3430_init_late, .timer = &omap3_timer, - .restart = omap_prcm_restart, + .restart = omap3xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c index 5e672c2b6a43..1a3e056d63a7 100644 --- a/arch/arm/mach-omap2/board-ti8168evm.c +++ b/arch/arm/mach-omap2/board-ti8168evm.c @@ -46,7 +46,7 @@ MACHINE_START(TI8168EVM, "ti8168evm") .timer = &omap3_timer, .init_machine = ti81xx_evm_init, .init_late = ti81xx_init_late, - .restart = omap_prcm_restart, + .restart = omap44xx_restart, MACHINE_END MACHINE_START(TI8148EVM, "ti8148evm") @@ -58,5 +58,5 @@ MACHINE_START(TI8148EVM, "ti8148evm") .timer = &omap3_timer, .init_machine = ti81xx_evm_init, .init_late = ti81xx_init_late, - .restart = omap_prcm_restart, + .restart = omap44xx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c index 8feb4d99b96d..d7fa31e67238 100644 --- a/arch/arm/mach-omap2/board-zoom.c +++ b/arch/arm/mach-omap2/board-zoom.c @@ -138,7 +138,7 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board") .init_machine = omap_zoom_init, .init_late = omap3430_init_late, .timer = &omap3_timer, - .restart = omap_prcm_restart, + .restart = omap3xxx_restart, MACHINE_END MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") @@ -151,5 +151,5 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") .init_machine = omap_zoom_init, .init_late = omap3630_init_late, .timer = &omap3_timer, - .restart = omap_prcm_restart, + .restart = omap3xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/clkt2xxx_apll.c b/arch/arm/mach-omap2/clkt2xxx_apll.c index 73a1414b89b0..8c5b13e7ee61 100644 --- a/arch/arm/mach-omap2/clkt2xxx_apll.c +++ b/arch/arm/mach-omap2/clkt2xxx_apll.c @@ -21,11 +21,10 @@ #include <linux/clk.h> #include <linux/io.h> -#include <plat/prcm.h> #include "clock.h" #include "clock2xxx.h" -#include "cm2xxx_3xxx.h" +#include "cm2xxx.h" #include "cm-regbits-24xx.h" /* CM_CLKEN_PLL.EN_{54,96}M_PLL options (24XX) */ @@ -37,44 +36,16 @@ #define APLLS_CLKIN_13MHZ 2 #define APLLS_CLKIN_12MHZ 3 -void __iomem *cm_idlest_pll; - /* Private functions */ -/* Enable an APLL if off */ -static int omap2_clk_apll_enable(struct clk *clk, u32 status_mask) -{ - u32 cval, apll_mask; - - apll_mask = EN_APLL_LOCKED << clk->enable_bit; - - cval = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN); - - if ((cval & apll_mask) == apll_mask) - return 0; /* apll already enabled */ - - cval &= ~apll_mask; - cval |= apll_mask; - omap2_cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN); - - omap2_cm_wait_idlest(cm_idlest_pll, status_mask, - OMAP24XX_CM_IDLEST_VAL, __clk_get_name(clk)); - - /* - * REVISIT: Should we return an error code if omap2_wait_clock_ready() - * fails? - */ - return 0; -} - -static int omap2_clk_apll96_enable(struct clk *clk) +static int _apll96_enable(struct clk *clk) { - return omap2_clk_apll_enable(clk, OMAP24XX_ST_96M_APLL_MASK); + return omap2xxx_cm_apll96_enable(); } -static int omap2_clk_apll54_enable(struct clk *clk) +static int _apll54_enable(struct clk *clk) { - return omap2_clk_apll_enable(clk, OMAP24XX_ST_54M_APLL_MASK); + return omap2xxx_cm_apll54_enable(); } static void _apll96_allow_idle(struct clk *clk) @@ -97,28 +68,28 @@ static void _apll54_deny_idle(struct clk *clk) omap2xxx_cm_set_apll54_disable_autoidle(); } -/* Stop APLL */ -static void omap2_clk_apll_disable(struct clk *clk) +static void _apll96_disable(struct clk *clk) { - u32 cval; + omap2xxx_cm_apll96_disable(); +} - cval = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN); - cval &= ~(EN_APLL_LOCKED << clk->enable_bit); - omap2_cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN); +static void _apll54_disable(struct clk *clk) +{ + omap2xxx_cm_apll54_disable(); } /* Public data */ const struct clkops clkops_apll96 = { - .enable = omap2_clk_apll96_enable, - .disable = omap2_clk_apll_disable, + .enable = _apll96_enable, + .disable = _apll96_disable, .allow_idle = _apll96_allow_idle, .deny_idle = _apll96_deny_idle, }; const struct clkops clkops_apll54 = { - .enable = omap2_clk_apll54_enable, - .disable = omap2_clk_apll_disable, + .enable = _apll54_enable, + .disable = _apll54_disable, .allow_idle = _apll54_allow_idle, .deny_idle = _apll54_deny_idle, }; diff --git a/arch/arm/mach-omap2/clkt2xxx_dpll.c b/arch/arm/mach-omap2/clkt2xxx_dpll.c index 0890ba94a282..399534c7843b 100644 --- a/arch/arm/mach-omap2/clkt2xxx_dpll.c +++ b/arch/arm/mach-omap2/clkt2xxx_dpll.c @@ -15,7 +15,7 @@ #include <linux/io.h> #include "clock.h" -#include "cm2xxx_3xxx.h" +#include "cm2xxx.h" #include "cm-regbits-24xx.h" /* Private functions */ diff --git a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c index 0d2f14c2dcce..825e44cdf1cf 100644 --- a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c +++ b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c @@ -28,16 +28,22 @@ #include "clock.h" #include "clock2xxx.h" #include "opp2xxx.h" -#include "cm2xxx_3xxx.h" +#include "cm2xxx.h" #include "cm-regbits-24xx.h" #include "sdrc.h" #include "sram.h" /* #define DOWN_VARIABLE_DPLL 1 */ /* Experimental */ +/* + * dpll_core_ck: pointer to the combined dpll_ck + core_ck on OMAP2xxx + * (currently defined as "dpll_ck" in the OMAP2xxx clock tree). Set + * during dpll_ck init and used later by omap2xxx_clk_get_core_rate(). + */ +static struct clk *dpll_core_ck; + /** * omap2xxx_clk_get_core_rate - return the CORE_CLK rate - * @clk: pointer to the combined dpll_ck + core_ck (currently "dpll_ck") * * Returns the CORE_CLK rate. CORE_CLK can have one of three rate * sources on OMAP2xxx: the DPLL CLKOUT rate, DPLL CLKOUTX2, or 32KHz @@ -45,12 +51,14 @@ * struct clk *dpll_ck, which is a composite clock of dpll_ck and * core_ck. */ -unsigned long omap2xxx_clk_get_core_rate(struct clk *clk) +unsigned long omap2xxx_clk_get_core_rate(void) { long long core_clk; u32 v; - core_clk = omap2_get_dpll_rate(clk); + WARN_ON(!dpll_core_ck); + + core_clk = omap2_get_dpll_rate(dpll_core_ck); v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2); v &= OMAP24XX_CORE_CLK_SRC_MASK; @@ -98,7 +106,7 @@ static long omap2_dpllcore_round_rate(unsigned long target_rate) unsigned long omap2_dpllcore_recalc(struct clk *clk) { - return omap2xxx_clk_get_core_rate(clk); + return omap2xxx_clk_get_core_rate(); } int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate) @@ -108,7 +116,7 @@ int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate) struct prcm_config tmpset; const struct dpll_data *dd; - cur_rate = omap2xxx_clk_get_core_rate(dclk); + cur_rate = omap2xxx_clk_get_core_rate(); mult = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2); mult &= OMAP24XX_CORE_CLK_SRC_MASK; @@ -169,3 +177,19 @@ int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate) return 0; } +/** + * omap2xxx_clkt_dpllcore_init - clk init function for dpll_ck + * @clk: struct clk *dpll_ck + * + * Store a local copy of @clk in dpll_core_ck so other code can query + * the core rate without having to clk_get(), which can sleep. Must + * only be called once. No return value. XXX If the clock + * registration process is ever changed such that dpll_ck is no longer + * statically defined, this code may need to change to increment some + * kind of use count on dpll_ck. + */ +void omap2xxx_clkt_dpllcore_init(struct clk *clk) +{ + WARN(dpll_core_ck, "dpll_core_ck already set - should never happen"); + dpll_core_ck = clk; +} diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c index a38ebb209721..1c2041fbd718 100644 --- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c +++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c @@ -1,7 +1,7 @@ /* * OMAP2xxx DVFS virtual clock functions * - * Copyright (C) 2005-2008 Texas Instruments, Inc. + * Copyright (C) 2005-2008, 2012 Texas Instruments, Inc. * Copyright (C) 2004-2010 Nokia Corporation * * Contacts: @@ -37,7 +37,7 @@ #include "clock.h" #include "clock2xxx.h" #include "opp2xxx.h" -#include "cm2xxx_3xxx.h" +#include "cm2xxx.h" #include "cm-regbits-24xx.h" #include "sdrc.h" #include "sram.h" @@ -45,6 +45,13 @@ const struct prcm_config *curr_prcm_set; const struct prcm_config *rate_table; +/* + * sys_ck_rate: the rate of the external high-frequency clock + * oscillator on the board. Set by the SoC-specific clock init code. + * Once set during a boot, will not change. + */ +static unsigned long sys_ck_rate; + /** * omap2_table_mpu_recalc - just return the MPU speed * @clk: virt_prcm_set struct clk @@ -66,15 +73,14 @@ unsigned long omap2_table_mpu_recalc(struct clk *clk) long omap2_round_to_table_rate(struct clk *clk, unsigned long rate) { const struct prcm_config *ptr; - long highest_rate, sys_clk_rate; + long highest_rate; highest_rate = -EINVAL; - sys_clk_rate = __clk_get_rate(sclk); for (ptr = rate_table; ptr->mpu_speed; ptr++) { if (!(ptr->flags & cpu_mask)) continue; - if (ptr->xtal_speed != sys_clk_rate) + if (ptr->xtal_speed != sys_ck_rate) continue; highest_rate = ptr->mpu_speed; @@ -93,15 +99,12 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate) const struct prcm_config *prcm; unsigned long found_speed = 0; unsigned long flags; - long sys_clk_rate; - - sys_clk_rate = __clk_get_rate(sclk); for (prcm = rate_table; prcm->mpu_speed; prcm++) { if (!(prcm->flags & cpu_mask)) continue; - if (prcm->xtal_speed != sys_clk_rate) + if (prcm->xtal_speed != sys_ck_rate) continue; if (prcm->mpu_speed <= rate) { @@ -117,7 +120,7 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate) } curr_prcm_set = prcm; - cur_rate = omap2xxx_clk_get_core_rate(dclk); + cur_rate = omap2xxx_clk_get_core_rate(); if (prcm->dpll_speed == cur_rate / 2) { omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL, 1); @@ -167,3 +170,50 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate) return 0; } + +/** + * omap2xxx_clkt_vps_check_bootloader_rate - determine which of the rate + * table sets matches the current CORE DPLL hardware rate + * + * Check the MPU rate set by bootloader. Sets the 'curr_prcm_set' + * global to point to the active rate set when found; otherwise, sets + * it to NULL. No return value; + */ +void omap2xxx_clkt_vps_check_bootloader_rates(void) +{ + const struct prcm_config *prcm = NULL; + unsigned long rate; + + rate = omap2xxx_clk_get_core_rate(); + for (prcm = rate_table; prcm->mpu_speed; prcm++) { + if (!(prcm->flags & cpu_mask)) + continue; + if (prcm->xtal_speed != sys_ck_rate) + continue; + if (prcm->dpll_speed <= rate) + break; + } + curr_prcm_set = prcm; +} + +/** + * omap2xxx_clkt_vps_late_init - store a copy of the sys_ck rate + * + * Store a copy of the sys_ck rate for later use by the OMAP2xxx DVFS + * code. (The sys_ck rate does not -- or rather, must not -- change + * during kernel runtime.) Must be called after we have a valid + * sys_ck rate, but before the virt_prcm_set clock rate is + * recalculated. No return value. + */ +void omap2xxx_clkt_vps_late_init(void) +{ + struct clk *c; + + c = clk_get(NULL, "sys_ck"); + if (IS_ERR(c)) { + WARN(1, "could not locate sys_ck\n"); + } else { + sys_ck_rate = clk_get_rate(c); + clk_put(c); + } +} diff --git a/arch/arm/mach-omap2/clkt_iclk.c b/arch/arm/mach-omap2/clkt_iclk.c index 7c8d41e49834..fe774a09dd0c 100644 --- a/arch/arm/mach-omap2/clkt_iclk.c +++ b/arch/arm/mach-omap2/clkt_iclk.c @@ -14,7 +14,6 @@ #include <linux/clk.h> #include <linux/io.h> -#include <plat/prcm.h> #include "clock.h" #include "clock2xxx.h" diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 8b30759f8f9e..e381d991092c 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -26,16 +26,24 @@ #include <asm/cpu.h> -#include <plat/prcm.h> #include <trace/events/power.h> #include "soc.h" #include "clockdomain.h" #include "clock.h" -#include "cm2xxx_3xxx.h" +#include "cm.h" +#include "cm2xxx.h" +#include "cm3xxx.h" #include "cm-regbits-24xx.h" #include "cm-regbits-34xx.h" +#include "common.h" + +/* + * MAX_MODULE_ENABLE_WAIT: maximum of number of microseconds to wait + * for a module to indicate that it is no longer in idle + */ +#define MAX_MODULE_ENABLE_WAIT 100000 u16 cpu_mask; @@ -57,6 +65,40 @@ static DEFINE_SPINLOCK(clockfw_lock); /* Private functions */ + +/** + * _wait_idlest_generic - wait for a module to leave the idle state + * @reg: virtual address of module IDLEST register + * @mask: value to mask against to determine if the module is active + * @idlest: idle state indicator (0 or 1) for the clock + * @name: name of the clock (for printk) + * + * Wait for a module to leave idle, where its idle-status register is + * not inside the CM module. Returns 1 if the module left idle + * promptly, or 0 if the module did not leave idle before the timeout + * elapsed. XXX Deprecated - should be moved into drivers for the + * individual IP block that the IDLEST register exists in. + */ +static int _wait_idlest_generic(void __iomem *reg, u32 mask, u8 idlest, + const char *name) +{ + int i = 0, ena = 0; + + ena = (idlest) ? 0 : mask; + + omap_test_timeout(((__raw_readl(reg) & mask) == ena), + MAX_MODULE_ENABLE_WAIT, i); + + if (i < MAX_MODULE_ENABLE_WAIT) + pr_debug("omap clock: module associated with clock %s ready after %d loops\n", + name, i); + else + pr_err("omap clock: module associated with clock %s didn't enable in %d tries\n", + name, MAX_MODULE_ENABLE_WAIT); + + return (i < MAX_MODULE_ENABLE_WAIT) ? 1 : 0; +}; + /** * _omap2_module_wait_ready - wait for an OMAP module to leave IDLE * @clk: struct clk * belonging to the module @@ -70,7 +112,9 @@ static DEFINE_SPINLOCK(clockfw_lock); static void _omap2_module_wait_ready(struct clk *clk) { void __iomem *companion_reg, *idlest_reg; - u8 other_bit, idlest_bit, idlest_val; + u8 other_bit, idlest_bit, idlest_val, idlest_reg_id; + s16 prcm_mod; + int r; /* Not all modules have multiple clocks that their IDLEST depends on */ if (clk->ops->find_companion) { @@ -81,8 +125,14 @@ static void _omap2_module_wait_ready(struct clk *clk) clk->ops->find_idlest(clk, &idlest_reg, &idlest_bit, &idlest_val); - omap2_cm_wait_idlest(idlest_reg, (1 << idlest_bit), idlest_val, - __clk_get_name(clk)); + r = cm_split_idlest_reg(idlest_reg, &prcm_mod, &idlest_reg_id); + if (r) { + /* IDLEST register not in the CM module */ + _wait_idlest_generic(idlest_reg, (1 << idlest_bit), idlest_val, + clk->name); + } else { + cm_wait_module_ready(prcm_mod, idlest_reg_id, idlest_bit); + }; } /* Public functions */ diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index cfba1ffe5cc2..ff9789bc0fd1 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h @@ -409,33 +409,6 @@ extern void omap2_clkt_iclk_deny_idle(struct clk *clk); u32 omap2_get_dpll_rate(struct clk *clk); void omap2_init_dpll_parent(struct clk *clk); -int omap2_wait_clock_ready(void __iomem *reg, u32 cval, const char *name); - - -#ifdef CONFIG_ARCH_OMAP2 -void omap2xxx_clk_prepare_for_reboot(void); -#else -static inline void omap2xxx_clk_prepare_for_reboot(void) -{ -} -#endif - -#ifdef CONFIG_ARCH_OMAP3 -void omap3_clk_prepare_for_reboot(void); -#else -static inline void omap3_clk_prepare_for_reboot(void) -{ -} -#endif - -#ifdef CONFIG_ARCH_OMAP4 -void omap4_clk_prepare_for_reboot(void); -#else -static inline void omap4_clk_prepare_for_reboot(void) -{ -} -#endif - int omap2_dflt_clk_enable(struct clk *clk); void omap2_dflt_clk_disable(struct clk *clk); void omap2_clk_dflt_find_companion(struct clk *clk, void __iomem **other_reg, @@ -454,7 +427,6 @@ extern const struct clkops clkops_dummy; extern const struct clkops clkops_omap2_dflt; extern struct clk_functions omap2_clk_functions; -extern struct clk *vclk, *sclk; extern const struct clksel_rate gpt_32k_rates[]; extern const struct clksel_rate gpt_sys_rates[]; diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c index ff47a6c2611d..608874b651e8 100644 --- a/arch/arm/mach-omap2/clock2420_data.c +++ b/arch/arm/mach-omap2/clock2420_data.c @@ -1,7 +1,7 @@ /* * OMAP2420 clock data * - * Copyright (C) 2005-2009 Texas Instruments, Inc. + * Copyright (C) 2005-2009, 2012 Texas Instruments, Inc. * Copyright (C) 2004-2011 Nokia Corporation * * Contacts: @@ -23,7 +23,7 @@ #include "clock.h" #include "clock2xxx.h" #include "opp2xxx.h" -#include "cm2xxx_3xxx.h" +#include "cm2xxx.h" #include "prm2xxx_3xxx.h" #include "prm-regbits-24xx.h" #include "cm-regbits-24xx.h" @@ -124,6 +124,7 @@ static struct clk dpll_ck = { .name = "dpll_ck", .ops = &clkops_omap2xxx_dpll_ops, .parent = &sys_ck, /* Can be func_32k also */ + .init = &omap2xxx_clkt_dpllcore_init, .dpll_data = &dpll_dd, .clkdm_name = "wkup_clkdm", .recalc = &omap2_dpllcore_recalc, @@ -1924,12 +1925,9 @@ static struct omap_clk omap2420_clks[] = { int __init omap2420_clk_init(void) { - const struct prcm_config *prcm; struct omap_clk *c; - u32 clkrate; prcm_clksrc_ctrl = OMAP2420_PRCM_CLKSRC_CTRL; - cm_idlest_pll = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST); cpu_mask = RATE_IN_242X; rate_table = omap2420_rate_table; @@ -1949,20 +1947,13 @@ int __init omap2420_clk_init(void) omap2_init_clk_clkdm(c->lk.clk); } + omap2xxx_clkt_vps_late_init(); + /* Disable autoidle on all clocks; let the PM code enable it later */ omap_clk_disable_autoidle_all(); - /* Check the MPU rate set by bootloader */ - clkrate = omap2xxx_clk_get_core_rate(&dpll_ck); - for (prcm = rate_table; prcm->mpu_speed; prcm++) { - if (!(prcm->flags & cpu_mask)) - continue; - if (prcm->xtal_speed != sys_ck.rate) - continue; - if (prcm->dpll_speed <= clkrate) - break; - } - curr_prcm_set = prcm; + /* XXX Can this be done from the virt_prcm_set clk init function? */ + omap2xxx_clkt_vps_check_bootloader_rates(); recalculate_root_clocks(); @@ -1976,11 +1967,6 @@ int __init omap2420_clk_init(void) */ clk_enable_init_clocks(); - /* Avoid sleeping sleeping during omap2_clk_prepare_for_reboot() */ - vclk = clk_get(NULL, "virt_prcm_set"); - sclk = clk_get(NULL, "sys_ck"); - dclk = clk_get(NULL, "dpll_ck"); - return 0; } diff --git a/arch/arm/mach-omap2/clock2430.c b/arch/arm/mach-omap2/clock2430.c index 850f83e8954f..e37df538bcd3 100644 --- a/arch/arm/mach-omap2/clock2430.c +++ b/arch/arm/mach-omap2/clock2430.c @@ -25,7 +25,7 @@ #include "iomap.h" #include "clock.h" #include "clock2xxx.h" -#include "cm2xxx_3xxx.h" +#include "cm2xxx.h" #include "cm-regbits-24xx.h" /** diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c index cab8e9c52d6e..b179b6ef4329 100644 --- a/arch/arm/mach-omap2/clock2430_data.c +++ b/arch/arm/mach-omap2/clock2430_data.c @@ -1,7 +1,7 @@ /* * OMAP2430 clock data * - * Copyright (C) 2005-2009 Texas Instruments, Inc. + * Copyright (C) 2005-2009, 2012 Texas Instruments, Inc. * Copyright (C) 2004-2011 Nokia Corporation * * Contacts: @@ -22,7 +22,7 @@ #include "clock.h" #include "clock2xxx.h" #include "opp2xxx.h" -#include "cm2xxx_3xxx.h" +#include "cm2xxx.h" #include "prm2xxx_3xxx.h" #include "prm-regbits-24xx.h" #include "cm-regbits-24xx.h" @@ -123,6 +123,7 @@ static struct clk dpll_ck = { .name = "dpll_ck", .ops = &clkops_omap2xxx_dpll_ops, .parent = &sys_ck, /* Can be func_32k also */ + .init = &omap2xxx_clkt_dpllcore_init, .dpll_data = &dpll_dd, .clkdm_name = "wkup_clkdm", .recalc = &omap2_dpllcore_recalc, @@ -2023,12 +2024,9 @@ static struct omap_clk omap2430_clks[] = { int __init omap2430_clk_init(void) { - const struct prcm_config *prcm; struct omap_clk *c; - u32 clkrate; prcm_clksrc_ctrl = OMAP2430_PRCM_CLKSRC_CTRL; - cm_idlest_pll = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST); cpu_mask = RATE_IN_243X; rate_table = omap2430_rate_table; @@ -2048,20 +2046,13 @@ int __init omap2430_clk_init(void) omap2_init_clk_clkdm(c->lk.clk); } + omap2xxx_clkt_vps_late_init(); + /* Disable autoidle on all clocks; let the PM code enable it later */ omap_clk_disable_autoidle_all(); - /* Check the MPU rate set by bootloader */ - clkrate = omap2xxx_clk_get_core_rate(&dpll_ck); - for (prcm = rate_table; prcm->mpu_speed; prcm++) { - if (!(prcm->flags & cpu_mask)) - continue; - if (prcm->xtal_speed != sys_ck.rate) - continue; - if (prcm->dpll_speed <= clkrate) - break; - } - curr_prcm_set = prcm; + /* XXX Can this be done from the virt_prcm_set clk init function? */ + omap2xxx_clkt_vps_check_bootloader_rates(); recalculate_root_clocks(); @@ -2075,11 +2066,6 @@ int __init omap2430_clk_init(void) */ clk_enable_init_clocks(); - /* Avoid sleeping sleeping during omap2_clk_prepare_for_reboot() */ - vclk = clk_get(NULL, "virt_prcm_set"); - sclk = clk_get(NULL, "sys_ck"); - dclk = clk_get(NULL, "dpll_ck"); - return 0; } diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c index 5feee16fee0e..5f7faeb4c19b 100644 --- a/arch/arm/mach-omap2/clock2xxx.c +++ b/arch/arm/mach-omap2/clock2xxx.c @@ -28,27 +28,11 @@ #include "cm.h" #include "cm-regbits-24xx.h" -struct clk *vclk, *sclk, *dclk; - /* * Omap24xx specific clock functions */ /* - * Set clocks for bypass mode for reboot to work. - */ -void omap2xxx_clk_prepare_for_reboot(void) -{ - u32 rate; - - if (vclk == NULL || sclk == NULL) - return; - - rate = clk_get_rate(sclk); - clk_set_rate(vclk, rate); -} - -/* * Switch the MPU rate if specified on cmdline. We cannot do this * early until cmdline is parsed. XXX This should be removed from the * clock code and handled by the OPP layer code in the near future. diff --git a/arch/arm/mach-omap2/clock2xxx.h b/arch/arm/mach-omap2/clock2xxx.h index cb6df8ca9e4a..ce809c913b6f 100644 --- a/arch/arm/mach-omap2/clock2xxx.h +++ b/arch/arm/mach-omap2/clock2xxx.h @@ -15,10 +15,13 @@ unsigned long omap2xxx_sys_clk_recalc(struct clk *clk); unsigned long omap2_osc_clk_recalc(struct clk *clk); unsigned long omap2_dpllcore_recalc(struct clk *clk); int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate); -unsigned long omap2xxx_clk_get_core_rate(struct clk *clk); +unsigned long omap2xxx_clk_get_core_rate(void); u32 omap2xxx_get_apll_clkin(void); u32 omap2xxx_get_sysclkdiv(void); void omap2xxx_clk_prepare_for_reboot(void); +void omap2xxx_clkt_dpllcore_init(struct clk *clk); +void omap2xxx_clkt_vps_check_bootloader_rates(void); +void omap2xxx_clkt_vps_late_init(void); #ifdef CONFIG_SOC_OMAP2420 int omap2420_clk_init(void); @@ -32,9 +35,7 @@ int omap2430_clk_init(void); #define omap2430_clk_init() do { } while(0) #endif -extern void __iomem *prcm_clksrc_ctrl, *cm_idlest_pll; - -extern struct clk *dclk; +extern void __iomem *prcm_clksrc_ctrl; extern const struct clkops clkops_omap2430_i2chs_wait; extern const struct clkops clkops_oscck; diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index baaaa4258708..e41819ba7482 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c @@ -23,7 +23,7 @@ #include "clock.h" #include "clock34xx.h" -#include "cm2xxx_3xxx.h" +#include "cm3xxx.h" #include "cm-regbits-34xx.h" /** diff --git a/arch/arm/mach-omap2/clock3517.c b/arch/arm/mach-omap2/clock3517.c index 80209050cd7a..622ea0502610 100644 --- a/arch/arm/mach-omap2/clock3517.c +++ b/arch/arm/mach-omap2/clock3517.c @@ -23,7 +23,7 @@ #include "clock.h" #include "clock3517.h" -#include "cm2xxx_3xxx.h" +#include "cm3xxx.h" #include "cm-regbits-34xx.h" /* diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index a02d158568e8..6cca19953950 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c @@ -28,7 +28,7 @@ #include "clock34xx.h" #include "clock36xx.h" #include "clock3517.h" -#include "cm2xxx_3xxx.h" +#include "cm3xxx.h" #include "cm-regbits-34xx.h" #include "prm2xxx_3xxx.h" #include "prm-regbits-34xx.h" diff --git a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c deleted file mode 100644 index 3e4e9209b2df..000000000000 --- a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c +++ /dev/null @@ -1,341 +0,0 @@ -/* - * OMAP2 and OMAP3 clockdomain control - * - * Copyright (C) 2008-2010 Texas Instruments, Inc. - * Copyright (C) 2008-2010 Nokia Corporation - * - * Derived from mach-omap2/clockdomain.c written by Paul Walmsley - * Rajendra Nayak <[email protected]> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/types.h> -#include <plat/prcm.h> - -#include "soc.h" -#include "prm.h" -#include "prm2xxx_3xxx.h" -#include "cm.h" -#include "cm2xxx_3xxx.h" -#include "cm-regbits-24xx.h" -#include "cm-regbits-34xx.h" -#include "prm-regbits-24xx.h" -#include "clockdomain.h" - -static int omap2_clkdm_add_wkdep(struct clockdomain *clkdm1, - struct clockdomain *clkdm2) -{ - omap2_prm_set_mod_reg_bits((1 << clkdm2->dep_bit), - clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP); - return 0; -} - -static int omap2_clkdm_del_wkdep(struct clockdomain *clkdm1, - struct clockdomain *clkdm2) -{ - omap2_prm_clear_mod_reg_bits((1 << clkdm2->dep_bit), - clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP); - return 0; -} - -static int omap2_clkdm_read_wkdep(struct clockdomain *clkdm1, - struct clockdomain *clkdm2) -{ - return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, - PM_WKDEP, (1 << clkdm2->dep_bit)); -} - -static int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm) -{ - struct clkdm_dep *cd; - u32 mask = 0; - - for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) { - if (!cd->clkdm) - continue; /* only happens if data is erroneous */ - - /* PRM accesses are slow, so minimize them */ - mask |= 1 << cd->clkdm->dep_bit; - atomic_set(&cd->wkdep_usecount, 0); - } - - omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs, - PM_WKDEP); - return 0; -} - -static int omap3_clkdm_add_sleepdep(struct clockdomain *clkdm1, - struct clockdomain *clkdm2) -{ - omap2_cm_set_mod_reg_bits((1 << clkdm2->dep_bit), - clkdm1->pwrdm.ptr->prcm_offs, - OMAP3430_CM_SLEEPDEP); - return 0; -} - -static int omap3_clkdm_del_sleepdep(struct clockdomain *clkdm1, - struct clockdomain *clkdm2) -{ - omap2_cm_clear_mod_reg_bits((1 << clkdm2->dep_bit), - clkdm1->pwrdm.ptr->prcm_offs, - OMAP3430_CM_SLEEPDEP); - return 0; -} - -static int omap3_clkdm_read_sleepdep(struct clockdomain *clkdm1, - struct clockdomain *clkdm2) -{ - return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, - OMAP3430_CM_SLEEPDEP, (1 << clkdm2->dep_bit)); -} - -static int omap3_clkdm_clear_all_sleepdeps(struct clockdomain *clkdm) -{ - struct clkdm_dep *cd; - u32 mask = 0; - - for (cd = clkdm->sleepdep_srcs; cd && cd->clkdm_name; cd++) { - if (!cd->clkdm) - continue; /* only happens if data is erroneous */ - - /* PRM accesses are slow, so minimize them */ - mask |= 1 << cd->clkdm->dep_bit; - atomic_set(&cd->sleepdep_usecount, 0); - } - omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs, - OMAP3430_CM_SLEEPDEP); - return 0; -} - -static int omap2_clkdm_sleep(struct clockdomain *clkdm) -{ - omap2_cm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK, - clkdm->pwrdm.ptr->prcm_offs, - OMAP2_PM_PWSTCTRL); - return 0; -} - -static int omap2_clkdm_wakeup(struct clockdomain *clkdm) -{ - omap2_cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE_MASK, - clkdm->pwrdm.ptr->prcm_offs, - OMAP2_PM_PWSTCTRL); - return 0; -} - -static void omap2_clkdm_allow_idle(struct clockdomain *clkdm) -{ - if (atomic_read(&clkdm->usecount) > 0) - _clkdm_add_autodeps(clkdm); - - omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); -} - -static void omap2_clkdm_deny_idle(struct clockdomain *clkdm) -{ - omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - - if (atomic_read(&clkdm->usecount) > 0) - _clkdm_del_autodeps(clkdm); -} - -static void _enable_hwsup(struct clockdomain *clkdm) -{ - if (cpu_is_omap24xx()) - omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - else if (cpu_is_omap34xx()) - omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); -} - -static void _disable_hwsup(struct clockdomain *clkdm) -{ - if (cpu_is_omap24xx()) - omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - else if (cpu_is_omap34xx()) - omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); -} - -static int omap3_clkdm_sleep(struct clockdomain *clkdm) -{ - omap3xxx_cm_clkdm_force_sleep(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - return 0; -} - -static int omap3_clkdm_wakeup(struct clockdomain *clkdm) -{ - omap3xxx_cm_clkdm_force_wakeup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - return 0; -} - -static int omap2_clkdm_clk_enable(struct clockdomain *clkdm) -{ - bool hwsup = false; - - if (!clkdm->clktrctrl_mask) - return 0; - - hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - - if (hwsup) { - /* Disable HW transitions when we are changing deps */ - _disable_hwsup(clkdm); - _clkdm_add_autodeps(clkdm); - _enable_hwsup(clkdm); - } else { - if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) - omap2_clkdm_wakeup(clkdm); - } - - return 0; -} - -static int omap2_clkdm_clk_disable(struct clockdomain *clkdm) -{ - bool hwsup = false; - - if (!clkdm->clktrctrl_mask) - return 0; - - hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - - if (hwsup) { - /* Disable HW transitions when we are changing deps */ - _disable_hwsup(clkdm); - _clkdm_del_autodeps(clkdm); - _enable_hwsup(clkdm); - } else { - if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP) - omap2_clkdm_sleep(clkdm); - } - - return 0; -} - -static void omap3_clkdm_allow_idle(struct clockdomain *clkdm) -{ - if (atomic_read(&clkdm->usecount) > 0) - _clkdm_add_autodeps(clkdm); - - omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); -} - -static void omap3_clkdm_deny_idle(struct clockdomain *clkdm) -{ - omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - - if (atomic_read(&clkdm->usecount) > 0) - _clkdm_del_autodeps(clkdm); -} - -static int omap3xxx_clkdm_clk_enable(struct clockdomain *clkdm) -{ - bool hwsup = false; - - if (!clkdm->clktrctrl_mask) - return 0; - - /* - * The CLKDM_MISSING_IDLE_REPORTING flag documentation has - * more details on the unpleasant problem this is working - * around - */ - if ((clkdm->flags & CLKDM_MISSING_IDLE_REPORTING) && - (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)) { - omap3_clkdm_wakeup(clkdm); - return 0; - } - - hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - - if (hwsup) { - /* Disable HW transitions when we are changing deps */ - _disable_hwsup(clkdm); - _clkdm_add_autodeps(clkdm); - _enable_hwsup(clkdm); - } else { - if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) - omap3_clkdm_wakeup(clkdm); - } - - return 0; -} - -static int omap3xxx_clkdm_clk_disable(struct clockdomain *clkdm) -{ - bool hwsup = false; - - if (!clkdm->clktrctrl_mask) - return 0; - - /* - * The CLKDM_MISSING_IDLE_REPORTING flag documentation has - * more details on the unpleasant problem this is working - * around - */ - if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING && - !(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) { - _enable_hwsup(clkdm); - return 0; - } - - hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, - clkdm->clktrctrl_mask); - - if (hwsup) { - /* Disable HW transitions when we are changing deps */ - _disable_hwsup(clkdm); - _clkdm_del_autodeps(clkdm); - _enable_hwsup(clkdm); - } else { - if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP) - omap3_clkdm_sleep(clkdm); - } - - return 0; -} - -struct clkdm_ops omap2_clkdm_operations = { - .clkdm_add_wkdep = omap2_clkdm_add_wkdep, - .clkdm_del_wkdep = omap2_clkdm_del_wkdep, - .clkdm_read_wkdep = omap2_clkdm_read_wkdep, - .clkdm_clear_all_wkdeps = omap2_clkdm_clear_all_wkdeps, - .clkdm_sleep = omap2_clkdm_sleep, - .clkdm_wakeup = omap2_clkdm_wakeup, - .clkdm_allow_idle = omap2_clkdm_allow_idle, - .clkdm_deny_idle = omap2_clkdm_deny_idle, - .clkdm_clk_enable = omap2_clkdm_clk_enable, - .clkdm_clk_disable = omap2_clkdm_clk_disable, -}; - -struct clkdm_ops omap3_clkdm_operations = { - .clkdm_add_wkdep = omap2_clkdm_add_wkdep, - .clkdm_del_wkdep = omap2_clkdm_del_wkdep, - .clkdm_read_wkdep = omap2_clkdm_read_wkdep, - .clkdm_clear_all_wkdeps = omap2_clkdm_clear_all_wkdeps, - .clkdm_add_sleepdep = omap3_clkdm_add_sleepdep, - .clkdm_del_sleepdep = omap3_clkdm_del_sleepdep, - .clkdm_read_sleepdep = omap3_clkdm_read_sleepdep, - .clkdm_clear_all_sleepdeps = omap3_clkdm_clear_all_sleepdeps, - .clkdm_sleep = omap3_clkdm_sleep, - .clkdm_wakeup = omap3_clkdm_wakeup, - .clkdm_allow_idle = omap3_clkdm_allow_idle, - .clkdm_deny_idle = omap3_clkdm_deny_idle, - .clkdm_clk_enable = omap3xxx_clkdm_clk_enable, - .clkdm_clk_disable = omap3xxx_clkdm_clk_disable, -}; diff --git a/arch/arm/mach-omap2/clockdomain33xx.c b/arch/arm/mach-omap2/clockdomain33xx.c deleted file mode 100644 index aca6388fad76..000000000000 --- a/arch/arm/mach-omap2/clockdomain33xx.c +++ /dev/null @@ -1,74 +0,0 @@ -/* - * AM33XX clockdomain control - * - * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/ - * Vaibhav Hiremath <[email protected]> - * - * Derived from mach-omap2/clockdomain44xx.c written by Rajendra Nayak - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <linux/kernel.h> - -#include "clockdomain.h" -#include "cm33xx.h" - - -static int am33xx_clkdm_sleep(struct clockdomain *clkdm) -{ - am33xx_cm_clkdm_force_sleep(clkdm->cm_inst, clkdm->clkdm_offs); - return 0; -} - -static int am33xx_clkdm_wakeup(struct clockdomain *clkdm) -{ - am33xx_cm_clkdm_force_wakeup(clkdm->cm_inst, clkdm->clkdm_offs); - return 0; -} - -static void am33xx_clkdm_allow_idle(struct clockdomain *clkdm) -{ - am33xx_cm_clkdm_enable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs); -} - -static void am33xx_clkdm_deny_idle(struct clockdomain *clkdm) -{ - am33xx_cm_clkdm_disable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs); -} - -static int am33xx_clkdm_clk_enable(struct clockdomain *clkdm) -{ - if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) - return am33xx_clkdm_wakeup(clkdm); - - return 0; -} - -static int am33xx_clkdm_clk_disable(struct clockdomain *clkdm) -{ - bool hwsup = false; - - hwsup = am33xx_cm_is_clkdm_in_hwsup(clkdm->cm_inst, clkdm->clkdm_offs); - - if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) - am33xx_clkdm_sleep(clkdm); - - return 0; -} - -struct clkdm_ops am33xx_clkdm_operations = { - .clkdm_sleep = am33xx_clkdm_sleep, - .clkdm_wakeup = am33xx_clkdm_wakeup, - .clkdm_allow_idle = am33xx_clkdm_allow_idle, - .clkdm_deny_idle = am33xx_clkdm_deny_idle, - .clkdm_clk_enable = am33xx_clkdm_clk_enable, - .clkdm_clk_disable = am33xx_clkdm_clk_disable, -}; diff --git a/arch/arm/mach-omap2/clockdomain44xx.c b/arch/arm/mach-omap2/clockdomain44xx.c deleted file mode 100644 index 6fc6155625bc..000000000000 --- a/arch/arm/mach-omap2/clockdomain44xx.c +++ /dev/null @@ -1,151 +0,0 @@ -/* - * OMAP4 clockdomain control - * - * Copyright (C) 2008-2010 Texas Instruments, Inc. - * Copyright (C) 2008-2010 Nokia Corporation - * - * Derived from mach-omap2/clockdomain.c written by Paul Walmsley - * Rajendra Nayak <[email protected]> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include "clockdomain.h" -#include "cminst44xx.h" -#include "cm44xx.h" - -static int omap4_clkdm_add_wkup_sleep_dep(struct clockdomain *clkdm1, - struct clockdomain *clkdm2) -{ - omap4_cminst_set_inst_reg_bits((1 << clkdm2->dep_bit), - clkdm1->prcm_partition, - clkdm1->cm_inst, clkdm1->clkdm_offs + - OMAP4_CM_STATICDEP); - return 0; -} - -static int omap4_clkdm_del_wkup_sleep_dep(struct clockdomain *clkdm1, - struct clockdomain *clkdm2) -{ - omap4_cminst_clear_inst_reg_bits((1 << clkdm2->dep_bit), - clkdm1->prcm_partition, - clkdm1->cm_inst, clkdm1->clkdm_offs + - OMAP4_CM_STATICDEP); - return 0; -} - -static int omap4_clkdm_read_wkup_sleep_dep(struct clockdomain *clkdm1, - struct clockdomain *clkdm2) -{ - return omap4_cminst_read_inst_reg_bits(clkdm1->prcm_partition, - clkdm1->cm_inst, clkdm1->clkdm_offs + - OMAP4_CM_STATICDEP, - (1 << clkdm2->dep_bit)); -} - -static int omap4_clkdm_clear_all_wkup_sleep_deps(struct clockdomain *clkdm) -{ - struct clkdm_dep *cd; - u32 mask = 0; - - if (!clkdm->prcm_partition) - return 0; - - for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) { - if (!cd->clkdm) - continue; /* only happens if data is erroneous */ - - mask |= 1 << cd->clkdm->dep_bit; - atomic_set(&cd->wkdep_usecount, 0); - } - - omap4_cminst_clear_inst_reg_bits(mask, clkdm->prcm_partition, - clkdm->cm_inst, clkdm->clkdm_offs + - OMAP4_CM_STATICDEP); - return 0; -} - -static int omap4_clkdm_sleep(struct clockdomain *clkdm) -{ - omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition, - clkdm->cm_inst, clkdm->clkdm_offs); - return 0; -} - -static int omap4_clkdm_wakeup(struct clockdomain *clkdm) -{ - omap4_cminst_clkdm_force_wakeup(clkdm->prcm_partition, - clkdm->cm_inst, clkdm->clkdm_offs); - return 0; -} - -static void omap4_clkdm_allow_idle(struct clockdomain *clkdm) -{ - omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition, - clkdm->cm_inst, clkdm->clkdm_offs); -} - -static void omap4_clkdm_deny_idle(struct clockdomain *clkdm) -{ - if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) - omap4_clkdm_wakeup(clkdm); - else - omap4_cminst_clkdm_disable_hwsup(clkdm->prcm_partition, - clkdm->cm_inst, - clkdm->clkdm_offs); -} - -static int omap4_clkdm_clk_enable(struct clockdomain *clkdm) -{ - if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) - return omap4_clkdm_wakeup(clkdm); - - return 0; -} - -static int omap4_clkdm_clk_disable(struct clockdomain *clkdm) -{ - bool hwsup = false; - - if (!clkdm->prcm_partition) - return 0; - - /* - * The CLKDM_MISSING_IDLE_REPORTING flag documentation has - * more details on the unpleasant problem this is working - * around - */ - if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING && - !(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) { - omap4_clkdm_allow_idle(clkdm); - return 0; - } - - hwsup = omap4_cminst_is_clkdm_in_hwsup(clkdm->prcm_partition, - clkdm->cm_inst, clkdm->clkdm_offs); - - if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) - omap4_clkdm_sleep(clkdm); - - return 0; -} - -struct clkdm_ops omap4_clkdm_operations = { - .clkdm_add_wkdep = omap4_clkdm_add_wkup_sleep_dep, - .clkdm_del_wkdep = omap4_clkdm_del_wkup_sleep_dep, - .clkdm_read_wkdep = omap4_clkdm_read_wkup_sleep_dep, - .clkdm_clear_all_wkdeps = omap4_clkdm_clear_all_wkup_sleep_deps, - .clkdm_add_sleepdep = omap4_clkdm_add_wkup_sleep_dep, - .clkdm_del_sleepdep = omap4_clkdm_del_wkup_sleep_dep, - .clkdm_read_sleepdep = omap4_clkdm_read_wkup_sleep_dep, - .clkdm_clear_all_sleepdeps = omap4_clkdm_clear_all_wkup_sleep_deps, - .clkdm_sleep = omap4_clkdm_sleep, - .clkdm_wakeup = omap4_clkdm_wakeup, - .clkdm_allow_idle = omap4_clkdm_allow_idle, - .clkdm_deny_idle = omap4_clkdm_deny_idle, - .clkdm_clk_enable = omap4_clkdm_clk_enable, - .clkdm_clk_disable = omap4_clkdm_clk_disable, -}; diff --git a/arch/arm/mach-omap2/cm-regbits-24xx.h b/arch/arm/mach-omap2/cm-regbits-24xx.h index 686290437568..11eaf16880c4 100644 --- a/arch/arm/mach-omap2/cm-regbits-24xx.h +++ b/arch/arm/mach-omap2/cm-regbits-24xx.h @@ -333,7 +333,9 @@ #define OMAP24XX_EN_DPLL_MASK (0x3 << 0) /* CM_IDLEST_CKGEN */ +#define OMAP24XX_ST_54M_APLL_SHIFT 9 #define OMAP24XX_ST_54M_APLL_MASK (1 << 9) +#define OMAP24XX_ST_96M_APLL_SHIFT 8 #define OMAP24XX_ST_96M_APLL_MASK (1 << 8) #define OMAP24XX_ST_54M_CLK_MASK (1 << 6) #define OMAP24XX_ST_12M_CLK_MASK (1 << 5) diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h index f24e3f7a2bbc..93473f9a551c 100644 --- a/arch/arm/mach-omap2/cm.h +++ b/arch/arm/mach-omap2/cm.h @@ -1,7 +1,7 @@ /* * OMAP2+ Clock Management prototypes * - * Copyright (C) 2007-2009 Texas Instruments, Inc. + * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc. * Copyright (C) 2007-2009 Nokia Corporation * * Written by Paul Walmsley @@ -22,6 +22,12 @@ */ #define MAX_MODULE_READY_TIME 2000 +# ifndef __ASSEMBLER__ +extern void __iomem *cm_base; +extern void __iomem *cm2_base; +extern void omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2); +# endif + /* * MAX_MODULE_DISABLE_TIME: max duration in microseconds to wait for * the PRCM to request that a module enter the inactive state in the @@ -33,4 +39,26 @@ */ #define MAX_MODULE_DISABLE_TIME 5000 +# ifndef __ASSEMBLER__ + +/** + * struct cm_ll_data - fn ptrs to per-SoC CM function implementations + * @split_idlest_reg: ptr to the SoC CM-specific split_idlest_reg impl + * @wait_module_ready: ptr to the SoC CM-specific wait_module_ready impl + */ +struct cm_ll_data { + int (*split_idlest_reg)(void __iomem *idlest_reg, s16 *prcm_inst, + u8 *idlest_reg_id); + int (*wait_module_ready)(s16 prcm_mod, u8 idlest_id, u8 idlest_shift); +}; + +extern int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst, + u8 *idlest_reg_id); +extern int cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift); + +extern int cm_register(struct cm_ll_data *cld); +extern int cm_unregister(struct cm_ll_data *cld); + +# endif + #endif diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c new file mode 100644 index 000000000000..db650690e9d0 --- /dev/null +++ b/arch/arm/mach-omap2/cm2xxx.c @@ -0,0 +1,381 @@ +/* + * OMAP2xxx CM module functions + * + * Copyright (C) 2009 Nokia Corporation + * Copyright (C) 2008-2010, 2012 Texas Instruments, Inc. + * Paul Walmsley + * Rajendra Nayak <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/delay.h> +#include <linux/errno.h> +#include <linux/err.h> +#include <linux/io.h> + +#include "soc.h" +#include "iomap.h" +#include "common.h" +#include "prm2xxx.h" +#include "cm.h" +#include "cm2xxx.h" +#include "cm-regbits-24xx.h" +#include "clockdomain.h" + +/* CM_AUTOIDLE_PLL.AUTO_* bit values for DPLLs */ +#define DPLL_AUTOIDLE_DISABLE 0x0 +#define OMAP2XXX_DPLL_AUTOIDLE_LOW_POWER_STOP 0x3 + +/* CM_AUTOIDLE_PLL.AUTO_* bit values for APLLs (OMAP2xxx only) */ +#define OMAP2XXX_APLL_AUTOIDLE_DISABLE 0x0 +#define OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP 0x3 + +/* CM_IDLEST_PLL bit value offset for APLLs (OMAP2xxx only) */ +#define EN_APLL_LOCKED 3 + +static const u8 omap2xxx_cm_idlest_offs[] = { + CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3, OMAP24XX_CM_IDLEST4 +}; + +/* + * + */ + +static void _write_clktrctrl(u8 c, s16 module, u32 mask) +{ + u32 v; + + v = omap2_cm_read_mod_reg(module, OMAP2_CM_CLKSTCTRL); + v &= ~mask; + v |= c << __ffs(mask); + omap2_cm_write_mod_reg(v, module, OMAP2_CM_CLKSTCTRL); +} + +bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask) +{ + u32 v; + + v = omap2_cm_read_mod_reg(module, OMAP2_CM_CLKSTCTRL); + v &= mask; + v >>= __ffs(mask); + + return (v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0; +} + +void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask) +{ + _write_clktrctrl(OMAP24XX_CLKSTCTRL_ENABLE_AUTO, module, mask); +} + +void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask) +{ + _write_clktrctrl(OMAP24XX_CLKSTCTRL_DISABLE_AUTO, module, mask); +} + +/* + * DPLL autoidle control + */ + +static void _omap2xxx_set_dpll_autoidle(u8 m) +{ + u32 v; + + v = omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE); + v &= ~OMAP24XX_AUTO_DPLL_MASK; + v |= m << OMAP24XX_AUTO_DPLL_SHIFT; + omap2_cm_write_mod_reg(v, PLL_MOD, CM_AUTOIDLE); +} + +void omap2xxx_cm_set_dpll_disable_autoidle(void) +{ + _omap2xxx_set_dpll_autoidle(OMAP2XXX_DPLL_AUTOIDLE_LOW_POWER_STOP); +} + +void omap2xxx_cm_set_dpll_auto_low_power_stop(void) +{ + _omap2xxx_set_dpll_autoidle(DPLL_AUTOIDLE_DISABLE); +} + +/* + * APLL control + */ + +static void _omap2xxx_set_apll_autoidle(u8 m, u32 mask) +{ + u32 v; + + v = omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE); + v &= ~mask; + v |= m << __ffs(mask); + omap2_cm_write_mod_reg(v, PLL_MOD, CM_AUTOIDLE); +} + +void omap2xxx_cm_set_apll54_disable_autoidle(void) +{ + _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP, + OMAP24XX_AUTO_54M_MASK); +} + +void omap2xxx_cm_set_apll54_auto_low_power_stop(void) +{ + _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_DISABLE, + OMAP24XX_AUTO_54M_MASK); +} + +void omap2xxx_cm_set_apll96_disable_autoidle(void) +{ + _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP, + OMAP24XX_AUTO_96M_MASK); +} + +void omap2xxx_cm_set_apll96_auto_low_power_stop(void) +{ + _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_DISABLE, + OMAP24XX_AUTO_96M_MASK); +} + +/* Enable an APLL if off */ +static int _omap2xxx_apll_enable(u8 enable_bit, u8 status_bit) +{ + u32 v, m; + + m = EN_APLL_LOCKED << enable_bit; + + v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN); + if (v & m) + return 0; /* apll already enabled */ + + v |= m; + omap2_cm_write_mod_reg(v, PLL_MOD, CM_CLKEN); + + omap2xxx_cm_wait_module_ready(PLL_MOD, 1, status_bit); + + /* + * REVISIT: Should we return an error code if + * omap2xxx_cm_wait_module_ready() fails? + */ + return 0; +} + +/* Stop APLL */ +static void _omap2xxx_apll_disable(u8 enable_bit) +{ + u32 v; + + v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN); + v &= ~(EN_APLL_LOCKED << enable_bit); + omap2_cm_write_mod_reg(v, PLL_MOD, CM_CLKEN); +} + +/* Enable an APLL if off */ +int omap2xxx_cm_apll54_enable(void) +{ + return _omap2xxx_apll_enable(OMAP24XX_EN_54M_PLL_SHIFT, + OMAP24XX_ST_54M_APLL_SHIFT); +} + +/* Enable an APLL if off */ +int omap2xxx_cm_apll96_enable(void) +{ + return _omap2xxx_apll_enable(OMAP24XX_EN_96M_PLL_SHIFT, + OMAP24XX_ST_96M_APLL_SHIFT); +} + +/* Stop APLL */ +void omap2xxx_cm_apll54_disable(void) +{ + _omap2xxx_apll_disable(OMAP24XX_EN_54M_PLL_SHIFT); +} + +/* Stop APLL */ +void omap2xxx_cm_apll96_disable(void) +{ + _omap2xxx_apll_disable(OMAP24XX_EN_96M_PLL_SHIFT); +} + +/** + * omap2xxx_cm_split_idlest_reg - split CM_IDLEST reg addr into its components + * @idlest_reg: CM_IDLEST* virtual address + * @prcm_inst: pointer to an s16 to return the PRCM instance offset + * @idlest_reg_id: pointer to a u8 to return the CM_IDLESTx register ID + * + * XXX This function is only needed until absolute register addresses are + * removed from the OMAP struct clk records. + */ +int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst, + u8 *idlest_reg_id) +{ + unsigned long offs; + u8 idlest_offs; + int i; + + if (idlest_reg < cm_base || idlest_reg > (cm_base + 0x0fff)) + return -EINVAL; + + idlest_offs = (unsigned long)idlest_reg & 0xff; + for (i = 0; i < ARRAY_SIZE(omap2xxx_cm_idlest_offs); i++) { + if (idlest_offs == omap2xxx_cm_idlest_offs[i]) { + *idlest_reg_id = i + 1; + break; + } + } + + if (i == ARRAY_SIZE(omap2xxx_cm_idlest_offs)) + return -EINVAL; + + offs = idlest_reg - cm_base; + offs &= 0xff00; + *prcm_inst = offs; + + return 0; +} + +/* + * + */ + +/** + * omap2xxx_cm_wait_module_ready - wait for a module to leave idle or standby + * @prcm_mod: PRCM module offset + * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3) + * @idlest_shift: shift of the bit in the CM_IDLEST* register to check + * + * Wait for the PRCM to indicate that the module identified by + * (@prcm_mod, @idlest_id, @idlest_shift) is clocked. Return 0 upon + * success or -EBUSY if the module doesn't enable in time. + */ +int omap2xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift) +{ + int ena = 0, i = 0; + u8 cm_idlest_reg; + u32 mask; + + if (!idlest_id || (idlest_id > ARRAY_SIZE(omap2xxx_cm_idlest_offs))) + return -EINVAL; + + cm_idlest_reg = omap2xxx_cm_idlest_offs[idlest_id - 1]; + + mask = 1 << idlest_shift; + ena = mask; + + omap_test_timeout(((omap2_cm_read_mod_reg(prcm_mod, cm_idlest_reg) & + mask) == ena), MAX_MODULE_READY_TIME, i); + + return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; +} + +/* Clockdomain low-level functions */ + +static void omap2xxx_clkdm_allow_idle(struct clockdomain *clkdm) +{ + if (atomic_read(&clkdm->usecount) > 0) + _clkdm_add_autodeps(clkdm); + + omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); +} + +static void omap2xxx_clkdm_deny_idle(struct clockdomain *clkdm) +{ + omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + + if (atomic_read(&clkdm->usecount) > 0) + _clkdm_del_autodeps(clkdm); +} + +static int omap2xxx_clkdm_clk_enable(struct clockdomain *clkdm) +{ + bool hwsup = false; + + if (!clkdm->clktrctrl_mask) + return 0; + + hwsup = omap2xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + + if (hwsup) { + /* Disable HW transitions when we are changing deps */ + omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + _clkdm_add_autodeps(clkdm); + omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + } else { + if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) + omap2xxx_clkdm_wakeup(clkdm); + } + + return 0; +} + +static int omap2xxx_clkdm_clk_disable(struct clockdomain *clkdm) +{ + bool hwsup = false; + + if (!clkdm->clktrctrl_mask) + return 0; + + hwsup = omap2xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + + if (hwsup) { + /* Disable HW transitions when we are changing deps */ + omap2xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + _clkdm_del_autodeps(clkdm); + omap2xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + } else { + if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP) + omap2xxx_clkdm_sleep(clkdm); + } + + return 0; +} + +struct clkdm_ops omap2_clkdm_operations = { + .clkdm_add_wkdep = omap2_clkdm_add_wkdep, + .clkdm_del_wkdep = omap2_clkdm_del_wkdep, + .clkdm_read_wkdep = omap2_clkdm_read_wkdep, + .clkdm_clear_all_wkdeps = omap2_clkdm_clear_all_wkdeps, + .clkdm_sleep = omap2xxx_clkdm_sleep, + .clkdm_wakeup = omap2xxx_clkdm_wakeup, + .clkdm_allow_idle = omap2xxx_clkdm_allow_idle, + .clkdm_deny_idle = omap2xxx_clkdm_deny_idle, + .clkdm_clk_enable = omap2xxx_clkdm_clk_enable, + .clkdm_clk_disable = omap2xxx_clkdm_clk_disable, +}; + +/* + * + */ + +static struct cm_ll_data omap2xxx_cm_ll_data = { + .split_idlest_reg = &omap2xxx_cm_split_idlest_reg, + .wait_module_ready = &omap2xxx_cm_wait_module_ready, +}; + +int __init omap2xxx_cm_init(void) +{ + if (!cpu_is_omap24xx()) + return 0; + + return cm_register(&omap2xxx_cm_ll_data); +} + +static void __exit omap2xxx_cm_exit(void) +{ + if (!cpu_is_omap24xx()) + return; + + /* Should never happen */ + WARN(cm_unregister(&omap2xxx_cm_ll_data), + "%s: cm_ll_data function pointer mismatch\n", __func__); +} +__exitcall(omap2xxx_cm_exit); diff --git a/arch/arm/mach-omap2/cm2xxx.h b/arch/arm/mach-omap2/cm2xxx.h new file mode 100644 index 000000000000..4cbb39b051d2 --- /dev/null +++ b/arch/arm/mach-omap2/cm2xxx.h @@ -0,0 +1,70 @@ +/* + * OMAP2xxx Clock Management (CM) register definitions + * + * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc. + * Copyright (C) 2007-2010 Nokia Corporation + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * The CM hardware modules on the OMAP2/3 are quite similar to each + * other. The CM modules/instances on OMAP4 are quite different, so + * they are handled in a separate file. + */ +#ifndef __ARCH_ASM_MACH_OMAP2_CM2XXX_H +#define __ARCH_ASM_MACH_OMAP2_CM2XXX_H + +#include "prcm-common.h" +#include "cm2xxx_3xxx.h" + +#define OMAP2420_CM_REGADDR(module, reg) \ + OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg)) +#define OMAP2430_CM_REGADDR(module, reg) \ + OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg)) + +/* + * Module specific CM register offsets from CM_BASE + domain offset + * Use cm_{read,write}_mod_reg() with these registers. + * These register offsets generally appear in more than one PRCM submodule. + */ + +/* OMAP2-specific register offsets */ + +#define OMAP24XX_CM_FCLKEN2 0x0004 +#define OMAP24XX_CM_ICLKEN4 0x001c +#define OMAP24XX_CM_AUTOIDLE4 0x003c +#define OMAP24XX_CM_IDLEST4 0x002c + +/* CM_IDLEST bit field values to indicate deasserted IdleReq */ + +#define OMAP24XX_CM_IDLEST_VAL 0 + + +/* Clock management domain register get/set */ + +#ifndef __ASSEMBLER__ + +extern void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask); +extern void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask); + +extern void omap2xxx_cm_set_dpll_disable_autoidle(void); +extern void omap2xxx_cm_set_dpll_auto_low_power_stop(void); + +extern void omap2xxx_cm_set_apll54_disable_autoidle(void); +extern void omap2xxx_cm_set_apll54_auto_low_power_stop(void); +extern void omap2xxx_cm_set_apll96_disable_autoidle(void); +extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void); + +extern bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask); +extern int omap2xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, + u8 idlest_shift); +extern int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg, + s16 *prcm_inst, u8 *idlest_reg_id); + +extern int __init omap2xxx_cm_init(void); + +#endif + +#endif diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.h b/arch/arm/mach-omap2/cm2xxx_3xxx.h index 57b2f3c2fbf3..98e6b3c9cd9b 100644 --- a/arch/arm/mach-omap2/cm2xxx_3xxx.h +++ b/arch/arm/mach-omap2/cm2xxx_3xxx.h @@ -16,28 +16,7 @@ #ifndef __ARCH_ASM_MACH_OMAP2_CM2XXX_3XXX_H #define __ARCH_ASM_MACH_OMAP2_CM2XXX_3XXX_H -#include "prcm-common.h" - -#define OMAP2420_CM_REGADDR(module, reg) \ - OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg)) -#define OMAP2430_CM_REGADDR(module, reg) \ - OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg)) -#define OMAP34XX_CM_REGADDR(module, reg) \ - OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg)) - - -/* - * OMAP3-specific global CM registers - * Use cm_{read,write}_reg() with these registers. - * These registers appear once per CM module. - */ - -#define OMAP3430_CM_REVISION OMAP34XX_CM_REGADDR(OCP_MOD, 0x0000) -#define OMAP3430_CM_SYSCONFIG OMAP34XX_CM_REGADDR(OCP_MOD, 0x0010) -#define OMAP3430_CM_POLCTRL OMAP34XX_CM_REGADDR(OCP_MOD, 0x009c) - -#define OMAP3_CM_CLKOUT_CTRL_OFFSET 0x0070 -#define OMAP3430_CM_CLKOUT_CTRL OMAP_CM_REGADDR(OMAP3430_CCR_MOD, 0x0070) +#include "cm.h" /* * Module specific CM register offsets from CM_BASE + domain offset @@ -57,6 +36,7 @@ #define CM_IDLEST 0x0020 #define CM_IDLEST1 CM_IDLEST #define CM_IDLEST2 0x0024 +#define OMAP2430_CM_IDLEST3 0x0028 #define CM_AUTOIDLE 0x0030 #define CM_AUTOIDLE1 CM_AUTOIDLE #define CM_AUTOIDLE2 0x0034 @@ -66,70 +46,60 @@ #define CM_CLKSEL2 0x0044 #define OMAP2_CM_CLKSTCTRL 0x0048 -/* OMAP2-specific register offsets */ - -#define OMAP24XX_CM_FCLKEN2 0x0004 -#define OMAP24XX_CM_ICLKEN4 0x001c -#define OMAP24XX_CM_AUTOIDLE4 0x003c -#define OMAP24XX_CM_IDLEST4 0x002c - -#define OMAP2430_CM_IDLEST3 0x0028 - -/* OMAP3-specific register offsets */ - -#define OMAP3430_CM_CLKEN_PLL 0x0004 -#define OMAP3430ES2_CM_CLKEN2 0x0004 -#define OMAP3430ES2_CM_FCLKEN3 0x0008 -#define OMAP3430_CM_IDLEST_PLL CM_IDLEST2 -#define OMAP3430_CM_AUTOIDLE_PLL CM_AUTOIDLE2 -#define OMAP3430ES2_CM_AUTOIDLE2_PLL CM_AUTOIDLE2 -#define OMAP3430_CM_CLKSEL1 CM_CLKSEL -#define OMAP3430_CM_CLKSEL1_PLL CM_CLKSEL -#define OMAP3430_CM_CLKSEL2_PLL CM_CLKSEL2 -#define OMAP3430_CM_SLEEPDEP CM_CLKSEL2 -#define OMAP3430_CM_CLKSEL3 OMAP2_CM_CLKSTCTRL -#define OMAP3430_CM_CLKSTST 0x004c -#define OMAP3430ES2_CM_CLKSEL4 0x004c -#define OMAP3430ES2_CM_CLKSEL5 0x0050 -#define OMAP3430_CM_CLKSEL2_EMU 0x0050 -#define OMAP3430_CM_CLKSEL3_EMU 0x0054 +#ifndef __ASSEMBLER__ +#include <linux/io.h> -/* CM_IDLEST bit field values to indicate deasserted IdleReq */ +static inline u32 omap2_cm_read_mod_reg(s16 module, u16 idx) +{ + return __raw_readl(cm_base + module + idx); +} -#define OMAP24XX_CM_IDLEST_VAL 0 -#define OMAP34XX_CM_IDLEST_VAL 1 +static inline void omap2_cm_write_mod_reg(u32 val, s16 module, u16 idx) +{ + __raw_writel(val, cm_base + module + idx); +} +/* Read-modify-write a register in a CM module. Caller must lock */ +static inline u32 omap2_cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, + s16 idx) +{ + u32 v; -/* Clock management domain register get/set */ + v = omap2_cm_read_mod_reg(module, idx); + v &= ~mask; + v |= bits; + omap2_cm_write_mod_reg(v, module, idx); -#ifndef __ASSEMBLER__ + return v; +} -extern u32 omap2_cm_read_mod_reg(s16 module, u16 idx); -extern void omap2_cm_write_mod_reg(u32 val, s16 module, u16 idx); -extern u32 omap2_cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx); +/* Read a CM register, AND it, and shift the result down to bit 0 */ +static inline u32 omap2_cm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask) +{ + u32 v; -extern int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, - u8 idlest_shift); -extern u32 omap2_cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx); -extern u32 omap2_cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx); + v = omap2_cm_read_mod_reg(domain, idx); + v &= mask; + v >>= __ffs(mask); -extern bool omap2_cm_is_clkdm_in_hwsup(s16 module, u32 mask); -extern void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask); -extern void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask); + return v; +} -extern void omap3xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask); -extern void omap3xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask); -extern void omap3xxx_cm_clkdm_force_sleep(s16 module, u32 mask); -extern void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask); +static inline u32 omap2_cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) +{ + return omap2_cm_rmw_mod_reg_bits(bits, bits, module, idx); +} -extern void omap2xxx_cm_set_dpll_disable_autoidle(void); -extern void omap2xxx_cm_set_dpll_auto_low_power_stop(void); +static inline u32 omap2_cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) +{ + return omap2_cm_rmw_mod_reg_bits(bits, 0x0, module, idx); +} -extern void omap2xxx_cm_set_apll54_disable_autoidle(void); -extern void omap2xxx_cm_set_apll54_auto_low_power_stop(void); -extern void omap2xxx_cm_set_apll96_disable_autoidle(void); -extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void); +extern int omap2xxx_cm_apll54_enable(void); +extern void omap2xxx_cm_apll54_disable(void); +extern int omap2xxx_cm_apll96_enable(void); +extern void omap2xxx_cm_apll96_disable(void); #endif @@ -146,11 +116,4 @@ extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void); /* CM_IDLEST_GFX */ #define OMAP_ST_GFX_MASK (1 << 0) - -/* Function prototypes */ -# ifndef __ASSEMBLER__ -extern void omap3_cm_save_context(void); -extern void omap3_cm_restore_context(void); -# endif - #endif diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c index ed8dcaf4c849..058ce3c0873e 100644 --- a/arch/arm/mach-omap2/cm33xx.c +++ b/arch/arm/mach-omap2/cm33xx.c @@ -22,6 +22,7 @@ #include <linux/err.h> #include <linux/io.h> +#include "clockdomain.h" #include "cm.h" #include "cm33xx.h" #include "cm-regbits-34xx.h" @@ -309,3 +310,58 @@ void am33xx_cm_module_disable(u16 inst, s16 cdoffs, u16 clkctrl_offs) v &= ~AM33XX_MODULEMODE_MASK; am33xx_cm_write_reg(v, inst, clkctrl_offs); } + +/* + * Clockdomain low-level functions + */ + +static int am33xx_clkdm_sleep(struct clockdomain *clkdm) +{ + am33xx_cm_clkdm_force_sleep(clkdm->cm_inst, clkdm->clkdm_offs); + return 0; +} + +static int am33xx_clkdm_wakeup(struct clockdomain *clkdm) +{ + am33xx_cm_clkdm_force_wakeup(clkdm->cm_inst, clkdm->clkdm_offs); + return 0; +} + +static void am33xx_clkdm_allow_idle(struct clockdomain *clkdm) +{ + am33xx_cm_clkdm_enable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs); +} + +static void am33xx_clkdm_deny_idle(struct clockdomain *clkdm) +{ + am33xx_cm_clkdm_disable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs); +} + +static int am33xx_clkdm_clk_enable(struct clockdomain *clkdm) +{ + if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) + return am33xx_clkdm_wakeup(clkdm); + + return 0; +} + +static int am33xx_clkdm_clk_disable(struct clockdomain *clkdm) +{ + bool hwsup = false; + + hwsup = am33xx_cm_is_clkdm_in_hwsup(clkdm->cm_inst, clkdm->clkdm_offs); + + if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) + am33xx_clkdm_sleep(clkdm); + + return 0; +} + +struct clkdm_ops am33xx_clkdm_operations = { + .clkdm_sleep = am33xx_clkdm_sleep, + .clkdm_wakeup = am33xx_clkdm_wakeup, + .clkdm_allow_idle = am33xx_clkdm_allow_idle, + .clkdm_deny_idle = am33xx_clkdm_deny_idle, + .clkdm_clk_enable = am33xx_clkdm_clk_enable, + .clkdm_clk_disable = am33xx_clkdm_clk_disable, +}; diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.c b/arch/arm/mach-omap2/cm3xxx.c index 7f07ab02a5b3..c2086f2e86b6 100644 --- a/arch/arm/mach-omap2/cm2xxx_3xxx.c +++ b/arch/arm/mach-omap2/cm3xxx.c @@ -1,8 +1,10 @@ /* - * OMAP2/3 CM module functions + * OMAP3xxx CM module functions * * Copyright (C) 2009 Nokia Corporation + * Copyright (C) 2008-2010, 2012 Texas Instruments, Inc. * Paul Walmsley + * Rajendra Nayak <[email protected]> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -12,8 +14,6 @@ #include <linux/kernel.h> #include <linux/types.h> #include <linux/delay.h> -#include <linux/spinlock.h> -#include <linux/list.h> #include <linux/errno.h> #include <linux/err.h> #include <linux/io.h> @@ -21,56 +21,16 @@ #include "soc.h" #include "iomap.h" #include "common.h" +#include "prm2xxx_3xxx.h" #include "cm.h" -#include "cm2xxx_3xxx.h" -#include "cm-regbits-24xx.h" +#include "cm3xxx.h" #include "cm-regbits-34xx.h" +#include "clockdomain.h" -/* CM_AUTOIDLE_PLL.AUTO_* bit values for DPLLs */ -#define DPLL_AUTOIDLE_DISABLE 0x0 -#define OMAP2XXX_DPLL_AUTOIDLE_LOW_POWER_STOP 0x3 - -/* CM_AUTOIDLE_PLL.AUTO_* bit values for APLLs (OMAP2xxx only) */ -#define OMAP2XXX_APLL_AUTOIDLE_DISABLE 0x0 -#define OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP 0x3 - -static const u8 cm_idlest_offs[] = { - CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3, OMAP24XX_CM_IDLEST4 +static const u8 omap3xxx_cm_idlest_offs[] = { + CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3 }; -u32 omap2_cm_read_mod_reg(s16 module, u16 idx) -{ - return __raw_readl(cm_base + module + idx); -} - -void omap2_cm_write_mod_reg(u32 val, s16 module, u16 idx) -{ - __raw_writel(val, cm_base + module + idx); -} - -/* Read-modify-write a register in a CM module. Caller must lock */ -u32 omap2_cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx) -{ - u32 v; - - v = omap2_cm_read_mod_reg(module, idx); - v &= ~mask; - v |= bits; - omap2_cm_write_mod_reg(v, module, idx); - - return v; -} - -u32 omap2_cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) -{ - return omap2_cm_rmw_mod_reg_bits(bits, bits, module, idx); -} - -u32 omap2_cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) -{ - return omap2_cm_rmw_mod_reg_bits(bits, 0x0, module, idx); -} - /* * */ @@ -85,33 +45,15 @@ static void _write_clktrctrl(u8 c, s16 module, u32 mask) omap2_cm_write_mod_reg(v, module, OMAP2_CM_CLKSTCTRL); } -bool omap2_cm_is_clkdm_in_hwsup(s16 module, u32 mask) +bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask) { u32 v; - bool ret = 0; - - BUG_ON(!cpu_is_omap24xx() && !cpu_is_omap34xx()); v = omap2_cm_read_mod_reg(module, OMAP2_CM_CLKSTCTRL); v &= mask; v >>= __ffs(mask); - if (cpu_is_omap24xx()) - ret = (v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0; - else - ret = (v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0; - - return ret; -} - -void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask) -{ - _write_clktrctrl(OMAP24XX_CLKSTCTRL_ENABLE_AUTO, module, mask); -} - -void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask) -{ - _write_clktrctrl(OMAP24XX_CLKSTCTRL_DISABLE_AUTO, module, mask); + return (v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0; } void omap3xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask) @@ -135,109 +77,247 @@ void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask) } /* - * DPLL autoidle control + * */ -static void _omap2xxx_set_dpll_autoidle(u8 m) +/** + * omap3xxx_cm_wait_module_ready - wait for a module to leave idle or standby + * @prcm_mod: PRCM module offset + * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3) + * @idlest_shift: shift of the bit in the CM_IDLEST* register to check + * + * Wait for the PRCM to indicate that the module identified by + * (@prcm_mod, @idlest_id, @idlest_shift) is clocked. Return 0 upon + * success or -EBUSY if the module doesn't enable in time. + */ +int omap3xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift) { - u32 v; + int ena = 0, i = 0; + u8 cm_idlest_reg; + u32 mask; - v = omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE); - v &= ~OMAP24XX_AUTO_DPLL_MASK; - v |= m << OMAP24XX_AUTO_DPLL_SHIFT; - omap2_cm_write_mod_reg(v, PLL_MOD, CM_AUTOIDLE); -} + if (!idlest_id || (idlest_id > ARRAY_SIZE(omap3xxx_cm_idlest_offs))) + return -EINVAL; -void omap2xxx_cm_set_dpll_disable_autoidle(void) -{ - _omap2xxx_set_dpll_autoidle(OMAP2XXX_DPLL_AUTOIDLE_LOW_POWER_STOP); + cm_idlest_reg = omap3xxx_cm_idlest_offs[idlest_id - 1]; + + mask = 1 << idlest_shift; + ena = 0; + + omap_test_timeout(((omap2_cm_read_mod_reg(prcm_mod, cm_idlest_reg) & + mask) == ena), MAX_MODULE_READY_TIME, i); + + return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; } -void omap2xxx_cm_set_dpll_auto_low_power_stop(void) +/** + * omap3xxx_cm_split_idlest_reg - split CM_IDLEST reg addr into its components + * @idlest_reg: CM_IDLEST* virtual address + * @prcm_inst: pointer to an s16 to return the PRCM instance offset + * @idlest_reg_id: pointer to a u8 to return the CM_IDLESTx register ID + * + * XXX This function is only needed until absolute register addresses are + * removed from the OMAP struct clk records. + */ +int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst, + u8 *idlest_reg_id) { - _omap2xxx_set_dpll_autoidle(DPLL_AUTOIDLE_DISABLE); + unsigned long offs; + u8 idlest_offs; + int i; + + if (idlest_reg < (cm_base + OMAP3430_IVA2_MOD) || + idlest_reg > (cm_base + 0x1ffff)) + return -EINVAL; + + idlest_offs = (unsigned long)idlest_reg & 0xff; + for (i = 0; i < ARRAY_SIZE(omap3xxx_cm_idlest_offs); i++) { + if (idlest_offs == omap3xxx_cm_idlest_offs[i]) { + *idlest_reg_id = i + 1; + break; + } + } + + if (i == ARRAY_SIZE(omap3xxx_cm_idlest_offs)) + return -EINVAL; + + offs = idlest_reg - cm_base; + offs &= 0xff00; + *prcm_inst = offs; + + return 0; } -/* - * APLL autoidle control - */ +/* Clockdomain low-level operations */ -static void _omap2xxx_set_apll_autoidle(u8 m, u32 mask) +static int omap3xxx_clkdm_add_sleepdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) { - u32 v; + omap2_cm_set_mod_reg_bits((1 << clkdm2->dep_bit), + clkdm1->pwrdm.ptr->prcm_offs, + OMAP3430_CM_SLEEPDEP); + return 0; +} - v = omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE); - v &= ~mask; - v |= m << __ffs(mask); - omap2_cm_write_mod_reg(v, PLL_MOD, CM_AUTOIDLE); +static int omap3xxx_clkdm_del_sleepdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) +{ + omap2_cm_clear_mod_reg_bits((1 << clkdm2->dep_bit), + clkdm1->pwrdm.ptr->prcm_offs, + OMAP3430_CM_SLEEPDEP); + return 0; } -void omap2xxx_cm_set_apll54_disable_autoidle(void) +static int omap3xxx_clkdm_read_sleepdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) { - _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP, - OMAP24XX_AUTO_54M_MASK); + return omap2_cm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, + OMAP3430_CM_SLEEPDEP, + (1 << clkdm2->dep_bit)); } -void omap2xxx_cm_set_apll54_auto_low_power_stop(void) +static int omap3xxx_clkdm_clear_all_sleepdeps(struct clockdomain *clkdm) { - _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_DISABLE, - OMAP24XX_AUTO_54M_MASK); + struct clkdm_dep *cd; + u32 mask = 0; + + for (cd = clkdm->sleepdep_srcs; cd && cd->clkdm_name; cd++) { + if (!cd->clkdm) + continue; /* only happens if data is erroneous */ + + mask |= 1 << cd->clkdm->dep_bit; + atomic_set(&cd->sleepdep_usecount, 0); + } + omap2_cm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs, + OMAP3430_CM_SLEEPDEP); + return 0; } -void omap2xxx_cm_set_apll96_disable_autoidle(void) +static int omap3xxx_clkdm_sleep(struct clockdomain *clkdm) { - _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP, - OMAP24XX_AUTO_96M_MASK); + omap3xxx_cm_clkdm_force_sleep(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + return 0; } -void omap2xxx_cm_set_apll96_auto_low_power_stop(void) +static int omap3xxx_clkdm_wakeup(struct clockdomain *clkdm) { - _omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_DISABLE, - OMAP24XX_AUTO_96M_MASK); + omap3xxx_cm_clkdm_force_wakeup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + return 0; } -/* - * - */ +static void omap3xxx_clkdm_allow_idle(struct clockdomain *clkdm) +{ + if (atomic_read(&clkdm->usecount) > 0) + _clkdm_add_autodeps(clkdm); -/** - * omap2_cm_wait_idlest_ready - wait for a module to leave idle or standby - * @prcm_mod: PRCM module offset - * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3) - * @idlest_shift: shift of the bit in the CM_IDLEST* register to check - * - * XXX document - */ -int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift) + omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); +} + +static void omap3xxx_clkdm_deny_idle(struct clockdomain *clkdm) { - int ena = 0, i = 0; - u8 cm_idlest_reg; - u32 mask; + omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); - if (!idlest_id || (idlest_id > ARRAY_SIZE(cm_idlest_offs))) - return -EINVAL; + if (atomic_read(&clkdm->usecount) > 0) + _clkdm_del_autodeps(clkdm); +} - cm_idlest_reg = cm_idlest_offs[idlest_id - 1]; +static int omap3xxx_clkdm_clk_enable(struct clockdomain *clkdm) +{ + bool hwsup = false; - mask = 1 << idlest_shift; + if (!clkdm->clktrctrl_mask) + return 0; - if (cpu_is_omap24xx()) - ena = mask; - else if (cpu_is_omap34xx()) - ena = 0; - else - BUG(); + /* + * The CLKDM_MISSING_IDLE_REPORTING flag documentation has + * more details on the unpleasant problem this is working + * around + */ + if ((clkdm->flags & CLKDM_MISSING_IDLE_REPORTING) && + (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)) { + omap3xxx_clkdm_wakeup(clkdm); + return 0; + } + + hwsup = omap3xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + + if (hwsup) { + /* Disable HW transitions when we are changing deps */ + omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + _clkdm_add_autodeps(clkdm); + omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + } else { + if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) + omap3xxx_clkdm_wakeup(clkdm); + } + + return 0; +} - omap_test_timeout(((omap2_cm_read_mod_reg(prcm_mod, cm_idlest_reg) & mask) == ena), - MAX_MODULE_READY_TIME, i); +static int omap3xxx_clkdm_clk_disable(struct clockdomain *clkdm) +{ + bool hwsup = false; - return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; + if (!clkdm->clktrctrl_mask) + return 0; + + /* + * The CLKDM_MISSING_IDLE_REPORTING flag documentation has + * more details on the unpleasant problem this is working + * around + */ + if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING && + !(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) { + omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + return 0; + } + + hwsup = omap3xxx_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + + if (hwsup) { + /* Disable HW transitions when we are changing deps */ + omap3xxx_cm_clkdm_disable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + _clkdm_del_autodeps(clkdm); + omap3xxx_cm_clkdm_enable_hwsup(clkdm->pwrdm.ptr->prcm_offs, + clkdm->clktrctrl_mask); + } else { + if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP) + omap3xxx_clkdm_sleep(clkdm); + } + + return 0; } +struct clkdm_ops omap3_clkdm_operations = { + .clkdm_add_wkdep = omap2_clkdm_add_wkdep, + .clkdm_del_wkdep = omap2_clkdm_del_wkdep, + .clkdm_read_wkdep = omap2_clkdm_read_wkdep, + .clkdm_clear_all_wkdeps = omap2_clkdm_clear_all_wkdeps, + .clkdm_add_sleepdep = omap3xxx_clkdm_add_sleepdep, + .clkdm_del_sleepdep = omap3xxx_clkdm_del_sleepdep, + .clkdm_read_sleepdep = omap3xxx_clkdm_read_sleepdep, + .clkdm_clear_all_sleepdeps = omap3xxx_clkdm_clear_all_sleepdeps, + .clkdm_sleep = omap3xxx_clkdm_sleep, + .clkdm_wakeup = omap3xxx_clkdm_wakeup, + .clkdm_allow_idle = omap3xxx_clkdm_allow_idle, + .clkdm_deny_idle = omap3xxx_clkdm_deny_idle, + .clkdm_clk_enable = omap3xxx_clkdm_clk_enable, + .clkdm_clk_disable = omap3xxx_clkdm_clk_disable, +}; + /* * Context save/restore code - OMAP3 only */ -#ifdef CONFIG_ARCH_OMAP3 struct omap3_cm_regs { u32 iva2_cm_clksel1; u32 iva2_cm_clksel2; @@ -555,4 +635,31 @@ void omap3_cm_restore_context(void) omap2_cm_write_mod_reg(cm_context.cm_clkout_ctrl, OMAP3430_CCR_MOD, OMAP3_CM_CLKOUT_CTRL_OFFSET); } -#endif + +/* + * + */ + +static struct cm_ll_data omap3xxx_cm_ll_data = { + .split_idlest_reg = &omap3xxx_cm_split_idlest_reg, + .wait_module_ready = &omap3xxx_cm_wait_module_ready, +}; + +int __init omap3xxx_cm_init(void) +{ + if (!cpu_is_omap34xx()) + return 0; + + return cm_register(&omap3xxx_cm_ll_data); +} + +static void __exit omap3xxx_cm_exit(void) +{ + if (!cpu_is_omap34xx()) + return; + + /* Should never happen */ + WARN(cm_unregister(&omap3xxx_cm_ll_data), + "%s: cm_ll_data function pointer mismatch\n", __func__); +} +__exitcall(omap3xxx_cm_exit); diff --git a/arch/arm/mach-omap2/cm3xxx.h b/arch/arm/mach-omap2/cm3xxx.h new file mode 100644 index 000000000000..e8e146f4a43f --- /dev/null +++ b/arch/arm/mach-omap2/cm3xxx.h @@ -0,0 +1,91 @@ +/* + * OMAP2/3 Clock Management (CM) register definitions + * + * Copyright (C) 2007-2009 Texas Instruments, Inc. + * Copyright (C) 2007-2010 Nokia Corporation + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * The CM hardware modules on the OMAP2/3 are quite similar to each + * other. The CM modules/instances on OMAP4 are quite different, so + * they are handled in a separate file. + */ +#ifndef __ARCH_ASM_MACH_OMAP2_CM3XXX_H +#define __ARCH_ASM_MACH_OMAP2_CM3XXX_H + +#include "prcm-common.h" +#include "cm2xxx_3xxx.h" + +#define OMAP34XX_CM_REGADDR(module, reg) \ + OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg)) + + +/* + * OMAP3-specific global CM registers + * Use cm_{read,write}_reg() with these registers. + * These registers appear once per CM module. + */ + +#define OMAP3430_CM_REVISION OMAP34XX_CM_REGADDR(OCP_MOD, 0x0000) +#define OMAP3430_CM_SYSCONFIG OMAP34XX_CM_REGADDR(OCP_MOD, 0x0010) +#define OMAP3430_CM_POLCTRL OMAP34XX_CM_REGADDR(OCP_MOD, 0x009c) + +#define OMAP3_CM_CLKOUT_CTRL_OFFSET 0x0070 +#define OMAP3430_CM_CLKOUT_CTRL OMAP_CM_REGADDR(OMAP3430_CCR_MOD, 0x0070) + +/* + * Module specific CM register offsets from CM_BASE + domain offset + * Use cm_{read,write}_mod_reg() with these registers. + * These register offsets generally appear in more than one PRCM submodule. + */ + +/* OMAP3-specific register offsets */ + +#define OMAP3430_CM_CLKEN_PLL 0x0004 +#define OMAP3430ES2_CM_CLKEN2 0x0004 +#define OMAP3430ES2_CM_FCLKEN3 0x0008 +#define OMAP3430_CM_IDLEST_PLL CM_IDLEST2 +#define OMAP3430_CM_AUTOIDLE_PLL CM_AUTOIDLE2 +#define OMAP3430ES2_CM_AUTOIDLE2_PLL CM_AUTOIDLE2 +#define OMAP3430_CM_CLKSEL1 CM_CLKSEL +#define OMAP3430_CM_CLKSEL1_PLL CM_CLKSEL +#define OMAP3430_CM_CLKSEL2_PLL CM_CLKSEL2 +#define OMAP3430_CM_SLEEPDEP CM_CLKSEL2 +#define OMAP3430_CM_CLKSEL3 OMAP2_CM_CLKSTCTRL +#define OMAP3430_CM_CLKSTST 0x004c +#define OMAP3430ES2_CM_CLKSEL4 0x004c +#define OMAP3430ES2_CM_CLKSEL5 0x0050 +#define OMAP3430_CM_CLKSEL2_EMU 0x0050 +#define OMAP3430_CM_CLKSEL3_EMU 0x0054 + + +/* CM_IDLEST bit field values to indicate deasserted IdleReq */ + +#define OMAP34XX_CM_IDLEST_VAL 1 + + +#ifndef __ASSEMBLER__ + +extern void omap3xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask); +extern void omap3xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask); +extern void omap3xxx_cm_clkdm_force_sleep(s16 module, u32 mask); +extern void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask); + +extern bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask); +extern int omap3xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, + u8 idlest_shift); + +extern int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg, + s16 *prcm_inst, u8 *idlest_reg_id); + +extern void omap3_cm_save_context(void); +extern void omap3_cm_restore_context(void); + +extern int __init omap3xxx_cm_init(void); + +#endif + +#endif diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c new file mode 100644 index 000000000000..40b3b5a84458 --- /dev/null +++ b/arch/arm/mach-omap2/cm_common.c @@ -0,0 +1,140 @@ +/* + * OMAP2+ common Clock Management (CM) IP block functions + * + * Copyright (C) 2012 Texas Instruments, Inc. + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * XXX This code should eventually be moved to a CM driver. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/errno.h> + +#include "cm2xxx.h" +#include "cm3xxx.h" +#include "cm44xx.h" +#include "common.h" + +/* + * cm_ll_data: function pointers to SoC-specific implementations of + * common CM functions + */ +static struct cm_ll_data null_cm_ll_data; +static struct cm_ll_data *cm_ll_data = &null_cm_ll_data; + +/* cm_base: base virtual address of the CM IP block */ +void __iomem *cm_base; + +/* cm2_base: base virtual address of the CM2 IP block (OMAP44xx only) */ +void __iomem *cm2_base; + +/** + * omap2_set_globals_cm - set the CM/CM2 base addresses (for early use) + * @cm: CM base virtual address + * @cm2: CM2 base virtual address (if present on the booted SoC) + * + * XXX Will be replaced when the PRM/CM drivers are completed. + */ +void __init omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2) +{ + cm_base = cm; + cm2_base = cm2; +} + +/** + * cm_split_idlest_reg - split CM_IDLEST reg addr into its components + * @idlest_reg: CM_IDLEST* virtual address + * @prcm_inst: pointer to an s16 to return the PRCM instance offset + * @idlest_reg_id: pointer to a u8 to return the CM_IDLESTx register ID + * + * Given an absolute CM_IDLEST register address @idlest_reg, passes + * the PRCM instance offset and IDLEST register ID back to the caller + * via the @prcm_inst and @idlest_reg_id. Returns -EINVAL upon error, + * or 0 upon success. XXX This function is only needed until absolute + * register addresses are removed from the OMAP struct clk records. + */ +int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst, + u8 *idlest_reg_id) +{ + if (!cm_ll_data->split_idlest_reg) { + WARN_ONCE(1, "cm: %s: no low-level function defined\n", + __func__); + return -EINVAL; + } + + return cm_ll_data->split_idlest_reg(idlest_reg, prcm_inst, + idlest_reg_id); +} + +/** + * cm_wait_module_ready - wait for a module to leave idle or standby + * @prcm_mod: PRCM module offset + * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3) + * @idlest_shift: shift of the bit in the CM_IDLEST* register to check + * + * Wait for the PRCM to indicate that the module identified by + * (@prcm_mod, @idlest_id, @idlest_shift) is clocked. Return 0 upon + * success, -EBUSY if the module doesn't enable in time, or -EINVAL if + * no per-SoC wait_module_ready() function pointer has been registered + * or if the idlest register is unknown on the SoC. + */ +int cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift) +{ + if (!cm_ll_data->wait_module_ready) { + WARN_ONCE(1, "cm: %s: no low-level function defined\n", + __func__); + return -EINVAL; + } + + return cm_ll_data->wait_module_ready(prcm_mod, idlest_id, idlest_shift); +} + +/** + * cm_register - register per-SoC low-level data with the CM + * @cld: low-level per-SoC OMAP CM data & function pointers to register + * + * Register per-SoC low-level OMAP CM data and function pointers with + * the OMAP CM common interface. The caller must keep the data + * pointed to by @cld valid until it calls cm_unregister() and + * it returns successfully. Returns 0 upon success, -EINVAL if @cld + * is NULL, or -EEXIST if cm_register() has already been called + * without an intervening cm_unregister(). + */ +int cm_register(struct cm_ll_data *cld) +{ + if (!cld) + return -EINVAL; + + if (cm_ll_data != &null_cm_ll_data) + return -EEXIST; + + cm_ll_data = cld; + + return 0; +} + +/** + * cm_unregister - unregister per-SoC low-level data & function pointers + * @cld: low-level per-SoC OMAP CM data & function pointers to unregister + * + * Unregister per-SoC low-level OMAP CM data and function pointers + * that were previously registered with cm_register(). The + * caller may not destroy any of the data pointed to by @cld until + * this function returns successfully. Returns 0 upon success, or + * -EINVAL if @cld is NULL or if @cld does not match the struct + * cm_ll_data * previously registered by cm_register(). + */ +int cm_unregister(struct cm_ll_data *cld) +{ + if (!cld || cm_ll_data != cld) + return -EINVAL; + + cm_ll_data = &null_cm_ll_data; + + return 0; +} diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c index 1894015ff04b..7f9a464f01e9 100644 --- a/arch/arm/mach-omap2/cminst44xx.c +++ b/arch/arm/mach-omap2/cminst44xx.c @@ -2,8 +2,9 @@ * OMAP4 CM instance functions * * Copyright (C) 2009 Nokia Corporation - * Copyright (C) 2011 Texas Instruments, Inc. + * Copyright (C) 2008-2011 Texas Instruments, Inc. * Paul Walmsley + * Rajendra Nayak <[email protected]> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -22,6 +23,7 @@ #include "iomap.h" #include "common.h" +#include "clockdomain.h" #include "cm.h" #include "cm1_44xx.h" #include "cm2_44xx.h" @@ -343,3 +345,141 @@ void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs, v &= ~OMAP4430_MODULEMODE_MASK; omap4_cminst_write_inst_reg(v, part, inst, clkctrl_offs); } + +/* + * Clockdomain low-level functions + */ + +static int omap4_clkdm_add_wkup_sleep_dep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) +{ + omap4_cminst_set_inst_reg_bits((1 << clkdm2->dep_bit), + clkdm1->prcm_partition, + clkdm1->cm_inst, clkdm1->clkdm_offs + + OMAP4_CM_STATICDEP); + return 0; +} + +static int omap4_clkdm_del_wkup_sleep_dep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) +{ + omap4_cminst_clear_inst_reg_bits((1 << clkdm2->dep_bit), + clkdm1->prcm_partition, + clkdm1->cm_inst, clkdm1->clkdm_offs + + OMAP4_CM_STATICDEP); + return 0; +} + +static int omap4_clkdm_read_wkup_sleep_dep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) +{ + return omap4_cminst_read_inst_reg_bits(clkdm1->prcm_partition, + clkdm1->cm_inst, + clkdm1->clkdm_offs + + OMAP4_CM_STATICDEP, + (1 << clkdm2->dep_bit)); +} + +static int omap4_clkdm_clear_all_wkup_sleep_deps(struct clockdomain *clkdm) +{ + struct clkdm_dep *cd; + u32 mask = 0; + + if (!clkdm->prcm_partition) + return 0; + + for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) { + if (!cd->clkdm) + continue; /* only happens if data is erroneous */ + + mask |= 1 << cd->clkdm->dep_bit; + atomic_set(&cd->wkdep_usecount, 0); + } + + omap4_cminst_clear_inst_reg_bits(mask, clkdm->prcm_partition, + clkdm->cm_inst, clkdm->clkdm_offs + + OMAP4_CM_STATICDEP); + return 0; +} + +static int omap4_clkdm_sleep(struct clockdomain *clkdm) +{ + omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition, + clkdm->cm_inst, clkdm->clkdm_offs); + return 0; +} + +static int omap4_clkdm_wakeup(struct clockdomain *clkdm) +{ + omap4_cminst_clkdm_force_wakeup(clkdm->prcm_partition, + clkdm->cm_inst, clkdm->clkdm_offs); + return 0; +} + +static void omap4_clkdm_allow_idle(struct clockdomain *clkdm) +{ + omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition, + clkdm->cm_inst, clkdm->clkdm_offs); +} + +static void omap4_clkdm_deny_idle(struct clockdomain *clkdm) +{ + if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) + omap4_clkdm_wakeup(clkdm); + else + omap4_cminst_clkdm_disable_hwsup(clkdm->prcm_partition, + clkdm->cm_inst, + clkdm->clkdm_offs); +} + +static int omap4_clkdm_clk_enable(struct clockdomain *clkdm) +{ + if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) + return omap4_clkdm_wakeup(clkdm); + + return 0; +} + +static int omap4_clkdm_clk_disable(struct clockdomain *clkdm) +{ + bool hwsup = false; + + if (!clkdm->prcm_partition) + return 0; + + /* + * The CLKDM_MISSING_IDLE_REPORTING flag documentation has + * more details on the unpleasant problem this is working + * around + */ + if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING && + !(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) { + omap4_clkdm_allow_idle(clkdm); + return 0; + } + + hwsup = omap4_cminst_is_clkdm_in_hwsup(clkdm->prcm_partition, + clkdm->cm_inst, clkdm->clkdm_offs); + + if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) + omap4_clkdm_sleep(clkdm); + + return 0; +} + +struct clkdm_ops omap4_clkdm_operations = { + .clkdm_add_wkdep = omap4_clkdm_add_wkup_sleep_dep, + .clkdm_del_wkdep = omap4_clkdm_del_wkup_sleep_dep, + .clkdm_read_wkdep = omap4_clkdm_read_wkup_sleep_dep, + .clkdm_clear_all_wkdeps = omap4_clkdm_clear_all_wkup_sleep_deps, + .clkdm_add_sleepdep = omap4_clkdm_add_wkup_sleep_dep, + .clkdm_del_sleepdep = omap4_clkdm_del_wkup_sleep_dep, + .clkdm_read_sleepdep = omap4_clkdm_read_wkup_sleep_dep, + .clkdm_clear_all_sleepdeps = omap4_clkdm_clear_all_wkup_sleep_deps, + .clkdm_sleep = omap4_clkdm_sleep, + .clkdm_wakeup = omap4_clkdm_wakeup, + .clkdm_allow_idle = omap4_clkdm_allow_idle, + .clkdm_deny_idle = omap4_clkdm_deny_idle, + .clkdm_clk_enable = omap4_clkdm_clk_enable, + .clkdm_clk_disable = omap4_clkdm_clk_disable, +}; diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h index d69fdefef985..bd7bab889745 100644 --- a/arch/arm/mach-omap2/cminst44xx.h +++ b/arch/arm/mach-omap2/cminst44xx.h @@ -38,4 +38,6 @@ extern u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, s16 inst, extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, u32 mask); +extern void omap_cm_base_init(void); + #endif diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c index 34fb5b95859b..5c2fd4863b2b 100644 --- a/arch/arm/mach-omap2/common.c +++ b/arch/arm/mach-omap2/common.c @@ -14,196 +14,13 @@ */ #include <linux/kernel.h> #include <linux/init.h> -#include <linux/clk.h> -#include <linux/io.h> #include <linux/platform_data/dsp-omap.h> #include <plat/vram.h> -#include "soc.h" -#include "iomap.h" #include "common.h" -#include "clock.h" -#include "sdrc.h" -#include "control.h" #include "omap-secure.h" -/* Global address base setup code */ - -static void __init __omap2_set_globals(struct omap_globals *omap2_globals) -{ - omap2_set_globals_tap(omap2_globals); - omap2_set_globals_sdrc(omap2_globals); - omap2_set_globals_control(omap2_globals); - omap2_set_globals_prcm(omap2_globals); -} - -#if defined(CONFIG_SOC_OMAP2420) - -static struct omap_globals omap242x_globals = { - .class = OMAP242X_CLASS, - .tap = OMAP2_L4_IO_ADDRESS(0x48014000), - .sdrc = OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE), - .sms = OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE), - .ctrl = OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE), - .prm = OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE), - .cm = OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), -}; - -void __init omap2_set_globals_242x(void) -{ - __omap2_set_globals(&omap242x_globals); -} - -void __init omap242x_map_io(void) -{ - omap242x_map_common_io(); -} -#endif - -#if defined(CONFIG_SOC_OMAP2430) - -static struct omap_globals omap243x_globals = { - .class = OMAP243X_CLASS, - .tap = OMAP2_L4_IO_ADDRESS(0x4900a000), - .sdrc = OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE), - .sms = OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE), - .ctrl = OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE), - .prm = OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE), - .cm = OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), -}; - -void __init omap2_set_globals_243x(void) -{ - __omap2_set_globals(&omap243x_globals); -} - -void __init omap243x_map_io(void) -{ - omap243x_map_common_io(); -} -#endif - -#if defined(CONFIG_ARCH_OMAP3) - -static struct omap_globals omap3_globals = { - .class = OMAP343X_CLASS, - .tap = OMAP2_L4_IO_ADDRESS(0x4830A000), - .sdrc = OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE), - .sms = OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE), - .ctrl = OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE), - .prm = OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE), - .cm = OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), -}; - -void __init omap2_set_globals_3xxx(void) -{ - __omap2_set_globals(&omap3_globals); -} - -void __init omap3_map_io(void) -{ - omap34xx_map_common_io(); -} - -/* - * Adjust TAP register base such that omap3_check_revision accesses the correct - * TI81XX register for checking device ID (it adds 0x204 to tap base while - * TI81XX DEVICE ID register is at offset 0x600 from control base). - */ -#define TI81XX_TAP_BASE (TI81XX_CTRL_BASE + \ - TI81XX_CONTROL_DEVICE_ID - 0x204) - -static struct omap_globals ti81xx_globals = { - .class = OMAP343X_CLASS, - .tap = OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE), - .ctrl = OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE), - .prm = OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), - .cm = OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), -}; - -void __init omap2_set_globals_ti81xx(void) -{ - __omap2_set_globals(&ti81xx_globals); -} - -void __init ti81xx_map_io(void) -{ - omapti81xx_map_common_io(); -} -#endif - -#if defined(CONFIG_SOC_AM33XX) -#define AM33XX_TAP_BASE (AM33XX_CTRL_BASE + \ - TI81XX_CONTROL_DEVICE_ID - 0x204) - -static struct omap_globals am33xx_globals = { - .class = AM335X_CLASS, - .tap = AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE), - .ctrl = AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE), - .prm = AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), - .cm = AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), -}; - -void __init omap2_set_globals_am33xx(void) -{ - __omap2_set_globals(&am33xx_globals); -} - -void __init am33xx_map_io(void) -{ - omapam33xx_map_common_io(); -} -#endif - -#if defined(CONFIG_ARCH_OMAP4) -static struct omap_globals omap4_globals = { - .class = OMAP443X_CLASS, - .tap = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE), - .ctrl = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE), - .ctrl_pad = OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE), - .prm = OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE), - .cm = OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE), - .cm2 = OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE), - .prcm_mpu = OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE), -}; - -void __init omap2_set_globals_443x(void) -{ - __omap2_set_globals(&omap4_globals); -} - -void __init omap4_map_io(void) -{ - omap44xx_map_common_io(); -} -#endif - -#if defined(CONFIG_SOC_OMAP5) -static struct omap_globals omap5_globals = { - .class = OMAP54XX_CLASS, - .tap = OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE), - .ctrl = OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE), - .ctrl_pad = OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE), - .prm = OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE), - .cm = OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE), - .cm2 = OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE), - .prcm_mpu = OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE), -}; - -void __init omap2_set_globals_5xxx(void) -{ - omap2_set_globals_tap(&omap5_globals); - omap2_set_globals_control(&omap5_globals); - omap2_set_globals_prcm(&omap5_globals); -} - -void __init omap5_map_io(void) -{ - omap5_map_common_io(); -} -#endif - /* * Stub function for OMAP2 so that common files * continue to build when custom builds are used diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index 426fcfcfd821..08c586451f93 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -41,54 +41,6 @@ #define OMAP_INTC_START NR_IRQS -#ifdef CONFIG_SOC_OMAP2420 -extern void omap242x_map_common_io(void); -#else -static inline void omap242x_map_common_io(void) -{ -} -#endif - -#ifdef CONFIG_SOC_OMAP2430 -extern void omap243x_map_common_io(void); -#else -static inline void omap243x_map_common_io(void) -{ -} -#endif - -#ifdef CONFIG_ARCH_OMAP3 -extern void omap34xx_map_common_io(void); -#else -static inline void omap34xx_map_common_io(void) -{ -} -#endif - -#ifdef CONFIG_SOC_TI81XX -extern void omapti81xx_map_common_io(void); -#else -static inline void omapti81xx_map_common_io(void) -{ -} -#endif - -#ifdef CONFIG_SOC_AM33XX -extern void omapam33xx_map_common_io(void); -#else -static inline void omapam33xx_map_common_io(void) -{ -} -#endif - -#ifdef CONFIG_ARCH_OMAP4 -extern void omap44xx_map_common_io(void); -#else -static inline void omap44xx_map_common_io(void) -{ -} -#endif - #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2) int omap2_pm_init(void); #else @@ -125,14 +77,6 @@ static inline int omap_mux_late_init(void) } #endif -#ifdef CONFIG_SOC_OMAP5 -extern void omap5_map_common_io(void); -#else -static inline void omap5_map_common_io(void) -{ -} -#endif - extern void omap2_init_common_infrastructure(void); extern struct sys_timer omap2_timer; @@ -165,52 +109,43 @@ void am35xx_init_late(void); void ti81xx_init_late(void); void omap4430_init_late(void); int omap2_common_pm_late_init(void); -void omap_prcm_restart(char, const char *); -/* - * IO bases for various OMAP processors - * Except the tap base, rest all the io bases - * listed are physical addresses. - */ -struct omap_globals { - u32 class; /* OMAP class to detect */ - void __iomem *tap; /* Control module ID code */ - void __iomem *sdrc; /* SDRAM Controller */ - void __iomem *sms; /* SDRAM Memory Scheduler */ - void __iomem *ctrl; /* System Control Module */ - void __iomem *ctrl_pad; /* PAD Control Module */ - void __iomem *prm; /* Power and Reset Management */ - void __iomem *cm; /* Clock Management */ - void __iomem *cm2; - void __iomem *prcm_mpu; -}; - -void omap2_set_globals_242x(void); -void omap2_set_globals_243x(void); -void omap2_set_globals_3xxx(void); -void omap2_set_globals_443x(void); -void omap2_set_globals_5xxx(void); -void omap2_set_globals_ti81xx(void); -void omap2_set_globals_am33xx(void); - -/* These get called from omap2_set_globals_xxxx(), do not call these */ -void omap2_set_globals_tap(struct omap_globals *); -#if defined(CONFIG_SOC_HAS_OMAP2_SDRC) -void omap2_set_globals_sdrc(struct omap_globals *); +#if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430) +void omap2xxx_restart(char mode, const char *cmd); #else -static inline void omap2_set_globals_sdrc(struct omap_globals *omap2_globals) -{ } +static inline void omap2xxx_restart(char mode, const char *cmd) +{ +} #endif -void omap2_set_globals_control(struct omap_globals *); -void omap2_set_globals_prcm(struct omap_globals *); - -void omap242x_map_io(void); -void omap243x_map_io(void); -void omap3_map_io(void); -void am33xx_map_io(void); -void omap4_map_io(void); -void omap5_map_io(void); -void ti81xx_map_io(void); + +#ifdef CONFIG_ARCH_OMAP3 +void omap3xxx_restart(char mode, const char *cmd); +#else +static inline void omap3xxx_restart(char mode, const char *cmd) +{ +} +#endif + +#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) +void omap44xx_restart(char mode, const char *cmd); +#else +static inline void omap44xx_restart(char mode, const char *cmd) +{ +} +#endif + +/* This gets called from mach-omap2/io.c, do not call this */ +void __init omap2_set_globals_tap(u32 class, void __iomem *tap); + +void __init omap242x_map_io(void); +void __init omap243x_map_io(void); +void __init omap3_map_io(void); +void __init am33xx_map_io(void); +void __init omap4_map_io(void); +void __init omap5_map_io(void); +void __init ti81xx_map_io(void); + +/* omap_barriers_init() is OMAP4 only */ void omap_barriers_init(void); /** diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index bf2be5c5468d..2adb2683f074 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -20,8 +20,8 @@ #include "common.h" #include "cm-regbits-34xx.h" #include "prm-regbits-34xx.h" -#include "prm2xxx_3xxx.h" -#include "cm2xxx_3xxx.h" +#include "prm3xxx.h" +#include "cm3xxx.h" #include "sdrc.h" #include "pm.h" #include "control.h" @@ -147,13 +147,11 @@ static struct omap3_control_regs control_context; #define OMAP_CTRL_REGADDR(reg) (omap2_ctrl_base + (reg)) #define OMAP4_CTRL_PAD_REGADDR(reg) (omap4_ctrl_pad_base + (reg)) -void __init omap2_set_globals_control(struct omap_globals *omap2_globals) +void __init omap2_set_globals_control(void __iomem *ctrl, + void __iomem *ctrl_pad) { - if (omap2_globals->ctrl) - omap2_ctrl_base = omap2_globals->ctrl; - - if (omap2_globals->ctrl_pad) - omap4_ctrl_pad_base = omap2_globals->ctrl_pad; + omap2_ctrl_base = ctrl; + omap4_ctrl_pad_base = ctrl_pad; } void __iomem *omap_ctrl_base_get(void) diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h index a89e8256fd0e..4ca8747b3cc9 100644 --- a/arch/arm/mach-omap2/control.h +++ b/arch/arm/mach-omap2/control.h @@ -414,6 +414,8 @@ extern void omap_ctrl_write_dsp_boot_addr(u32 bootaddr); extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode); extern void omap3630_ctrl_disable_rta(void); extern int omap3_ctrl_save_padconf(void); +extern void omap2_set_globals_control(void __iomem *ctrl, + void __iomem *ctrl_pad); #else #define omap_ctrl_base_get() 0 #define omap_ctrl_readb(x) 0 diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index bc2756959be5..bca7a8885703 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -27,7 +27,6 @@ #include <linux/export.h> #include <linux/cpu_pm.h> -#include <plat/prcm.h> #include "powerdomain.h" #include "clockdomain.h" diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 2ad491d6910b..cf365c387c06 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -646,29 +646,3 @@ static int __init omap2_init_devices(void) return 0; } arch_initcall(omap2_init_devices); - -#if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE) -static int __init omap_init_wdt(void) -{ - int id = -1; - struct platform_device *pdev; - struct omap_hwmod *oh; - char *oh_name = "wd_timer2"; - char *dev_name = "omap_wdt"; - - if (!cpu_class_is_omap2() || of_have_populated_dt()) - return 0; - - oh = omap_hwmod_lookup(oh_name); - if (!oh) { - pr_err("Could not look up wd_timer%d hwmod\n", id); - return -EINVAL; - } - - pdev = omap_device_build(dev_name, id, oh, NULL, 0, NULL, 0, 0); - WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n", - dev_name, oh->name); - return 0; -} -subsys_initcall(omap_init_wdt); -#endif diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c index 89c57129357a..38ba58c97628 100644 --- a/arch/arm/mach-omap2/display.c +++ b/arch/arm/mach-omap2/display.c @@ -35,6 +35,7 @@ #include "mux.h" #include "control.h" #include "display.h" +#include "prm.h" #define DISPC_CONTROL 0x0040 #define DISPC_CONTROL2 0x0238 @@ -512,7 +513,6 @@ static void dispc_disable_outputs(void) } } -#define MAX_MODULE_SOFTRESET_WAIT 10000 int omap_dss_reset(struct omap_hwmod *oh) { struct omap_hwmod_opt_clk *oc; diff --git a/arch/arm/mach-omap2/hdq1w.c b/arch/arm/mach-omap2/hdq1w.c index 3da8900598c8..ab7bf181a105 100644 --- a/arch/arm/mach-omap2/hdq1w.c +++ b/arch/arm/mach-omap2/hdq1w.c @@ -31,11 +31,9 @@ #include "omap_device.h" #include "hdq1w.h" +#include "prm.h" #include "common.h" -/* Maximum microseconds to wait for OMAP module to softreset */ -#define MAX_MODULE_SOFTRESET_WAIT 10000 - /** * omap_hdq1w_reset - reset the OMAP HDQ1W module * @oh: struct omap_hwmod * diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c index 4e63097e3cd8..fbb9b152cd5e 100644 --- a/arch/arm/mach-omap2/i2c.c +++ b/arch/arm/mach-omap2/i2c.c @@ -20,10 +20,11 @@ */ #include "soc.h" -#include "common.h" #include "omap_hwmod.h" #include "omap_device.h" +#include "prm.h" +#include "common.h" #include "mux.h" #include "i2c.h" @@ -32,9 +33,6 @@ #define OMAP2_I2C_CON_OFFSET 0x24 #define OMAP4_I2C_CON_OFFSET 0xA4 -/* Maximum microseconds to wait for OMAP module to softreset */ -#define MAX_MODULE_SOFTRESET_WAIT 10000 - #define MAX_OMAP_I2C_HWMOD_NAME_LEN 16 static void __init omap2_i2c_mux_pins(int bus_id) diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 3c47a19a580f..45cc7ed4dd58 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -548,11 +548,12 @@ void __init omap5xxx_check_revision(void) * detect the exact revision later on in omap2_detect_revision() once map_io * is done. */ -void __init omap2_set_globals_tap(struct omap_globals *omap2_globals) +void __init omap2_set_globals_tap(u32 class, void __iomem *tap) { - omap_revision = omap2_globals->class; - tap_base = omap2_globals->tap; + omap_revision = class; + tap_base = tap; + /* XXX What is this intended to do? */ if (cpu_is_omap34xx()) tap_prod_id = 0x0210; else diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 807b8d919f81..9df757644cce 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -40,8 +40,16 @@ #include "clock44xx.h" #include "omap-pm.h" #include "sdrc.h" +#include "control.h" #include "serial.h" #include "sram.h" +#include "cm2xxx.h" +#include "cm3xxx.h" +#include "prm.h" +#include "cm.h" +#include "prcm_mpu44xx.h" +#include "prminst44xx.h" +#include "cminst44xx.h" /* * The machine specific code may provide the extra mapping besides the @@ -264,7 +272,7 @@ static struct map_desc omap54xx_io_desc[] __initdata = { #endif #ifdef CONFIG_SOC_OMAP2420 -void __init omap242x_map_common_io(void) +void __init omap242x_map_io(void) { iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc)); @@ -272,7 +280,7 @@ void __init omap242x_map_common_io(void) #endif #ifdef CONFIG_SOC_OMAP2430 -void __init omap243x_map_common_io(void) +void __init omap243x_map_io(void) { iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc)); @@ -280,28 +288,28 @@ void __init omap243x_map_common_io(void) #endif #ifdef CONFIG_ARCH_OMAP3 -void __init omap34xx_map_common_io(void) +void __init omap3_map_io(void) { iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc)); } #endif #ifdef CONFIG_SOC_TI81XX -void __init omapti81xx_map_common_io(void) +void __init ti81xx_map_io(void) { iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc)); } #endif #ifdef CONFIG_SOC_AM33XX -void __init omapam33xx_map_common_io(void) +void __init am33xx_map_io(void) { iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc)); } #endif #ifdef CONFIG_ARCH_OMAP4 -void __init omap44xx_map_common_io(void) +void __init omap4_map_io(void) { iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc)); omap_barriers_init(); @@ -309,7 +317,7 @@ void __init omap44xx_map_common_io(void) #endif #ifdef CONFIG_SOC_OMAP5 -void __init omap5_map_common_io(void) +void __init omap5_map_io(void) { iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc)); } @@ -371,8 +379,15 @@ static void __init omap_hwmod_init_postsetup(void) #ifdef CONFIG_SOC_OMAP2420 void __init omap2420_init_early(void) { - omap2_set_globals_242x(); + omap2_set_globals_tap(OMAP242X_CLASS, OMAP2_L4_IO_ADDRESS(0x48014000)); + omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE), + OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE)); + omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE), + NULL); + omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE)); + omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), NULL); omap2xxx_check_revision(); + omap2xxx_cm_init(); omap2xxx_voltagedomains_init(); omap242x_powerdomains_init(); omap242x_clockdomains_init(); @@ -392,8 +407,15 @@ void __init omap2420_init_late(void) #ifdef CONFIG_SOC_OMAP2430 void __init omap2430_init_early(void) { - omap2_set_globals_243x(); + omap2_set_globals_tap(OMAP243X_CLASS, OMAP2_L4_IO_ADDRESS(0x4900a000)); + omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE), + OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE)); + omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE), + NULL); + omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE)); + omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), NULL); omap2xxx_check_revision(); + omap2xxx_cm_init(); omap2xxx_voltagedomains_init(); omap243x_powerdomains_init(); omap243x_clockdomains_init(); @@ -417,9 +439,16 @@ void __init omap2430_init_late(void) #ifdef CONFIG_ARCH_OMAP3 void __init omap3_init_early(void) { - omap2_set_globals_3xxx(); + omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000)); + omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE), + OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE)); + omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE), + NULL); + omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE)); + omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL); omap3xxx_check_revision(); omap3xxx_check_features(); + omap3xxx_cm_init(); omap3xxx_voltagedomains_init(); omap3xxx_powerdomains_init(); omap3xxx_clockdomains_init(); @@ -450,7 +479,12 @@ void __init am35xx_init_early(void) void __init ti81xx_init_early(void) { - omap2_set_globals_ti81xx(); + omap2_set_globals_tap(OMAP343X_CLASS, + OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE)); + omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE), + NULL); + omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE)); + omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL); omap3xxx_check_revision(); ti81xx_check_features(); omap3xxx_voltagedomains_init(); @@ -507,7 +541,12 @@ void __init ti81xx_init_late(void) #ifdef CONFIG_SOC_AM33XX void __init am33xx_init_early(void) { - omap2_set_globals_am33xx(); + omap2_set_globals_tap(AM335X_CLASS, + AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE)); + omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE), + NULL); + omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE)); + omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL); omap3xxx_check_revision(); ti81xx_check_features(); am33xx_voltagedomains_init(); @@ -522,7 +561,16 @@ void __init am33xx_init_early(void) #ifdef CONFIG_ARCH_OMAP4 void __init omap4430_init_early(void) { - omap2_set_globals_443x(); + omap2_set_globals_tap(OMAP443X_CLASS, + OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE)); + omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE), + OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE)); + omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE)); + omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE), + OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE)); + omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE)); + omap_prm_base_init(); + omap_cm_base_init(); omap4xxx_check_revision(); omap4xxx_check_features(); omap44xx_voltagedomains_init(); @@ -544,7 +592,16 @@ void __init omap4430_init_late(void) #ifdef CONFIG_SOC_OMAP5 void __init omap5_init_early(void) { - omap2_set_globals_5xxx(); + omap2_set_globals_tap(OMAP54XX_CLASS, + OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE)); + omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE), + OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE)); + omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE)); + omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE), + OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE)); + omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE)); + omap_prm_base_init(); + omap_cm_base_init(); omap5xxx_check_revision(); } #endif diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index a106c75c5338..bf496510eb5e 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -29,7 +29,7 @@ * FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle. * Sidetone needs non-gated ICLK and sidetone autoidle is broken. */ -#include "cm2xxx_3xxx.h" +#include "cm3xxx.h" #include "cm-regbits-34xx.h" static int omap3_enable_st_clock(unsigned int id, bool enable) diff --git a/arch/arm/mach-omap2/msdi.c b/arch/arm/mach-omap2/msdi.c index 627e97e30743..aafdd4ca9f4f 100644 --- a/arch/arm/mach-omap2/msdi.c +++ b/arch/arm/mach-omap2/msdi.c @@ -25,6 +25,7 @@ #include <linux/err.h> #include <linux/platform_data/gpio-omap.h> +#include "prm.h" #include "common.h" #include "control.h" #include "omap_hwmod.h" @@ -43,9 +44,6 @@ #define MSDI_CON_CLKD_MASK (0x3f << 0) #define MSDI_CON_CLKD_SHIFT 0 -/* Maximum microseconds to wait for OMAP module to softreset */ -#define MAX_MODULE_SOFTRESET_WAIT 10000 - /* MSDI_TARGET_RESET_CLKD: clock divisor to use throughout the reset */ #define MSDI_TARGET_RESET_CLKD 0x3ff diff --git a/arch/arm/mach-omap2/omap2-restart.c b/arch/arm/mach-omap2/omap2-restart.c new file mode 100644 index 000000000000..be6bc89ab1e8 --- /dev/null +++ b/arch/arm/mach-omap2/omap2-restart.c @@ -0,0 +1,65 @@ +/* + * omap2-restart.c - code common to all OMAP2xxx machines. + * + * Copyright (C) 2012 Texas Instruments + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/clk.h> +#include <linux/io.h> + +#include "common.h" +#include "prm2xxx.h" + +/* + * reset_virt_prcm_set_ck, reset_sys_ck: pointers to the virt_prcm_set + * clock and the sys_ck. Used during the reset process + */ +static struct clk *reset_virt_prcm_set_ck, *reset_sys_ck; + +/* Reboot handling */ + +/** + * omap2xxx_restart - Set DPLL to bypass mode for reboot to work + * + * Set the DPLL to bypass so that reboot completes successfully. No + * return value. + */ +void omap2xxx_restart(char mode, const char *cmd) +{ + u32 rate; + + rate = clk_get_rate(reset_sys_ck); + clk_set_rate(reset_virt_prcm_set_ck, rate); + + /* XXX Should save the cmd argument for use after the reboot */ + + omap2xxx_prm_dpll_reset(); /* never returns */ + while (1); +} + +/** + * omap2xxx_common_look_up_clks_for_reset - look up clocks needed for restart + * + * Some clocks need to be looked up in advance for the SoC restart + * operation to work - see omap2xxx_restart(). Returns -EINVAL upon + * error or 0 upon success. + */ +static int __init omap2xxx_common_look_up_clks_for_reset(void) +{ + reset_virt_prcm_set_ck = clk_get(NULL, "virt_prcm_set"); + if (IS_ERR(reset_virt_prcm_set_ck)) + return -EINVAL; + + reset_sys_ck = clk_get(NULL, "sys_ck"); + if (IS_ERR(reset_sys_ck)) + return -EINVAL; + + return 0; +} +core_initcall(omap2xxx_common_look_up_clks_for_reset); diff --git a/arch/arm/mach-omap2/omap3-restart.c b/arch/arm/mach-omap2/omap3-restart.c new file mode 100644 index 000000000000..923c582189e5 --- /dev/null +++ b/arch/arm/mach-omap2/omap3-restart.c @@ -0,0 +1,36 @@ +/* + * omap3-restart.c - Code common to all OMAP3xxx machines. + * + * Copyright (C) 2009, 2012 Texas Instruments + * Copyright (C) 2010 Nokia Corporation + * Tony Lindgren <[email protected]> + * Santosh Shilimkar <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <linux/kernel.h> +#include <linux/init.h> + +#include "iomap.h" +#include "common.h" +#include "control.h" +#include "prm3xxx.h" + +/* Global address base setup code */ + +/** + * omap3xxx_restart - trigger a software restart of the SoC + * @mode: the "reboot mode", see arch/arm/kernel/{setup,process}.c + * @cmd: passed from the userspace program rebooting the system (if provided) + * + * Resets the SoC. For @cmd, see the 'reboot' syscall in + * kernel/sys.c. No return value. + */ +void omap3xxx_restart(char mode, const char *cmd) +{ + omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0)); + omap3xxx_prm_dpll3_reset(); /* never returns */ + while (1); +} diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index 3cfcd41bf8fa..5695885ea340 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -27,9 +27,12 @@ #include "omap-wakeupgen.h" #include "soc.h" +#include "iomap.h" #include "common.h" #include "mmc.h" #include "hsmmc.h" +#include "prminst44xx.h" +#include "prcm_mpu44xx.h" #include "omap4-sar-layout.h" #include "omap-secure.h" #include "sram.h" @@ -279,3 +282,19 @@ int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers) return 0; } #endif + +/** + * omap44xx_restart - trigger a software restart of the SoC + * @mode: the "reboot mode", see arch/arm/kernel/{setup,process}.c + * @cmd: passed from the userspace program rebooting the system (if provided) + * + * Resets the SoC. For @cmd, see the 'reboot' syscall in + * kernel/sys.c. No return value. + */ +void omap44xx_restart(char mode, const char *cmd) +{ + /* XXX Should save 'cmd' into scratchpad for use after reboot */ + omap4_prminst_global_warm_sw_reset(); /* never returns */ + while (1); +} + diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 87eee3b62a3c..139adca3bda1 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -141,25 +141,23 @@ #include "clock.h" #include "omap_hwmod.h" -#include <plat/prcm.h> #include "soc.h" #include "common.h" #include "clockdomain.h" #include "powerdomain.h" -#include "cm2xxx_3xxx.h" +#include "cm2xxx.h" +#include "cm3xxx.h" #include "cminst44xx.h" #include "cm33xx.h" -#include "prm2xxx_3xxx.h" +#include "prm.h" +#include "prm3xxx.h" #include "prm44xx.h" #include "prm33xx.h" #include "prminst44xx.h" #include "mux.h" #include "pm.h" -/* Maximum microseconds to wait for OMAP module to softreset */ -#define MAX_MODULE_SOFTRESET_WAIT 10000 - /* Name of the OMAP hwmod for the MPU */ #define MPU_INITIATOR_NAME "mpu" @@ -2063,7 +2061,8 @@ static int _enable(struct omap_hwmod *oh) _enable_sysc(oh); } } else { - _omap4_disable_module(oh); + if (soc_ops.disable_module) + soc_ops.disable_module(oh); _disable_clocks(oh); pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n", oh->name, r); @@ -2668,7 +2667,34 @@ static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois) /* Static functions intended only for use in soc_ops field function pointers */ /** - * _omap2_wait_target_ready - wait for a module to leave slave idle + * _omap2xxx_wait_target_ready - wait for a module to leave slave idle + * @oh: struct omap_hwmod * + * + * Wait for a module @oh to leave slave idle. Returns 0 if the module + * does not have an IDLEST bit or if the module successfully leaves + * slave idle; otherwise, pass along the return value of the + * appropriate *_cm*_wait_module_ready() function. + */ +static int _omap2xxx_wait_target_ready(struct omap_hwmod *oh) +{ + if (!oh) + return -EINVAL; + + if (oh->flags & HWMOD_NO_IDLEST) + return 0; + + if (!_find_mpu_rt_port(oh)) + return 0; + + /* XXX check module SIDLEMODE, hardreset status, enabled clocks */ + + return omap2xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs, + oh->prcm.omap2.idlest_reg_id, + oh->prcm.omap2.idlest_idle_bit); +} + +/** + * _omap3xxx_wait_target_ready - wait for a module to leave slave idle * @oh: struct omap_hwmod * * * Wait for a module @oh to leave slave idle. Returns 0 if the module @@ -2676,7 +2702,7 @@ static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois) * slave idle; otherwise, pass along the return value of the * appropriate *_cm*_wait_module_ready() function. */ -static int _omap2_wait_target_ready(struct omap_hwmod *oh) +static int _omap3xxx_wait_target_ready(struct omap_hwmod *oh) { if (!oh) return -EINVAL; @@ -2689,9 +2715,9 @@ static int _omap2_wait_target_ready(struct omap_hwmod *oh) /* XXX check module SIDLEMODE, hardreset status, enabled clocks */ - return omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs, - oh->prcm.omap2.idlest_reg_id, - oh->prcm.omap2.idlest_idle_bit); + return omap3xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs, + oh->prcm.omap2.idlest_reg_id, + oh->prcm.omap2.idlest_idle_bit); } /** @@ -3959,8 +3985,13 @@ int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx) */ void __init omap_hwmod_init(void) { - if (cpu_is_omap24xx() || cpu_is_omap34xx()) { - soc_ops.wait_target_ready = _omap2_wait_target_ready; + if (cpu_is_omap24xx()) { + soc_ops.wait_target_ready = _omap2xxx_wait_target_ready; + soc_ops.assert_hardreset = _omap2_assert_hardreset; + soc_ops.deassert_hardreset = _omap2_deassert_hardreset; + soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted; + } else if (cpu_is_omap34xx()) { + soc_ops.wait_target_ready = _omap3xxx_wait_target_ready; soc_ops.assert_hardreset = _omap2_assert_hardreset; soc_ops.deassert_hardreset = _omap2_deassert_hardreset; soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted; diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index 9a2f5594a7dc..13e1f4303989 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c @@ -43,9 +43,9 @@ #include "soc.h" #include "common.h" #include "clock.h" -#include "prm2xxx_3xxx.h" +#include "prm2xxx.h" #include "prm-regbits-24xx.h" -#include "cm2xxx_3xxx.h" +#include "cm2xxx.h" #include "cm-regbits-24xx.h" #include "sdrc.h" #include "sram.h" diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 11f9669eb7ed..770320061422 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -38,17 +38,15 @@ #include "clockdomain.h" #include "powerdomain.h" -#include <plat/prcm.h> #include <plat-omap/dma-omap.h> #include "soc.h" #include "common.h" -#include "cm2xxx_3xxx.h" +#include "cm3xxx.h" #include "cm-regbits-34xx.h" #include "gpmc.h" #include "prm-regbits-34xx.h" - -#include "prm2xxx_3xxx.h" +#include "prm3xxx.h" #include "pm.h" #include "sdrc.h" #include "sram.h" diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 1678a3284233..dea62a9aad07 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c @@ -29,8 +29,6 @@ #include <asm/cpu.h> -#include <plat/prcm.h> - #include "powerdomain.h" #include "clockdomain.h" diff --git a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c deleted file mode 100644 index 3950ccfe5f4a..000000000000 --- a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c +++ /dev/null @@ -1,242 +0,0 @@ -/* - * OMAP2 and OMAP3 powerdomain control - * - * Copyright (C) 2009-2011 Texas Instruments, Inc. - * Copyright (C) 2007-2009 Nokia Corporation - * - * Derived from mach-omap2/powerdomain.c written by Paul Walmsley - * Rajendra Nayak <[email protected]> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/io.h> -#include <linux/errno.h> -#include <linux/delay.h> -#include <linux/bug.h> - -#include <plat/prcm.h> - -#include "powerdomain.h" -#include "prm.h" -#include "prm-regbits-24xx.h" -#include "prm-regbits-34xx.h" - - -/* Common functions across OMAP2 and OMAP3 */ -static int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) -{ - omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK, - (pwrst << OMAP_POWERSTATE_SHIFT), - pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); - return 0; -} - -static int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) -{ - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP2_PM_PWSTCTRL, - OMAP_POWERSTATE_MASK); -} - -static int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm) -{ - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP2_PM_PWSTST, - OMAP_POWERSTATEST_MASK); -} - -static int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, - u8 pwrst) -{ - u32 m; - - m = omap2_pwrdm_get_mem_bank_onstate_mask(bank); - - omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, - OMAP2_PM_PWSTCTRL); - - return 0; -} - -static int omap2_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, - u8 pwrst) -{ - u32 m; - - m = omap2_pwrdm_get_mem_bank_retst_mask(bank); - - omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, - OMAP2_PM_PWSTCTRL); - - return 0; -} - -static int omap2_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) -{ - u32 m; - - m = omap2_pwrdm_get_mem_bank_stst_mask(bank); - - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTST, - m); -} - -static int omap2_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) -{ - u32 m; - - m = omap2_pwrdm_get_mem_bank_retst_mask(bank); - - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP2_PM_PWSTCTRL, m); -} - -static int omap2_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) -{ - u32 v; - - v = pwrst << __ffs(OMAP3430_LOGICL1CACHERETSTATE_MASK); - omap2_prm_rmw_mod_reg_bits(OMAP3430_LOGICL1CACHERETSTATE_MASK, v, - pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); - - return 0; -} - -static int omap2_pwrdm_wait_transition(struct powerdomain *pwrdm) -{ - u32 c = 0; - - /* - * REVISIT: pwrdm_wait_transition() may be better implemented - * via a callback and a periodic timer check -- how long do we expect - * powerdomain transitions to take? - */ - - /* XXX Is this udelay() value meaningful? */ - while ((omap2_prm_read_mod_reg(pwrdm->prcm_offs, OMAP2_PM_PWSTST) & - OMAP_INTRANSITION_MASK) && - (c++ < PWRDM_TRANSITION_BAILOUT)) - udelay(1); - - if (c > PWRDM_TRANSITION_BAILOUT) { - pr_err("powerdomain: %s: waited too long to complete transition\n", - pwrdm->name); - return -EAGAIN; - } - - pr_debug("powerdomain: completed transition in %d loops\n", c); - - return 0; -} - -/* Applicable only for OMAP3. Not supported on OMAP2 */ -static int omap3_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) -{ - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP3430_PM_PREPWSTST, - OMAP3430_LASTPOWERSTATEENTERED_MASK); -} - -static int omap3_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) -{ - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP2_PM_PWSTST, - OMAP3430_LOGICSTATEST_MASK); -} - -static int omap3_pwrdm_read_logic_retst(struct powerdomain *pwrdm) -{ - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP2_PM_PWSTCTRL, - OMAP3430_LOGICSTATEST_MASK); -} - -static int omap3_pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm) -{ - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP3430_PM_PREPWSTST, - OMAP3430_LASTLOGICSTATEENTERED_MASK); -} - -static int omap3_get_mem_bank_lastmemst_mask(u8 bank) -{ - switch (bank) { - case 0: - return OMAP3430_LASTMEM1STATEENTERED_MASK; - case 1: - return OMAP3430_LASTMEM2STATEENTERED_MASK; - case 2: - return OMAP3430_LASTSHAREDL2CACHEFLATSTATEENTERED_MASK; - case 3: - return OMAP3430_LASTL2FLATMEMSTATEENTERED_MASK; - default: - WARN_ON(1); /* should never happen */ - return -EEXIST; - } - return 0; -} - -static int omap3_pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank) -{ - u32 m; - - m = omap3_get_mem_bank_lastmemst_mask(bank); - - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP3430_PM_PREPWSTST, m); -} - -static int omap3_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) -{ - omap2_prm_write_mod_reg(0, pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST); - return 0; -} - -static int omap3_pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm) -{ - return omap2_prm_rmw_mod_reg_bits(0, - 1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, - pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); -} - -static int omap3_pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm) -{ - return omap2_prm_rmw_mod_reg_bits(1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, - 0, pwrdm->prcm_offs, - OMAP2_PM_PWSTCTRL); -} - -struct pwrdm_ops omap2_pwrdm_operations = { - .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst, - .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst, - .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst, - .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst, - .pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst, - .pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst, - .pwrdm_read_mem_pwrst = omap2_pwrdm_read_mem_pwrst, - .pwrdm_read_mem_retst = omap2_pwrdm_read_mem_retst, - .pwrdm_wait_transition = omap2_pwrdm_wait_transition, -}; - -struct pwrdm_ops omap3_pwrdm_operations = { - .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst, - .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst, - .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst, - .pwrdm_read_prev_pwrst = omap3_pwrdm_read_prev_pwrst, - .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst, - .pwrdm_read_logic_pwrst = omap3_pwrdm_read_logic_pwrst, - .pwrdm_read_logic_retst = omap3_pwrdm_read_logic_retst, - .pwrdm_read_prev_logic_pwrst = omap3_pwrdm_read_prev_logic_pwrst, - .pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst, - .pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst, - .pwrdm_read_mem_pwrst = omap2_pwrdm_read_mem_pwrst, - .pwrdm_read_mem_retst = omap2_pwrdm_read_mem_retst, - .pwrdm_read_prev_mem_pwrst = omap3_pwrdm_read_prev_mem_pwrst, - .pwrdm_clear_all_prev_pwrst = omap3_pwrdm_clear_all_prev_pwrst, - .pwrdm_enable_hdwr_sar = omap3_pwrdm_enable_hdwr_sar, - .pwrdm_disable_hdwr_sar = omap3_pwrdm_disable_hdwr_sar, - .pwrdm_wait_transition = omap2_pwrdm_wait_transition, -}; diff --git a/arch/arm/mach-omap2/powerdomain33xx.c b/arch/arm/mach-omap2/powerdomain33xx.c deleted file mode 100644 index 67c5663899b6..000000000000 --- a/arch/arm/mach-omap2/powerdomain33xx.c +++ /dev/null @@ -1,229 +0,0 @@ -/* - * AM33XX Powerdomain control - * - * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/ - * - * Derived from mach-omap2/powerdomain44xx.c written by Rajendra Nayak - * <[email protected]> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <linux/io.h> -#include <linux/errno.h> -#include <linux/delay.h> - -#include <plat/prcm.h> - -#include "powerdomain.h" -#include "prm33xx.h" -#include "prm-regbits-33xx.h" - - -static int am33xx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) -{ - am33xx_prm_rmw_reg_bits(OMAP_POWERSTATE_MASK, - (pwrst << OMAP_POWERSTATE_SHIFT), - pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - return 0; -} - -static int am33xx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - v &= OMAP_POWERSTATE_MASK; - v >>= OMAP_POWERSTATE_SHIFT; - - return v; -} - -static int am33xx_pwrdm_read_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); - v &= OMAP_POWERSTATEST_MASK; - v >>= OMAP_POWERSTATEST_SHIFT; - - return v; -} - -static int am33xx_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); - v &= AM33XX_LASTPOWERSTATEENTERED_MASK; - v >>= AM33XX_LASTPOWERSTATEENTERED_SHIFT; - - return v; -} - -static int am33xx_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm) -{ - am33xx_prm_rmw_reg_bits(AM33XX_LOWPOWERSTATECHANGE_MASK, - (1 << AM33XX_LOWPOWERSTATECHANGE_SHIFT), - pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - return 0; -} - -static int am33xx_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) -{ - am33xx_prm_rmw_reg_bits(AM33XX_LASTPOWERSTATEENTERED_MASK, - AM33XX_LASTPOWERSTATEENTERED_MASK, - pwrdm->prcm_offs, pwrdm->pwrstst_offs); - return 0; -} - -static int am33xx_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) -{ - u32 m; - - m = pwrdm->logicretstate_mask; - if (!m) - return -EINVAL; - - am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)), - pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - - return 0; -} - -static int am33xx_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); - v &= AM33XX_LOGICSTATEST_MASK; - v >>= AM33XX_LOGICSTATEST_SHIFT; - - return v; -} - -static int am33xx_pwrdm_read_logic_retst(struct powerdomain *pwrdm) -{ - u32 v, m; - - m = pwrdm->logicretstate_mask; - if (!m) - return -EINVAL; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - v &= m; - v >>= __ffs(m); - - return v; -} - -static int am33xx_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, - u8 pwrst) -{ - u32 m; - - m = pwrdm->mem_on_mask[bank]; - if (!m) - return -EINVAL; - - am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)), - pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - - return 0; -} - -static int am33xx_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, - u8 pwrst) -{ - u32 m; - - m = pwrdm->mem_ret_mask[bank]; - if (!m) - return -EINVAL; - - am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)), - pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - - return 0; -} - -static int am33xx_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) -{ - u32 m, v; - - m = pwrdm->mem_pwrst_mask[bank]; - if (!m) - return -EINVAL; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); - v &= m; - v >>= __ffs(m); - - return v; -} - -static int am33xx_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) -{ - u32 m, v; - - m = pwrdm->mem_retst_mask[bank]; - if (!m) - return -EINVAL; - - v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); - v &= m; - v >>= __ffs(m); - - return v; -} - -static int am33xx_pwrdm_wait_transition(struct powerdomain *pwrdm) -{ - u32 c = 0; - - /* - * REVISIT: pwrdm_wait_transition() may be better implemented - * via a callback and a periodic timer check -- how long do we expect - * powerdomain transitions to take? - */ - - /* XXX Is this udelay() value meaningful? */ - while ((am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs) - & OMAP_INTRANSITION_MASK) && - (c++ < PWRDM_TRANSITION_BAILOUT)) - udelay(1); - - if (c > PWRDM_TRANSITION_BAILOUT) { - pr_err("powerdomain: %s: waited too long to complete transition\n", - pwrdm->name); - return -EAGAIN; - } - - pr_debug("powerdomain: completed transition in %d loops\n", c); - - return 0; -} - -struct pwrdm_ops am33xx_pwrdm_operations = { - .pwrdm_set_next_pwrst = am33xx_pwrdm_set_next_pwrst, - .pwrdm_read_next_pwrst = am33xx_pwrdm_read_next_pwrst, - .pwrdm_read_pwrst = am33xx_pwrdm_read_pwrst, - .pwrdm_read_prev_pwrst = am33xx_pwrdm_read_prev_pwrst, - .pwrdm_set_logic_retst = am33xx_pwrdm_set_logic_retst, - .pwrdm_read_logic_pwrst = am33xx_pwrdm_read_logic_pwrst, - .pwrdm_read_logic_retst = am33xx_pwrdm_read_logic_retst, - .pwrdm_clear_all_prev_pwrst = am33xx_pwrdm_clear_all_prev_pwrst, - .pwrdm_set_lowpwrstchange = am33xx_pwrdm_set_lowpwrstchange, - .pwrdm_read_mem_pwrst = am33xx_pwrdm_read_mem_pwrst, - .pwrdm_read_mem_retst = am33xx_pwrdm_read_mem_retst, - .pwrdm_set_mem_onst = am33xx_pwrdm_set_mem_onst, - .pwrdm_set_mem_retst = am33xx_pwrdm_set_mem_retst, - .pwrdm_wait_transition = am33xx_pwrdm_wait_transition, -}; diff --git a/arch/arm/mach-omap2/powerdomain44xx.c b/arch/arm/mach-omap2/powerdomain44xx.c deleted file mode 100644 index aceb4f464c9b..000000000000 --- a/arch/arm/mach-omap2/powerdomain44xx.c +++ /dev/null @@ -1,285 +0,0 @@ -/* - * OMAP4 powerdomain control - * - * Copyright (C) 2009-2010, 2012 Texas Instruments, Inc. - * Copyright (C) 2007-2009 Nokia Corporation - * - * Derived from mach-omap2/powerdomain.c written by Paul Walmsley - * Rajendra Nayak <[email protected]> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/io.h> -#include <linux/errno.h> -#include <linux/delay.h> -#include <linux/bug.h> - -#include "powerdomain.h" -#include <plat/prcm.h> -#include "prm2xxx_3xxx.h" -#include "prm44xx.h" -#include "prminst44xx.h" -#include "prm-regbits-44xx.h" - -static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) -{ - omap4_prminst_rmw_inst_reg_bits(OMAP_POWERSTATE_MASK, - (pwrst << OMAP_POWERSTATE_SHIFT), - pwrdm->prcm_partition, - pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); - return 0; -} - -static int omap4_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTCTRL); - v &= OMAP_POWERSTATE_MASK; - v >>= OMAP_POWERSTATE_SHIFT; - - return v; -} - -static int omap4_pwrdm_read_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTST); - v &= OMAP_POWERSTATEST_MASK; - v >>= OMAP_POWERSTATEST_SHIFT; - - return v; -} - -static int omap4_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTST); - v &= OMAP4430_LASTPOWERSTATEENTERED_MASK; - v >>= OMAP4430_LASTPOWERSTATEENTERED_SHIFT; - - return v; -} - -static int omap4_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm) -{ - omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK, - (1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT), - pwrdm->prcm_partition, - pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); - return 0; -} - -static int omap4_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) -{ - omap4_prminst_rmw_inst_reg_bits(OMAP4430_LASTPOWERSTATEENTERED_MASK, - OMAP4430_LASTPOWERSTATEENTERED_MASK, - pwrdm->prcm_partition, - pwrdm->prcm_offs, OMAP4_PM_PWSTST); - return 0; -} - -static int omap4_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) -{ - u32 v; - - v = pwrst << __ffs(OMAP4430_LOGICRETSTATE_MASK); - omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOGICRETSTATE_MASK, v, - pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTCTRL); - - return 0; -} - -static int omap4_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, - u8 pwrst) -{ - u32 m; - - m = omap2_pwrdm_get_mem_bank_onstate_mask(bank); - - omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)), - pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTCTRL); - - return 0; -} - -static int omap4_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, - u8 pwrst) -{ - u32 m; - - m = omap2_pwrdm_get_mem_bank_retst_mask(bank); - - omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)), - pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTCTRL); - - return 0; -} - -static int omap4_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) -{ - u32 v; - - v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTST); - v &= OMAP4430_LOGICSTATEST_MASK; - v >>= OMAP4430_LOGICSTATEST_SHIFT; - - return v; -} - -static int omap4_pwrdm_read_logic_retst(struct powerdomain *pwrdm) -{ - u32 v; - - v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTCTRL); - v &= OMAP4430_LOGICRETSTATE_MASK; - v >>= OMAP4430_LOGICRETSTATE_SHIFT; - - return v; -} - -/** - * omap4_pwrdm_read_prev_logic_pwrst - read the previous logic powerstate - * @pwrdm: struct powerdomain * to read the state for - * - * Reads the previous logic powerstate for a powerdomain. This - * function must determine the previous logic powerstate by first - * checking the previous powerstate for the domain. If that was OFF, - * then logic has been lost. If previous state was RETENTION, the - * function reads the setting for the next retention logic state to - * see the actual value. In every other case, the logic is - * retained. Returns either PWRDM_POWER_OFF or PWRDM_POWER_RET - * depending whether the logic was retained or not. - */ -static int omap4_pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm) -{ - int state; - - state = omap4_pwrdm_read_prev_pwrst(pwrdm); - - if (state == PWRDM_POWER_OFF) - return PWRDM_POWER_OFF; - - if (state != PWRDM_POWER_RET) - return PWRDM_POWER_RET; - - return omap4_pwrdm_read_logic_retst(pwrdm); -} - -static int omap4_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) -{ - u32 m, v; - - m = omap2_pwrdm_get_mem_bank_stst_mask(bank); - - v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTST); - v &= m; - v >>= __ffs(m); - - return v; -} - -static int omap4_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) -{ - u32 m, v; - - m = omap2_pwrdm_get_mem_bank_retst_mask(bank); - - v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, - OMAP4_PM_PWSTCTRL); - v &= m; - v >>= __ffs(m); - - return v; -} - -/** - * omap4_pwrdm_read_prev_mem_pwrst - reads the previous memory powerstate - * @pwrdm: struct powerdomain * to read mem powerstate for - * @bank: memory bank index - * - * Reads the previous memory powerstate for a powerdomain. This - * function must determine the previous memory powerstate by first - * checking the previous powerstate for the domain. If that was OFF, - * then logic has been lost. If previous state was RETENTION, the - * function reads the setting for the next memory retention state to - * see the actual value. In every other case, the logic is - * retained. Returns either PWRDM_POWER_OFF or PWRDM_POWER_RET - * depending whether logic was retained or not. - */ -static int omap4_pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank) -{ - int state; - - state = omap4_pwrdm_read_prev_pwrst(pwrdm); - - if (state == PWRDM_POWER_OFF) - return PWRDM_POWER_OFF; - - if (state != PWRDM_POWER_RET) - return PWRDM_POWER_RET; - - return omap4_pwrdm_read_mem_retst(pwrdm, bank); -} - -static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm) -{ - u32 c = 0; - - /* - * REVISIT: pwrdm_wait_transition() may be better implemented - * via a callback and a periodic timer check -- how long do we expect - * powerdomain transitions to take? - */ - - /* XXX Is this udelay() value meaningful? */ - while ((omap4_prminst_read_inst_reg(pwrdm->prcm_partition, - pwrdm->prcm_offs, - OMAP4_PM_PWSTST) & - OMAP_INTRANSITION_MASK) && - (c++ < PWRDM_TRANSITION_BAILOUT)) - udelay(1); - - if (c > PWRDM_TRANSITION_BAILOUT) { - pr_err("powerdomain: %s: waited too long to complete transition\n", - pwrdm->name); - return -EAGAIN; - } - - pr_debug("powerdomain: completed transition in %d loops\n", c); - - return 0; -} - -struct pwrdm_ops omap4_pwrdm_operations = { - .pwrdm_set_next_pwrst = omap4_pwrdm_set_next_pwrst, - .pwrdm_read_next_pwrst = omap4_pwrdm_read_next_pwrst, - .pwrdm_read_pwrst = omap4_pwrdm_read_pwrst, - .pwrdm_read_prev_pwrst = omap4_pwrdm_read_prev_pwrst, - .pwrdm_set_lowpwrstchange = omap4_pwrdm_set_lowpwrstchange, - .pwrdm_clear_all_prev_pwrst = omap4_pwrdm_clear_all_prev_pwrst, - .pwrdm_set_logic_retst = omap4_pwrdm_set_logic_retst, - .pwrdm_read_logic_pwrst = omap4_pwrdm_read_logic_pwrst, - .pwrdm_read_prev_logic_pwrst = omap4_pwrdm_read_prev_logic_pwrst, - .pwrdm_read_logic_retst = omap4_pwrdm_read_logic_retst, - .pwrdm_read_mem_pwrst = omap4_pwrdm_read_mem_pwrst, - .pwrdm_read_mem_retst = omap4_pwrdm_read_mem_retst, - .pwrdm_read_prev_mem_pwrst = omap4_pwrdm_read_prev_mem_pwrst, - .pwrdm_set_mem_onst = omap4_pwrdm_set_mem_onst, - .pwrdm_set_mem_retst = omap4_pwrdm_set_mem_retst, - .pwrdm_wait_transition = omap4_pwrdm_wait_transition, -}; diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h index 72df97482cc0..c7d355fafd24 100644 --- a/arch/arm/mach-omap2/prcm-common.h +++ b/arch/arm/mach-omap2/prcm-common.h @@ -406,11 +406,6 @@ #define OMAP3430_EN_CORE_MASK (1 << 0) -/* - * MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP - * submodule to exit hardreset - */ -#define MAX_MODULE_HARDRESET_WAIT 10000 /* * Maximum time(us) it takes to output the signal WUCLKOUT of the last @@ -419,24 +414,7 @@ * microseconds on OMAP4, so this timeout may be too high. */ #define MAX_IOPAD_LATCH_TIME 100 - # ifndef __ASSEMBLER__ -extern void __iomem *prm_base; -extern void __iomem *cm_base; -extern void __iomem *cm2_base; -extern void __iomem *prcm_mpu_base; - -#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) -extern void omap_prm_base_init(void); -extern void omap_cm_base_init(void); -#else -static inline void omap_prm_base_init(void) -{ -} -static inline void omap_cm_base_init(void) -{ -} -#endif /** * struct omap_prcm_irq - describes a PRCM interrupt bit diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c deleted file mode 100644 index cff270a178c5..000000000000 --- a/arch/arm/mach-omap2/prcm.c +++ /dev/null @@ -1,189 +0,0 @@ -/* - * linux/arch/arm/mach-omap2/prcm.c - * - * OMAP 24xx Power Reset and Clock Management (PRCM) functions - * - * Copyright (C) 2005 Nokia Corporation - * - * Written by Tony Lindgren <[email protected]> - * - * Copyright (C) 2007 Texas Instruments, Inc. - * Rajendra Nayak <[email protected]> - * - * Some pieces of code Copyright (C) 2005 Texas Instruments, Inc. - * Upgraded with OMAP4 support by Abhijit Pagare <[email protected]> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/clk.h> -#include <linux/io.h> -#include <linux/delay.h> -#include <linux/export.h> - -#include "common.h" -#include <plat/prcm.h> - -#include "soc.h" -#include "clock.h" -#include "clock2xxx.h" -#include "cm2xxx_3xxx.h" -#include "prm2xxx_3xxx.h" -#include "prm44xx.h" -#include "prminst44xx.h" -#include "cminst44xx.h" -#include "prm-regbits-24xx.h" -#include "prm-regbits-44xx.h" -#include "control.h" - -void __iomem *prm_base; -void __iomem *cm_base; -void __iomem *cm2_base; -void __iomem *prcm_mpu_base; - -#define MAX_MODULE_ENABLE_WAIT 100000 - -u32 omap_prcm_get_reset_sources(void) -{ - /* XXX This presumably needs modification for 34XX */ - if (cpu_is_omap24xx() || cpu_is_omap34xx()) - return omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTST) & 0x7f; - if (cpu_is_omap44xx()) - return omap2_prm_read_mod_reg(WKUP_MOD, OMAP4_RM_RSTST) & 0x7f; - - return 0; -} -EXPORT_SYMBOL(omap_prcm_get_reset_sources); - -/* Resets clock rates and reboots the system. Only called from system.h */ -void omap_prcm_restart(char mode, const char *cmd) -{ - s16 prcm_offs = 0; - - if (cpu_is_omap24xx()) { - omap2xxx_clk_prepare_for_reboot(); - - prcm_offs = WKUP_MOD; - } else if (cpu_is_omap34xx()) { - prcm_offs = OMAP3430_GR_MOD; - omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0)); - } else if (cpu_is_omap44xx()) { - omap4_prminst_global_warm_sw_reset(); /* never returns */ - } else { - WARN_ON(1); - } - - /* - * As per Errata i520, in some cases, user will not be able to - * access DDR memory after warm-reset. - * This situation occurs while the warm-reset happens during a read - * access to DDR memory. In that particular condition, DDR memory - * does not respond to a corrupted read command due to the warm - * reset occurrence but SDRC is waiting for read completion. - * SDRC is not sensitive to the warm reset, but the interconnect is - * reset on the fly, thus causing a misalignment between SDRC logic, - * interconnect logic and DDR memory state. - * WORKAROUND: - * Steps to perform before a Warm reset is trigged: - * 1. enable self-refresh on idle request - * 2. put SDRC in idle - * 3. wait until SDRC goes to idle - * 4. generate SW reset (Global SW reset) - * - * Steps to be performed after warm reset occurs (in bootloader): - * if HW warm reset is the source, apply below steps before any - * accesses to SDRAM: - * 1. Reset SMS and SDRC and wait till reset is complete - * 2. Re-initialize SMS, SDRC and memory - * - * NOTE: Above work around is required only if arch reset is implemented - * using Global SW reset(GLOBAL_SW_RST). DPLL3 reset does not need - * the WA since it resets SDRC as well as part of cold reset. - */ - - /* XXX should be moved to some OMAP2/3 specific code */ - omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, prcm_offs, - OMAP2_RM_RSTCTRL); - omap2_prm_read_mod_reg(prcm_offs, OMAP2_RM_RSTCTRL); /* OCP barrier */ -} - -/** - * omap2_cm_wait_idlest - wait for IDLEST bit to indicate module readiness - * @reg: physical address of module IDLEST register - * @mask: value to mask against to determine if the module is active - * @idlest: idle state indicator (0 or 1) for the clock - * @name: name of the clock (for printk) - * - * Returns 1 if the module indicated readiness in time, or 0 if it - * failed to enable in roughly MAX_MODULE_ENABLE_WAIT microseconds. - * - * XXX This function is deprecated. It should be removed once the - * hwmod conversion is complete. - */ -int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest, - const char *name) -{ - int i = 0; - int ena = 0; - - if (idlest) - ena = 0; - else - ena = mask; - - /* Wait for lock */ - omap_test_timeout(((__raw_readl(reg) & mask) == ena), - MAX_MODULE_ENABLE_WAIT, i); - - if (i < MAX_MODULE_ENABLE_WAIT) - pr_debug("cm: Module associated with clock %s ready after %d loops\n", - name, i); - else - pr_err("cm: Module associated with clock %s didn't enable in %d tries\n", - name, MAX_MODULE_ENABLE_WAIT); - - return (i < MAX_MODULE_ENABLE_WAIT) ? 1 : 0; -}; - -void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals) -{ - if (omap2_globals->prm) - prm_base = omap2_globals->prm; - if (omap2_globals->cm) - cm_base = omap2_globals->cm; - if (omap2_globals->cm2) - cm2_base = omap2_globals->cm2; - if (omap2_globals->prcm_mpu) - prcm_mpu_base = omap2_globals->prcm_mpu; - - if (cpu_is_omap44xx() || soc_is_omap54xx()) { - omap_prm_base_init(); - omap_cm_base_init(); - } -} - -/* - * Stubbed functions so that common files continue to build when - * custom builds are used - * XXX These are temporary and should be removed at the earliest possible - * opportunity - */ -int __weak omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, - u16 clkctrl_offs) -{ - return 0; -} - -void __weak omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, - s16 cdoffs, u16 clkctrl_offs) -{ -} - -void __weak omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs, - u16 clkctrl_offs) -{ -} diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.c b/arch/arm/mach-omap2/prcm_mpu44xx.c index 928dbd4f20ed..c30e44a7fab0 100644 --- a/arch/arm/mach-omap2/prcm_mpu44xx.c +++ b/arch/arm/mach-omap2/prcm_mpu44xx.c @@ -20,6 +20,12 @@ #include "prcm_mpu44xx.h" #include "cm-regbits-44xx.h" +/* + * prcm_mpu_base: the virtual address of the start of the PRCM_MPU IP + * block registers + */ +void __iomem *prcm_mpu_base; + /* PRCM_MPU low-level functions */ u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 reg) @@ -43,3 +49,14 @@ u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg) return v; } + +/** + * omap2_set_globals_prcm_mpu - set the MPU PRCM base address (for early use) + * @prcm_mpu: PRCM_MPU base virtual address + * + * XXX Will be replaced when the PRM/CM drivers are completed. + */ +void __init omap2_set_globals_prcm_mpu(void __iomem *prcm_mpu) +{ + prcm_mpu_base = prcm_mpu; +} diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.h b/arch/arm/mach-omap2/prcm_mpu44xx.h index 8a6e250f04b5..884af7bb4afd 100644 --- a/arch/arm/mach-omap2/prcm_mpu44xx.h +++ b/arch/arm/mach-omap2/prcm_mpu44xx.h @@ -1,7 +1,7 @@ /* * OMAP44xx PRCM MPU instance offset macros * - * Copyright (C) 2010 Texas Instruments, Inc. + * Copyright (C) 2010, 2012 Texas Instruments, Inc. * Copyright (C) 2010 Nokia Corporation * * Paul Walmsley ([email protected]) @@ -25,6 +25,12 @@ #ifndef __ARCH_ARM_MACH_OMAP2_PRCM_MPU44XX_H #define __ARCH_ARM_MACH_OMAP2_PRCM_MPU44XX_H +#include "common.h" + +# ifndef __ASSEMBLER__ +extern void __iomem *prcm_mpu_base; +# endif + #define OMAP4430_PRCM_MPU_BASE 0x48243000 #define OMAP44XX_PRCM_MPU_REGADDR(inst, reg) \ @@ -98,6 +104,7 @@ extern u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 idx); extern void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 idx); extern u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx); +extern void __init omap2_set_globals_prcm_mpu(void __iomem *prcm_mpu); # endif #endif diff --git a/arch/arm/mach-omap2/prm-regbits-24xx.h b/arch/arm/mach-omap2/prm-regbits-24xx.h index 6ac966103f34..638da6dd41c3 100644 --- a/arch/arm/mach-omap2/prm-regbits-24xx.h +++ b/arch/arm/mach-omap2/prm-regbits-24xx.h @@ -14,7 +14,7 @@ * published by the Free Software Foundation. */ -#include "prm2xxx_3xxx.h" +#include "prm2xxx.h" /* Bits shared between registers */ @@ -209,9 +209,13 @@ /* RM_RSTST_WKUP specific bits */ /* 2430 calls EXTWMPU_RST "EXTWARM_RST" and GLOBALWMPU_RST "GLOBALWARM_RST" */ +#define OMAP24XX_EXTWMPU_RST_SHIFT 6 #define OMAP24XX_EXTWMPU_RST_MASK (1 << 6) +#define OMAP24XX_SECU_WD_RST_SHIFT 5 #define OMAP24XX_SECU_WD_RST_MASK (1 << 5) +#define OMAP24XX_MPU_WD_RST_SHIFT 4 #define OMAP24XX_MPU_WD_RST_MASK (1 << 4) +#define OMAP24XX_SECU_VIOL_RST_SHIFT 3 #define OMAP24XX_SECU_VIOL_RST_MASK (1 << 3) /* PM_WKEN_WKUP specific bits */ diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h index 64c087af6a8b..838b594d4e13 100644 --- a/arch/arm/mach-omap2/prm-regbits-34xx.h +++ b/arch/arm/mach-omap2/prm-regbits-34xx.h @@ -14,7 +14,7 @@ #define __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_34XX_H -#include "prm2xxx_3xxx.h" +#include "prm3xxx.h" /* Shared register bits */ @@ -509,15 +509,25 @@ #define OMAP3430_RSTTIME1_MASK (0xff << 0) /* PRM_RSTST */ +#define OMAP3430_ICECRUSHER_RST_SHIFT 10 #define OMAP3430_ICECRUSHER_RST_MASK (1 << 10) +#define OMAP3430_ICEPICK_RST_SHIFT 9 #define OMAP3430_ICEPICK_RST_MASK (1 << 9) +#define OMAP3430_VDD2_VOLTAGE_MANAGER_RST_SHIFT 8 #define OMAP3430_VDD2_VOLTAGE_MANAGER_RST_MASK (1 << 8) +#define OMAP3430_VDD1_VOLTAGE_MANAGER_RST_SHIFT 7 #define OMAP3430_VDD1_VOLTAGE_MANAGER_RST_MASK (1 << 7) +#define OMAP3430_EXTERNAL_WARM_RST_SHIFT 6 #define OMAP3430_EXTERNAL_WARM_RST_MASK (1 << 6) +#define OMAP3430_SECURE_WD_RST_SHIFT 5 #define OMAP3430_SECURE_WD_RST_MASK (1 << 5) +#define OMAP3430_MPU_WD_RST_SHIFT 4 #define OMAP3430_MPU_WD_RST_MASK (1 << 4) +#define OMAP3430_SECURITY_VIOL_RST_SHIFT 3 #define OMAP3430_SECURITY_VIOL_RST_MASK (1 << 3) +#define OMAP3430_GLOBAL_SW_RST_SHIFT 1 #define OMAP3430_GLOBAL_SW_RST_MASK (1 << 1) +#define OMAP3430_GLOBAL_COLD_RST_SHIFT 0 #define OMAP3430_GLOBAL_COLD_RST_MASK (1 << 0) /* PRM_VOLTCTRL */ diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index 39d562169d18..a1a266ce90da 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h @@ -1,7 +1,7 @@ /* * OMAP2/3/4 Power/Reset Management (PRM) bitfield definitions * - * Copyright (C) 2007-2009 Texas Instruments, Inc. + * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc. * Copyright (C) 2010 Nokia Corporation * * Paul Walmsley @@ -15,6 +15,28 @@ #include "prcm-common.h" +# ifndef __ASSEMBLER__ +extern void __iomem *prm_base; +extern void omap2_set_globals_prm(void __iomem *prm); +# endif + + +/* + * MAX_MODULE_SOFTRESET_WAIT: Maximum microseconds to wait for OMAP + * module to softreset + */ +#define MAX_MODULE_SOFTRESET_WAIT 10000 + +/* + * MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP + * submodule to exit hardreset + */ +#define MAX_MODULE_HARDRESET_WAIT 10000 + +/* + * Register bitfields + */ + /* * 24XX: PM_PWSTST_CORE, PM_PWSTST_GFX, PM_PWSTST_MPU, PM_PWSTST_DSP * @@ -52,5 +74,58 @@ #define OMAP_POWERSTATE_SHIFT 0 #define OMAP_POWERSTATE_MASK (0x3 << 0) +/* + * Standardized OMAP reset source bits + * + * To the extent these happen to match the hardware register bit + * shifts, it's purely coincidental. Used by omap-wdt.c. + * OMAP_UNKNOWN_RST_SRC_ID_SHIFT is a special value, used whenever + * there are any bits remaining in the global PRM_RSTST register that + * haven't been identified, or when the PRM code for the current SoC + * doesn't know how to interpret the register. + */ +#define OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT 0 +#define OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT 1 +#define OMAP_SECU_VIOL_RST_SRC_ID_SHIFT 2 +#define OMAP_MPU_WD_RST_SRC_ID_SHIFT 3 +#define OMAP_SECU_WD_RST_SRC_ID_SHIFT 4 +#define OMAP_EXTWARM_RST_SRC_ID_SHIFT 5 +#define OMAP_VDD_MPU_VM_RST_SRC_ID_SHIFT 6 +#define OMAP_VDD_IVA_VM_RST_SRC_ID_SHIFT 7 +#define OMAP_VDD_CORE_VM_RST_SRC_ID_SHIFT 8 +#define OMAP_ICEPICK_RST_SRC_ID_SHIFT 9 +#define OMAP_ICECRUSHER_RST_SRC_ID_SHIFT 10 +#define OMAP_C2C_RST_SRC_ID_SHIFT 11 +#define OMAP_UNKNOWN_RST_SRC_ID_SHIFT 12 + +#ifndef __ASSEMBLER__ + +/** + * struct prm_reset_src_map - map register bitshifts to standard bitshifts + * @reg_shift: bitshift in the PRM reset source register + * @std_shift: bitshift equivalent in the standard reset source list + * + * The fields are signed because -1 is used as a terminator. + */ +struct prm_reset_src_map { + s8 reg_shift; + s8 std_shift; +}; + +/** + * struct prm_ll_data - fn ptrs to per-SoC PRM function implementations + * @read_reset_sources: ptr to the Soc PRM-specific get_reset_source impl + */ +struct prm_ll_data { + u32 (*read_reset_sources)(void); +}; + +extern int prm_register(struct prm_ll_data *pld); +extern int prm_unregister(struct prm_ll_data *pld); + +extern u32 prm_read_reset_sources(void); + +#endif + #endif diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c new file mode 100644 index 000000000000..bf24fc47603b --- /dev/null +++ b/arch/arm/mach-omap2/prm2xxx.c @@ -0,0 +1,139 @@ +/* + * OMAP2xxx PRM module functions + * + * Copyright (C) 2010-2012 Texas Instruments, Inc. + * Copyright (C) 2010 Nokia Corporation + * Benoît Cousson + * Paul Walmsley + * Rajendra Nayak <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/kernel.h> +#include <linux/errno.h> +#include <linux/err.h> +#include <linux/io.h> +#include <linux/irq.h> + +#include "common.h" +#include <plat/cpu.h> + +#include "vp.h" +#include "powerdomain.h" +#include "clockdomain.h" +#include "prm2xxx.h" +#include "cm2xxx_3xxx.h" +#include "prm-regbits-24xx.h" + +/* + * omap2xxx_prm_reset_src_map - map from bits in the PRM_RSTST_WKUP + * hardware register (which are specific to the OMAP2xxx SoCs) to + * reset source ID bit shifts (which is an OMAP SoC-independent + * enumeration) + */ +static struct prm_reset_src_map omap2xxx_prm_reset_src_map[] = { + { OMAP_GLOBALCOLD_RST_SHIFT, OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT }, + { OMAP_GLOBALWARM_RST_SHIFT, OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT }, + { OMAP24XX_SECU_VIOL_RST_SHIFT, OMAP_SECU_VIOL_RST_SRC_ID_SHIFT }, + { OMAP24XX_MPU_WD_RST_SHIFT, OMAP_MPU_WD_RST_SRC_ID_SHIFT }, + { OMAP24XX_SECU_WD_RST_SHIFT, OMAP_SECU_WD_RST_SRC_ID_SHIFT }, + { OMAP24XX_EXTWMPU_RST_SHIFT, OMAP_EXTWARM_RST_SRC_ID_SHIFT }, + { -1, -1 }, +}; + +/** + * omap2xxx_prm_read_reset_sources - return the last SoC reset source + * + * Return a u32 representing the last reset sources of the SoC. The + * returned reset source bits are standardized across OMAP SoCs. + */ +static u32 omap2xxx_prm_read_reset_sources(void) +{ + struct prm_reset_src_map *p; + u32 r = 0; + u32 v; + + v = omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTST); + + p = omap2xxx_prm_reset_src_map; + while (p->reg_shift >= 0 && p->std_shift >= 0) { + if (v & (1 << p->reg_shift)) + r |= 1 << p->std_shift; + p++; + } + + return r; +} + +/** + * omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC + * + * Set the DPLL reset bit, which should reboot the SoC. This is the + * recommended way to restart the SoC. No return value. + */ +void omap2xxx_prm_dpll_reset(void) +{ + omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, WKUP_MOD, + OMAP2_RM_RSTCTRL); + /* OCP barrier */ + omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTCTRL); +} + +int omap2xxx_clkdm_sleep(struct clockdomain *clkdm) +{ + omap2_prm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK, + clkdm->pwrdm.ptr->prcm_offs, + OMAP2_PM_PWSTCTRL); + return 0; +} + +int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm) +{ + omap2_prm_clear_mod_reg_bits(OMAP24XX_FORCESTATE_MASK, + clkdm->pwrdm.ptr->prcm_offs, + OMAP2_PM_PWSTCTRL); + return 0; +} + +struct pwrdm_ops omap2_pwrdm_operations = { + .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst, + .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst, + .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst, + .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst, + .pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst, + .pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst, + .pwrdm_read_mem_pwrst = omap2_pwrdm_read_mem_pwrst, + .pwrdm_read_mem_retst = omap2_pwrdm_read_mem_retst, + .pwrdm_wait_transition = omap2_pwrdm_wait_transition, +}; + +/* + * + */ + +static struct prm_ll_data omap2xxx_prm_ll_data = { + .read_reset_sources = &omap2xxx_prm_read_reset_sources, +}; + +static int __init omap2xxx_prm_init(void) +{ + if (!cpu_is_omap24xx()) + return 0; + + return prm_register(&omap2xxx_prm_ll_data); +} +subsys_initcall(omap2xxx_prm_init); + +static void __exit omap2xxx_prm_exit(void) +{ + if (!cpu_is_omap24xx()) + return; + + /* Should never happen */ + WARN(prm_unregister(&omap2xxx_prm_ll_data), + "%s: prm_ll_data function pointer mismatch\n", __func__); +} +__exitcall(omap2xxx_prm_exit); diff --git a/arch/arm/mach-omap2/prm2xxx.h b/arch/arm/mach-omap2/prm2xxx.h new file mode 100644 index 000000000000..fe8a14f190ab --- /dev/null +++ b/arch/arm/mach-omap2/prm2xxx.h @@ -0,0 +1,134 @@ +/* + * OMAP2xxx Power/Reset Management (PRM) register definitions + * + * Copyright (C) 2007-2009, 2011-2012 Texas Instruments, Inc. + * Copyright (C) 2008-2010 Nokia Corporation + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * The PRM hardware modules on the OMAP2/3 are quite similar to each + * other. The PRM on OMAP4 has a new register layout, and is handled + * in a separate file. + */ +#ifndef __ARCH_ARM_MACH_OMAP2_PRM2XXX_H +#define __ARCH_ARM_MACH_OMAP2_PRM2XXX_H + +#include "prcm-common.h" +#include "prm.h" +#include "prm2xxx_3xxx.h" + +#define OMAP2420_PRM_REGADDR(module, reg) \ + OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg)) +#define OMAP2430_PRM_REGADDR(module, reg) \ + OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg)) + +/* + * OMAP2-specific global PRM registers + * Use __raw_{read,write}l() with these registers. + * + * With a few exceptions, these are the register names beginning with + * PRCM_* on 24xx. (The exceptions are the IRQSTATUS and IRQENABLE + * bits.) + * + */ + +#define OMAP2_PRCM_REVISION_OFFSET 0x0000 +#define OMAP2420_PRCM_REVISION OMAP2420_PRM_REGADDR(OCP_MOD, 0x0000) +#define OMAP2_PRCM_SYSCONFIG_OFFSET 0x0010 +#define OMAP2420_PRCM_SYSCONFIG OMAP2420_PRM_REGADDR(OCP_MOD, 0x0010) + +#define OMAP2_PRCM_IRQSTATUS_MPU_OFFSET 0x0018 +#define OMAP2420_PRCM_IRQSTATUS_MPU OMAP2420_PRM_REGADDR(OCP_MOD, 0x0018) +#define OMAP2_PRCM_IRQENABLE_MPU_OFFSET 0x001c +#define OMAP2420_PRCM_IRQENABLE_MPU OMAP2420_PRM_REGADDR(OCP_MOD, 0x001c) + +#define OMAP2_PRCM_VOLTCTRL_OFFSET 0x0050 +#define OMAP2420_PRCM_VOLTCTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0050) +#define OMAP2_PRCM_VOLTST_OFFSET 0x0054 +#define OMAP2420_PRCM_VOLTST OMAP2420_PRM_REGADDR(OCP_MOD, 0x0054) +#define OMAP2_PRCM_CLKSRC_CTRL_OFFSET 0x0060 +#define OMAP2420_PRCM_CLKSRC_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0060) +#define OMAP2_PRCM_CLKOUT_CTRL_OFFSET 0x0070 +#define OMAP2420_PRCM_CLKOUT_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0070) +#define OMAP2_PRCM_CLKEMUL_CTRL_OFFSET 0x0078 +#define OMAP2420_PRCM_CLKEMUL_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0078) +#define OMAP2_PRCM_CLKCFG_CTRL_OFFSET 0x0080 +#define OMAP2420_PRCM_CLKCFG_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0080) +#define OMAP2_PRCM_CLKCFG_STATUS_OFFSET 0x0084 +#define OMAP2420_PRCM_CLKCFG_STATUS OMAP2420_PRM_REGADDR(OCP_MOD, 0x0084) +#define OMAP2_PRCM_VOLTSETUP_OFFSET 0x0090 +#define OMAP2420_PRCM_VOLTSETUP OMAP2420_PRM_REGADDR(OCP_MOD, 0x0090) +#define OMAP2_PRCM_CLKSSETUP_OFFSET 0x0094 +#define OMAP2420_PRCM_CLKSSETUP OMAP2420_PRM_REGADDR(OCP_MOD, 0x0094) +#define OMAP2_PRCM_POLCTRL_OFFSET 0x0098 +#define OMAP2420_PRCM_POLCTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0098) + +#define OMAP2430_PRCM_REVISION OMAP2430_PRM_REGADDR(OCP_MOD, 0x0000) +#define OMAP2430_PRCM_SYSCONFIG OMAP2430_PRM_REGADDR(OCP_MOD, 0x0010) + +#define OMAP2430_PRCM_IRQSTATUS_MPU OMAP2430_PRM_REGADDR(OCP_MOD, 0x0018) +#define OMAP2430_PRCM_IRQENABLE_MPU OMAP2430_PRM_REGADDR(OCP_MOD, 0x001c) + +#define OMAP2430_PRCM_VOLTCTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0050) +#define OMAP2430_PRCM_VOLTST OMAP2430_PRM_REGADDR(OCP_MOD, 0x0054) +#define OMAP2430_PRCM_CLKSRC_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0060) +#define OMAP2430_PRCM_CLKOUT_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0070) +#define OMAP2430_PRCM_CLKEMUL_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0078) +#define OMAP2430_PRCM_CLKCFG_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0080) +#define OMAP2430_PRCM_CLKCFG_STATUS OMAP2430_PRM_REGADDR(OCP_MOD, 0x0084) +#define OMAP2430_PRCM_VOLTSETUP OMAP2430_PRM_REGADDR(OCP_MOD, 0x0090) +#define OMAP2430_PRCM_CLKSSETUP OMAP2430_PRM_REGADDR(OCP_MOD, 0x0094) +#define OMAP2430_PRCM_POLCTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0098) + +/* + * Module specific PRM register offsets from PRM_BASE + domain offset + * + * Use prm_{read,write}_mod_reg() with these registers. + * + * With a few exceptions, these are the register names beginning with + * {PM,RM}_* on both OMAP2/3 SoC families.. (The exceptions are the + * IRQSTATUS and IRQENABLE bits.) + */ + +/* Register offsets appearing on both OMAP2 and OMAP3 */ + +#define OMAP2_RM_RSTCTRL 0x0050 +#define OMAP2_RM_RSTTIME 0x0054 +#define OMAP2_RM_RSTST 0x0058 +#define OMAP2_PM_PWSTCTRL 0x00e0 +#define OMAP2_PM_PWSTST 0x00e4 + +#define PM_WKEN 0x00a0 +#define PM_WKEN1 PM_WKEN +#define PM_WKST 0x00b0 +#define PM_WKST1 PM_WKST +#define PM_WKDEP 0x00c8 +#define PM_EVGENCTRL 0x00d4 +#define PM_EVGENONTIM 0x00d8 +#define PM_EVGENOFFTIM 0x00dc + +/* OMAP2xxx specific register offsets */ +#define OMAP24XX_PM_WKEN2 0x00a4 +#define OMAP24XX_PM_WKST2 0x00b4 + +#define OMAP24XX_PRCM_IRQSTATUS_DSP 0x00f0 /* IVA mod */ +#define OMAP24XX_PRCM_IRQENABLE_DSP 0x00f4 /* IVA mod */ +#define OMAP24XX_PRCM_IRQSTATUS_IVA 0x00f8 +#define OMAP24XX_PRCM_IRQENABLE_IVA 0x00fc + +#ifndef __ASSEMBLER__ +/* Function prototypes */ +extern int omap2xxx_clkdm_sleep(struct clockdomain *clkdm); +extern int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm); + +extern void omap2xxx_prm_dpll_reset(void); + +extern int __init prm2xxx_init(void); +extern int __exit prm2xxx_exit(void); + +#endif + +#endif diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c index 9529984d8d2b..30517f5af707 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.c +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c @@ -15,82 +15,12 @@ #include <linux/errno.h> #include <linux/err.h> #include <linux/io.h> -#include <linux/irq.h> -#include <plat/prcm.h> - -#include "soc.h" #include "common.h" -#include "vp.h" - +#include "powerdomain.h" #include "prm2xxx_3xxx.h" -#include "cm2xxx_3xxx.h" #include "prm-regbits-24xx.h" -#include "prm-regbits-34xx.h" - -static const struct omap_prcm_irq omap3_prcm_irqs[] = { - OMAP_PRCM_IRQ("wkup", 0, 0), - OMAP_PRCM_IRQ("io", 9, 1), -}; - -static struct omap_prcm_irq_setup omap3_prcm_irq_setup = { - .ack = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, - .mask = OMAP3_PRM_IRQENABLE_MPU_OFFSET, - .nr_regs = 1, - .irqs = omap3_prcm_irqs, - .nr_irqs = ARRAY_SIZE(omap3_prcm_irqs), - .irq = 11 + OMAP_INTC_START, - .read_pending_irqs = &omap3xxx_prm_read_pending_irqs, - .ocp_barrier = &omap3xxx_prm_ocp_barrier, - .save_and_clear_irqen = &omap3xxx_prm_save_and_clear_irqen, - .restore_irqen = &omap3xxx_prm_restore_irqen, -}; - -u32 omap2_prm_read_mod_reg(s16 module, u16 idx) -{ - return __raw_readl(prm_base + module + idx); -} - -void omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx) -{ - __raw_writel(val, prm_base + module + idx); -} - -/* Read-modify-write a register in a PRM module. Caller must lock */ -u32 omap2_prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx) -{ - u32 v; - - v = omap2_prm_read_mod_reg(module, idx); - v &= ~mask; - v |= bits; - omap2_prm_write_mod_reg(v, module, idx); - - return v; -} - -/* Read a PRM register, AND it, and shift the result down to bit 0 */ -u32 omap2_prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask) -{ - u32 v; - - v = omap2_prm_read_mod_reg(domain, idx); - v &= mask; - v >>= __ffs(mask); - - return v; -} - -u32 omap2_prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) -{ - return omap2_prm_rmw_mod_reg_bits(bits, bits, module, idx); -} - -u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) -{ - return omap2_prm_rmw_mod_reg_bits(bits, 0x0, module, idx); -} - +#include "clockdomain.h" /** * omap2_prm_is_hardreset_asserted - read the HW reset line state of @@ -104,9 +34,6 @@ u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) */ int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift) { - if (!(cpu_is_omap24xx() || cpu_is_omap34xx())) - return -EINVAL; - return omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL, (1 << shift)); } @@ -127,9 +54,6 @@ int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift) { u32 mask; - if (!(cpu_is_omap24xx() || cpu_is_omap34xx())) - return -EINVAL; - mask = 1 << shift; omap2_prm_rmw_mod_reg_bits(mask, mask, prm_mod, OMAP2_RM_RSTCTRL); @@ -156,9 +80,6 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift) u32 rst, st; int c; - if (!(cpu_is_omap24xx() || cpu_is_omap34xx())) - return -EINVAL; - rst = 1 << rst_shift; st = 1 << st_shift; @@ -178,188 +99,155 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift) return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; } -/* PRM VP */ - -/* - * struct omap3_vp - OMAP3 VP register access description. - * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg - */ -struct omap3_vp { - u32 tranxdone_status; -}; - -static struct omap3_vp omap3_vp[] = { - [OMAP3_VP_VDD_MPU_ID] = { - .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, - }, - [OMAP3_VP_VDD_CORE_ID] = { - .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK, - }, -}; - -#define MAX_VP_ID ARRAY_SIZE(omap3_vp); - -u32 omap3_prm_vp_check_txdone(u8 vp_id) -{ - struct omap3_vp *vp = &omap3_vp[vp_id]; - u32 irqstatus; - irqstatus = omap2_prm_read_mod_reg(OCP_MOD, - OMAP3_PRM_IRQSTATUS_MPU_OFFSET); - return irqstatus & vp->tranxdone_status; -} +/* Powerdomain low-level functions */ -void omap3_prm_vp_clear_txdone(u8 vp_id) +/* Common functions across OMAP2 and OMAP3 */ +int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) { - struct omap3_vp *vp = &omap3_vp[vp_id]; - - omap2_prm_write_mod_reg(vp->tranxdone_status, - OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); + omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK, + (pwrst << OMAP_POWERSTATE_SHIFT), + pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); + return 0; } -u32 omap3_prm_vcvp_read(u8 offset) +int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) { - return omap2_prm_read_mod_reg(OMAP3430_GR_MOD, offset); + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP2_PM_PWSTCTRL, + OMAP_POWERSTATE_MASK); } -void omap3_prm_vcvp_write(u32 val, u8 offset) +int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm) { - omap2_prm_write_mod_reg(val, OMAP3430_GR_MOD, offset); + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP2_PM_PWSTST, + OMAP_POWERSTATEST_MASK); } -u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset) +int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, + u8 pwrst) { - return omap2_prm_rmw_mod_reg_bits(mask, bits, OMAP3430_GR_MOD, offset); + u32 m; + + m = omap2_pwrdm_get_mem_bank_onstate_mask(bank); + + omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, + OMAP2_PM_PWSTCTRL); + + return 0; } -/** - * omap3xxx_prm_read_pending_irqs - read pending PRM MPU IRQs into @events - * @events: ptr to a u32, preallocated by caller - * - * Read PRM_IRQSTATUS_MPU bits, AND'ed with the currently-enabled PRM - * MPU IRQs, and store the result into the u32 pointed to by @events. - * No return value. - */ -void omap3xxx_prm_read_pending_irqs(unsigned long *events) +int omap2_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, + u8 pwrst) { - u32 mask, st; + u32 m; + + m = omap2_pwrdm_get_mem_bank_retst_mask(bank); - /* XXX Can the mask read be avoided (e.g., can it come from RAM?) */ - mask = omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET); - st = omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); + omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, + OMAP2_PM_PWSTCTRL); - events[0] = mask & st; + return 0; } -/** - * omap3xxx_prm_ocp_barrier - force buffered MPU writes to the PRM to complete - * - * Force any buffered writes to the PRM IP block to complete. Needed - * by the PRM IRQ handler, which reads and writes directly to the IP - * block, to avoid race conditions after acknowledging or clearing IRQ - * bits. No return value. - */ -void omap3xxx_prm_ocp_barrier(void) +int omap2_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) { - omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_REVISION_OFFSET); + u32 m; + + m = omap2_pwrdm_get_mem_bank_stst_mask(bank); + + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTST, + m); } -/** - * omap3xxx_prm_save_and_clear_irqen - save/clear PRM_IRQENABLE_MPU reg - * @saved_mask: ptr to a u32 array to save IRQENABLE bits - * - * Save the PRM_IRQENABLE_MPU register to @saved_mask. @saved_mask - * must be allocated by the caller. Intended to be used in the PRM - * interrupt handler suspend callback. The OCP barrier is needed to - * ensure the write to disable PRM interrupts reaches the PRM before - * returning; otherwise, spurious interrupts might occur. No return - * value. - */ -void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask) +int omap2_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) { - saved_mask[0] = omap2_prm_read_mod_reg(OCP_MOD, - OMAP3_PRM_IRQENABLE_MPU_OFFSET); - omap2_prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET); + u32 m; + + m = omap2_pwrdm_get_mem_bank_retst_mask(bank); - /* OCP barrier */ - omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_REVISION_OFFSET); + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP2_PM_PWSTCTRL, m); } -/** - * omap3xxx_prm_restore_irqen - set PRM_IRQENABLE_MPU register from args - * @saved_mask: ptr to a u32 array of IRQENABLE bits saved previously - * - * Restore the PRM_IRQENABLE_MPU register from @saved_mask. Intended - * to be used in the PRM interrupt handler resume callback to restore - * values saved by omap3xxx_prm_save_and_clear_irqen(). No OCP - * barrier should be needed here; any pending PRM interrupts will fire - * once the writes reach the PRM. No return value. - */ -void omap3xxx_prm_restore_irqen(u32 *saved_mask) +int omap2_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) { - omap2_prm_write_mod_reg(saved_mask[0], OCP_MOD, - OMAP3_PRM_IRQENABLE_MPU_OFFSET); + u32 v; + + v = pwrst << __ffs(OMAP_LOGICRETSTATE_MASK); + omap2_prm_rmw_mod_reg_bits(OMAP_LOGICRETSTATE_MASK, v, pwrdm->prcm_offs, + OMAP2_PM_PWSTCTRL); + + return 0; } -/** - * omap3xxx_prm_reconfigure_io_chain - clear latches and reconfigure I/O chain - * - * Clear any previously-latched I/O wakeup events and ensure that the - * I/O wakeup gates are aligned with the current mux settings. Works - * by asserting WUCLKIN, waiting for WUCLKOUT to be asserted, and then - * deasserting WUCLKIN and clearing the ST_IO_CHAIN WKST bit. No - * return value. - */ -void omap3xxx_prm_reconfigure_io_chain(void) +int omap2_pwrdm_wait_transition(struct powerdomain *pwrdm) { - int i = 0; + u32 c = 0; - omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD, - PM_WKEN); + /* + * REVISIT: pwrdm_wait_transition() may be better implemented + * via a callback and a periodic timer check -- how long do we expect + * powerdomain transitions to take? + */ - omap_test_timeout(omap2_prm_read_mod_reg(WKUP_MOD, PM_WKST) & - OMAP3430_ST_IO_CHAIN_MASK, - MAX_IOPAD_LATCH_TIME, i); - if (i == MAX_IOPAD_LATCH_TIME) - pr_warn("PRM: I/O chain clock line assertion timed out\n"); + /* XXX Is this udelay() value meaningful? */ + while ((omap2_prm_read_mod_reg(pwrdm->prcm_offs, OMAP2_PM_PWSTST) & + OMAP_INTRANSITION_MASK) && + (c++ < PWRDM_TRANSITION_BAILOUT)) + udelay(1); - omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD, - PM_WKEN); + if (c > PWRDM_TRANSITION_BAILOUT) { + pr_err("powerdomain: %s: waited too long to complete transition\n", + pwrdm->name); + return -EAGAIN; + } - omap2_prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN_MASK, WKUP_MOD, - PM_WKST); + pr_debug("powerdomain: completed transition in %d loops\n", c); - omap2_prm_read_mod_reg(WKUP_MOD, PM_WKST); + return 0; } -/** - * omap3xxx_prm_enable_io_wakeup - enable wakeup events from I/O wakeup latches - * - * Activates the I/O wakeup event latches and allows events logged by - * those latches to signal a wakeup event to the PRCM. For I/O - * wakeups to occur, WAKEUPENABLE bits must be set in the pad mux - * registers, and omap3xxx_prm_reconfigure_io_chain() must be called. - * No return value. - */ -static void __init omap3xxx_prm_enable_io_wakeup(void) +int omap2_clkdm_add_wkdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) +{ + omap2_prm_set_mod_reg_bits((1 << clkdm2->dep_bit), + clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP); + return 0; +} + +int omap2_clkdm_del_wkdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) +{ + omap2_prm_clear_mod_reg_bits((1 << clkdm2->dep_bit), + clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP); + return 0; +} + +int omap2_clkdm_read_wkdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2) { - if (omap3_has_io_wakeup()) - omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, - PM_WKEN); + return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, + PM_WKDEP, (1 << clkdm2->dep_bit)); } -static int __init omap3xxx_prcm_init(void) +int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm) { - int ret = 0; - - if (cpu_is_omap34xx()) { - omap3xxx_prm_enable_io_wakeup(); - ret = omap_prcm_register_chain_handler(&omap3_prcm_irq_setup); - if (!ret) - irq_set_status_flags(omap_prcm_event_to_irq("io"), - IRQ_NOAUTOEN); + struct clkdm_dep *cd; + u32 mask = 0; + + for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) { + if (!cd->clkdm) + continue; /* only happens if data is erroneous */ + + /* PRM accesses are slow, so minimize them */ + mask |= 1 << cd->clkdm->dep_bit; + atomic_set(&cd->wkdep_usecount, 0); } - return ret; + omap2_prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs, + PM_WKDEP); + return 0; } -subsys_initcall(omap3xxx_prcm_init); + diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h index c19d249b4816..78532d6fecd7 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.h +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h @@ -1,7 +1,7 @@ /* - * OMAP2/3 Power/Reset Management (PRM) register definitions + * OMAP2xxx/3xxx-common Power/Reset Management (PRM) register definitions * - * Copyright (C) 2007-2009, 2011 Texas Instruments, Inc. + * Copyright (C) 2007-2009, 2011-2012 Texas Instruments, Inc. * Copyright (C) 2008-2010 Nokia Corporation * Paul Walmsley * @@ -19,160 +19,6 @@ #include "prcm-common.h" #include "prm.h" -#define OMAP2420_PRM_REGADDR(module, reg) \ - OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg)) -#define OMAP2430_PRM_REGADDR(module, reg) \ - OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg)) -#define OMAP34XX_PRM_REGADDR(module, reg) \ - OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg)) - - -/* - * OMAP2-specific global PRM registers - * Use __raw_{read,write}l() with these registers. - * - * With a few exceptions, these are the register names beginning with - * PRCM_* on 24xx. (The exceptions are the IRQSTATUS and IRQENABLE - * bits.) - * - */ - -#define OMAP2_PRCM_REVISION_OFFSET 0x0000 -#define OMAP2420_PRCM_REVISION OMAP2420_PRM_REGADDR(OCP_MOD, 0x0000) -#define OMAP2_PRCM_SYSCONFIG_OFFSET 0x0010 -#define OMAP2420_PRCM_SYSCONFIG OMAP2420_PRM_REGADDR(OCP_MOD, 0x0010) - -#define OMAP2_PRCM_IRQSTATUS_MPU_OFFSET 0x0018 -#define OMAP2420_PRCM_IRQSTATUS_MPU OMAP2420_PRM_REGADDR(OCP_MOD, 0x0018) -#define OMAP2_PRCM_IRQENABLE_MPU_OFFSET 0x001c -#define OMAP2420_PRCM_IRQENABLE_MPU OMAP2420_PRM_REGADDR(OCP_MOD, 0x001c) - -#define OMAP2_PRCM_VOLTCTRL_OFFSET 0x0050 -#define OMAP2420_PRCM_VOLTCTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0050) -#define OMAP2_PRCM_VOLTST_OFFSET 0x0054 -#define OMAP2420_PRCM_VOLTST OMAP2420_PRM_REGADDR(OCP_MOD, 0x0054) -#define OMAP2_PRCM_CLKSRC_CTRL_OFFSET 0x0060 -#define OMAP2420_PRCM_CLKSRC_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0060) -#define OMAP2_PRCM_CLKOUT_CTRL_OFFSET 0x0070 -#define OMAP2420_PRCM_CLKOUT_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0070) -#define OMAP2_PRCM_CLKEMUL_CTRL_OFFSET 0x0078 -#define OMAP2420_PRCM_CLKEMUL_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0078) -#define OMAP2_PRCM_CLKCFG_CTRL_OFFSET 0x0080 -#define OMAP2420_PRCM_CLKCFG_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0080) -#define OMAP2_PRCM_CLKCFG_STATUS_OFFSET 0x0084 -#define OMAP2420_PRCM_CLKCFG_STATUS OMAP2420_PRM_REGADDR(OCP_MOD, 0x0084) -#define OMAP2_PRCM_VOLTSETUP_OFFSET 0x0090 -#define OMAP2420_PRCM_VOLTSETUP OMAP2420_PRM_REGADDR(OCP_MOD, 0x0090) -#define OMAP2_PRCM_CLKSSETUP_OFFSET 0x0094 -#define OMAP2420_PRCM_CLKSSETUP OMAP2420_PRM_REGADDR(OCP_MOD, 0x0094) -#define OMAP2_PRCM_POLCTRL_OFFSET 0x0098 -#define OMAP2420_PRCM_POLCTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0098) - -#define OMAP2430_PRCM_REVISION OMAP2430_PRM_REGADDR(OCP_MOD, 0x0000) -#define OMAP2430_PRCM_SYSCONFIG OMAP2430_PRM_REGADDR(OCP_MOD, 0x0010) - -#define OMAP2430_PRCM_IRQSTATUS_MPU OMAP2430_PRM_REGADDR(OCP_MOD, 0x0018) -#define OMAP2430_PRCM_IRQENABLE_MPU OMAP2430_PRM_REGADDR(OCP_MOD, 0x001c) - -#define OMAP2430_PRCM_VOLTCTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0050) -#define OMAP2430_PRCM_VOLTST OMAP2430_PRM_REGADDR(OCP_MOD, 0x0054) -#define OMAP2430_PRCM_CLKSRC_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0060) -#define OMAP2430_PRCM_CLKOUT_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0070) -#define OMAP2430_PRCM_CLKEMUL_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0078) -#define OMAP2430_PRCM_CLKCFG_CTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0080) -#define OMAP2430_PRCM_CLKCFG_STATUS OMAP2430_PRM_REGADDR(OCP_MOD, 0x0084) -#define OMAP2430_PRCM_VOLTSETUP OMAP2430_PRM_REGADDR(OCP_MOD, 0x0090) -#define OMAP2430_PRCM_CLKSSETUP OMAP2430_PRM_REGADDR(OCP_MOD, 0x0094) -#define OMAP2430_PRCM_POLCTRL OMAP2430_PRM_REGADDR(OCP_MOD, 0x0098) - -/* - * OMAP3-specific global PRM registers - * Use __raw_{read,write}l() with these registers. - * - * With a few exceptions, these are the register names beginning with - * PRM_* on 34xx. (The exceptions are the IRQSTATUS and IRQENABLE - * bits.) - */ - -#define OMAP3_PRM_REVISION_OFFSET 0x0004 -#define OMAP3430_PRM_REVISION OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0004) -#define OMAP3_PRM_SYSCONFIG_OFFSET 0x0014 -#define OMAP3430_PRM_SYSCONFIG OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0014) - -#define OMAP3_PRM_IRQSTATUS_MPU_OFFSET 0x0018 -#define OMAP3430_PRM_IRQSTATUS_MPU OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0018) -#define OMAP3_PRM_IRQENABLE_MPU_OFFSET 0x001c -#define OMAP3430_PRM_IRQENABLE_MPU OMAP34XX_PRM_REGADDR(OCP_MOD, 0x001c) - - -#define OMAP3_PRM_VC_SMPS_SA_OFFSET 0x0020 -#define OMAP3430_PRM_VC_SMPS_SA OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0020) -#define OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET 0x0024 -#define OMAP3430_PRM_VC_SMPS_VOL_RA OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0024) -#define OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET 0x0028 -#define OMAP3430_PRM_VC_SMPS_CMD_RA OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0028) -#define OMAP3_PRM_VC_CMD_VAL_0_OFFSET 0x002c -#define OMAP3430_PRM_VC_CMD_VAL_0 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x002c) -#define OMAP3_PRM_VC_CMD_VAL_1_OFFSET 0x0030 -#define OMAP3430_PRM_VC_CMD_VAL_1 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0030) -#define OMAP3_PRM_VC_CH_CONF_OFFSET 0x0034 -#define OMAP3430_PRM_VC_CH_CONF OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0034) -#define OMAP3_PRM_VC_I2C_CFG_OFFSET 0x0038 -#define OMAP3430_PRM_VC_I2C_CFG OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0038) -#define OMAP3_PRM_VC_BYPASS_VAL_OFFSET 0x003c -#define OMAP3430_PRM_VC_BYPASS_VAL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x003c) -#define OMAP3_PRM_RSTCTRL_OFFSET 0x0050 -#define OMAP3430_PRM_RSTCTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0050) -#define OMAP3_PRM_RSTTIME_OFFSET 0x0054 -#define OMAP3430_PRM_RSTTIME OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0054) -#define OMAP3_PRM_RSTST_OFFSET 0x0058 -#define OMAP3430_PRM_RSTST OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0058) -#define OMAP3_PRM_VOLTCTRL_OFFSET 0x0060 -#define OMAP3430_PRM_VOLTCTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0060) -#define OMAP3_PRM_SRAM_PCHARGE_OFFSET 0x0064 -#define OMAP3430_PRM_SRAM_PCHARGE OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0064) -#define OMAP3_PRM_CLKSRC_CTRL_OFFSET 0x0070 -#define OMAP3430_PRM_CLKSRC_CTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0070) -#define OMAP3_PRM_VOLTSETUP1_OFFSET 0x0090 -#define OMAP3430_PRM_VOLTSETUP1 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0090) -#define OMAP3_PRM_VOLTOFFSET_OFFSET 0x0094 -#define OMAP3430_PRM_VOLTOFFSET OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0094) -#define OMAP3_PRM_CLKSETUP_OFFSET 0x0098 -#define OMAP3430_PRM_CLKSETUP OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0098) -#define OMAP3_PRM_POLCTRL_OFFSET 0x009c -#define OMAP3430_PRM_POLCTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x009c) -#define OMAP3_PRM_VOLTSETUP2_OFFSET 0x00a0 -#define OMAP3430_PRM_VOLTSETUP2 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00a0) -#define OMAP3_PRM_VP1_CONFIG_OFFSET 0x00b0 -#define OMAP3430_PRM_VP1_CONFIG OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00b0) -#define OMAP3_PRM_VP1_VSTEPMIN_OFFSET 0x00b4 -#define OMAP3430_PRM_VP1_VSTEPMIN OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00b4) -#define OMAP3_PRM_VP1_VSTEPMAX_OFFSET 0x00b8 -#define OMAP3430_PRM_VP1_VSTEPMAX OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00b8) -#define OMAP3_PRM_VP1_VLIMITTO_OFFSET 0x00bc -#define OMAP3430_PRM_VP1_VLIMITTO OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00bc) -#define OMAP3_PRM_VP1_VOLTAGE_OFFSET 0x00c0 -#define OMAP3430_PRM_VP1_VOLTAGE OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00c0) -#define OMAP3_PRM_VP1_STATUS_OFFSET 0x00c4 -#define OMAP3430_PRM_VP1_STATUS OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00c4) -#define OMAP3_PRM_VP2_CONFIG_OFFSET 0x00d0 -#define OMAP3430_PRM_VP2_CONFIG OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00d0) -#define OMAP3_PRM_VP2_VSTEPMIN_OFFSET 0x00d4 -#define OMAP3430_PRM_VP2_VSTEPMIN OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00d4) -#define OMAP3_PRM_VP2_VSTEPMAX_OFFSET 0x00d8 -#define OMAP3430_PRM_VP2_VSTEPMAX OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00d8) -#define OMAP3_PRM_VP2_VLIMITTO_OFFSET 0x00dc -#define OMAP3430_PRM_VP2_VLIMITTO OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00dc) -#define OMAP3_PRM_VP2_VOLTAGE_OFFSET 0x00e0 -#define OMAP3430_PRM_VP2_VOLTAGE OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e0) -#define OMAP3_PRM_VP2_STATUS_OFFSET 0x00e4 -#define OMAP3430_PRM_VP2_STATUS OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e4) - -#define OMAP3_PRM_CLKSEL_OFFSET 0x0040 -#define OMAP3430_PRM_CLKSEL OMAP34XX_PRM_REGADDR(OMAP3430_CCR_MOD, 0x0040) -#define OMAP3_PRM_CLKOUT_CTRL_OFFSET 0x0070 -#define OMAP3430_PRM_CLKOUT_CTRL OMAP34XX_PRM_REGADDR(OMAP3430_CCR_MOD, 0x0070) - /* * Module specific PRM register offsets from PRM_BASE + domain offset * @@ -200,66 +46,83 @@ #define PM_EVGENONTIM 0x00d8 #define PM_EVGENOFFTIM 0x00dc -/* OMAP2xxx specific register offsets */ -#define OMAP24XX_PM_WKEN2 0x00a4 -#define OMAP24XX_PM_WKST2 0x00b4 - -#define OMAP24XX_PRCM_IRQSTATUS_DSP 0x00f0 /* IVA mod */ -#define OMAP24XX_PRCM_IRQENABLE_DSP 0x00f4 /* IVA mod */ -#define OMAP24XX_PRCM_IRQSTATUS_IVA 0x00f8 -#define OMAP24XX_PRCM_IRQENABLE_IVA 0x00fc -/* OMAP3 specific register offsets */ -#define OMAP3430ES2_PM_WKEN3 0x00f0 -#define OMAP3430ES2_PM_WKST3 0x00b8 - -#define OMAP3430_PM_MPUGRPSEL 0x00a4 -#define OMAP3430_PM_MPUGRPSEL1 OMAP3430_PM_MPUGRPSEL -#define OMAP3430ES2_PM_MPUGRPSEL3 0x00f8 - -#define OMAP3430_PM_IVAGRPSEL 0x00a8 -#define OMAP3430_PM_IVAGRPSEL1 OMAP3430_PM_IVAGRPSEL -#define OMAP3430ES2_PM_IVAGRPSEL3 0x00f4 - -#define OMAP3430_PM_PREPWSTST 0x00e8 - -#define OMAP3430_PRM_IRQSTATUS_IVA2 0x00f8 -#define OMAP3430_PRM_IRQENABLE_IVA2 0x00fc +#ifndef __ASSEMBLER__ +#include <linux/io.h> +#include "powerdomain.h" -#ifndef __ASSEMBLER__ /* Power/reset management domain register get/set */ -extern u32 omap2_prm_read_mod_reg(s16 module, u16 idx); -extern void omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx); -extern u32 omap2_prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx); -extern u32 omap2_prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx); -extern u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx); -extern u32 omap2_prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask); +static inline u32 omap2_prm_read_mod_reg(s16 module, u16 idx) +{ + return __raw_readl(prm_base + module + idx); +} + +static inline void omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx) +{ + __raw_writel(val, prm_base + module + idx); +} + +/* Read-modify-write a register in a PRM module. Caller must lock */ +static inline u32 omap2_prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, + s16 idx) +{ + u32 v; + + v = omap2_prm_read_mod_reg(module, idx); + v &= ~mask; + v |= bits; + omap2_prm_write_mod_reg(v, module, idx); + + return v; +} + +/* Read a PRM register, AND it, and shift the result down to bit 0 */ +static inline u32 omap2_prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask) +{ + u32 v; + + v = omap2_prm_read_mod_reg(domain, idx); + v &= mask; + v >>= __ffs(mask); + + return v; +} + +static inline u32 omap2_prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) +{ + return omap2_prm_rmw_mod_reg_bits(bits, bits, module, idx); +} + +static inline u32 omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) +{ + return omap2_prm_rmw_mod_reg_bits(bits, 0x0, module, idx); +} /* These omap2_ PRM functions apply to both OMAP2 and 3 */ extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift); extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift); extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift); -/* OMAP3-specific VP functions */ -u32 omap3_prm_vp_check_txdone(u8 vp_id); -void omap3_prm_vp_clear_txdone(u8 vp_id); - -/* - * OMAP3 access functions for voltage controller (VC) and - * voltage proccessor (VP) in the PRM. - */ -extern u32 omap3_prm_vcvp_read(u8 offset); -extern void omap3_prm_vcvp_write(u32 val, u8 offset); -extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); - -extern void omap3xxx_prm_reconfigure_io_chain(void); - -/* PRM interrupt-related functions */ -extern void omap3xxx_prm_read_pending_irqs(unsigned long *events); -extern void omap3xxx_prm_ocp_barrier(void); -extern void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask); -extern void omap3xxx_prm_restore_irqen(u32 *saved_mask); +extern int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst); +extern int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm); +extern int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm); +extern int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, + u8 pwrst); +extern int omap2_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, + u8 pwrst); +extern int omap2_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank); +extern int omap2_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank); +extern int omap2_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst); +extern int omap2_pwrdm_wait_transition(struct powerdomain *pwrdm); + +extern int omap2_clkdm_add_wkdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2); +extern int omap2_clkdm_del_wkdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2); +extern int omap2_clkdm_read_wkdep(struct clockdomain *clkdm1, + struct clockdomain *clkdm2); +extern int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm); #endif /* __ASSEMBLER */ @@ -348,7 +211,9 @@ extern void omap3xxx_prm_restore_irqen(u32 *saved_mask); * * 3430: RM_RSTST_CORE, RM_RSTST_EMU */ +#define OMAP_GLOBALWARM_RST_SHIFT 1 #define OMAP_GLOBALWARM_RST_MASK (1 << 1) +#define OMAP_GLOBALCOLD_RST_SHIFT 0 #define OMAP_GLOBALCOLD_RST_MASK (1 << 0) /* @@ -376,11 +241,4 @@ extern void omap3xxx_prm_restore_irqen(u32 *saved_mask); #define OMAP_LOGICRETSTATE_MASK (1 << 2) -/* - * MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP - * submodule to exit hardreset - */ -#define MAX_MODULE_HARDRESET_WAIT 10000 - - #endif diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c index 0d8abb577669..1ac73883f891 100644 --- a/arch/arm/mach-omap2/prm33xx.c +++ b/arch/arm/mach-omap2/prm33xx.c @@ -20,6 +20,7 @@ #include <linux/io.h> #include "common.h" +#include "powerdomain.h" #include "prm33xx.h" #include "prm-regbits-33xx.h" @@ -131,3 +132,204 @@ int am33xx_prm_deassert_hardreset(u8 shift, s16 inst, return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; } + +static int am33xx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) +{ + am33xx_prm_rmw_reg_bits(OMAP_POWERSTATE_MASK, + (pwrst << OMAP_POWERSTATE_SHIFT), + pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); + return 0; +} + +static int am33xx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) +{ + u32 v; + + v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); + v &= OMAP_POWERSTATE_MASK; + v >>= OMAP_POWERSTATE_SHIFT; + + return v; +} + +static int am33xx_pwrdm_read_pwrst(struct powerdomain *pwrdm) +{ + u32 v; + + v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); + v &= OMAP_POWERSTATEST_MASK; + v >>= OMAP_POWERSTATEST_SHIFT; + + return v; +} + +static int am33xx_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) +{ + u32 v; + + v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); + v &= AM33XX_LASTPOWERSTATEENTERED_MASK; + v >>= AM33XX_LASTPOWERSTATEENTERED_SHIFT; + + return v; +} + +static int am33xx_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm) +{ + am33xx_prm_rmw_reg_bits(AM33XX_LOWPOWERSTATECHANGE_MASK, + (1 << AM33XX_LOWPOWERSTATECHANGE_SHIFT), + pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); + return 0; +} + +static int am33xx_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) +{ + am33xx_prm_rmw_reg_bits(AM33XX_LASTPOWERSTATEENTERED_MASK, + AM33XX_LASTPOWERSTATEENTERED_MASK, + pwrdm->prcm_offs, pwrdm->pwrstst_offs); + return 0; +} + +static int am33xx_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) +{ + u32 m; + + m = pwrdm->logicretstate_mask; + if (!m) + return -EINVAL; + + am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)), + pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); + + return 0; +} + +static int am33xx_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) +{ + u32 v; + + v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); + v &= AM33XX_LOGICSTATEST_MASK; + v >>= AM33XX_LOGICSTATEST_SHIFT; + + return v; +} + +static int am33xx_pwrdm_read_logic_retst(struct powerdomain *pwrdm) +{ + u32 v, m; + + m = pwrdm->logicretstate_mask; + if (!m) + return -EINVAL; + + v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); + v &= m; + v >>= __ffs(m); + + return v; +} + +static int am33xx_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, + u8 pwrst) +{ + u32 m; + + m = pwrdm->mem_on_mask[bank]; + if (!m) + return -EINVAL; + + am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)), + pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); + + return 0; +} + +static int am33xx_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, + u8 pwrst) +{ + u32 m; + + m = pwrdm->mem_ret_mask[bank]; + if (!m) + return -EINVAL; + + am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)), + pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); + + return 0; +} + +static int am33xx_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) +{ + u32 m, v; + + m = pwrdm->mem_pwrst_mask[bank]; + if (!m) + return -EINVAL; + + v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); + v &= m; + v >>= __ffs(m); + + return v; +} + +static int am33xx_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) +{ + u32 m, v; + + m = pwrdm->mem_retst_mask[bank]; + if (!m) + return -EINVAL; + + v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); + v &= m; + v >>= __ffs(m); + + return v; +} + +static int am33xx_pwrdm_wait_transition(struct powerdomain *pwrdm) +{ + u32 c = 0; + + /* + * REVISIT: pwrdm_wait_transition() may be better implemented + * via a callback and a periodic timer check -- how long do we expect + * powerdomain transitions to take? + */ + + /* XXX Is this udelay() value meaningful? */ + while ((am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs) + & OMAP_INTRANSITION_MASK) && + (c++ < PWRDM_TRANSITION_BAILOUT)) + udelay(1); + + if (c > PWRDM_TRANSITION_BAILOUT) { + pr_err("powerdomain: %s: waited too long to complete transition\n", + pwrdm->name); + return -EAGAIN; + } + + pr_debug("powerdomain: completed transition in %d loops\n", c); + + return 0; +} + +struct pwrdm_ops am33xx_pwrdm_operations = { + .pwrdm_set_next_pwrst = am33xx_pwrdm_set_next_pwrst, + .pwrdm_read_next_pwrst = am33xx_pwrdm_read_next_pwrst, + .pwrdm_read_pwrst = am33xx_pwrdm_read_pwrst, + .pwrdm_read_prev_pwrst = am33xx_pwrdm_read_prev_pwrst, + .pwrdm_set_logic_retst = am33xx_pwrdm_set_logic_retst, + .pwrdm_read_logic_pwrst = am33xx_pwrdm_read_logic_pwrst, + .pwrdm_read_logic_retst = am33xx_pwrdm_read_logic_retst, + .pwrdm_clear_all_prev_pwrst = am33xx_pwrdm_clear_all_prev_pwrst, + .pwrdm_set_lowpwrstchange = am33xx_pwrdm_set_lowpwrstchange, + .pwrdm_read_mem_pwrst = am33xx_pwrdm_read_mem_pwrst, + .pwrdm_read_mem_retst = am33xx_pwrdm_read_mem_retst, + .pwrdm_set_mem_onst = am33xx_pwrdm_set_mem_onst, + .pwrdm_set_mem_retst = am33xx_pwrdm_set_mem_retst, + .pwrdm_wait_transition = am33xx_pwrdm_wait_transition, +}; diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c new file mode 100644 index 000000000000..b86116cf0db9 --- /dev/null +++ b/arch/arm/mach-omap2/prm3xxx.c @@ -0,0 +1,417 @@ +/* + * OMAP3xxx PRM module functions + * + * Copyright (C) 2010-2012 Texas Instruments, Inc. + * Copyright (C) 2010 Nokia Corporation + * Benoît Cousson + * Paul Walmsley + * Rajendra Nayak <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/kernel.h> +#include <linux/errno.h> +#include <linux/err.h> +#include <linux/io.h> +#include <linux/irq.h> + +#include "common.h" +#include <plat/cpu.h> + +#include "vp.h" +#include "powerdomain.h" +#include "prm3xxx.h" +#include "prm2xxx_3xxx.h" +#include "cm2xxx_3xxx.h" +#include "prm-regbits-34xx.h" + +static const struct omap_prcm_irq omap3_prcm_irqs[] = { + OMAP_PRCM_IRQ("wkup", 0, 0), + OMAP_PRCM_IRQ("io", 9, 1), +}; + +static struct omap_prcm_irq_setup omap3_prcm_irq_setup = { + .ack = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, + .mask = OMAP3_PRM_IRQENABLE_MPU_OFFSET, + .nr_regs = 1, + .irqs = omap3_prcm_irqs, + .nr_irqs = ARRAY_SIZE(omap3_prcm_irqs), + .irq = 11 + OMAP_INTC_START, + .read_pending_irqs = &omap3xxx_prm_read_pending_irqs, + .ocp_barrier = &omap3xxx_prm_ocp_barrier, + .save_and_clear_irqen = &omap3xxx_prm_save_and_clear_irqen, + .restore_irqen = &omap3xxx_prm_restore_irqen, +}; + +/* + * omap3_prm_reset_src_map - map from bits in the PRM_RSTST hardware + * register (which are specific to OMAP3xxx SoCs) to reset source ID + * bit shifts (which is an OMAP SoC-independent enumeration) + */ +static struct prm_reset_src_map omap3xxx_prm_reset_src_map[] = { + { OMAP3430_GLOBAL_COLD_RST_SHIFT, OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT }, + { OMAP3430_GLOBAL_SW_RST_SHIFT, OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT }, + { OMAP3430_SECURITY_VIOL_RST_SHIFT, OMAP_SECU_VIOL_RST_SRC_ID_SHIFT }, + { OMAP3430_MPU_WD_RST_SHIFT, OMAP_MPU_WD_RST_SRC_ID_SHIFT }, + { OMAP3430_SECURE_WD_RST_SHIFT, OMAP_MPU_WD_RST_SRC_ID_SHIFT }, + { OMAP3430_EXTERNAL_WARM_RST_SHIFT, OMAP_EXTWARM_RST_SRC_ID_SHIFT }, + { OMAP3430_VDD1_VOLTAGE_MANAGER_RST_SHIFT, + OMAP_VDD_MPU_VM_RST_SRC_ID_SHIFT }, + { OMAP3430_VDD2_VOLTAGE_MANAGER_RST_SHIFT, + OMAP_VDD_CORE_VM_RST_SRC_ID_SHIFT }, + { OMAP3430_ICEPICK_RST_SHIFT, OMAP_ICEPICK_RST_SRC_ID_SHIFT }, + { OMAP3430_ICECRUSHER_RST_SHIFT, OMAP_ICECRUSHER_RST_SRC_ID_SHIFT }, + { -1, -1 }, +}; + +/* PRM VP */ + +/* + * struct omap3_vp - OMAP3 VP register access description. + * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg + */ +struct omap3_vp { + u32 tranxdone_status; +}; + +static struct omap3_vp omap3_vp[] = { + [OMAP3_VP_VDD_MPU_ID] = { + .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, + }, + [OMAP3_VP_VDD_CORE_ID] = { + .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK, + }, +}; + +#define MAX_VP_ID ARRAY_SIZE(omap3_vp); + +u32 omap3_prm_vp_check_txdone(u8 vp_id) +{ + struct omap3_vp *vp = &omap3_vp[vp_id]; + u32 irqstatus; + + irqstatus = omap2_prm_read_mod_reg(OCP_MOD, + OMAP3_PRM_IRQSTATUS_MPU_OFFSET); + return irqstatus & vp->tranxdone_status; +} + +void omap3_prm_vp_clear_txdone(u8 vp_id) +{ + struct omap3_vp *vp = &omap3_vp[vp_id]; + + omap2_prm_write_mod_reg(vp->tranxdone_status, + OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); +} + +u32 omap3_prm_vcvp_read(u8 offset) +{ + return omap2_prm_read_mod_reg(OMAP3430_GR_MOD, offset); +} + +void omap3_prm_vcvp_write(u32 val, u8 offset) +{ + omap2_prm_write_mod_reg(val, OMAP3430_GR_MOD, offset); +} + +u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset) +{ + return omap2_prm_rmw_mod_reg_bits(mask, bits, OMAP3430_GR_MOD, offset); +} + +/** + * omap3xxx_prm_dpll3_reset - use DPLL3 reset to reboot the OMAP SoC + * + * Set the DPLL3 reset bit, which should reboot the SoC. This is the + * recommended way to restart the SoC, considering Errata i520. No + * return value. + */ +void omap3xxx_prm_dpll3_reset(void) +{ + omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, OMAP3430_GR_MOD, + OMAP2_RM_RSTCTRL); + /* OCP barrier */ + omap2_prm_read_mod_reg(OMAP3430_GR_MOD, OMAP2_RM_RSTCTRL); +} + +/** + * omap3xxx_prm_read_pending_irqs - read pending PRM MPU IRQs into @events + * @events: ptr to a u32, preallocated by caller + * + * Read PRM_IRQSTATUS_MPU bits, AND'ed with the currently-enabled PRM + * MPU IRQs, and store the result into the u32 pointed to by @events. + * No return value. + */ +void omap3xxx_prm_read_pending_irqs(unsigned long *events) +{ + u32 mask, st; + + /* XXX Can the mask read be avoided (e.g., can it come from RAM?) */ + mask = omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET); + st = omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); + + events[0] = mask & st; +} + +/** + * omap3xxx_prm_ocp_barrier - force buffered MPU writes to the PRM to complete + * + * Force any buffered writes to the PRM IP block to complete. Needed + * by the PRM IRQ handler, which reads and writes directly to the IP + * block, to avoid race conditions after acknowledging or clearing IRQ + * bits. No return value. + */ +void omap3xxx_prm_ocp_barrier(void) +{ + omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_REVISION_OFFSET); +} + +/** + * omap3xxx_prm_save_and_clear_irqen - save/clear PRM_IRQENABLE_MPU reg + * @saved_mask: ptr to a u32 array to save IRQENABLE bits + * + * Save the PRM_IRQENABLE_MPU register to @saved_mask. @saved_mask + * must be allocated by the caller. Intended to be used in the PRM + * interrupt handler suspend callback. The OCP barrier is needed to + * ensure the write to disable PRM interrupts reaches the PRM before + * returning; otherwise, spurious interrupts might occur. No return + * value. + */ +void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask) +{ + saved_mask[0] = omap2_prm_read_mod_reg(OCP_MOD, + OMAP3_PRM_IRQENABLE_MPU_OFFSET); + omap2_prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET); + + /* OCP barrier */ + omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_REVISION_OFFSET); +} + +/** + * omap3xxx_prm_restore_irqen - set PRM_IRQENABLE_MPU register from args + * @saved_mask: ptr to a u32 array of IRQENABLE bits saved previously + * + * Restore the PRM_IRQENABLE_MPU register from @saved_mask. Intended + * to be used in the PRM interrupt handler resume callback to restore + * values saved by omap3xxx_prm_save_and_clear_irqen(). No OCP + * barrier should be needed here; any pending PRM interrupts will fire + * once the writes reach the PRM. No return value. + */ +void omap3xxx_prm_restore_irqen(u32 *saved_mask) +{ + omap2_prm_write_mod_reg(saved_mask[0], OCP_MOD, + OMAP3_PRM_IRQENABLE_MPU_OFFSET); +} + +/** + * omap3xxx_prm_reconfigure_io_chain - clear latches and reconfigure I/O chain + * + * Clear any previously-latched I/O wakeup events and ensure that the + * I/O wakeup gates are aligned with the current mux settings. Works + * by asserting WUCLKIN, waiting for WUCLKOUT to be asserted, and then + * deasserting WUCLKIN and clearing the ST_IO_CHAIN WKST bit. No + * return value. + */ +void omap3xxx_prm_reconfigure_io_chain(void) +{ + int i = 0; + + omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD, + PM_WKEN); + + omap_test_timeout(omap2_prm_read_mod_reg(WKUP_MOD, PM_WKST) & + OMAP3430_ST_IO_CHAIN_MASK, + MAX_IOPAD_LATCH_TIME, i); + if (i == MAX_IOPAD_LATCH_TIME) + pr_warn("PRM: I/O chain clock line assertion timed out\n"); + + omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD, + PM_WKEN); + + omap2_prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN_MASK, WKUP_MOD, + PM_WKST); + + omap2_prm_read_mod_reg(WKUP_MOD, PM_WKST); +} + +/** + * omap3xxx_prm_enable_io_wakeup - enable wakeup events from I/O wakeup latches + * + * Activates the I/O wakeup event latches and allows events logged by + * those latches to signal a wakeup event to the PRCM. For I/O + * wakeups to occur, WAKEUPENABLE bits must be set in the pad mux + * registers, and omap3xxx_prm_reconfigure_io_chain() must be called. + * No return value. + */ +static void __init omap3xxx_prm_enable_io_wakeup(void) +{ + if (omap3_has_io_wakeup()) + omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, + PM_WKEN); +} + +/** + * omap3xxx_prm_read_reset_sources - return the last SoC reset source + * + * Return a u32 representing the last reset sources of the SoC. The + * returned reset source bits are standardized across OMAP SoCs. + */ +static u32 omap3xxx_prm_read_reset_sources(void) +{ + struct prm_reset_src_map *p; + u32 r = 0; + u32 v; + + v = omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTST); + + p = omap3xxx_prm_reset_src_map; + while (p->reg_shift >= 0 && p->std_shift >= 0) { + if (v & (1 << p->reg_shift)) + r |= 1 << p->std_shift; + p++; + } + + return r; +} + +/* Powerdomain low-level functions */ + +/* Applicable only for OMAP3. Not supported on OMAP2 */ +static int omap3_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) +{ + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP3430_PM_PREPWSTST, + OMAP3430_LASTPOWERSTATEENTERED_MASK); +} + +static int omap3_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) +{ + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP2_PM_PWSTST, + OMAP3430_LOGICSTATEST_MASK); +} + +static int omap3_pwrdm_read_logic_retst(struct powerdomain *pwrdm) +{ + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP2_PM_PWSTCTRL, + OMAP3430_LOGICSTATEST_MASK); +} + +static int omap3_pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm) +{ + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP3430_PM_PREPWSTST, + OMAP3430_LASTLOGICSTATEENTERED_MASK); +} + +static int omap3_get_mem_bank_lastmemst_mask(u8 bank) +{ + switch (bank) { + case 0: + return OMAP3430_LASTMEM1STATEENTERED_MASK; + case 1: + return OMAP3430_LASTMEM2STATEENTERED_MASK; + case 2: + return OMAP3430_LASTSHAREDL2CACHEFLATSTATEENTERED_MASK; + case 3: + return OMAP3430_LASTL2FLATMEMSTATEENTERED_MASK; + default: + WARN_ON(1); /* should never happen */ + return -EEXIST; + } + return 0; +} + +static int omap3_pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank) +{ + u32 m; + + m = omap3_get_mem_bank_lastmemst_mask(bank); + + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP3430_PM_PREPWSTST, m); +} + +static int omap3_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) +{ + omap2_prm_write_mod_reg(0, pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST); + return 0; +} + +static int omap3_pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm) +{ + return omap2_prm_rmw_mod_reg_bits(0, + 1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, + pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); +} + +static int omap3_pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm) +{ + return omap2_prm_rmw_mod_reg_bits(1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, + 0, pwrdm->prcm_offs, + OMAP2_PM_PWSTCTRL); +} + +struct pwrdm_ops omap3_pwrdm_operations = { + .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst, + .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst, + .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst, + .pwrdm_read_prev_pwrst = omap3_pwrdm_read_prev_pwrst, + .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst, + .pwrdm_read_logic_pwrst = omap3_pwrdm_read_logic_pwrst, + .pwrdm_read_logic_retst = omap3_pwrdm_read_logic_retst, + .pwrdm_read_prev_logic_pwrst = omap3_pwrdm_read_prev_logic_pwrst, + .pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst, + .pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst, + .pwrdm_read_mem_pwrst = omap2_pwrdm_read_mem_pwrst, + .pwrdm_read_mem_retst = omap2_pwrdm_read_mem_retst, + .pwrdm_read_prev_mem_pwrst = omap3_pwrdm_read_prev_mem_pwrst, + .pwrdm_clear_all_prev_pwrst = omap3_pwrdm_clear_all_prev_pwrst, + .pwrdm_enable_hdwr_sar = omap3_pwrdm_enable_hdwr_sar, + .pwrdm_disable_hdwr_sar = omap3_pwrdm_disable_hdwr_sar, + .pwrdm_wait_transition = omap2_pwrdm_wait_transition, +}; + +/* + * + */ + +static struct prm_ll_data omap3xxx_prm_ll_data = { + .read_reset_sources = &omap3xxx_prm_read_reset_sources, +}; + +static int __init omap3xxx_prm_init(void) +{ + int ret; + + if (!cpu_is_omap34xx()) + return 0; + + ret = prm_register(&omap3xxx_prm_ll_data); + if (ret) + return ret; + + omap3xxx_prm_enable_io_wakeup(); + ret = omap_prcm_register_chain_handler(&omap3_prcm_irq_setup); + if (!ret) + irq_set_status_flags(omap_prcm_event_to_irq("io"), + IRQ_NOAUTOEN); + + + return ret; +} +subsys_initcall(omap3xxx_prm_init); + +static void __exit omap3xxx_prm_exit(void) +{ + if (!cpu_is_omap34xx()) + return; + + /* Should never happen */ + WARN(prm_unregister(&omap3xxx_prm_ll_data), + "%s: prm_ll_data function pointer mismatch\n", __func__); +} +__exitcall(omap3xxx_prm_exit); diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h new file mode 100644 index 000000000000..10cd41a8129e --- /dev/null +++ b/arch/arm/mach-omap2/prm3xxx.h @@ -0,0 +1,162 @@ +/* + * OMAP3xxx Power/Reset Management (PRM) register definitions + * + * Copyright (C) 2007-2009, 2011-2012 Texas Instruments, Inc. + * Copyright (C) 2008-2010 Nokia Corporation + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * The PRM hardware modules on the OMAP2/3 are quite similar to each + * other. The PRM on OMAP4 has a new register layout, and is handled + * in a separate file. + */ +#ifndef __ARCH_ARM_MACH_OMAP2_PRM3XXX_H +#define __ARCH_ARM_MACH_OMAP2_PRM3XXX_H + +#include "prcm-common.h" +#include "prm.h" +#include "prm2xxx_3xxx.h" + +#define OMAP34XX_PRM_REGADDR(module, reg) \ + OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg)) + + +/* + * OMAP3-specific global PRM registers + * Use __raw_{read,write}l() with these registers. + * + * With a few exceptions, these are the register names beginning with + * PRM_* on 34xx. (The exceptions are the IRQSTATUS and IRQENABLE + * bits.) + */ + +#define OMAP3_PRM_REVISION_OFFSET 0x0004 +#define OMAP3430_PRM_REVISION OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0004) +#define OMAP3_PRM_SYSCONFIG_OFFSET 0x0014 +#define OMAP3430_PRM_SYSCONFIG OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0014) + +#define OMAP3_PRM_IRQSTATUS_MPU_OFFSET 0x0018 +#define OMAP3430_PRM_IRQSTATUS_MPU OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0018) +#define OMAP3_PRM_IRQENABLE_MPU_OFFSET 0x001c +#define OMAP3430_PRM_IRQENABLE_MPU OMAP34XX_PRM_REGADDR(OCP_MOD, 0x001c) + + +#define OMAP3_PRM_VC_SMPS_SA_OFFSET 0x0020 +#define OMAP3430_PRM_VC_SMPS_SA OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0020) +#define OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET 0x0024 +#define OMAP3430_PRM_VC_SMPS_VOL_RA OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0024) +#define OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET 0x0028 +#define OMAP3430_PRM_VC_SMPS_CMD_RA OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0028) +#define OMAP3_PRM_VC_CMD_VAL_0_OFFSET 0x002c +#define OMAP3430_PRM_VC_CMD_VAL_0 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x002c) +#define OMAP3_PRM_VC_CMD_VAL_1_OFFSET 0x0030 +#define OMAP3430_PRM_VC_CMD_VAL_1 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0030) +#define OMAP3_PRM_VC_CH_CONF_OFFSET 0x0034 +#define OMAP3430_PRM_VC_CH_CONF OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0034) +#define OMAP3_PRM_VC_I2C_CFG_OFFSET 0x0038 +#define OMAP3430_PRM_VC_I2C_CFG OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0038) +#define OMAP3_PRM_VC_BYPASS_VAL_OFFSET 0x003c +#define OMAP3430_PRM_VC_BYPASS_VAL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x003c) +#define OMAP3_PRM_RSTCTRL_OFFSET 0x0050 +#define OMAP3430_PRM_RSTCTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0050) +#define OMAP3_PRM_RSTTIME_OFFSET 0x0054 +#define OMAP3430_PRM_RSTTIME OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0054) +#define OMAP3_PRM_RSTST_OFFSET 0x0058 +#define OMAP3430_PRM_RSTST OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0058) +#define OMAP3_PRM_VOLTCTRL_OFFSET 0x0060 +#define OMAP3430_PRM_VOLTCTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0060) +#define OMAP3_PRM_SRAM_PCHARGE_OFFSET 0x0064 +#define OMAP3430_PRM_SRAM_PCHARGE OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0064) +#define OMAP3_PRM_CLKSRC_CTRL_OFFSET 0x0070 +#define OMAP3430_PRM_CLKSRC_CTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0070) +#define OMAP3_PRM_VOLTSETUP1_OFFSET 0x0090 +#define OMAP3430_PRM_VOLTSETUP1 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0090) +#define OMAP3_PRM_VOLTOFFSET_OFFSET 0x0094 +#define OMAP3430_PRM_VOLTOFFSET OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0094) +#define OMAP3_PRM_CLKSETUP_OFFSET 0x0098 +#define OMAP3430_PRM_CLKSETUP OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0098) +#define OMAP3_PRM_POLCTRL_OFFSET 0x009c +#define OMAP3430_PRM_POLCTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x009c) +#define OMAP3_PRM_VOLTSETUP2_OFFSET 0x00a0 +#define OMAP3430_PRM_VOLTSETUP2 OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00a0) +#define OMAP3_PRM_VP1_CONFIG_OFFSET 0x00b0 +#define OMAP3430_PRM_VP1_CONFIG OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00b0) +#define OMAP3_PRM_VP1_VSTEPMIN_OFFSET 0x00b4 +#define OMAP3430_PRM_VP1_VSTEPMIN OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00b4) +#define OMAP3_PRM_VP1_VSTEPMAX_OFFSET 0x00b8 +#define OMAP3430_PRM_VP1_VSTEPMAX OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00b8) +#define OMAP3_PRM_VP1_VLIMITTO_OFFSET 0x00bc +#define OMAP3430_PRM_VP1_VLIMITTO OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00bc) +#define OMAP3_PRM_VP1_VOLTAGE_OFFSET 0x00c0 +#define OMAP3430_PRM_VP1_VOLTAGE OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00c0) +#define OMAP3_PRM_VP1_STATUS_OFFSET 0x00c4 +#define OMAP3430_PRM_VP1_STATUS OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00c4) +#define OMAP3_PRM_VP2_CONFIG_OFFSET 0x00d0 +#define OMAP3430_PRM_VP2_CONFIG OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00d0) +#define OMAP3_PRM_VP2_VSTEPMIN_OFFSET 0x00d4 +#define OMAP3430_PRM_VP2_VSTEPMIN OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00d4) +#define OMAP3_PRM_VP2_VSTEPMAX_OFFSET 0x00d8 +#define OMAP3430_PRM_VP2_VSTEPMAX OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00d8) +#define OMAP3_PRM_VP2_VLIMITTO_OFFSET 0x00dc +#define OMAP3430_PRM_VP2_VLIMITTO OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00dc) +#define OMAP3_PRM_VP2_VOLTAGE_OFFSET 0x00e0 +#define OMAP3430_PRM_VP2_VOLTAGE OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e0) +#define OMAP3_PRM_VP2_STATUS_OFFSET 0x00e4 +#define OMAP3430_PRM_VP2_STATUS OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e4) + +#define OMAP3_PRM_CLKSEL_OFFSET 0x0040 +#define OMAP3430_PRM_CLKSEL OMAP34XX_PRM_REGADDR(OMAP3430_CCR_MOD, 0x0040) +#define OMAP3_PRM_CLKOUT_CTRL_OFFSET 0x0070 +#define OMAP3430_PRM_CLKOUT_CTRL OMAP34XX_PRM_REGADDR(OMAP3430_CCR_MOD, 0x0070) + +/* OMAP3 specific register offsets */ +#define OMAP3430ES2_PM_WKEN3 0x00f0 +#define OMAP3430ES2_PM_WKST3 0x00b8 + +#define OMAP3430_PM_MPUGRPSEL 0x00a4 +#define OMAP3430_PM_MPUGRPSEL1 OMAP3430_PM_MPUGRPSEL +#define OMAP3430ES2_PM_MPUGRPSEL3 0x00f8 + +#define OMAP3430_PM_IVAGRPSEL 0x00a8 +#define OMAP3430_PM_IVAGRPSEL1 OMAP3430_PM_IVAGRPSEL +#define OMAP3430ES2_PM_IVAGRPSEL3 0x00f4 + +#define OMAP3430_PM_PREPWSTST 0x00e8 + +#define OMAP3430_PRM_IRQSTATUS_IVA2 0x00f8 +#define OMAP3430_PRM_IRQENABLE_IVA2 0x00fc + + +#ifndef __ASSEMBLER__ + +/* OMAP3-specific VP functions */ +u32 omap3_prm_vp_check_txdone(u8 vp_id); +void omap3_prm_vp_clear_txdone(u8 vp_id); + +/* + * OMAP3 access functions for voltage controller (VC) and + * voltage proccessor (VP) in the PRM. + */ +extern u32 omap3_prm_vcvp_read(u8 offset); +extern void omap3_prm_vcvp_write(u32 val, u8 offset); +extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); + +extern void omap3xxx_prm_reconfigure_io_chain(void); + +/* PRM interrupt-related functions */ +extern void omap3xxx_prm_read_pending_irqs(unsigned long *events); +extern void omap3xxx_prm_ocp_barrier(void); +extern void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask); +extern void omap3xxx_prm_restore_irqen(u32 *saved_mask); + +extern void omap3xxx_prm_dpll3_reset(void); + +extern u32 omap3xxx_prm_get_reset_sources(void); + +#endif /* __ASSEMBLER */ + + +#endif diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index f0c4d5f4a174..6d3467af205d 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -1,10 +1,11 @@ /* * OMAP4 PRM module functions * - * Copyright (C) 2011 Texas Instruments, Inc. + * Copyright (C) 2011-2012 Texas Instruments, Inc. * Copyright (C) 2010 Nokia Corporation * Benoît Cousson * Paul Walmsley + * Rajendra Nayak <[email protected]> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -17,7 +18,6 @@ #include <linux/err.h> #include <linux/io.h> -#include <plat/prcm.h> #include "soc.h" #include "iomap.h" @@ -27,6 +27,9 @@ #include "prm-regbits-44xx.h" #include "prcm44xx.h" #include "prminst44xx.h" +#include "powerdomain.h" + +/* Static data */ static const struct omap_prcm_irq omap4_prcm_irqs[] = { OMAP_PRCM_IRQ("wkup", 0, 0), @@ -46,6 +49,33 @@ static struct omap_prcm_irq_setup omap4_prcm_irq_setup = { .restore_irqen = &omap44xx_prm_restore_irqen, }; +/* + * omap44xx_prm_reset_src_map - map from bits in the PRM_RSTST + * hardware register (which are specific to OMAP44xx SoCs) to reset + * source ID bit shifts (which is an OMAP SoC-independent + * enumeration) + */ +static struct prm_reset_src_map omap44xx_prm_reset_src_map[] = { + { OMAP4430_RST_GLOBAL_WARM_SW_SHIFT, + OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT }, + { OMAP4430_RST_GLOBAL_COLD_SW_SHIFT, + OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT }, + { OMAP4430_MPU_SECURITY_VIOL_RST_SHIFT, + OMAP_SECU_VIOL_RST_SRC_ID_SHIFT }, + { OMAP4430_MPU_WDT_RST_SHIFT, OMAP_MPU_WD_RST_SRC_ID_SHIFT }, + { OMAP4430_SECURE_WDT_RST_SHIFT, OMAP_SECU_WD_RST_SRC_ID_SHIFT }, + { OMAP4430_EXTERNAL_WARM_RST_SHIFT, OMAP_EXTWARM_RST_SRC_ID_SHIFT }, + { OMAP4430_VDD_MPU_VOLT_MGR_RST_SHIFT, + OMAP_VDD_MPU_VM_RST_SRC_ID_SHIFT }, + { OMAP4430_VDD_IVA_VOLT_MGR_RST_SHIFT, + OMAP_VDD_IVA_VM_RST_SRC_ID_SHIFT }, + { OMAP4430_VDD_CORE_VOLT_MGR_RST_SHIFT, + OMAP_VDD_CORE_VM_RST_SRC_ID_SHIFT }, + { OMAP4430_ICEPICK_RST_SHIFT, OMAP_ICEPICK_RST_SRC_ID_SHIFT }, + { OMAP4430_C2C_RST_SHIFT, OMAP_C2C_RST_SRC_ID_SHIFT }, + { -1, -1 }, +}; + /* PRM low-level functions */ /* Read a register in a CM/PRM instance in the PRM module */ @@ -291,12 +321,324 @@ static void __init omap44xx_prm_enable_io_wakeup(void) OMAP4_PRM_IO_PMCTRL_OFFSET); } -static int __init omap4xxx_prcm_init(void) +/** + * omap44xx_prm_read_reset_sources - return the last SoC reset source + * + * Return a u32 representing the last reset sources of the SoC. The + * returned reset source bits are standardized across OMAP SoCs. + */ +static u32 omap44xx_prm_read_reset_sources(void) +{ + struct prm_reset_src_map *p; + u32 r = 0; + u32 v; + + v = omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, + OMAP4_RM_RSTST); + + p = omap44xx_prm_reset_src_map; + while (p->reg_shift >= 0 && p->std_shift >= 0) { + if (v & (1 << p->reg_shift)) + r |= 1 << p->std_shift; + p++; + } + + return r; +} + +/* Powerdomain low-level functions */ + +static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) +{ + omap4_prminst_rmw_inst_reg_bits(OMAP_POWERSTATE_MASK, + (pwrst << OMAP_POWERSTATE_SHIFT), + pwrdm->prcm_partition, + pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); + return 0; +} + +static int omap4_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) +{ + u32 v; + + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTCTRL); + v &= OMAP_POWERSTATE_MASK; + v >>= OMAP_POWERSTATE_SHIFT; + + return v; +} + +static int omap4_pwrdm_read_pwrst(struct powerdomain *pwrdm) +{ + u32 v; + + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTST); + v &= OMAP_POWERSTATEST_MASK; + v >>= OMAP_POWERSTATEST_SHIFT; + + return v; +} + +static int omap4_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) +{ + u32 v; + + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTST); + v &= OMAP4430_LASTPOWERSTATEENTERED_MASK; + v >>= OMAP4430_LASTPOWERSTATEENTERED_SHIFT; + + return v; +} + +static int omap4_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm) +{ + omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK, + (1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT), + pwrdm->prcm_partition, + pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); + return 0; +} + +static int omap4_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) +{ + omap4_prminst_rmw_inst_reg_bits(OMAP4430_LASTPOWERSTATEENTERED_MASK, + OMAP4430_LASTPOWERSTATEENTERED_MASK, + pwrdm->prcm_partition, + pwrdm->prcm_offs, OMAP4_PM_PWSTST); + return 0; +} + +static int omap4_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) +{ + u32 v; + + v = pwrst << __ffs(OMAP4430_LOGICRETSTATE_MASK); + omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOGICRETSTATE_MASK, v, + pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTCTRL); + + return 0; +} + +static int omap4_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, + u8 pwrst) +{ + u32 m; + + m = omap2_pwrdm_get_mem_bank_onstate_mask(bank); + + omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)), + pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTCTRL); + + return 0; +} + +static int omap4_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, + u8 pwrst) +{ + u32 m; + + m = omap2_pwrdm_get_mem_bank_retst_mask(bank); + + omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)), + pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTCTRL); + + return 0; +} + +static int omap4_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) +{ + u32 v; + + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTST); + v &= OMAP4430_LOGICSTATEST_MASK; + v >>= OMAP4430_LOGICSTATEST_SHIFT; + + return v; +} + +static int omap4_pwrdm_read_logic_retst(struct powerdomain *pwrdm) { - if (cpu_is_omap44xx()) { - omap44xx_prm_enable_io_wakeup(); - return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup); + u32 v; + + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTCTRL); + v &= OMAP4430_LOGICRETSTATE_MASK; + v >>= OMAP4430_LOGICRETSTATE_SHIFT; + + return v; +} + +/** + * omap4_pwrdm_read_prev_logic_pwrst - read the previous logic powerstate + * @pwrdm: struct powerdomain * to read the state for + * + * Reads the previous logic powerstate for a powerdomain. This + * function must determine the previous logic powerstate by first + * checking the previous powerstate for the domain. If that was OFF, + * then logic has been lost. If previous state was RETENTION, the + * function reads the setting for the next retention logic state to + * see the actual value. In every other case, the logic is + * retained. Returns either PWRDM_POWER_OFF or PWRDM_POWER_RET + * depending whether the logic was retained or not. + */ +static int omap4_pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm) +{ + int state; + + state = omap4_pwrdm_read_prev_pwrst(pwrdm); + + if (state == PWRDM_POWER_OFF) + return PWRDM_POWER_OFF; + + if (state != PWRDM_POWER_RET) + return PWRDM_POWER_RET; + + return omap4_pwrdm_read_logic_retst(pwrdm); +} + +static int omap4_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) +{ + u32 m, v; + + m = omap2_pwrdm_get_mem_bank_stst_mask(bank); + + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTST); + v &= m; + v >>= __ffs(m); + + return v; +} + +static int omap4_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) +{ + u32 m, v; + + m = omap2_pwrdm_get_mem_bank_retst_mask(bank); + + v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, + OMAP4_PM_PWSTCTRL); + v &= m; + v >>= __ffs(m); + + return v; +} + +/** + * omap4_pwrdm_read_prev_mem_pwrst - reads the previous memory powerstate + * @pwrdm: struct powerdomain * to read mem powerstate for + * @bank: memory bank index + * + * Reads the previous memory powerstate for a powerdomain. This + * function must determine the previous memory powerstate by first + * checking the previous powerstate for the domain. If that was OFF, + * then logic has been lost. If previous state was RETENTION, the + * function reads the setting for the next memory retention state to + * see the actual value. In every other case, the logic is + * retained. Returns either PWRDM_POWER_OFF or PWRDM_POWER_RET + * depending whether logic was retained or not. + */ +static int omap4_pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank) +{ + int state; + + state = omap4_pwrdm_read_prev_pwrst(pwrdm); + + if (state == PWRDM_POWER_OFF) + return PWRDM_POWER_OFF; + + if (state != PWRDM_POWER_RET) + return PWRDM_POWER_RET; + + return omap4_pwrdm_read_mem_retst(pwrdm, bank); +} + +static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm) +{ + u32 c = 0; + + /* + * REVISIT: pwrdm_wait_transition() may be better implemented + * via a callback and a periodic timer check -- how long do we expect + * powerdomain transitions to take? + */ + + /* XXX Is this udelay() value meaningful? */ + while ((omap4_prminst_read_inst_reg(pwrdm->prcm_partition, + pwrdm->prcm_offs, + OMAP4_PM_PWSTST) & + OMAP_INTRANSITION_MASK) && + (c++ < PWRDM_TRANSITION_BAILOUT)) + udelay(1); + + if (c > PWRDM_TRANSITION_BAILOUT) { + pr_err("powerdomain: %s: waited too long to complete transition\n", + pwrdm->name); + return -EAGAIN; } + + pr_debug("powerdomain: completed transition in %d loops\n", c); + return 0; } -subsys_initcall(omap4xxx_prcm_init); + +struct pwrdm_ops omap4_pwrdm_operations = { + .pwrdm_set_next_pwrst = omap4_pwrdm_set_next_pwrst, + .pwrdm_read_next_pwrst = omap4_pwrdm_read_next_pwrst, + .pwrdm_read_pwrst = omap4_pwrdm_read_pwrst, + .pwrdm_read_prev_pwrst = omap4_pwrdm_read_prev_pwrst, + .pwrdm_set_lowpwrstchange = omap4_pwrdm_set_lowpwrstchange, + .pwrdm_clear_all_prev_pwrst = omap4_pwrdm_clear_all_prev_pwrst, + .pwrdm_set_logic_retst = omap4_pwrdm_set_logic_retst, + .pwrdm_read_logic_pwrst = omap4_pwrdm_read_logic_pwrst, + .pwrdm_read_prev_logic_pwrst = omap4_pwrdm_read_prev_logic_pwrst, + .pwrdm_read_logic_retst = omap4_pwrdm_read_logic_retst, + .pwrdm_read_mem_pwrst = omap4_pwrdm_read_mem_pwrst, + .pwrdm_read_mem_retst = omap4_pwrdm_read_mem_retst, + .pwrdm_read_prev_mem_pwrst = omap4_pwrdm_read_prev_mem_pwrst, + .pwrdm_set_mem_onst = omap4_pwrdm_set_mem_onst, + .pwrdm_set_mem_retst = omap4_pwrdm_set_mem_retst, + .pwrdm_wait_transition = omap4_pwrdm_wait_transition, +}; + +/* + * XXX document + */ +static struct prm_ll_data omap44xx_prm_ll_data = { + .read_reset_sources = &omap44xx_prm_read_reset_sources, +}; + +static int __init omap44xx_prm_init(void) +{ + int ret; + + if (!cpu_is_omap44xx()) + return 0; + + ret = prm_register(&omap44xx_prm_ll_data); + if (ret) + return ret; + + omap44xx_prm_enable_io_wakeup(); + + return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup); +} +subsys_initcall(omap44xx_prm_init); + +static void __exit omap44xx_prm_exit(void) +{ + if (!cpu_is_omap44xx()) + return; + + /* Should never happen */ + WARN(prm_unregister(&omap44xx_prm_ll_data), + "%s: prm_ll_data function pointer mismatch\n", __func__); +} +__exitcall(omap44xx_prm_exit); diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h index ee72ae6bd8c9..c8e1accdc90e 100644 --- a/arch/arm/mach-omap2/prm44xx.h +++ b/arch/arm/mach-omap2/prm44xx.h @@ -771,6 +771,8 @@ extern void omap44xx_prm_ocp_barrier(void); extern void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask); extern void omap44xx_prm_restore_irqen(u32 *saved_mask); +extern u32 omap44xx_prm_get_reset_sources(void); + # endif #endif diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 3442227d3f0b..f596e1e91ffd 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -24,10 +24,11 @@ #include <linux/interrupt.h> #include <linux/slab.h> -#include <plat/prcm.h> - #include "prm2xxx_3xxx.h" +#include "prm2xxx.h" +#include "prm3xxx.h" #include "prm44xx.h" +#include "common.h" /* * OMAP_PRCM_MAX_NR_PENDING_REG: maximum number of PRM_IRQ*_MPU regs @@ -52,6 +53,16 @@ static struct irq_chip_generic **prcm_irq_chips; */ static struct omap_prcm_irq_setup *prcm_irq_setup; +/* prm_base: base virtual address of the PRM IP block */ +void __iomem *prm_base; + +/* + * prm_ll_data: function pointers to SoC-specific implementations of + * common PRM functions + */ +static struct prm_ll_data null_prm_ll_data; +static struct prm_ll_data *prm_ll_data = &null_prm_ll_data; + /* Private functions */ /* @@ -318,64 +329,82 @@ err: return -ENOMEM; } -/* - * Stubbed functions so that common files continue to build when - * custom builds are used - * XXX These are temporary and should be removed at the earliest possible - * opportunity +/** + * omap2_set_globals_prm - set the PRM base address (for early use) + * @prm: PRM base virtual address + * + * XXX Will be replaced when the PRM/CM drivers are completed. */ -u32 __weak omap2_prm_read_mod_reg(s16 module, u16 idx) +void __init omap2_set_globals_prm(void __iomem *prm) { - WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n"); - return 0; + prm_base = prm; } -void __weak omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx) +/** + * prm_read_reset_sources - return the sources of the SoC's last reset + * + * Return a u32 bitmask representing the reset sources that caused the + * SoC to reset. The low-level per-SoC functions called by this + * function remap the SoC-specific reset source bits into an + * OMAP-common set of reset source bits, defined in + * arch/arm/mach-omap2/prm.h. Returns the standardized reset source + * u32 bitmask from the hardware upon success, or returns (1 << + * OMAP_UNKNOWN_RST_SRC_ID_SHIFT) if no low-level read_reset_sources() + * function was registered. + */ +u32 prm_read_reset_sources(void) { - WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n"); -} + u32 ret = 1 << OMAP_UNKNOWN_RST_SRC_ID_SHIFT; -u32 __weak omap2_prm_rmw_mod_reg_bits(u32 mask, u32 bits, - s16 module, s16 idx) -{ - WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n"); - return 0; -} + if (prm_ll_data->read_reset_sources) + ret = prm_ll_data->read_reset_sources(); + else + WARN_ONCE(1, "prm: %s: no mapping function defined for reset sources\n", __func__); -u32 __weak omap2_prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) -{ - WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n"); - return 0; + return ret; } -u32 __weak omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) +/** + * prm_register - register per-SoC low-level data with the PRM + * @pld: low-level per-SoC OMAP PRM data & function pointers to register + * + * Register per-SoC low-level OMAP PRM data and function pointers with + * the OMAP PRM common interface. The caller must keep the data + * pointed to by @pld valid until it calls prm_unregister() and + * it returns successfully. Returns 0 upon success, -EINVAL if @pld + * is NULL, or -EEXIST if prm_register() has already been called + * without an intervening prm_unregister(). + */ +int prm_register(struct prm_ll_data *pld) { - WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n"); - return 0; -} + if (!pld) + return -EINVAL; -u32 __weak omap2_prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask) -{ - WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n"); - return 0; -} + if (prm_ll_data != &null_prm_ll_data) + return -EEXIST; -int __weak omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift) -{ - WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n"); - return 0; -} + prm_ll_data = pld; -int __weak omap2_prm_assert_hardreset(s16 prm_mod, u8 shift) -{ - WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n"); return 0; } -int __weak omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, - u8 st_shift) +/** + * prm_unregister - unregister per-SoC low-level data & function pointers + * @pld: low-level per-SoC OMAP PRM data & function pointers to unregister + * + * Unregister per-SoC low-level OMAP PRM data and function pointers + * that were previously registered with prm_register(). The + * caller may not destroy any of the data pointed to by @pld until + * this function returns successfully. Returns 0 upon success, or + * -EINVAL if @pld is NULL or if @pld does not match the struct + * prm_ll_data * previously registered by prm_register(). + */ +int prm_unregister(struct prm_ll_data *pld) { - WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n"); + if (!pld || prm_ll_data != pld) + return -EINVAL; + + prm_ll_data = &null_prm_ll_data; + return 0; } - diff --git a/arch/arm/mach-omap2/prminst44xx.h b/arch/arm/mach-omap2/prminst44xx.h index 46f2efb36596..a2ede2d65481 100644 --- a/arch/arm/mach-omap2/prminst44xx.h +++ b/arch/arm/mach-omap2/prminst44xx.h @@ -30,4 +30,6 @@ extern int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst, extern int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst, u16 rstctrl_offs); +extern void omap_prm_base_init(void); + #endif diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c index c64ee1904be8..dae7e4804a48 100644 --- a/arch/arm/mach-omap2/sdrc.c +++ b/arch/arm/mach-omap2/sdrc.c @@ -112,12 +112,10 @@ int omap2_sdrc_get_params(unsigned long r, } -void __init omap2_set_globals_sdrc(struct omap_globals *omap2_globals) +void __init omap2_set_globals_sdrc(void __iomem *sdrc, void __iomem *sms) { - if (omap2_globals->sdrc) - omap2_sdrc_base = omap2_globals->sdrc; - if (omap2_globals->sms) - omap2_sms_base = omap2_globals->sms; + omap2_sdrc_base = sdrc; + omap2_sms_base = sms; } /** diff --git a/arch/arm/mach-omap2/sdrc.h b/arch/arm/mach-omap2/sdrc.h index 69c4b329452e..446aa13511fd 100644 --- a/arch/arm/mach-omap2/sdrc.h +++ b/arch/arm/mach-omap2/sdrc.h @@ -51,6 +51,8 @@ static inline u32 sms_read_reg(u16 reg) return __raw_readl(OMAP_SMS_REGADDR(reg)); } +extern void omap2_set_globals_sdrc(void __iomem *sdrc, void __iomem *sms); + /** * struct omap_sdrc_params - SDRC parameters for a given SDRC clock rate diff --git a/arch/arm/mach-omap2/sdrc2xxx.c b/arch/arm/mach-omap2/sdrc2xxx.c index 20cc950db4de..907291714643 100644 --- a/arch/arm/mach-omap2/sdrc2xxx.c +++ b/arch/arm/mach-omap2/sdrc2xxx.c @@ -27,7 +27,7 @@ #include "soc.h" #include "iomap.h" #include "common.h" -#include "prm2xxx_3xxx.h" +#include "prm2xxx.h" #include "clock.h" #include "sdrc.h" #include "sram.h" diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S index 7046c3c67181..d1dedc8195ed 100644 --- a/arch/arm/mach-omap2/sleep34xx.S +++ b/arch/arm/mach-omap2/sleep34xx.S @@ -28,8 +28,8 @@ #include "omap34xx.h" #include "iomap.h" -#include "cm2xxx_3xxx.h" -#include "prm2xxx_3xxx.h" +#include "cm3xxx.h" +#include "prm3xxx.h" #include "sdrc.h" #include "sram.h" #include "control.h" diff --git a/arch/arm/mach-omap2/sram242x.S b/arch/arm/mach-omap2/sram242x.S index 8f7326cd435b..680a7c56cc3e 100644 --- a/arch/arm/mach-omap2/sram242x.S +++ b/arch/arm/mach-omap2/sram242x.S @@ -34,8 +34,8 @@ #include "soc.h" #include "iomap.h" -#include "prm2xxx_3xxx.h" -#include "cm2xxx_3xxx.h" +#include "prm2xxx.h" +#include "cm2xxx.h" #include "sdrc.h" .text diff --git a/arch/arm/mach-omap2/sram243x.S b/arch/arm/mach-omap2/sram243x.S index b140d6578529..a1e9edd673f4 100644 --- a/arch/arm/mach-omap2/sram243x.S +++ b/arch/arm/mach-omap2/sram243x.S @@ -34,8 +34,8 @@ #include "soc.h" #include "iomap.h" -#include "prm2xxx_3xxx.h" -#include "cm2xxx_3xxx.h" +#include "prm2xxx.h" +#include "cm2xxx.h" #include "sdrc.h" .text diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S index 2d0ceaa23fb8..1446331b576a 100644 --- a/arch/arm/mach-omap2/sram34xx.S +++ b/arch/arm/mach-omap2/sram34xx.S @@ -32,7 +32,7 @@ #include "soc.h" #include "iomap.h" #include "sdrc.h" -#include "cm2xxx_3xxx.h" +#include "cm3xxx.h" /* * This file needs be built unconditionally as ARM to interoperate correctly diff --git a/arch/arm/mach-omap2/ti81xx.h b/arch/arm/mach-omap2/ti81xx.h index 8f9843f78422..a1e6caf0dba6 100644 --- a/arch/arm/mach-omap2/ti81xx.h +++ b/arch/arm/mach-omap2/ti81xx.h @@ -22,6 +22,15 @@ #define TI81XX_CTRL_BASE TI81XX_SCM_BASE #define TI81XX_PRCM_BASE 0x48180000 +/* + * Adjust TAP register base such that omap3_check_revision accesses the correct + * TI81XX register for checking device ID (it adds 0x204 to tap base while + * TI81XX DEVICE ID register is at offset 0x600 from control base). + */ +#define TI81XX_TAP_BASE (TI81XX_CTRL_BASE + \ + TI81XX_CONTROL_DEVICE_ID - 0x204) + + #define TI81XX_ARM_INTC_BASE 0x48200000 #endif /* __ASM_ARCH_TI81XX_H */ diff --git a/arch/arm/mach-omap2/wd_timer.c b/arch/arm/mach-omap2/wd_timer.c index f6b6c37ac3f4..7c2b4ed38f02 100644 --- a/arch/arm/mach-omap2/wd_timer.c +++ b/arch/arm/mach-omap2/wd_timer.c @@ -1,6 +1,8 @@ /* * OMAP2+ MPU WD_TIMER-specific code * + * Copyright (C) 2012 Texas Instruments, Inc. + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or @@ -11,10 +13,14 @@ #include <linux/io.h> #include <linux/err.h> -#include "omap_hwmod.h" +#include <linux/platform_data/omap-wd-timer.h> +#include "omap_hwmod.h" +#include "omap_device.h" #include "wd_timer.h" #include "common.h" +#include "prm.h" +#include "soc.h" /* * In order to avoid any assumptions from bootloader regarding WDT @@ -26,9 +32,6 @@ #define OMAP_WDT_WPS 0x34 #define OMAP_WDT_SPR 0x48 -/* Maximum microseconds to wait for OMAP module to softreset */ -#define MAX_MODULE_SOFTRESET_WAIT 10000 - int omap2_wd_timer_disable(struct omap_hwmod *oh) { void __iomem *base; @@ -99,3 +102,32 @@ int omap2_wd_timer_reset(struct omap_hwmod *oh) return (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : omap2_wd_timer_disable(oh); } + +static int __init omap_init_wdt(void) +{ + int id = -1; + struct platform_device *pdev; + struct omap_hwmod *oh; + char *oh_name = "wd_timer2"; + char *dev_name = "omap_wdt"; + struct omap_wd_timer_platform_data pdata; + + if (!cpu_class_is_omap2() || of_have_populated_dt()) + return 0; + + oh = omap_hwmod_lookup(oh_name); + if (!oh) { + pr_err("Could not look up wd_timer%d hwmod\n", id); + return -EINVAL; + } + + pdata.read_reset_sources = prm_read_reset_sources; + + pdev = omap_device_build(dev_name, id, oh, &pdata, + sizeof(struct omap_wd_timer_platform_data), + NULL, 0, 0); + WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n", + dev_name, oh->name); + return 0; +} +subsys_initcall(omap_init_wdt); diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index 11aa7399dc09..86eec4159cbc 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig @@ -2,27 +2,6 @@ if ARCH_PXA menu "Intel PXA2xx/PXA3xx Implementations" -config ARCH_PXA_V7 - bool "ARMv7 (PXA95x) based systems" - -if ARCH_PXA_V7 -comment "Marvell Dev Platforms (sorted by hardware release time)" -config MACH_TAVOREVB3 - bool "PXA95x Development Platform (aka TavorEVB III)" - select CPU_PXA955 - -config MACH_SAARB - bool "PXA955 Handheld Platform (aka SAARB)" - select CPU_PXA955 -endif - -config PXA_V7_MACH_AUTO - def_bool y - depends on ARCH_PXA_V7 - depends on !MACH_SAARB - select MACH_TAVOREVB3 - -if !ARCH_PXA_V7 comment "Intel/Marvell Dev Platforms (sorted by hardware release time)" config MACH_PXA3XX_DT @@ -630,7 +609,6 @@ config MACH_ZIPIT2 bool "Zipit Z2 Handheld" select HAVE_PWM select PXA27x -endif endmenu config PXA25x @@ -688,18 +666,6 @@ config CPU_PXA935 help PXA935 (codename Tavor-P65) -config PXA95x - bool - select CPU_PJ4 - help - Select code specific to PXA95x variants - -config CPU_PXA955 - bool - select PXA95x - help - PXA950 (codename MG1) - config PXA_SHARP_C7xx bool select SHARPSL_PM diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index ee88d6eae648..12c500558387 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile @@ -19,7 +19,6 @@ endif obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa25x.o obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa27x.o obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o -obj-$(CONFIG_PXA95x) += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o pxa95x.o smemc.o obj-$(CONFIG_CPU_PXA300) += pxa300.o obj-$(CONFIG_CPU_PXA320) += pxa320.o obj-$(CONFIG_CPU_PXA930) += pxa930.o @@ -36,9 +35,7 @@ obj-$(CONFIG_MACH_ZYLONITE300) += zylonite.o zylonite_pxa300.o obj-$(CONFIG_MACH_ZYLONITE320) += zylonite.o zylonite_pxa320.o obj-$(CONFIG_MACH_LITTLETON) += littleton.o obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o -obj-$(CONFIG_MACH_TAVOREVB3) += tavorevb3.o obj-$(CONFIG_MACH_SAAR) += saar.o -obj-$(CONFIG_MACH_SAARB) += saarb.o # 3rd Party Dev Platforms obj-$(CONFIG_ARCH_PXA_IDP) += idp.o diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h index 3a258b1bf1aa..1f65d32c8d5e 100644 --- a/arch/arm/mach-pxa/clock.h +++ b/arch/arm/mach-pxa/clock.h @@ -57,7 +57,7 @@ void clk_pxa2xx_cken_disable(struct clk *clk); extern struct syscore_ops pxa2xx_clock_syscore_ops; -#if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x) +#if defined(CONFIG_PXA3xx) #define DEFINE_PXA3_CKEN(_name, _cken, _rate, _delay) \ struct clk clk_##_name = { \ .ops = &clk_pxa3xx_cken_ops, \ diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c index ddaa04de8e22..daa86d39ed9e 100644 --- a/arch/arm/mach-pxa/devices.c +++ b/arch/arm/mach-pxa/devices.c @@ -703,7 +703,7 @@ void __init pxa_set_ohci_info(struct pxaohci_platform_data *info) } #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */ -#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x) +#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) static struct resource pxa27x_resource_keypad[] = { [0] = { .start = 0x41500000, @@ -872,7 +872,7 @@ struct platform_device pxa27x_device_pwm1 = { .resource = pxa27x_resource_pwm1, .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1), }; -#endif /* CONFIG_PXA27x || CONFIG_PXA3xx || CONFIG_PXA95x*/ +#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */ #ifdef CONFIG_PXA3xx static struct resource pxa3xx_resources_mci2[] = { @@ -981,7 +981,7 @@ struct platform_device pxa3xx_device_gcu = { #endif /* CONFIG_PXA3xx */ -#if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x) +#if defined(CONFIG_PXA3xx) static struct resource pxa3xx_resources_i2c_power[] = { { .start = 0x40f500c0, @@ -1082,7 +1082,7 @@ struct platform_device pxa3xx_device_ssp4 = { .resource = pxa3xx_resource_ssp4, .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4), }; -#endif /* CONFIG_PXA3xx || CONFIG_PXA95x */ +#endif /* CONFIG_PXA3xx */ struct resource pxa_resource_gpio[] = { { diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h index 56d92e5cad85..ccb06e485520 100644 --- a/arch/arm/mach-pxa/include/mach/hardware.h +++ b/arch/arm/mach-pxa/include/mach/hardware.h @@ -194,17 +194,6 @@ #define __cpu_is_pxa935(id) (0) #endif -#ifdef CONFIG_CPU_PXA955 -#define __cpu_is_pxa955(id) \ - ({ \ - unsigned int _id = (id) >> 4 & 0xfff; \ - _id == 0x581 || _id == 0xc08 \ - || _id == 0xb76; \ - }) -#else -#define __cpu_is_pxa955(id) (0) -#endif - #define cpu_is_pxa210() \ ({ \ __cpu_is_pxa210(read_cpuid_id()); \ @@ -255,10 +244,6 @@ __cpu_is_pxa935(read_cpuid_id()); \ }) -#define cpu_is_pxa955() \ - ({ \ - __cpu_is_pxa955(read_cpuid_id()); \ - }) /* @@ -297,15 +282,6 @@ #define __cpu_is_pxa93x(id) (0) #endif -#ifdef CONFIG_PXA95x -#define __cpu_is_pxa95x(id) \ - ({ \ - __cpu_is_pxa955(id); \ - }) -#else -#define __cpu_is_pxa95x(id) (0) -#endif - #define cpu_is_pxa2xx() \ ({ \ __cpu_is_pxa2xx(read_cpuid_id()); \ @@ -321,10 +297,6 @@ __cpu_is_pxa93x(read_cpuid_id()); \ }) -#define cpu_is_pxa95x() \ - ({ \ - __cpu_is_pxa95x(read_cpuid_id()); \ - }) /* * return current memory and LCD clock frequency in units of 10kHz diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h index 8765782dd955..48c2fd851686 100644 --- a/arch/arm/mach-pxa/include/mach/irqs.h +++ b/arch/arm/mach-pxa/include/mach/irqs.h @@ -84,7 +84,6 @@ #define IRQ_PXA935_MMC0 PXA_IRQ(72) /* MMC0 Controller (PXA935) */ #define IRQ_PXA935_MMC1 PXA_IRQ(73) /* MMC1 Controller (PXA935) */ #define IRQ_PXA935_MMC2 PXA_IRQ(74) /* MMC2 Controller (PXA935) */ -#define IRQ_PXA955_MMC3 PXA_IRQ(75) /* MMC3 Controller (PXA955) */ #define IRQ_U2P PXA_IRQ(93) /* USB PHY D+/D- Lines (PXA935) */ #define PXA_GPIO_IRQ_BASE PXA_IRQ(96) diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx.h b/arch/arm/mach-pxa/include/mach/pxa3xx.h index cd3e57f42688..6dd7fa163e29 100644 --- a/arch/arm/mach-pxa/include/mach/pxa3xx.h +++ b/arch/arm/mach-pxa/include/mach/pxa3xx.h @@ -7,7 +7,6 @@ extern void __init pxa3xx_map_io(void); extern void __init pxa3xx_init_irq(void); -extern void __init pxa95x_init_irq(void); #define pxa3xx_handle_irq ichp_handle_irq diff --git a/arch/arm/mach-pxa/include/mach/pxa95x.h b/arch/arm/mach-pxa/include/mach/pxa95x.h deleted file mode 100644 index cbb097c4cb1f..000000000000 --- a/arch/arm/mach-pxa/include/mach/pxa95x.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef __MACH_PXA95X_H -#define __MACH_PXA95X_H - -#include <mach/pxa3xx.h> -#include <mach/mfp-pxa930.h> - -#endif /* __MACH_PXA95X_H */ diff --git a/arch/arm/mach-pxa/pxa3xx-ulpi.c b/arch/arm/mach-pxa/pxa3xx-ulpi.c index 7dbe3ccf1993..e329ccefd364 100644 --- a/arch/arm/mach-pxa/pxa3xx-ulpi.c +++ b/arch/arm/mach-pxa/pxa3xx-ulpi.c @@ -384,18 +384,7 @@ static struct platform_driver pxa3xx_u2d_ulpi_driver = { .probe = pxa3xx_u2d_probe, .remove = pxa3xx_u2d_remove, }; - -static int pxa3xx_u2d_ulpi_init(void) -{ - return platform_driver_register(&pxa3xx_u2d_ulpi_driver); -} -module_init(pxa3xx_u2d_ulpi_init); - -static void __exit pxa3xx_u2d_ulpi_exit(void) -{ - platform_driver_unregister(&pxa3xx_u2d_ulpi_driver); -} -module_exit(pxa3xx_u2d_ulpi_exit); +module_platform_driver(pxa3xx_u2d_ulpi_driver); MODULE_DESCRIPTION("PXA3xx U2D ULPI driver"); MODULE_AUTHOR("Igor Grinberg"); diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c deleted file mode 100644 index 47601f80e6e7..000000000000 --- a/arch/arm/mach-pxa/pxa95x.c +++ /dev/null @@ -1,295 +0,0 @@ -/* - * linux/arch/arm/mach-pxa/pxa95x.c - * - * code specific to PXA95x aka MGx - * - * Copyright (C) 2009-2010 Marvell International Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/pm.h> -#include <linux/platform_device.h> -#include <linux/i2c/pxa-i2c.h> -#include <linux/irq.h> -#include <linux/io.h> -#include <linux/syscore_ops.h> - -#include <mach/hardware.h> -#include <mach/pxa3xx-regs.h> -#include <mach/pxa930.h> -#include <mach/reset.h> -#include <mach/pm.h> -#include <mach/dma.h> - -#include "generic.h" -#include "devices.h" -#include "clock.h" - -static struct mfp_addr_map pxa95x_mfp_addr_map[] __initdata = { - - MFP_ADDR(GPIO0, 0x02e0), - MFP_ADDR(GPIO1, 0x02dc), - MFP_ADDR(GPIO2, 0x02e8), - MFP_ADDR(GPIO3, 0x02d8), - MFP_ADDR(GPIO4, 0x02e4), - MFP_ADDR(GPIO5, 0x02ec), - MFP_ADDR(GPIO6, 0x02f8), - MFP_ADDR(GPIO7, 0x02fc), - MFP_ADDR(GPIO8, 0x0300), - MFP_ADDR(GPIO9, 0x02d4), - MFP_ADDR(GPIO10, 0x02f4), - MFP_ADDR(GPIO11, 0x02f0), - MFP_ADDR(GPIO12, 0x0304), - MFP_ADDR(GPIO13, 0x0310), - MFP_ADDR(GPIO14, 0x0308), - MFP_ADDR(GPIO15, 0x030c), - MFP_ADDR(GPIO16, 0x04e8), - MFP_ADDR(GPIO17, 0x04f4), - MFP_ADDR(GPIO18, 0x04f8), - MFP_ADDR(GPIO19, 0x04fc), - MFP_ADDR(GPIO20, 0x0518), - MFP_ADDR(GPIO21, 0x051c), - MFP_ADDR(GPIO22, 0x04ec), - MFP_ADDR(GPIO23, 0x0500), - MFP_ADDR(GPIO24, 0x04f0), - MFP_ADDR(GPIO25, 0x0504), - MFP_ADDR(GPIO26, 0x0510), - MFP_ADDR(GPIO27, 0x0514), - MFP_ADDR(GPIO28, 0x0520), - MFP_ADDR(GPIO29, 0x0600), - MFP_ADDR(GPIO30, 0x0618), - MFP_ADDR(GPIO31, 0x0610), - MFP_ADDR(GPIO32, 0x060c), - MFP_ADDR(GPIO33, 0x061c), - MFP_ADDR(GPIO34, 0x0620), - MFP_ADDR(GPIO35, 0x0628), - MFP_ADDR(GPIO36, 0x062c), - MFP_ADDR(GPIO37, 0x0630), - MFP_ADDR(GPIO38, 0x0634), - MFP_ADDR(GPIO39, 0x0638), - MFP_ADDR(GPIO40, 0x063c), - MFP_ADDR(GPIO41, 0x0614), - MFP_ADDR(GPIO42, 0x0624), - MFP_ADDR(GPIO43, 0x0608), - MFP_ADDR(GPIO44, 0x0604), - MFP_ADDR(GPIO45, 0x050c), - MFP_ADDR(GPIO46, 0x0508), - MFP_ADDR(GPIO47, 0x02bc), - MFP_ADDR(GPIO48, 0x02b4), - MFP_ADDR(GPIO49, 0x02b8), - MFP_ADDR(GPIO50, 0x02c8), - MFP_ADDR(GPIO51, 0x02c0), - MFP_ADDR(GPIO52, 0x02c4), - MFP_ADDR(GPIO53, 0x02d0), - MFP_ADDR(GPIO54, 0x02cc), - MFP_ADDR(GPIO55, 0x029c), - MFP_ADDR(GPIO56, 0x02a0), - MFP_ADDR(GPIO57, 0x0294), - MFP_ADDR(GPIO58, 0x0298), - MFP_ADDR(GPIO59, 0x02a4), - MFP_ADDR(GPIO60, 0x02a8), - MFP_ADDR(GPIO61, 0x02b0), - MFP_ADDR(GPIO62, 0x02ac), - MFP_ADDR(GPIO63, 0x0640), - MFP_ADDR(GPIO64, 0x065c), - MFP_ADDR(GPIO65, 0x0648), - MFP_ADDR(GPIO66, 0x0644), - MFP_ADDR(GPIO67, 0x0674), - MFP_ADDR(GPIO68, 0x0658), - MFP_ADDR(GPIO69, 0x0654), - MFP_ADDR(GPIO70, 0x0660), - MFP_ADDR(GPIO71, 0x0668), - MFP_ADDR(GPIO72, 0x0664), - MFP_ADDR(GPIO73, 0x0650), - MFP_ADDR(GPIO74, 0x066c), - MFP_ADDR(GPIO75, 0x064c), - MFP_ADDR(GPIO76, 0x0670), - MFP_ADDR(GPIO77, 0x0678), - MFP_ADDR(GPIO78, 0x067c), - MFP_ADDR(GPIO79, 0x0694), - MFP_ADDR(GPIO80, 0x069c), - MFP_ADDR(GPIO81, 0x06a0), - MFP_ADDR(GPIO82, 0x06a4), - MFP_ADDR(GPIO83, 0x0698), - MFP_ADDR(GPIO84, 0x06bc), - MFP_ADDR(GPIO85, 0x06b4), - MFP_ADDR(GPIO86, 0x06b0), - MFP_ADDR(GPIO87, 0x06c0), - MFP_ADDR(GPIO88, 0x06c4), - MFP_ADDR(GPIO89, 0x06ac), - MFP_ADDR(GPIO90, 0x0680), - MFP_ADDR(GPIO91, 0x0684), - MFP_ADDR(GPIO92, 0x0688), - MFP_ADDR(GPIO93, 0x0690), - MFP_ADDR(GPIO94, 0x068c), - MFP_ADDR(GPIO95, 0x06a8), - MFP_ADDR(GPIO96, 0x06b8), - MFP_ADDR(GPIO97, 0x0410), - MFP_ADDR(GPIO98, 0x0418), - MFP_ADDR(GPIO99, 0x041c), - MFP_ADDR(GPIO100, 0x0414), - MFP_ADDR(GPIO101, 0x0408), - MFP_ADDR(GPIO102, 0x0324), - MFP_ADDR(GPIO103, 0x040c), - MFP_ADDR(GPIO104, 0x0400), - MFP_ADDR(GPIO105, 0x0328), - MFP_ADDR(GPIO106, 0x0404), - - MFP_ADDR(GPIO159, 0x0524), - MFP_ADDR(GPIO163, 0x0534), - MFP_ADDR(GPIO167, 0x0544), - MFP_ADDR(GPIO168, 0x0548), - MFP_ADDR(GPIO169, 0x054c), - MFP_ADDR(GPIO170, 0x0550), - MFP_ADDR(GPIO171, 0x0554), - MFP_ADDR(GPIO172, 0x0558), - MFP_ADDR(GPIO173, 0x055c), - - MFP_ADDR(nXCVREN, 0x0204), - MFP_ADDR(DF_CLE_nOE, 0x020c), - MFP_ADDR(DF_nADV1_ALE, 0x0218), - MFP_ADDR(DF_SCLK_E, 0x0214), - MFP_ADDR(DF_SCLK_S, 0x0210), - MFP_ADDR(nBE0, 0x021c), - MFP_ADDR(nBE1, 0x0220), - MFP_ADDR(DF_nADV2_ALE, 0x0224), - MFP_ADDR(DF_INT_RnB, 0x0228), - MFP_ADDR(DF_nCS0, 0x022c), - MFP_ADDR(DF_nCS1, 0x0230), - MFP_ADDR(nLUA, 0x0254), - MFP_ADDR(nLLA, 0x0258), - MFP_ADDR(DF_nWE, 0x0234), - MFP_ADDR(DF_nRE_nOE, 0x0238), - MFP_ADDR(DF_ADDR0, 0x024c), - MFP_ADDR(DF_ADDR1, 0x0250), - MFP_ADDR(DF_ADDR2, 0x025c), - MFP_ADDR(DF_ADDR3, 0x0260), - MFP_ADDR(DF_IO0, 0x023c), - MFP_ADDR(DF_IO1, 0x0240), - MFP_ADDR(DF_IO2, 0x0244), - MFP_ADDR(DF_IO3, 0x0248), - MFP_ADDR(DF_IO4, 0x0264), - MFP_ADDR(DF_IO5, 0x0268), - MFP_ADDR(DF_IO6, 0x026c), - MFP_ADDR(DF_IO7, 0x0270), - MFP_ADDR(DF_IO8, 0x0274), - MFP_ADDR(DF_IO9, 0x0278), - MFP_ADDR(DF_IO10, 0x027c), - MFP_ADDR(DF_IO11, 0x0280), - MFP_ADDR(DF_IO12, 0x0284), - MFP_ADDR(DF_IO13, 0x0288), - MFP_ADDR(DF_IO14, 0x028c), - MFP_ADDR(DF_IO15, 0x0290), - - MFP_ADDR(GSIM_UIO, 0x0314), - MFP_ADDR(GSIM_UCLK, 0x0318), - MFP_ADDR(GSIM_UDET, 0x031c), - MFP_ADDR(GSIM_nURST, 0x0320), - - MFP_ADDR(PMIC_INT, 0x06c8), - - MFP_ADDR(RDY, 0x0200), - - MFP_ADDR_END, -}; - -static DEFINE_CK(pxa95x_lcd, LCD, &clk_pxa3xx_hsio_ops); -static DEFINE_CLK(pxa95x_pout, &clk_pxa3xx_pout_ops, 13000000, 70); -static DEFINE_PXA3_CKEN(pxa95x_ffuart, FFUART, 14857000, 1); -static DEFINE_PXA3_CKEN(pxa95x_btuart, BTUART, 14857000, 1); -static DEFINE_PXA3_CKEN(pxa95x_stuart, STUART, 14857000, 1); -static DEFINE_PXA3_CKEN(pxa95x_i2c, I2C, 32842000, 0); -static DEFINE_PXA3_CKEN(pxa95x_keypad, KEYPAD, 32768, 0); -static DEFINE_PXA3_CKEN(pxa95x_ssp1, SSP1, 13000000, 0); -static DEFINE_PXA3_CKEN(pxa95x_ssp2, SSP2, 13000000, 0); -static DEFINE_PXA3_CKEN(pxa95x_ssp3, SSP3, 13000000, 0); -static DEFINE_PXA3_CKEN(pxa95x_ssp4, SSP4, 13000000, 0); -static DEFINE_PXA3_CKEN(pxa95x_pwm0, PWM0, 13000000, 0); -static DEFINE_PXA3_CKEN(pxa95x_pwm1, PWM1, 13000000, 0); -static DEFINE_PXA3_CKEN(pxa95x_gpio, GPIO, 13000000, 0); - -static struct clk_lookup pxa95x_clkregs[] = { - INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"), - /* Power I2C clock is always on */ - INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL), - INIT_CLKREG(&clk_pxa95x_lcd, "pxa2xx-fb", NULL), - INIT_CLKREG(&clk_pxa95x_ffuart, "pxa2xx-uart.0", NULL), - INIT_CLKREG(&clk_pxa95x_btuart, "pxa2xx-uart.1", NULL), - INIT_CLKREG(&clk_pxa95x_stuart, "pxa2xx-uart.2", NULL), - INIT_CLKREG(&clk_pxa95x_stuart, "pxa2xx-ir", "UARTCLK"), - INIT_CLKREG(&clk_pxa95x_i2c, "pxa2xx-i2c.0", NULL), - INIT_CLKREG(&clk_pxa95x_keypad, "pxa27x-keypad", NULL), - INIT_CLKREG(&clk_pxa95x_ssp1, "pxa27x-ssp.0", NULL), - INIT_CLKREG(&clk_pxa95x_ssp2, "pxa27x-ssp.1", NULL), - INIT_CLKREG(&clk_pxa95x_ssp3, "pxa27x-ssp.2", NULL), - INIT_CLKREG(&clk_pxa95x_ssp4, "pxa27x-ssp.3", NULL), - INIT_CLKREG(&clk_pxa95x_pwm0, "pxa27x-pwm.0", NULL), - INIT_CLKREG(&clk_pxa95x_pwm1, "pxa27x-pwm.1", NULL), - INIT_CLKREG(&clk_pxa95x_gpio, "pxa-gpio", NULL), - INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL), -}; - -void __init pxa95x_init_irq(void) -{ - pxa_init_irq(96, NULL); -} - -/* - * device registration specific to PXA93x. - */ - -void __init pxa95x_set_i2c_power_info(struct i2c_pxa_platform_data *info) -{ - pxa_register_device(&pxa3xx_device_i2c_power, info); -} - -static struct platform_device *devices[] __initdata = { - &pxa_device_gpio, - &sa1100_device_rtc, - &pxa_device_rtc, - &pxa27x_device_ssp1, - &pxa27x_device_ssp2, - &pxa27x_device_ssp3, - &pxa3xx_device_ssp4, - &pxa27x_device_pwm0, - &pxa27x_device_pwm1, -}; - -static int __init pxa95x_init(void) -{ - int ret = 0, i; - - if (cpu_is_pxa95x()) { - mfp_init_base(io_p2v(MFPR_BASE)); - mfp_init_addr(pxa95x_mfp_addr_map); - - reset_status = ARSR; - - /* - * clear RDH bit every time after reset - * - * Note: the last 3 bits DxS are write-1-to-clear so carefully - * preserve them here in case they will be referenced later - */ - ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S); - - clkdev_add_table(pxa95x_clkregs, ARRAY_SIZE(pxa95x_clkregs)); - - if ((ret = pxa_init_dma(IRQ_DMA, 32))) - return ret; - - register_syscore_ops(&pxa_irq_syscore_ops); - register_syscore_ops(&pxa3xx_clock_syscore_ops); - - ret = platform_add_devices(devices, ARRAY_SIZE(devices)); - } - - return ret; -} - -postcore_initcall(pxa95x_init); diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c deleted file mode 100644 index 5aded5e6148f..000000000000 --- a/arch/arm/mach-pxa/saarb.c +++ /dev/null @@ -1,115 +0,0 @@ -/* - * linux/arch/arm/mach-pxa/saarb.c - * - * Support for the Marvell Handheld Platform (aka SAARB) - * - * Copyright (C) 2007-2010 Marvell International Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * publishhed by the Free Software Foundation. - */ -#include <linux/gpio.h> -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/i2c.h> -#include <linux/i2c/pxa-i2c.h> -#include <linux/mfd/88pm860x.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include <mach/irqs.h> -#include <mach/hardware.h> -#include <mach/mfp.h> -#include <mach/mfp-pxa930.h> -#include <mach/pxa95x.h> - -#include "generic.h" - -#define SAARB_NR_IRQS (IRQ_BOARD_START + 40) - -static struct pm860x_touch_pdata saarb_touch = { - .gpadc_prebias = 1, - .slot_cycle = 1, - .tsi_prebias = 6, - .pen_prebias = 16, - .pen_prechg = 2, - .res_x = 300, -}; - -static struct pm860x_backlight_pdata saarb_backlight[] = { - { - .id = PM8606_ID_BACKLIGHT, - .iset = PM8606_WLED_CURRENT(24), - .flags = PM8606_BACKLIGHT1, - }, - {}, -}; - -static struct pm860x_led_pdata saarb_led[] = { - { - .id = PM8606_ID_LED, - .iset = PM8606_LED_CURRENT(12), - .flags = PM8606_LED1_RED, - }, { - .id = PM8606_ID_LED, - .iset = PM8606_LED_CURRENT(12), - .flags = PM8606_LED1_GREEN, - }, { - .id = PM8606_ID_LED, - .iset = PM8606_LED_CURRENT(12), - .flags = PM8606_LED1_BLUE, - }, { - .id = PM8606_ID_LED, - .iset = PM8606_LED_CURRENT(12), - .flags = PM8606_LED2_RED, - }, { - .id = PM8606_ID_LED, - .iset = PM8606_LED_CURRENT(12), - .flags = PM8606_LED2_GREEN, - }, { - .id = PM8606_ID_LED, - .iset = PM8606_LED_CURRENT(12), - .flags = PM8606_LED2_BLUE, - }, -}; - -static struct pm860x_platform_data saarb_pm8607_info = { - .touch = &saarb_touch, - .backlight = &saarb_backlight[0], - .led = &saarb_led[0], - .companion_addr = 0x10, - .irq_mode = 0, - .irq_base = IRQ_BOARD_START, - - .i2c_port = GI2C_PORT, -}; - -static struct i2c_board_info saarb_i2c_info[] = { - { - .type = "88PM860x", - .addr = 0x34, - .platform_data = &saarb_pm8607_info, - .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)), - }, -}; - -static void __init saarb_init(void) -{ - pxa_set_ffuart_info(NULL); - pxa_set_i2c_info(NULL); - i2c_register_board_info(0, ARRAY_AND_SIZE(saarb_i2c_info)); -} - -MACHINE_START(SAARB, "PXA955 Handheld Platform (aka SAARB)") - .atag_offset = 0x100, - .map_io = pxa3xx_map_io, - .nr_irqs = SAARB_NR_IRQS, - .init_irq = pxa95x_init_irq, - .handle_irq = pxa3xx_handle_irq, - .timer = &pxa_timer, - .init_machine = saarb_init, - .restart = pxa_restart, -MACHINE_END - diff --git a/arch/arm/mach-pxa/tavorevb3.c b/arch/arm/mach-pxa/tavorevb3.c deleted file mode 100644 index f7d9305cfd77..000000000000 --- a/arch/arm/mach-pxa/tavorevb3.c +++ /dev/null @@ -1,136 +0,0 @@ -/* - * linux/arch/arm/mach-pxa/tavorevb3.c - * - * Support for the Marvell EVB3 Development Platform. - * - * Copyright: (C) Copyright 2008-2010 Marvell International Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * publishhed by the Free Software Foundation. - */ - -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/platform_device.h> -#include <linux/interrupt.h> -#include <linux/i2c.h> -#include <linux/i2c/pxa-i2c.h> -#include <linux/gpio.h> -#include <linux/mfd/88pm860x.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> - -#include <mach/pxa930.h> - -#include "devices.h" -#include "generic.h" - -#define TAVOREVB3_NR_IRQS (IRQ_BOARD_START + 24) - -static mfp_cfg_t evb3_mfp_cfg[] __initdata = { - /* UART */ - GPIO53_UART1_TXD, - GPIO54_UART1_RXD, - - /* PMIC */ - PMIC_INT_GPIO83, -}; - -#if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE) -static struct pm860x_touch_pdata evb3_touch = { - .gpadc_prebias = 1, - .slot_cycle = 1, - .tsi_prebias = 6, - .pen_prebias = 16, - .pen_prechg = 2, - .res_x = 300, -}; - -static struct pm860x_backlight_pdata evb3_backlight[] = { - { - .id = PM8606_ID_BACKLIGHT, - .iset = PM8606_WLED_CURRENT(24), - .flags = PM8606_BACKLIGHT1, - }, - {}, -}; - -static struct pm860x_led_pdata evb3_led[] = { - { - .id = PM8606_ID_LED, - .iset = PM8606_LED_CURRENT(12), - .flags = PM8606_LED1_RED, - }, { - .id = PM8606_ID_LED, - .iset = PM8606_LED_CURRENT(12), - .flags = PM8606_LED1_GREEN, - }, { - .id = PM8606_ID_LED, - .iset = PM8606_LED_CURRENT(12), - .flags = PM8606_LED1_BLUE, - }, { - .id = PM8606_ID_LED, - .iset = PM8606_LED_CURRENT(12), - .flags = PM8606_LED2_RED, - }, { - .id = PM8606_ID_LED, - .iset = PM8606_LED_CURRENT(12), - .flags = PM8606_LED2_GREEN, - }, { - .id = PM8606_ID_LED, - .iset = PM8606_LED_CURRENT(12), - .flags = PM8606_LED2_BLUE, - }, -}; - -static struct pm860x_platform_data evb3_pm8607_info = { - .touch = &evb3_touch, - .backlight = &evb3_backlight[0], - .led = &evb3_led[0], - .companion_addr = 0x10, - .irq_mode = 0, - .irq_base = IRQ_BOARD_START, - - .i2c_port = GI2C_PORT, -}; - -static struct i2c_board_info evb3_i2c_info[] = { - { - .type = "88PM860x", - .addr = 0x34, - .platform_data = &evb3_pm8607_info, - .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)), - }, -}; - -static void __init evb3_init_i2c(void) -{ - pxa_set_i2c_info(NULL); - i2c_register_board_info(0, ARRAY_AND_SIZE(evb3_i2c_info)); -} -#else -static inline void evb3_init_i2c(void) {} -#endif - -static void __init evb3_init(void) -{ - /* initialize MFP configurations */ - pxa3xx_mfp_config(ARRAY_AND_SIZE(evb3_mfp_cfg)); - - pxa_set_ffuart_info(NULL); - - evb3_init_i2c(); -} - -MACHINE_START(TAVOREVB3, "PXA950 Evaluation Board (aka TavorEVB3)") - .atag_offset = 0x100, - .map_io = pxa3xx_map_io, - .nr_irqs = TAVOREVB3_NR_IRQS, - .init_irq = pxa3xx_init_irq, - .handle_irq = pxa3xx_handle_irq, - .timer = &pxa_timer, - .init_machine = evb3_init, - .restart = pxa_restart, -MACHINE_END diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c64xx/common.c index be746e33e86c..aef303b8997e 100644 --- a/arch/arm/mach-s3c64xx/common.c +++ b/arch/arm/mach-s3c64xx/common.c @@ -155,7 +155,6 @@ void __init s3c64xx_init_io(struct map_desc *mach_desc, int size) /* initialise the io descriptors we need for initialisation */ iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); iotable_init(mach_desc, size); - init_consistent_dma_size(SZ_8M); /* detect cpu id */ s3c64xx_init_cpu(); diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c index 111e404a81fd..8ae5800e807f 100644 --- a/arch/arm/mach-s5p64x0/common.c +++ b/arch/arm/mach-s5p64x0/common.c @@ -187,7 +187,6 @@ void __init s5p6440_map_io(void) s5p6440_default_sdhci2(); iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc)); - init_consistent_dma_size(SZ_8M); } void __init s5p6450_map_io(void) @@ -202,7 +201,6 @@ void __init s5p6450_map_io(void) s5p6450_default_sdhci2(); iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc)); - init_consistent_dma_size(SZ_8M); } /* diff --git a/arch/arm/mach-s5pv210/common.c b/arch/arm/mach-s5pv210/common.c index a0c50efe8145..9dfe93e2624d 100644 --- a/arch/arm/mach-s5pv210/common.c +++ b/arch/arm/mach-s5pv210/common.c @@ -169,8 +169,6 @@ void __init s5pv210_init_io(struct map_desc *mach_desc, int size) void __init s5pv210_map_io(void) { - init_consistent_dma_size(14 << 20); - /* initialise device information early */ s5pv210_default_sdhci0(); s5pv210_default_sdhci1(); diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c index 11bb1d984197..96f11394c7c0 100644 --- a/arch/arm/mach-shmobile/setup-r8a7740.c +++ b/arch/arm/mach-shmobile/setup-r8a7740.c @@ -66,12 +66,6 @@ static struct map_desc r8a7740_io_desc[] __initdata = { void __init r8a7740_map_io(void) { iotable_init(r8a7740_io_desc, ARRAY_SIZE(r8a7740_io_desc)); - - /* - * DMA memory at 0xff200000 - 0xffdfffff. The default 2MB size isn't - * enough to allocate the frame buffer memory. - */ - init_consistent_dma_size(12 << 20); } /* SCIFA0 */ diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c index a07954fbcd22..be6f746c97fa 100644 --- a/arch/arm/mach-shmobile/setup-sh7372.c +++ b/arch/arm/mach-shmobile/setup-sh7372.c @@ -58,12 +58,6 @@ static struct map_desc sh7372_io_desc[] __initdata = { void __init sh7372_map_io(void) { iotable_init(sh7372_io_desc, ARRAY_SIZE(sh7372_io_desc)); - - /* - * DMA memory at 0xff200000 - 0xffdfffff. The default 2MB size isn't - * enough to allocate the frame buffer memory. - */ - init_consistent_dma_size(12 << 20); } /* SCIFA0 */ diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c index b8efac4daed8..d8632ebb1eaf 100644 --- a/arch/arm/mach-u300/core.c +++ b/arch/arm/mach-u300/core.c @@ -82,8 +82,6 @@ static struct map_desc u300_io_desc[] __initdata = { static void __init u300_map_io(void) { iotable_init(u300_io_desc, ARRAY_SIZE(u300_io_desc)); - /* We enable a real big DMA buffer if need be. */ - init_consistent_dma_size(SZ_4M); } /* diff --git a/arch/arm/mach-vt8500/include/mach/hardware.h b/arch/arm/mach-vt8500/include/mach/hardware.h deleted file mode 100644 index db4163f72c39..000000000000 --- a/arch/arm/mach-vt8500/include/mach/hardware.h +++ /dev/null @@ -1,12 +0,0 @@ -/* arch/arm/mach-vt8500/include/mach/hardware.h - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ diff --git a/arch/arm/mach-vt8500/include/mach/i8042.h b/arch/arm/mach-vt8500/include/mach/i8042.h deleted file mode 100644 index cd7143cad6f3..000000000000 --- a/arch/arm/mach-vt8500/include/mach/i8042.h +++ /dev/null @@ -1,18 +0,0 @@ -/* arch/arm/mach-vt8500/include/mach/i8042.h - * - * Copyright (C) 2010 Alexey Charkov <[email protected]> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -extern unsigned long wmt_i8042_base __initdata; -extern int wmt_i8042_kbd_irq; -extern int wmt_i8042_aux_irq; diff --git a/arch/arm/mach-vt8500/include/mach/restart.h b/arch/arm/mach-vt8500/include/mach/restart.h deleted file mode 100644 index 738979518acb..000000000000 --- a/arch/arm/mach-vt8500/include/mach/restart.h +++ /dev/null @@ -1,17 +0,0 @@ -/* linux/arch/arm/mach-vt8500/restart.h - * - * Copyright (C) 2012 Tony Prisk <[email protected]> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -void vt8500_setup_restart(void); -void vt8500_restart(char mode, const char *cmd); diff --git a/arch/arm/mach-vt8500/timer.c b/arch/arm/mach-vt8500/timer.c index 050e1833f2d0..3dd21a47881f 100644 --- a/arch/arm/mach-vt8500/timer.c +++ b/arch/arm/mach-vt8500/timer.c @@ -1,5 +1,5 @@ /* - * arch/arm/mach-vt8500/timer_dt.c + * arch/arm/mach-vt8500/timer.c * * Copyright (C) 2012 Tony Prisk <[email protected]> * Copyright (C) 2010 Alexey Charkov <[email protected]> diff --git a/arch/arm/mach-vt8500/vt8500.c b/arch/arm/mach-vt8500/vt8500.c index 8d3871f110a5..a5bd28692b06 100644 --- a/arch/arm/mach-vt8500/vt8500.c +++ b/arch/arm/mach-vt8500/vt8500.c @@ -31,8 +31,6 @@ #include <linux/of_irq.h> #include <linux/of_platform.h> -#include <mach/restart.h> - #include "common.h" #define LEGACY_GPIO_BASE 0xD8110000 diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index ab5cfddc0d7b..ba8d14f78d4d 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -31,7 +31,6 @@ #include <asm/hardware/cache-l2x0.h> #include <mach/zynq_soc.h> -#include <mach/clkdev.h> #include "common.h" static struct of_device_id zynq_of_bus_ids[] __initdata = { @@ -45,22 +44,25 @@ static struct of_device_id zynq_of_bus_ids[] __initdata = { */ static void __init xilinx_init_machine(void) { -#ifdef CONFIG_CACHE_L2X0 /* * 64KB way size, 8-way associativity, parity disabled */ - l2x0_init(PL310_L2CC_BASE, 0x02060000, 0xF0F0FFFF); -#endif + l2x0_of_init(0x02060000, 0xF0F0FFFF); of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL); } +static struct of_device_id irq_match[] __initdata = { + { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, + { } +}; + /** * xilinx_irq_init() - Interrupt controller initialization for the GIC. */ static void __init xilinx_irq_init(void) { - gic_init(0, 29, SCU_GIC_DIST_BASE, SCU_GIC_CPU_BASE); + of_irq_init(irq_match); } /* The minimum devices needed to be mapped before the VM system is up and @@ -71,17 +73,12 @@ static struct map_desc io_desc[] __initdata = { { .virtual = TTC0_VIRT, .pfn = __phys_to_pfn(TTC0_PHYS), - .length = SZ_4K, + .length = TTC0_SIZE, .type = MT_DEVICE, }, { .virtual = SCU_PERIPH_VIRT, .pfn = __phys_to_pfn(SCU_PERIPH_PHYS), - .length = SZ_8K, - .type = MT_DEVICE, - }, { - .virtual = PL310_L2CC_VIRT, - .pfn = __phys_to_pfn(PL310_L2CC_PHYS), - .length = SZ_4K, + .length = SCU_PERIPH_SIZE, .type = MT_DEVICE, }, @@ -89,7 +86,7 @@ static struct map_desc io_desc[] __initdata = { { .virtual = UART0_VIRT, .pfn = __phys_to_pfn(UART0_PHYS), - .length = SZ_4K, + .length = UART0_SIZE, .type = MT_DEVICE, }, #endif diff --git a/arch/arm/mach-zynq/include/mach/clkdev.h b/arch/arm/mach-zynq/include/mach/clkdev.h deleted file mode 100644 index c6e73d81a459..000000000000 --- a/arch/arm/mach-zynq/include/mach/clkdev.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * arch/arm/mach-zynq/include/mach/clkdev.h - * - * Copyright (C) 2011 Xilinx, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __MACH_CLKDEV_H__ -#define __MACH_CLKDEV_H__ - -#include <plat/clock.h> - -struct clk { - unsigned long rate; - const struct clk_ops *ops; - const struct icst_params *params; - void __iomem *vcoreg; -}; - -#define __clk_get(clk) ({ 1; }) -#define __clk_put(clk) do { } while (0) - -#endif diff --git a/arch/arm/mach-zynq/include/mach/zynq_soc.h b/arch/arm/mach-zynq/include/mach/zynq_soc.h index d0d3f8fb06dd..1b8bf0ecbcb0 100644 --- a/arch/arm/mach-zynq/include/mach/zynq_soc.h +++ b/arch/arm/mach-zynq/include/mach/zynq_soc.h @@ -15,33 +15,32 @@ #ifndef __MACH_XILINX_SOC_H__ #define __MACH_XILINX_SOC_H__ +#include <asm/pgtable.h> + #define PERIPHERAL_CLOCK_RATE 2500000 -/* For now, all mappings are flat (physical = virtual) +/* Static peripheral mappings are mapped at the top of the vmalloc region. The + * early uart mapping causes intermediate problems/failure at certain + * addresses, including the very top of the vmalloc region. Map it at an + * address that is known to work. */ -#define UART0_PHYS 0xE0000000 -#define UART0_VIRT UART0_PHYS - -#define TTC0_PHYS 0xF8001000 -#define TTC0_VIRT TTC0_PHYS +#define UART0_PHYS 0xE0000000 +#define UART0_SIZE SZ_4K +#define UART0_VIRT 0xF0001000 -#define PL310_L2CC_PHYS 0xF8F02000 -#define PL310_L2CC_VIRT PL310_L2CC_PHYS +#define TTC0_PHYS 0xF8001000 +#define TTC0_SIZE SZ_4K +#define TTC0_VIRT (VMALLOC_END - TTC0_SIZE) -#define SCU_PERIPH_PHYS 0xF8F00000 -#define SCU_PERIPH_VIRT SCU_PERIPH_PHYS +#define SCU_PERIPH_PHYS 0xF8F00000 +#define SCU_PERIPH_SIZE SZ_8K +#define SCU_PERIPH_VIRT (TTC0_VIRT - SCU_PERIPH_SIZE) /* The following are intended for the devices that are mapped early */ #define TTC0_BASE IOMEM(TTC0_VIRT) #define SCU_PERIPH_BASE IOMEM(SCU_PERIPH_VIRT) -#define SCU_GIC_CPU_BASE (SCU_PERIPH_BASE + 0x100) -#define SCU_GIC_DIST_BASE (SCU_PERIPH_BASE + 0x1000) -#define PL310_L2CC_BASE IOMEM(PL310_L2CC_VIRT) -/* - * Mandatory for CONFIG_LL_DEBUG, UART is mapped virtual = physical - */ #define LL_UART_PADDR UART0_PHYS #define LL_UART_VADDR UART0_VIRT diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c index 023f443784ec..b820edaf3184 100644 --- a/arch/arm/mm/alignment.c +++ b/arch/arm/mm/alignment.c @@ -745,7 +745,7 @@ do_alignment_t32_to_handler(unsigned long *pinstr, struct pt_regs *regs, static int do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) { - union offset_union offset; + union offset_union uninitialized_var(offset); unsigned long instr = 0, instrptr; int (*handler)(unsigned long addr, unsigned long instr, struct pt_regs *regs); unsigned int type; diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig deleted file mode 100644 index 88e1e2e7a20d..000000000000 --- a/arch/arm/plat-mxc/Kconfig +++ /dev/null @@ -1,89 +0,0 @@ -if ARCH_MXC - -source "arch/arm/plat-mxc/devices/Kconfig" - -menu "Freescale MXC Implementations" - -choice - prompt "Freescale CPU family:" - default ARCH_IMX_V6_V7 - -config ARCH_IMX_V4_V5 - bool "i.MX1, i.MX21, i.MX25, i.MX27" - select ARM_PATCH_PHYS_VIRT - select AUTO_ZRELADDR if !ZBOOT_ROM - help - This enables support for systems based on the Freescale i.MX ARMv4 - and ARMv5 SoCs - -config ARCH_IMX_V6_V7 - bool "i.MX3, i.MX5, i.MX6" - select ARM_PATCH_PHYS_VIRT - select AUTO_ZRELADDR if !ZBOOT_ROM - select MIGHT_HAVE_CACHE_L2X0 - help - This enables support for systems based on the Freescale i.MX3, i.MX5 - and i.MX6 family. - -endchoice - -source "arch/arm/mach-imx/Kconfig" - -endmenu - -config MXC_IRQ_PRIOR - bool "Use IRQ priority" - help - Select this if you want to use prioritized IRQ handling. - This feature prevents higher priority ISR to be interrupted - by lower priority IRQ even IRQF_DISABLED flag is not set. - This may be useful in embedded applications, where are strong - requirements for timing. - Say N here, unless you have a specialized requirement. - -config MXC_TZIC - bool - -config MXC_AVIC - bool - -config MXC_DEBUG_BOARD - bool "Enable MXC debug board(for 3-stack)" - help - The debug board is an integral part of the MXC 3-stack(PDK) - platforms, it can be attached or removed from the peripheral - board. On debug board, several debug devices(ethernet, UART, - buttons, LEDs and JTAG) are implemented. Between the MCU and - these devices, a CPLD is added as a bridge which performs - data/address de-multiplexing and decode, signal level shift, - interrupt control and various board functions. - -config HAVE_EPIT - bool - -config MXC_USE_EPIT - bool "Use EPIT instead of GPT" - depends on HAVE_EPIT - help - Use EPIT as the system timer on systems that have it. Normally you - don't have a reason to do so as the EPIT has the same features and - uses the same clocks as the GPT. Anyway, on some systems the GPT - may be in use for other purposes. - -config MXC_ULPI - bool - -config ARCH_HAS_RNGA - bool - -config IMX_HAVE_IOMUX_V1 - bool - -config ARCH_MXC_IOMUX_V3 - bool - -config IRAM_ALLOC - bool - select GENERIC_ALLOCATOR - -endif diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile deleted file mode 100644 index 149237e24850..000000000000 --- a/arch/arm/plat-mxc/Makefile +++ /dev/null @@ -1,24 +0,0 @@ -# -# Makefile for the linux kernel. -# - -# Common support -obj-y := time.o devices.o cpu.o system.o irq-common.o - -obj-$(CONFIG_MXC_TZIC) += tzic.o -obj-$(CONFIG_MXC_AVIC) += avic.o - -obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o -obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o -obj-$(CONFIG_IRAM_ALLOC) += iram_alloc.o -obj-$(CONFIG_MXC_ULPI) += ulpi.o -obj-$(CONFIG_MXC_USE_EPIT) += epit.o -obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o -obj-$(CONFIG_CPU_FREQ_IMX) += cpufreq.o -obj-$(CONFIG_CPU_IDLE) += cpuidle.o -ifdef CONFIG_SND_IMX_SOC -obj-y += ssi-fiq.o -obj-y += ssi-fiq-ksym.o -endif - -obj-y += devices/ diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h deleted file mode 100644 index d73f5e8ea9cb..000000000000 --- a/arch/arm/plat-mxc/include/mach/irqs.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. - */ - -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_MXC_IRQS_H__ -#define __ASM_ARCH_MXC_IRQS_H__ - -extern int imx_irq_set_priority(unsigned char irq, unsigned char prio); - -/* all normal IRQs can be FIQs */ -#define FIQ_START 0 -/* switch between IRQ and FIQ */ -extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type); - -#endif /* __ASM_ARCH_MXC_IRQS_H__ */ diff --git a/arch/arm/plat-mxc/include/mach/timex.h b/arch/arm/plat-mxc/include/mach/timex.h deleted file mode 100644 index 10343d1f87e1..000000000000 --- a/arch/arm/plat-mxc/include/mach/timex.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Copyright (C) 1999 ARM Limited - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ASM_ARCH_MXC_TIMEX_H__ -#define __ASM_ARCH_MXC_TIMEX_H__ - -/* Bogus value */ -#define CLOCK_TICK_RATE 12345678 - -#endif /* __ASM_ARCH_MXC_TIMEX_H__ */ diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h deleted file mode 100644 index 477971b00930..000000000000 --- a/arch/arm/plat-mxc/include/mach/uncompress.h +++ /dev/null @@ -1,132 +0,0 @@ -/* - * arch/arm/plat-mxc/include/mach/uncompress.h - * - * Copyright (C) 1999 ARM Limited - * Copyright (C) Shane Nay ([email protected]) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#ifndef __ASM_ARCH_MXC_UNCOMPRESS_H__ -#define __ASM_ARCH_MXC_UNCOMPRESS_H__ - -#define __MXC_BOOT_UNCOMPRESS - -#include <asm/mach-types.h> - -unsigned long uart_base; - -#define UART(x) (*(volatile unsigned long *)(uart_base + (x))) - -#define USR2 0x98 -#define USR2_TXFE (1<<14) -#define TXR 0x40 -#define UCR1 0x80 -#define UCR1_UARTEN 1 - -/* - * The following code assumes the serial port has already been - * initialized by the bootloader. We search for the first enabled - * port in the most probable order. If you didn't setup a port in - * your bootloader then nothing will appear (which might be desired). - * - * This does not append a newline - */ - -static void putc(int ch) -{ - if (!uart_base) - return; - if (!(UART(UCR1) & UCR1_UARTEN)) - return; - - while (!(UART(USR2) & USR2_TXFE)) - barrier(); - - UART(TXR) = ch; -} - -static inline void flush(void) -{ -} - -#define MX1_UART1_BASE_ADDR 0x00206000 -#define MX25_UART1_BASE_ADDR 0x43f90000 -#define MX2X_UART1_BASE_ADDR 0x1000a000 -#define MX3X_UART1_BASE_ADDR 0x43F90000 -#define MX3X_UART2_BASE_ADDR 0x43F94000 -#define MX3X_UART5_BASE_ADDR 0x43FB4000 -#define MX51_UART1_BASE_ADDR 0x73fbc000 -#define MX50_UART1_BASE_ADDR 0x53fbc000 -#define MX53_UART1_BASE_ADDR 0x53fbc000 - -static __inline__ void __arch_decomp_setup(unsigned long arch_id) -{ - switch (arch_id) { - case MACH_TYPE_MX1ADS: - case MACH_TYPE_SCB9328: - uart_base = MX1_UART1_BASE_ADDR; - break; - case MACH_TYPE_MX25_3DS: - uart_base = MX25_UART1_BASE_ADDR; - break; - case MACH_TYPE_IMX27LITE: - case MACH_TYPE_MX27_3DS: - case MACH_TYPE_MX27ADS: - case MACH_TYPE_PCM038: - case MACH_TYPE_MX21ADS: - case MACH_TYPE_PCA100: - case MACH_TYPE_MXT_TD60: - case MACH_TYPE_IMX27IPCAM: - uart_base = MX2X_UART1_BASE_ADDR; - break; - case MACH_TYPE_MX31LITE: - case MACH_TYPE_ARMADILLO5X0: - case MACH_TYPE_MX31MOBOARD: - case MACH_TYPE_QONG: - case MACH_TYPE_MX31_3DS: - case MACH_TYPE_PCM037: - case MACH_TYPE_MX31ADS: - case MACH_TYPE_MX35_3DS: - case MACH_TYPE_PCM043: - case MACH_TYPE_LILLY1131: - case MACH_TYPE_VPR200: - case MACH_TYPE_EUKREA_CPUIMX35SD: - uart_base = MX3X_UART1_BASE_ADDR; - break; - case MACH_TYPE_MAGX_ZN5: - uart_base = MX3X_UART2_BASE_ADDR; - break; - case MACH_TYPE_BUG: - uart_base = MX3X_UART5_BASE_ADDR; - break; - case MACH_TYPE_MX51_BABBAGE: - case MACH_TYPE_EUKREA_CPUIMX51SD: - case MACH_TYPE_MX51_3DS: - uart_base = MX51_UART1_BASE_ADDR; - break; - case MACH_TYPE_MX50_RDP: - uart_base = MX50_UART1_BASE_ADDR; - break; - case MACH_TYPE_MX53_EVK: - case MACH_TYPE_MX53_LOCO: - case MACH_TYPE_MX53_SMD: - case MACH_TYPE_MX53_ARD: - uart_base = MX53_UART1_BASE_ADDR; - break; - default: - break; - } -} - -#define arch_decomp_setup() __arch_decomp_setup(arch_id) -#define arch_decomp_wdog() - -#endif /* __ASM_ARCH_MXC_UNCOMPRESS_H__ */ diff --git a/arch/arm/plat-omap/include/plat/prcm.h b/arch/arm/plat-omap/include/plat/prcm.h deleted file mode 100644 index 267f43bb2a4e..000000000000 --- a/arch/arm/plat-omap/include/plat/prcm.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * arch/arm/plat-omap/include/mach/prcm.h - * - * Access definations for use in OMAP24XX clock and power management - * - * Copyright (C) 2005 Texas Instruments, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - * XXX This file is deprecated. The PRCM is an OMAP2+-only subsystem, - * so this file doesn't belong in plat-omap/include/plat. Please - * do not add anything new to this file. - */ - -#ifndef __ASM_ARM_ARCH_OMAP_PRCM_H -#define __ASM_ARM_ARCH_OMAP_PRCM_H - -u32 omap_prcm_get_reset_sources(void); -int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest, - const char *name); - -#endif - - - diff --git a/arch/arm/plat-pxa/Makefile b/arch/arm/plat-pxa/Makefile index af8e484001e5..1fc941944912 100644 --- a/arch/arm/plat-pxa/Makefile +++ b/arch/arm/plat-pxa/Makefile @@ -5,7 +5,6 @@ obj-y := dma.o obj-$(CONFIG_PXA3xx) += mfp.o -obj-$(CONFIG_PXA95x) += mfp.o obj-$(CONFIG_ARCH_MMP) += mfp.o obj-$(CONFIG_PXA_SSP) += ssp.o diff --git a/arch/arm/plat-pxa/include/plat/mfp.h b/arch/arm/plat-pxa/include/plat/mfp.h index 5c79c29f2833..10bc4f3757d1 100644 --- a/arch/arm/plat-pxa/include/plat/mfp.h +++ b/arch/arm/plat-pxa/include/plat/mfp.h @@ -423,7 +423,7 @@ typedef unsigned long mfp_cfg_t; ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DS_MASK | MFP_LPM_STATE_MASK)) |\ (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_##drv | MFP_LPM_##lpm)) -#if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x) || defined(CONFIG_ARCH_MMP) +#if defined(CONFIG_PXA3xx) || defined(CONFIG_ARCH_MMP) /* * each MFP pin will have a MFPR register, since the offset of the * register varies between processors, the processor specific code @@ -470,6 +470,6 @@ void mfp_write(int mfp, unsigned long mfpr_val); void mfp_config(unsigned long *mfp_cfgs, int num); void mfp_config_run(void); void mfp_config_lpm(void); -#endif /* CONFIG_PXA3xx || CONFIG_PXA95x || CONFIG_ARCH_MMP */ +#endif /* CONFIG_PXA3xx || CONFIG_ARCH_MMP */ #endif /* __ASM_PLAT_MFP_H */ diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index c834b32af275..3b44e0dd0a93 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c @@ -701,11 +701,14 @@ static int __init vfp_init(void) elf_hwcap |= HWCAP_VFPv3; /* - * Check for VFPv3 D16. CPUs in this configuration - * only have 16 x 64bit registers. + * Check for VFPv3 D16 and VFPv4 D16. CPUs in + * this configuration only have 16 x 64bit + * registers. */ if (((fmrx(MVFR0) & MVFR0_A_SIMD_MASK)) == 1) - elf_hwcap |= HWCAP_VFPv3D16; + elf_hwcap |= HWCAP_VFPv3D16; /* also v4-D16 */ + else + elf_hwcap |= HWCAP_VFPD32; } #endif /* diff --git a/arch/arm/xen/enlighten.c b/arch/arm/xen/enlighten.c index 59bcb96ac369..f57609275449 100644 --- a/arch/arm/xen/enlighten.c +++ b/arch/arm/xen/enlighten.c @@ -166,3 +166,14 @@ void free_xenballooned_pages(int nr_pages, struct page **pages) *pages = NULL; } EXPORT_SYMBOL_GPL(free_xenballooned_pages); + +/* In the hypervisor.S file. */ +EXPORT_SYMBOL_GPL(HYPERVISOR_event_channel_op); +EXPORT_SYMBOL_GPL(HYPERVISOR_grant_table_op); +EXPORT_SYMBOL_GPL(HYPERVISOR_xen_version); +EXPORT_SYMBOL_GPL(HYPERVISOR_console_io); +EXPORT_SYMBOL_GPL(HYPERVISOR_sched_op); +EXPORT_SYMBOL_GPL(HYPERVISOR_hvm_op); +EXPORT_SYMBOL_GPL(HYPERVISOR_memory_op); +EXPORT_SYMBOL_GPL(HYPERVISOR_physdev_op); +EXPORT_SYMBOL_GPL(privcmd_call); diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index ef54a59a9e89..15ac18a56c93 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -1,6 +1,7 @@ config ARM64 def_bool y select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE + select ARCH_WANT_COMPAT_IPC_PARSE_VERSION select GENERIC_CLOCKEVENTS select GENERIC_HARDIRQS_NO_DEPRECATED select GENERIC_IOMAP diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h index cf284649dfcb..07fea290d7c1 100644 --- a/arch/arm64/include/asm/elf.h +++ b/arch/arm64/include/asm/elf.h @@ -25,12 +25,10 @@ #include <asm/user.h> typedef unsigned long elf_greg_t; -typedef unsigned long elf_freg_t[3]; #define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t)) typedef elf_greg_t elf_gregset_t[ELF_NGREG]; - -typedef struct user_fp elf_fpregset_t; +typedef struct user_fpsimd_state elf_fpregset_t; #define EM_AARCH64 183 @@ -87,7 +85,6 @@ typedef struct user_fp elf_fpregset_t; #define R_AARCH64_MOVW_PREL_G2_NC 292 #define R_AARCH64_MOVW_PREL_G3 293 - /* * These are used to set parameters in the core dumps. */ diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h index b42fab9f62a9..c43b4ac13008 100644 --- a/arch/arm64/include/asm/fpsimd.h +++ b/arch/arm64/include/asm/fpsimd.h @@ -25,9 +25,8 @@ * - FPSR and FPCR * - 32 128-bit data registers * - * Note that user_fp forms a prefix of this structure, which is relied - * upon in the ptrace FP/SIMD accessors. struct user_fpsimd_state must - * form a prefix of struct fpsimd_state. + * Note that user_fpsimd forms a prefix of this structure, which is + * relied upon in the ptrace FP/SIMD accessors. */ struct fpsimd_state { union { diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h index 74a2a7d304a9..54f6116697f7 100644 --- a/arch/arm64/include/asm/io.h +++ b/arch/arm64/include/asm/io.h @@ -114,7 +114,7 @@ static inline u64 __raw_readq(const volatile void __iomem *addr) * I/O port access primitives. */ #define IO_SPACE_LIMIT 0xffff -#define PCI_IOBASE ((void __iomem *)0xffffffbbfffe0000UL) +#define PCI_IOBASE ((void __iomem *)(MODULES_VADDR - SZ_2M)) static inline u8 inb(unsigned long addr) { @@ -225,9 +225,9 @@ extern void __iounmap(volatile void __iomem *addr); #define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_XN | PTE_ATTRINDX(MT_DEVICE_nGnRE)) #define PROT_NORMAL_NC (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL_NC)) -#define ioremap(addr, size) __ioremap((addr), (size), PROT_DEVICE_nGnRE) -#define ioremap_nocache(addr, size) __ioremap((addr), (size), PROT_DEVICE_nGnRE) -#define ioremap_wc(addr, size) __ioremap((addr), (size), PROT_NORMAL_NC) +#define ioremap(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE)) +#define ioremap_nocache(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE)) +#define ioremap_wc(addr, size) __ioremap((addr), (size), __pgprot(PROT_NORMAL_NC)) #define iounmap __iounmap #define ARCH_HAS_IOREMAP_WC diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h index 5d810044feda..77f696c14339 100644 --- a/arch/arm64/include/asm/processor.h +++ b/arch/arm64/include/asm/processor.h @@ -43,6 +43,8 @@ #else #define STACK_TOP STACK_TOP_MAX #endif /* CONFIG_COMPAT */ + +#define ARCH_LOW_ADDRESS_LIMIT PHYS_MASK #endif /* __KERNEL__ */ struct debug_info { diff --git a/arch/arm64/include/asm/unistd.h b/arch/arm64/include/asm/unistd.h index 63f853f8b718..68aff2816e86 100644 --- a/arch/arm64/include/asm/unistd.h +++ b/arch/arm64/include/asm/unistd.h @@ -14,7 +14,6 @@ * along with this program. If not, see <http://www.gnu.org/licenses/>. */ #ifdef CONFIG_COMPAT -#define __ARCH_WANT_COMPAT_IPC_PARSE_VERSION #define __ARCH_WANT_COMPAT_STAT64 #define __ARCH_WANT_SYS_GETHOSTNAME #define __ARCH_WANT_SYS_PAUSE diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c index ecbf2d81ec5c..c76c7241125b 100644 --- a/arch/arm64/kernel/perf_event.c +++ b/arch/arm64/kernel/perf_event.c @@ -613,17 +613,11 @@ enum armv8_pmuv3_perf_types { ARMV8_PMUV3_PERFCTR_BUS_ACCESS = 0x19, ARMV8_PMUV3_PERFCTR_MEM_ERROR = 0x1A, ARMV8_PMUV3_PERFCTR_BUS_CYCLES = 0x1D, - - /* - * This isn't an architected event. - * We detect this event number and use the cycle counter instead. - */ - ARMV8_PMUV3_PERFCTR_CPU_CYCLES = 0xFF, }; /* PMUv3 HW events mapping. */ static const unsigned armv8_pmuv3_perf_map[PERF_COUNT_HW_MAX] = { - [PERF_COUNT_HW_CPU_CYCLES] = ARMV8_PMUV3_PERFCTR_CPU_CYCLES, + [PERF_COUNT_HW_CPU_CYCLES] = ARMV8_PMUV3_PERFCTR_CLOCK_CYCLES, [PERF_COUNT_HW_INSTRUCTIONS] = ARMV8_PMUV3_PERFCTR_INSTR_EXECUTED, [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV8_PMUV3_PERFCTR_L1_DCACHE_ACCESS, [PERF_COUNT_HW_CACHE_MISSES] = ARMV8_PMUV3_PERFCTR_L1_DCACHE_REFILL, @@ -1106,7 +1100,7 @@ static int armv8pmu_get_event_idx(struct pmu_hw_events *cpuc, unsigned long evtype = event->config_base & ARMV8_EVTYPE_EVENT; /* Always place a cycle counter into the cycle counter. */ - if (evtype == ARMV8_PMUV3_PERFCTR_CPU_CYCLES) { + if (evtype == ARMV8_PMUV3_PERFCTR_CLOCK_CYCLES) { if (test_and_set_bit(ARMV8_IDX_CYCLE_COUNTER, cpuc->used_mask)) return -EAGAIN; diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index f22965ea1cfc..e04cebdbb47f 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -310,24 +310,6 @@ struct task_struct *__switch_to(struct task_struct *prev, } /* - * Fill in the task's elfregs structure for a core dump. - */ -int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs) -{ - elf_core_copy_regs(elfregs, task_pt_regs(t)); - return 1; -} - -/* - * fill in the fpe structure for a core dump... - */ -int dump_fpu (struct pt_regs *regs, struct user_fp *fp) -{ - return 0; -} -EXPORT_SYMBOL(dump_fpu); - -/* * Shuffle the argument into the correct register before calling the * thread function. x1 is the thread argument, x2 is the pointer to * the thread function, and x3 points to the exit function. diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index 226b6bf6e9c2..538300f2273d 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -211,8 +211,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void) * before we continue. */ set_cpu_online(cpu, true); - while (!cpu_active(cpu)) - cpu_relax(); + complete(&cpu_running); /* * OK, it's off to the idle thread for us diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c index efbf7df05d3f..4cd28931dba9 100644 --- a/arch/arm64/mm/init.c +++ b/arch/arm64/mm/init.c @@ -80,7 +80,7 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max) #ifdef CONFIG_ZONE_DMA32 /* 4GB maximum for 32-bit only capable devices */ max_dma32 = min(max, MAX_DMA32_PFN); - zone_size[ZONE_DMA32] = max_dma32 - min; + zone_size[ZONE_DMA32] = max(min, max_dma32) - min; #endif zone_size[ZONE_NORMAL] = max - max_dma32; diff --git a/arch/h8300/include/asm/cache.h b/arch/h8300/include/asm/cache.h index c6350283649d..05887a1d80e5 100644 --- a/arch/h8300/include/asm/cache.h +++ b/arch/h8300/include/asm/cache.h @@ -2,7 +2,8 @@ #define __ARCH_H8300_CACHE_H /* bytes per L1 cache line */ -#define L1_CACHE_BYTES 4 +#define L1_CACHE_SHIFT 2 +#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) /* m68k-elf-gcc 2.95.2 doesn't like these */ diff --git a/arch/s390/include/asm/cio.h b/arch/s390/include/asm/cio.h index 55bde6035216..ad2b924167d7 100644 --- a/arch/s390/include/asm/cio.h +++ b/arch/s390/include/asm/cio.h @@ -9,6 +9,8 @@ #define LPM_ANYPATH 0xff #define __MAX_CSSID 0 +#define __MAX_SUBCHANNEL 65535 +#define __MAX_SSID 3 #include <asm/scsw.h> diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h index dd647c919a66..2d3b7cb26005 100644 --- a/arch/s390/include/asm/pgtable.h +++ b/arch/s390/include/asm/pgtable.h @@ -506,12 +506,15 @@ static inline int pud_bad(pud_t pud) static inline int pmd_present(pmd_t pmd) { - return (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN) != 0UL; + unsigned long mask = _SEGMENT_ENTRY_INV | _SEGMENT_ENTRY_RO; + return (pmd_val(pmd) & mask) == _HPAGE_TYPE_NONE || + !(pmd_val(pmd) & _SEGMENT_ENTRY_INV); } static inline int pmd_none(pmd_t pmd) { - return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) != 0UL; + return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) && + !(pmd_val(pmd) & _SEGMENT_ENTRY_RO); } static inline int pmd_large(pmd_t pmd) @@ -1223,6 +1226,11 @@ static inline void __pmd_idte(unsigned long address, pmd_t *pmdp) } #ifdef CONFIG_TRANSPARENT_HUGEPAGE + +#define SEGMENT_NONE __pgprot(_HPAGE_TYPE_NONE) +#define SEGMENT_RO __pgprot(_HPAGE_TYPE_RO) +#define SEGMENT_RW __pgprot(_HPAGE_TYPE_RW) + #define __HAVE_ARCH_PGTABLE_DEPOSIT extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pgtable_t pgtable); @@ -1242,16 +1250,15 @@ static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr, static inline unsigned long massage_pgprot_pmd(pgprot_t pgprot) { - unsigned long pgprot_pmd = 0; - - if (pgprot_val(pgprot) & _PAGE_INVALID) { - if (pgprot_val(pgprot) & _PAGE_SWT) - pgprot_pmd |= _HPAGE_TYPE_NONE; - pgprot_pmd |= _SEGMENT_ENTRY_INV; - } - if (pgprot_val(pgprot) & _PAGE_RO) - pgprot_pmd |= _SEGMENT_ENTRY_RO; - return pgprot_pmd; + /* + * pgprot is PAGE_NONE, PAGE_RO, or PAGE_RW (see __Pxxx / __Sxxx) + * Convert to segment table entry format. + */ + if (pgprot_val(pgprot) == pgprot_val(PAGE_NONE)) + return pgprot_val(SEGMENT_NONE); + if (pgprot_val(pgprot) == pgprot_val(PAGE_RO)) + return pgprot_val(SEGMENT_RO); + return pgprot_val(SEGMENT_RW); } static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) @@ -1269,7 +1276,9 @@ static inline pmd_t pmd_mkhuge(pmd_t pmd) static inline pmd_t pmd_mkwrite(pmd_t pmd) { - pmd_val(pmd) &= ~_SEGMENT_ENTRY_RO; + /* Do not clobber _HPAGE_TYPE_NONE pages! */ + if (!(pmd_val(pmd) & _SEGMENT_ENTRY_INV)) + pmd_val(pmd) &= ~_SEGMENT_ENTRY_RO; return pmd; } diff --git a/arch/s390/kernel/sclp.S b/arch/s390/kernel/sclp.S index bf053898630d..b6506ee32a36 100644 --- a/arch/s390/kernel/sclp.S +++ b/arch/s390/kernel/sclp.S @@ -44,6 +44,12 @@ _sclp_wait_int: #endif mvc .LoldpswS1-.LbaseS1(16,%r13),0(%r8) mvc 0(16,%r8),0(%r9) +#ifdef CONFIG_64BIT + epsw %r6,%r7 # set current addressing mode + nill %r6,0x1 # in new psw (31 or 64 bit mode) + nilh %r7,0x8000 + stm %r6,%r7,0(%r8) +#endif lhi %r6,0x0200 # cr mask for ext int (cr0.54) ltr %r2,%r2 jz .LsetctS1 @@ -87,7 +93,7 @@ _sclp_wait_int: .long 0x00080000, 0x80000000+.LwaitS1 # PSW to handle ext int #ifdef CONFIG_64BIT .LextpswS1_64: - .quad 0x0000000180000000, .LwaitS1 # PSW to handle ext int, 64 bit + .quad 0, .LwaitS1 # PSW to handle ext int, 64 bit #endif .LwaitpswS1: .long 0x010a0000, 0x00000000+.LloopS1 # PSW to wait for ext int diff --git a/arch/s390/lib/uaccess_pt.c b/arch/s390/lib/uaccess_pt.c index 2d37bb861faf..9017a63dda3d 100644 --- a/arch/s390/lib/uaccess_pt.c +++ b/arch/s390/lib/uaccess_pt.c @@ -39,7 +39,7 @@ static __always_inline unsigned long follow_table(struct mm_struct *mm, pmd = pmd_offset(pud, addr); if (pmd_none(*pmd)) return -0x10UL; - if (pmd_huge(*pmd)) { + if (pmd_large(*pmd)) { if (write && (pmd_val(*pmd) & _SEGMENT_ENTRY_RO)) return -0x04UL; return (pmd_val(*pmd) & HPAGE_MASK) + (addr & ~HPAGE_MASK); diff --git a/arch/s390/mm/gup.c b/arch/s390/mm/gup.c index 60acb93a4680..8b8285310b5a 100644 --- a/arch/s390/mm/gup.c +++ b/arch/s390/mm/gup.c @@ -126,7 +126,7 @@ static inline int gup_pmd_range(pud_t *pudp, pud_t pud, unsigned long addr, */ if (pmd_none(pmd) || pmd_trans_splitting(pmd)) return 0; - if (unlikely(pmd_huge(pmd))) { + if (unlikely(pmd_large(pmd))) { if (!gup_huge_pmd(pmdp, pmd, addr, next, write, pages, nr)) return 0; diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig index b6b442b0d793..9f2edb5c5551 100644 --- a/arch/sparc/Kconfig +++ b/arch/sparc/Kconfig @@ -20,6 +20,7 @@ config SPARC select HAVE_ARCH_TRACEHOOK select SYSCTL_EXCEPTION_TRACE select ARCH_WANT_OPTIONAL_GPIOLIB + select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE select RTC_CLASS select RTC_DRV_M48T59 select HAVE_IRQ_WORK diff --git a/arch/sparc/crypto/Makefile b/arch/sparc/crypto/Makefile index 6ae1ad5e502b..5d469d81761f 100644 --- a/arch/sparc/crypto/Makefile +++ b/arch/sparc/crypto/Makefile @@ -13,13 +13,13 @@ obj-$(CONFIG_CRYPTO_DES_SPARC64) += camellia-sparc64.o obj-$(CONFIG_CRYPTO_CRC32C_SPARC64) += crc32c-sparc64.o -sha1-sparc64-y := sha1_asm.o sha1_glue.o crop_devid.o -sha256-sparc64-y := sha256_asm.o sha256_glue.o crop_devid.o -sha512-sparc64-y := sha512_asm.o sha512_glue.o crop_devid.o -md5-sparc64-y := md5_asm.o md5_glue.o crop_devid.o +sha1-sparc64-y := sha1_asm.o sha1_glue.o +sha256-sparc64-y := sha256_asm.o sha256_glue.o +sha512-sparc64-y := sha512_asm.o sha512_glue.o +md5-sparc64-y := md5_asm.o md5_glue.o -aes-sparc64-y := aes_asm.o aes_glue.o crop_devid.o -des-sparc64-y := des_asm.o des_glue.o crop_devid.o -camellia-sparc64-y := camellia_asm.o camellia_glue.o crop_devid.o +aes-sparc64-y := aes_asm.o aes_glue.o +des-sparc64-y := des_asm.o des_glue.o +camellia-sparc64-y := camellia_asm.o camellia_glue.o -crc32c-sparc64-y := crc32c_asm.o crc32c_glue.o crop_devid.o +crc32c-sparc64-y := crc32c_asm.o crc32c_glue.o diff --git a/arch/sparc/crypto/aes_glue.c b/arch/sparc/crypto/aes_glue.c index 8f1c9980f637..3965d1d36dfa 100644 --- a/arch/sparc/crypto/aes_glue.c +++ b/arch/sparc/crypto/aes_glue.c @@ -475,3 +475,5 @@ MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("AES Secure Hash Algorithm, sparc64 aes opcode accelerated"); MODULE_ALIAS("aes"); + +#include "crop_devid.c" diff --git a/arch/sparc/crypto/camellia_glue.c b/arch/sparc/crypto/camellia_glue.c index 42905c084299..62c89af3fd3f 100644 --- a/arch/sparc/crypto/camellia_glue.c +++ b/arch/sparc/crypto/camellia_glue.c @@ -320,3 +320,5 @@ MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("Camellia Cipher Algorithm, sparc64 camellia opcode accelerated"); MODULE_ALIAS("aes"); + +#include "crop_devid.c" diff --git a/arch/sparc/crypto/crc32c_glue.c b/arch/sparc/crypto/crc32c_glue.c index 0bd89cea8d8e..5162fad912ce 100644 --- a/arch/sparc/crypto/crc32c_glue.c +++ b/arch/sparc/crypto/crc32c_glue.c @@ -177,3 +177,5 @@ MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("CRC32c (Castagnoli), sparc64 crc32c opcode accelerated"); MODULE_ALIAS("crc32c"); + +#include "crop_devid.c" diff --git a/arch/sparc/crypto/des_glue.c b/arch/sparc/crypto/des_glue.c index c4940c2d3073..41524cebcc49 100644 --- a/arch/sparc/crypto/des_glue.c +++ b/arch/sparc/crypto/des_glue.c @@ -527,3 +527,5 @@ MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("DES & Triple DES EDE Cipher Algorithms, sparc64 des opcode accelerated"); MODULE_ALIAS("des"); + +#include "crop_devid.c" diff --git a/arch/sparc/crypto/md5_glue.c b/arch/sparc/crypto/md5_glue.c index 603d723038ce..09a9ea1dfb69 100644 --- a/arch/sparc/crypto/md5_glue.c +++ b/arch/sparc/crypto/md5_glue.c @@ -186,3 +186,5 @@ MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("MD5 Secure Hash Algorithm, sparc64 md5 opcode accelerated"); MODULE_ALIAS("md5"); + +#include "crop_devid.c" diff --git a/arch/sparc/crypto/sha1_glue.c b/arch/sparc/crypto/sha1_glue.c index 2bbb20bee9f1..6cd5f29e1e0d 100644 --- a/arch/sparc/crypto/sha1_glue.c +++ b/arch/sparc/crypto/sha1_glue.c @@ -181,3 +181,5 @@ MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, sparc64 sha1 opcode accelerated"); MODULE_ALIAS("sha1"); + +#include "crop_devid.c" diff --git a/arch/sparc/crypto/sha256_glue.c b/arch/sparc/crypto/sha256_glue.c index 591e656bd891..04f555ab2680 100644 --- a/arch/sparc/crypto/sha256_glue.c +++ b/arch/sparc/crypto/sha256_glue.c @@ -239,3 +239,5 @@ MODULE_DESCRIPTION("SHA-224 and SHA-256 Secure Hash Algorithm, sparc64 sha256 op MODULE_ALIAS("sha224"); MODULE_ALIAS("sha256"); + +#include "crop_devid.c" diff --git a/arch/sparc/crypto/sha512_glue.c b/arch/sparc/crypto/sha512_glue.c index 486f0a2b7001..f04d1994d19a 100644 --- a/arch/sparc/crypto/sha512_glue.c +++ b/arch/sparc/crypto/sha512_glue.c @@ -224,3 +224,5 @@ MODULE_DESCRIPTION("SHA-384 and SHA-512 Secure Hash Algorithm, sparc64 sha512 op MODULE_ALIAS("sha384"); MODULE_ALIAS("sha512"); + +#include "crop_devid.c" diff --git a/arch/sparc/include/asm/atomic_64.h b/arch/sparc/include/asm/atomic_64.h index ce35a1cf1a20..be56a244c9cf 100644 --- a/arch/sparc/include/asm/atomic_64.h +++ b/arch/sparc/include/asm/atomic_64.h @@ -1,7 +1,7 @@ /* atomic.h: Thankfully the V9 is at least reasonable for this * stuff. * - * Copyright (C) 1996, 1997, 2000 David S. Miller ([email protected]) + * Copyright (C) 1996, 1997, 2000, 2012 David S. Miller ([email protected]) */ #ifndef __ARCH_SPARC64_ATOMIC__ @@ -106,6 +106,8 @@ static inline long atomic64_add_unless(atomic64_t *v, long a, long u) #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) +extern long atomic64_dec_if_positive(atomic64_t *v); + /* Atomic operations are already serializing */ #define smp_mb__before_atomic_dec() barrier() #define smp_mb__after_atomic_dec() barrier() diff --git a/arch/sparc/include/asm/backoff.h b/arch/sparc/include/asm/backoff.h index db3af0d30fb1..4e02086b839c 100644 --- a/arch/sparc/include/asm/backoff.h +++ b/arch/sparc/include/asm/backoff.h @@ -1,6 +1,46 @@ #ifndef _SPARC64_BACKOFF_H #define _SPARC64_BACKOFF_H +/* The macros in this file implement an exponential backoff facility + * for atomic operations. + * + * When multiple threads compete on an atomic operation, it is + * possible for one thread to be continually denied a successful + * completion of the compare-and-swap instruction. Heavily + * threaded cpu implementations like Niagara can compound this + * problem even further. + * + * When an atomic operation fails and needs to be retried, we spin a + * certain number of times. At each subsequent failure of the same + * operation we double the spin count, realizing an exponential + * backoff. + * + * When we spin, we try to use an operation that will cause the + * current cpu strand to block, and therefore make the core fully + * available to any other other runnable strands. There are two + * options, based upon cpu capabilities. + * + * On all cpus prior to SPARC-T4 we do three dummy reads of the + * condition code register. Each read blocks the strand for something + * between 40 and 50 cpu cycles. + * + * For SPARC-T4 and later we have a special "pause" instruction + * available. This is implemented using writes to register %asr27. + * The cpu will block the number of cycles written into the register, + * unless a disrupting trap happens first. SPARC-T4 specifically + * implements pause with a granularity of 8 cycles. Each strand has + * an internal pause counter which decrements every 8 cycles. So the + * chip shifts the %asr27 value down by 3 bits, and writes the result + * into the pause counter. If a value smaller than 8 is written, the + * chip blocks for 1 cycle. + * + * To achieve the same amount of backoff as the three %ccr reads give + * on earlier chips, we shift the backoff value up by 7 bits. (Three + * %ccr reads block for about 128 cycles, 1 << 7 == 128) We write the + * whole amount we want to block into the pause register, rather than + * loop writing 128 each time. + */ + #define BACKOFF_LIMIT (4 * 1024) #ifdef CONFIG_SMP @@ -11,16 +51,25 @@ #define BACKOFF_LABEL(spin_label, continue_label) \ spin_label -#define BACKOFF_SPIN(reg, tmp, label) \ - mov reg, tmp; \ -88: brnz,pt tmp, 88b; \ - sub tmp, 1, tmp; \ - set BACKOFF_LIMIT, tmp; \ - cmp reg, tmp; \ - bg,pn %xcc, label; \ - nop; \ - ba,pt %xcc, label; \ - sllx reg, 1, reg; +#define BACKOFF_SPIN(reg, tmp, label) \ + mov reg, tmp; \ +88: rd %ccr, %g0; \ + rd %ccr, %g0; \ + rd %ccr, %g0; \ + .section .pause_3insn_patch,"ax";\ + .word 88b; \ + sllx tmp, 7, tmp; \ + wr tmp, 0, %asr27; \ + clr tmp; \ + .previous; \ + brnz,pt tmp, 88b; \ + sub tmp, 1, tmp; \ + set BACKOFF_LIMIT, tmp; \ + cmp reg, tmp; \ + bg,pn %xcc, label; \ + nop; \ + ba,pt %xcc, label; \ + sllx reg, 1, reg; #else diff --git a/arch/sparc/include/asm/compat.h b/arch/sparc/include/asm/compat.h index cef99fbc0a21..830502fe62b4 100644 --- a/arch/sparc/include/asm/compat.h +++ b/arch/sparc/include/asm/compat.h @@ -232,9 +232,10 @@ static inline void __user *arch_compat_alloc_user_space(long len) struct pt_regs *regs = current_thread_info()->kregs; unsigned long usp = regs->u_regs[UREG_I6]; - if (!(test_thread_flag(TIF_32BIT))) + if (test_thread_64bit_stack(usp)) usp += STACK_BIAS; - else + + if (test_thread_flag(TIF_32BIT)) usp &= 0xffffffffUL; usp -= len; diff --git a/arch/sparc/include/asm/processor_64.h b/arch/sparc/include/asm/processor_64.h index 4e5a483122a0..721e25f0e2ea 100644 --- a/arch/sparc/include/asm/processor_64.h +++ b/arch/sparc/include/asm/processor_64.h @@ -196,7 +196,22 @@ extern unsigned long get_wchan(struct task_struct *task); #define KSTK_EIP(tsk) (task_pt_regs(tsk)->tpc) #define KSTK_ESP(tsk) (task_pt_regs(tsk)->u_regs[UREG_FP]) -#define cpu_relax() barrier() +/* Please see the commentary in asm/backoff.h for a description of + * what these instructions are doing and how they have been choosen. + * To make a long story short, we are trying to yield the current cpu + * strand during busy loops. + */ +#define cpu_relax() asm volatile("\n99:\n\t" \ + "rd %%ccr, %%g0\n\t" \ + "rd %%ccr, %%g0\n\t" \ + "rd %%ccr, %%g0\n\t" \ + ".section .pause_3insn_patch,\"ax\"\n\t"\ + ".word 99b\n\t" \ + "wr %%g0, 128, %%asr27\n\t" \ + "nop\n\t" \ + "nop\n\t" \ + ".previous" \ + ::: "memory") /* Prefetch support. This is tuned for UltraSPARC-III and later. * UltraSPARC-I will treat these as nops, and UltraSPARC-II has diff --git a/arch/sparc/include/asm/prom.h b/arch/sparc/include/asm/prom.h index c28765110706..f93003123bce 100644 --- a/arch/sparc/include/asm/prom.h +++ b/arch/sparc/include/asm/prom.h @@ -63,5 +63,10 @@ extern char *of_console_options; extern void irq_trans_init(struct device_node *dp); extern char *build_path_component(struct device_node *dp); +/* SPARC has a local implementation */ +extern int of_address_to_resource(struct device_node *dev, int index, + struct resource *r); +#define of_address_to_resource of_address_to_resource + #endif /* __KERNEL__ */ #endif /* _SPARC_PROM_H */ diff --git a/arch/sparc/include/asm/thread_info_64.h b/arch/sparc/include/asm/thread_info_64.h index 4e2276631081..a3fe4dcc0aa6 100644 --- a/arch/sparc/include/asm/thread_info_64.h +++ b/arch/sparc/include/asm/thread_info_64.h @@ -259,6 +259,11 @@ static inline bool test_and_clear_restore_sigmask(void) #define tsk_is_polling(t) test_tsk_thread_flag(t, TIF_POLLING_NRFLAG) +#define thread32_stack_is_64bit(__SP) (((__SP) & 0x1) != 0) +#define test_thread_64bit_stack(__SP) \ + ((test_thread_flag(TIF_32BIT) && !thread32_stack_is_64bit(__SP)) ? \ + false : true) + #endif /* !__ASSEMBLY__ */ #endif /* __KERNEL__ */ diff --git a/arch/sparc/include/asm/ttable.h b/arch/sparc/include/asm/ttable.h index 48f2807d3265..71b5a67522ab 100644 --- a/arch/sparc/include/asm/ttable.h +++ b/arch/sparc/include/asm/ttable.h @@ -372,7 +372,9 @@ etrap_spill_fixup_64bit: \ /* Normal 32bit spill */ #define SPILL_2_GENERIC(ASI) \ - srl %sp, 0, %sp; \ + and %sp, 1, %g3; \ + brnz,pn %g3, (. - (128 + 4)); \ + srl %sp, 0, %sp; \ stwa %l0, [%sp + %g0] ASI; \ mov 0x04, %g3; \ stwa %l1, [%sp + %g3] ASI; \ @@ -398,14 +400,16 @@ etrap_spill_fixup_64bit: \ stwa %i6, [%g1 + %g0] ASI; \ stwa %i7, [%g1 + %g3] ASI; \ saved; \ - retry; nop; nop; \ + retry; \ b,a,pt %xcc, spill_fixup_dax; \ b,a,pt %xcc, spill_fixup_mna; \ b,a,pt %xcc, spill_fixup; #define SPILL_2_GENERIC_ETRAP \ etrap_user_spill_32bit: \ - srl %sp, 0, %sp; \ + and %sp, 1, %g3; \ + brnz,pn %g3, etrap_user_spill_64bit; \ + srl %sp, 0, %sp; \ stwa %l0, [%sp + 0x00] %asi; \ stwa %l1, [%sp + 0x04] %asi; \ stwa %l2, [%sp + 0x08] %asi; \ @@ -427,7 +431,7 @@ etrap_user_spill_32bit: \ ba,pt %xcc, etrap_save; \ wrpr %g1, %cwp; \ nop; nop; nop; nop; \ - nop; nop; nop; nop; \ + nop; nop; \ ba,a,pt %xcc, etrap_spill_fixup_32bit; \ ba,a,pt %xcc, etrap_spill_fixup_32bit; \ ba,a,pt %xcc, etrap_spill_fixup_32bit; @@ -592,7 +596,9 @@ user_rtt_fill_64bit: \ /* Normal 32bit fill */ #define FILL_2_GENERIC(ASI) \ - srl %sp, 0, %sp; \ + and %sp, 1, %g3; \ + brnz,pn %g3, (. - (128 + 4)); \ + srl %sp, 0, %sp; \ lduwa [%sp + %g0] ASI, %l0; \ mov 0x04, %g2; \ mov 0x08, %g3; \ @@ -616,14 +622,16 @@ user_rtt_fill_64bit: \ lduwa [%g1 + %g3] ASI, %i6; \ lduwa [%g1 + %g5] ASI, %i7; \ restored; \ - retry; nop; nop; nop; nop; \ + retry; nop; nop; \ b,a,pt %xcc, fill_fixup_dax; \ b,a,pt %xcc, fill_fixup_mna; \ b,a,pt %xcc, fill_fixup; #define FILL_2_GENERIC_RTRAP \ user_rtt_fill_32bit: \ - srl %sp, 0, %sp; \ + and %sp, 1, %g3; \ + brnz,pn %g3, user_rtt_fill_64bit; \ + srl %sp, 0, %sp; \ lduwa [%sp + 0x00] %asi, %l0; \ lduwa [%sp + 0x04] %asi, %l1; \ lduwa [%sp + 0x08] %asi, %l2; \ @@ -643,7 +651,7 @@ user_rtt_fill_32bit: \ ba,pt %xcc, user_rtt_pre_restore; \ restored; \ nop; nop; nop; nop; nop; \ - nop; nop; nop; nop; nop; \ + nop; nop; nop; \ ba,a,pt %xcc, user_rtt_fill_fixup; \ ba,a,pt %xcc, user_rtt_fill_fixup; \ ba,a,pt %xcc, user_rtt_fill_fixup; diff --git a/arch/sparc/include/uapi/asm/unistd.h b/arch/sparc/include/uapi/asm/unistd.h index 8974ef7ae920..cac719d1bc5c 100644 --- a/arch/sparc/include/uapi/asm/unistd.h +++ b/arch/sparc/include/uapi/asm/unistd.h @@ -405,8 +405,13 @@ #define __NR_setns 337 #define __NR_process_vm_readv 338 #define __NR_process_vm_writev 339 +#define __NR_kern_features 340 +#define __NR_kcmp 341 -#define NR_syscalls 340 +#define NR_syscalls 342 + +/* Bitmask values returned from kern_features system call. */ +#define KERN_FEATURE_MIXED_MODE_STACK 0x00000001 #ifdef __32bit_syscall_numbers__ /* Sparc 32-bit only has the "setresuid32", "getresuid32" variants, diff --git a/arch/sparc/kernel/entry.h b/arch/sparc/kernel/entry.h index 0c218e4c0881..cc3c5cb47cda 100644 --- a/arch/sparc/kernel/entry.h +++ b/arch/sparc/kernel/entry.h @@ -59,6 +59,13 @@ struct popc_6insn_patch_entry { extern struct popc_6insn_patch_entry __popc_6insn_patch, __popc_6insn_patch_end; +struct pause_patch_entry { + unsigned int addr; + unsigned int insns[3]; +}; +extern struct pause_patch_entry __pause_3insn_patch, + __pause_3insn_patch_end; + extern void __init per_cpu_patch(void); extern void sun4v_patch_1insn_range(struct sun4v_1insn_patch_entry *, struct sun4v_1insn_patch_entry *); diff --git a/arch/sparc/kernel/leon_kernel.c b/arch/sparc/kernel/leon_kernel.c index f8b6eee40bde..87f60ee65433 100644 --- a/arch/sparc/kernel/leon_kernel.c +++ b/arch/sparc/kernel/leon_kernel.c @@ -56,11 +56,13 @@ static inline unsigned int leon_eirq_get(int cpu) static void leon_handle_ext_irq(unsigned int irq, struct irq_desc *desc) { unsigned int eirq; + struct irq_bucket *p; int cpu = sparc_leon3_cpuid(); eirq = leon_eirq_get(cpu); - if ((eirq & 0x10) && irq_map[eirq]->irq) /* bit4 tells if IRQ happened */ - generic_handle_irq(irq_map[eirq]->irq); + p = irq_map[eirq]; + if ((eirq & 0x10) && p && p->irq) /* bit4 tells if IRQ happened */ + generic_handle_irq(p->irq); } /* The extended IRQ controller has been found, this function registers it */ diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c index 885a8af74064..b5c38faa4ead 100644 --- a/arch/sparc/kernel/perf_event.c +++ b/arch/sparc/kernel/perf_event.c @@ -1762,15 +1762,25 @@ static void perf_callchain_user_32(struct perf_callchain_entry *entry, ufp = regs->u_regs[UREG_I6] & 0xffffffffUL; do { - struct sparc_stackf32 *usf, sf; unsigned long pc; - usf = (struct sparc_stackf32 *) ufp; - if (__copy_from_user_inatomic(&sf, usf, sizeof(sf))) - break; + if (thread32_stack_is_64bit(ufp)) { + struct sparc_stackf *usf, sf; - pc = sf.callers_pc; - ufp = (unsigned long)sf.fp; + ufp += STACK_BIAS; + usf = (struct sparc_stackf *) ufp; + if (__copy_from_user_inatomic(&sf, usf, sizeof(sf))) + break; + pc = sf.callers_pc & 0xffffffff; + ufp = ((unsigned long) sf.fp) & 0xffffffff; + } else { + struct sparc_stackf32 *usf, sf; + usf = (struct sparc_stackf32 *) ufp; + if (__copy_from_user_inatomic(&sf, usf, sizeof(sf))) + break; + pc = sf.callers_pc; + ufp = (unsigned long)sf.fp; + } perf_callchain_store(entry, pc); } while (entry->nr < PERF_MAX_STACK_DEPTH); } diff --git a/arch/sparc/kernel/process_64.c b/arch/sparc/kernel/process_64.c index d778248ef3f8..c6e0c2910043 100644 --- a/arch/sparc/kernel/process_64.c +++ b/arch/sparc/kernel/process_64.c @@ -452,13 +452,16 @@ void flush_thread(void) /* It's a bit more tricky when 64-bit tasks are involved... */ static unsigned long clone_stackframe(unsigned long csp, unsigned long psp) { + bool stack_64bit = test_thread_64bit_stack(psp); unsigned long fp, distance, rval; - if (!(test_thread_flag(TIF_32BIT))) { + if (stack_64bit) { csp += STACK_BIAS; psp += STACK_BIAS; __get_user(fp, &(((struct reg_window __user *)psp)->ins[6])); fp += STACK_BIAS; + if (test_thread_flag(TIF_32BIT)) + fp &= 0xffffffff; } else __get_user(fp, &(((struct reg_window32 __user *)psp)->ins[6])); @@ -472,7 +475,7 @@ static unsigned long clone_stackframe(unsigned long csp, unsigned long psp) rval = (csp - distance); if (copy_in_user((void __user *) rval, (void __user *) psp, distance)) rval = 0; - else if (test_thread_flag(TIF_32BIT)) { + else if (!stack_64bit) { if (put_user(((u32)csp), &(((struct reg_window32 __user *)rval)->ins[6]))) rval = 0; @@ -507,18 +510,18 @@ void synchronize_user_stack(void) flush_user_windows(); if ((window = get_thread_wsaved()) != 0) { - int winsize = sizeof(struct reg_window); - int bias = 0; - - if (test_thread_flag(TIF_32BIT)) - winsize = sizeof(struct reg_window32); - else - bias = STACK_BIAS; - window -= 1; do { - unsigned long sp = (t->rwbuf_stkptrs[window] + bias); struct reg_window *rwin = &t->reg_window[window]; + int winsize = sizeof(struct reg_window); + unsigned long sp; + + sp = t->rwbuf_stkptrs[window]; + + if (test_thread_64bit_stack(sp)) + sp += STACK_BIAS; + else + winsize = sizeof(struct reg_window32); if (!copy_to_user((char __user *)sp, rwin, winsize)) { shift_window_buffer(window, get_thread_wsaved() - 1, t); @@ -544,13 +547,6 @@ void fault_in_user_windows(void) { struct thread_info *t = current_thread_info(); unsigned long window; - int winsize = sizeof(struct reg_window); - int bias = 0; - - if (test_thread_flag(TIF_32BIT)) - winsize = sizeof(struct reg_window32); - else - bias = STACK_BIAS; flush_user_windows(); window = get_thread_wsaved(); @@ -558,8 +554,16 @@ void fault_in_user_windows(void) if (likely(window != 0)) { window -= 1; do { - unsigned long sp = (t->rwbuf_stkptrs[window] + bias); struct reg_window *rwin = &t->reg_window[window]; + int winsize = sizeof(struct reg_window); + unsigned long sp; + + sp = t->rwbuf_stkptrs[window]; + + if (test_thread_64bit_stack(sp)) + sp += STACK_BIAS; + else + winsize = sizeof(struct reg_window32); if (unlikely(sp & 0x7UL)) stack_unaligned(sp); diff --git a/arch/sparc/kernel/ptrace_64.c b/arch/sparc/kernel/ptrace_64.c index 484dabac7045..7ff45e4ba681 100644 --- a/arch/sparc/kernel/ptrace_64.c +++ b/arch/sparc/kernel/ptrace_64.c @@ -151,7 +151,7 @@ static int regwindow64_get(struct task_struct *target, { unsigned long rw_addr = regs->u_regs[UREG_I6]; - if (test_tsk_thread_flag(current, TIF_32BIT)) { + if (!test_thread_64bit_stack(rw_addr)) { struct reg_window32 win32; int i; @@ -176,7 +176,7 @@ static int regwindow64_set(struct task_struct *target, { unsigned long rw_addr = regs->u_regs[UREG_I6]; - if (test_tsk_thread_flag(current, TIF_32BIT)) { + if (!test_thread_64bit_stack(rw_addr)) { struct reg_window32 win32; int i; diff --git a/arch/sparc/kernel/setup_64.c b/arch/sparc/kernel/setup_64.c index 0800e71d8a88..0eaf0059aaef 100644 --- a/arch/sparc/kernel/setup_64.c +++ b/arch/sparc/kernel/setup_64.c @@ -316,6 +316,25 @@ static void __init popc_patch(void) } } +static void __init pause_patch(void) +{ + struct pause_patch_entry *p; + + p = &__pause_3insn_patch; + while (p < &__pause_3insn_patch_end) { + unsigned long i, addr = p->addr; + + for (i = 0; i < 3; i++) { + *(unsigned int *) (addr + (i * 4)) = p->insns[i]; + wmb(); + __asm__ __volatile__("flush %0" + : : "r" (addr + (i * 4))); + } + + p++; + } +} + #ifdef CONFIG_SMP void __init boot_cpu_id_too_large(int cpu) { @@ -528,6 +547,8 @@ static void __init init_sparc64_elf_hwcap(void) if (sparc64_elf_hwcap & AV_SPARC_POPC) popc_patch(); + if (sparc64_elf_hwcap & AV_SPARC_PAUSE) + pause_patch(); } void __init setup_arch(char **cmdline_p) diff --git a/arch/sparc/kernel/sys_sparc_64.c b/arch/sparc/kernel/sys_sparc_64.c index 11c6c9603e71..878ef3d5fec5 100644 --- a/arch/sparc/kernel/sys_sparc_64.c +++ b/arch/sparc/kernel/sys_sparc_64.c @@ -751,3 +751,8 @@ int kernel_execve(const char *filename, : "cc"); return __res; } + +asmlinkage long sys_kern_features(void) +{ + return KERN_FEATURE_MIXED_MODE_STACK; +} diff --git a/arch/sparc/kernel/systbls_32.S b/arch/sparc/kernel/systbls_32.S index 63402f9e9f51..5147f574f125 100644 --- a/arch/sparc/kernel/systbls_32.S +++ b/arch/sparc/kernel/systbls_32.S @@ -85,3 +85,4 @@ sys_call_table: /*325*/ .long sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open, sys_recvmmsg, sys_fanotify_init /*330*/ .long sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime /*335*/ .long sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev +/*340*/ .long sys_ni_syscall, sys_kcmp diff --git a/arch/sparc/kernel/systbls_64.S b/arch/sparc/kernel/systbls_64.S index 3a58e0d66f51..1c9af9fa38e9 100644 --- a/arch/sparc/kernel/systbls_64.S +++ b/arch/sparc/kernel/systbls_64.S @@ -86,6 +86,7 @@ sys_call_table32: .word compat_sys_pwritev, compat_sys_rt_tgsigqueueinfo, sys_perf_event_open, compat_sys_recvmmsg, sys_fanotify_init /*330*/ .word sys32_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, compat_sys_open_by_handle_at, compat_sys_clock_adjtime .word sys_syncfs, compat_sys_sendmmsg, sys_setns, compat_sys_process_vm_readv, compat_sys_process_vm_writev +/*340*/ .word sys_kern_features, sys_kcmp #endif /* CONFIG_COMPAT */ @@ -163,3 +164,4 @@ sys_call_table: .word sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open, sys_recvmmsg, sys_fanotify_init /*330*/ .word sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime .word sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev +/*340*/ .word sys_kern_features, sys_kcmp diff --git a/arch/sparc/kernel/unaligned_64.c b/arch/sparc/kernel/unaligned_64.c index f81d038f7340..8201c25e7669 100644 --- a/arch/sparc/kernel/unaligned_64.c +++ b/arch/sparc/kernel/unaligned_64.c @@ -113,21 +113,24 @@ static inline long sign_extend_imm13(long imm) static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs) { - unsigned long value; + unsigned long value, fp; if (reg < 16) return (!reg ? 0 : regs->u_regs[reg]); + + fp = regs->u_regs[UREG_FP]; + if (regs->tstate & TSTATE_PRIV) { struct reg_window *win; - win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS); + win = (struct reg_window *)(fp + STACK_BIAS); value = win->locals[reg - 16]; - } else if (test_thread_flag(TIF_32BIT)) { + } else if (!test_thread_64bit_stack(fp)) { struct reg_window32 __user *win32; - win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); + win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp)); get_user(value, &win32->locals[reg - 16]); } else { struct reg_window __user *win; - win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS); + win = (struct reg_window __user *)(fp + STACK_BIAS); get_user(value, &win->locals[reg - 16]); } return value; @@ -135,19 +138,24 @@ static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs) static unsigned long *fetch_reg_addr(unsigned int reg, struct pt_regs *regs) { + unsigned long fp; + if (reg < 16) return ®s->u_regs[reg]; + + fp = regs->u_regs[UREG_FP]; + if (regs->tstate & TSTATE_PRIV) { struct reg_window *win; - win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS); + win = (struct reg_window *)(fp + STACK_BIAS); return &win->locals[reg - 16]; - } else if (test_thread_flag(TIF_32BIT)) { + } else if (!test_thread_64bit_stack(fp)) { struct reg_window32 *win32; - win32 = (struct reg_window32 *)((unsigned long)((u32)regs->u_regs[UREG_FP])); + win32 = (struct reg_window32 *)((unsigned long)((u32)fp)); return (unsigned long *)&win32->locals[reg - 16]; } else { struct reg_window *win; - win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS); + win = (struct reg_window *)(fp + STACK_BIAS); return &win->locals[reg - 16]; } } @@ -392,13 +400,15 @@ int handle_popc(u32 insn, struct pt_regs *regs) if (rd) regs->u_regs[rd] = ret; } else { - if (test_thread_flag(TIF_32BIT)) { + unsigned long fp = regs->u_regs[UREG_FP]; + + if (!test_thread_64bit_stack(fp)) { struct reg_window32 __user *win32; - win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); + win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp)); put_user(ret, &win32->locals[rd - 16]); } else { struct reg_window __user *win; - win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS); + win = (struct reg_window __user *)(fp + STACK_BIAS); put_user(ret, &win->locals[rd - 16]); } } @@ -554,7 +564,7 @@ void handle_ld_nf(u32 insn, struct pt_regs *regs) reg[0] = 0; if ((insn & 0x780000) == 0x180000) reg[1] = 0; - } else if (test_thread_flag(TIF_32BIT)) { + } else if (!test_thread_64bit_stack(regs->u_regs[UREG_FP])) { put_user(0, (int __user *) reg); if ((insn & 0x780000) == 0x180000) put_user(0, ((int __user *) reg) + 1); diff --git a/arch/sparc/kernel/visemul.c b/arch/sparc/kernel/visemul.c index 08e074b7eb6a..c096c624ac4d 100644 --- a/arch/sparc/kernel/visemul.c +++ b/arch/sparc/kernel/visemul.c @@ -149,21 +149,24 @@ static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2, static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs) { - unsigned long value; + unsigned long value, fp; if (reg < 16) return (!reg ? 0 : regs->u_regs[reg]); + + fp = regs->u_regs[UREG_FP]; + if (regs->tstate & TSTATE_PRIV) { struct reg_window *win; - win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS); + win = (struct reg_window *)(fp + STACK_BIAS); value = win->locals[reg - 16]; - } else if (test_thread_flag(TIF_32BIT)) { + } else if (!test_thread_64bit_stack(fp)) { struct reg_window32 __user *win32; - win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); + win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp)); get_user(value, &win32->locals[reg - 16]); } else { struct reg_window __user *win; - win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS); + win = (struct reg_window __user *)(fp + STACK_BIAS); get_user(value, &win->locals[reg - 16]); } return value; @@ -172,16 +175,18 @@ static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs) static inline unsigned long __user *__fetch_reg_addr_user(unsigned int reg, struct pt_regs *regs) { + unsigned long fp = regs->u_regs[UREG_FP]; + BUG_ON(reg < 16); BUG_ON(regs->tstate & TSTATE_PRIV); - if (test_thread_flag(TIF_32BIT)) { + if (!test_thread_64bit_stack(fp)) { struct reg_window32 __user *win32; - win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); + win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp)); return (unsigned long __user *)&win32->locals[reg - 16]; } else { struct reg_window __user *win; - win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS); + win = (struct reg_window __user *)(fp + STACK_BIAS); return &win->locals[reg - 16]; } } @@ -204,7 +209,7 @@ static void store_reg(struct pt_regs *regs, unsigned long val, unsigned long rd) } else { unsigned long __user *rd_user = __fetch_reg_addr_user(rd, regs); - if (test_thread_flag(TIF_32BIT)) + if (!test_thread_64bit_stack(regs->u_regs[UREG_FP])) __put_user((u32)val, (u32 __user *)rd_user); else __put_user(val, rd_user); diff --git a/arch/sparc/kernel/vmlinux.lds.S b/arch/sparc/kernel/vmlinux.lds.S index 89c2c29f154b..0bacceb19150 100644 --- a/arch/sparc/kernel/vmlinux.lds.S +++ b/arch/sparc/kernel/vmlinux.lds.S @@ -132,6 +132,11 @@ SECTIONS *(.popc_6insn_patch) __popc_6insn_patch_end = .; } + .pause_3insn_patch : { + __pause_3insn_patch = .; + *(.pause_3insn_patch) + __pause_3insn_patch_end = .; + } PERCPU_SECTION(SMP_CACHE_BYTES) . = ALIGN(PAGE_SIZE); diff --git a/arch/sparc/kernel/winfixup.S b/arch/sparc/kernel/winfixup.S index a6b0863c27df..1e67ce958369 100644 --- a/arch/sparc/kernel/winfixup.S +++ b/arch/sparc/kernel/winfixup.S @@ -43,6 +43,8 @@ spill_fixup_mna: spill_fixup_dax: TRAP_LOAD_THREAD_REG(%g6, %g1) ldx [%g6 + TI_FLAGS], %g1 + andcc %sp, 0x1, %g0 + movne %icc, 0, %g1 andcc %g1, _TIF_32BIT, %g0 ldub [%g6 + TI_WSAVED], %g1 sll %g1, 3, %g3 diff --git a/arch/sparc/lib/atomic_64.S b/arch/sparc/lib/atomic_64.S index 4d502da3de78..85c233d0a340 100644 --- a/arch/sparc/lib/atomic_64.S +++ b/arch/sparc/lib/atomic_64.S @@ -1,6 +1,6 @@ /* atomic.S: These things are too big to do inline. * - * Copyright (C) 1999, 2007 David S. Miller ([email protected]) + * Copyright (C) 1999, 2007 2012 David S. Miller ([email protected]) */ #include <linux/linkage.h> @@ -117,3 +117,17 @@ ENTRY(atomic64_sub_ret) /* %o0 = decrement, %o1 = atomic_ptr */ sub %g1, %o0, %o0 2: BACKOFF_SPIN(%o2, %o3, 1b) ENDPROC(atomic64_sub_ret) + +ENTRY(atomic64_dec_if_positive) /* %o0 = atomic_ptr */ + BACKOFF_SETUP(%o2) +1: ldx [%o0], %g1 + brlez,pn %g1, 3f + sub %g1, 1, %g7 + casx [%o0], %g1, %g7 + cmp %g1, %g7 + bne,pn %xcc, BACKOFF_LABEL(2f, 1b) + nop +3: retl + sub %g1, 1, %o0 +2: BACKOFF_SPIN(%o2, %o3, 1b) +ENDPROC(atomic64_dec_if_positive) diff --git a/arch/sparc/lib/ksyms.c b/arch/sparc/lib/ksyms.c index ee31b884c61b..0c4e35e522fa 100644 --- a/arch/sparc/lib/ksyms.c +++ b/arch/sparc/lib/ksyms.c @@ -116,6 +116,7 @@ EXPORT_SYMBOL(atomic64_add); EXPORT_SYMBOL(atomic64_add_ret); EXPORT_SYMBOL(atomic64_sub); EXPORT_SYMBOL(atomic64_sub_ret); +EXPORT_SYMBOL(atomic64_dec_if_positive); /* Atomic bit operations. */ EXPORT_SYMBOL(test_and_set_bit); diff --git a/arch/sparc/math-emu/math_64.c b/arch/sparc/math-emu/math_64.c index 1704068da928..034aadbff036 100644 --- a/arch/sparc/math-emu/math_64.c +++ b/arch/sparc/math-emu/math_64.c @@ -320,7 +320,7 @@ int do_mathemu(struct pt_regs *regs, struct fpustate *f, bool illegal_insn_trap) XR = 0; else if (freg < 16) XR = regs->u_regs[freg]; - else if (test_thread_flag(TIF_32BIT)) { + else if (!test_thread_64bit_stack(regs->u_regs[UREG_FP])) { struct reg_window32 __user *win32; flushw_user (); win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP])); diff --git a/arch/x86/include/asm/xen/hypercall.h b/arch/x86/include/asm/xen/hypercall.h index 59c226d120cd..c20d1ce62dc6 100644 --- a/arch/x86/include/asm/xen/hypercall.h +++ b/arch/x86/include/asm/xen/hypercall.h @@ -359,18 +359,14 @@ HYPERVISOR_update_va_mapping(unsigned long va, pte_t new_val, return _hypercall4(int, update_va_mapping, va, new_val.pte, new_val.pte >> 32, flags); } +extern int __must_check xen_event_channel_op_compat(int, void *); static inline int HYPERVISOR_event_channel_op(int cmd, void *arg) { int rc = _hypercall2(int, event_channel_op, cmd, arg); - if (unlikely(rc == -ENOSYS)) { - struct evtchn_op op; - op.cmd = cmd; - memcpy(&op.u, arg, sizeof(op.u)); - rc = _hypercall1(int, event_channel_op_compat, &op); - memcpy(arg, &op.u, sizeof(op.u)); - } + if (unlikely(rc == -ENOSYS)) + rc = xen_event_channel_op_compat(cmd, arg); return rc; } @@ -386,17 +382,14 @@ HYPERVISOR_console_io(int cmd, int count, char *str) return _hypercall3(int, console_io, cmd, count, str); } +extern int __must_check HYPERVISOR_physdev_op_compat(int, void *); + static inline int HYPERVISOR_physdev_op(int cmd, void *arg) { int rc = _hypercall2(int, physdev_op, cmd, arg); - if (unlikely(rc == -ENOSYS)) { - struct physdev_op op; - op.cmd = cmd; - memcpy(&op.u, arg, sizeof(op.u)); - rc = _hypercall1(int, physdev_op_compat, &op); - memcpy(arg, &op.u, sizeof(op.u)); - } + if (unlikely(rc == -ENOSYS)) + rc = HYPERVISOR_physdev_op_compat(cmd, arg); return rc; } diff --git a/crypto/cryptd.c b/crypto/cryptd.c index 671d4d6d14df..7bdd61b867c8 100644 --- a/crypto/cryptd.c +++ b/crypto/cryptd.c @@ -137,13 +137,18 @@ static void cryptd_queue_worker(struct work_struct *work) struct crypto_async_request *req, *backlog; cpu_queue = container_of(work, struct cryptd_cpu_queue, work); - /* Only handle one request at a time to avoid hogging crypto - * workqueue. preempt_disable/enable is used to prevent - * being preempted by cryptd_enqueue_request() */ + /* + * Only handle one request at a time to avoid hogging crypto workqueue. + * preempt_disable/enable is used to prevent being preempted by + * cryptd_enqueue_request(). local_bh_disable/enable is used to prevent + * cryptd_enqueue_request() being accessed from software interrupts. + */ + local_bh_disable(); preempt_disable(); backlog = crypto_get_backlog(&cpu_queue->queue); req = crypto_dequeue_request(&cpu_queue->queue); preempt_enable(); + local_bh_enable(); if (!req) return; diff --git a/drivers/base/platform.c b/drivers/base/platform.c index 8727e9c5eea4..72c776f2a1f5 100644 --- a/drivers/base/platform.c +++ b/drivers/base/platform.c @@ -83,9 +83,16 @@ EXPORT_SYMBOL_GPL(platform_get_resource); */ int platform_get_irq(struct platform_device *dev, unsigned int num) { +#ifdef CONFIG_SPARC + /* sparc does not have irqs represented as IORESOURCE_IRQ resources */ + if (!dev || num >= dev->archdata.num_irqs) + return -ENXIO; + return dev->archdata.irqs[num]; +#else struct resource *r = platform_get_resource(dev, IORESOURCE_IRQ, num); return r ? r->start : -ENXIO; +#endif } EXPORT_SYMBOL_GPL(platform_get_irq); diff --git a/drivers/dma/imx-dma.c b/drivers/dma/imx-dma.c index 7d9554cc4976..dbf0e6f8de8a 100644 --- a/drivers/dma/imx-dma.c +++ b/drivers/dma/imx-dma.c @@ -29,7 +29,6 @@ #include <asm/irq.h> #include <linux/platform_data/dma-imx.h> -#include <mach/hardware.h> #include "dmaengine.h" #define IMXDMA_MAX_CHAN_DESCRIPTORS 16 @@ -167,6 +166,12 @@ struct imxdma_channel { int slot_2d; }; +enum imx_dma_type { + IMX1_DMA, + IMX21_DMA, + IMX27_DMA, +}; + struct imxdma_engine { struct device *dev; struct device_dma_parameters dma_parms; @@ -177,7 +182,39 @@ struct imxdma_engine { spinlock_t lock; struct imx_dma_2d_config slots_2d[IMX_DMA_2D_SLOTS]; struct imxdma_channel channel[IMX_DMA_CHANNELS]; + enum imx_dma_type devtype; +}; + +static struct platform_device_id imx_dma_devtype[] = { + { + .name = "imx1-dma", + .driver_data = IMX1_DMA, + }, { + .name = "imx21-dma", + .driver_data = IMX21_DMA, + }, { + .name = "imx27-dma", + .driver_data = IMX27_DMA, + }, { + /* sentinel */ + } }; +MODULE_DEVICE_TABLE(platform, imx_dma_devtype); + +static inline int is_imx1_dma(struct imxdma_engine *imxdma) +{ + return imxdma->devtype == IMX1_DMA; +} + +static inline int is_imx21_dma(struct imxdma_engine *imxdma) +{ + return imxdma->devtype == IMX21_DMA; +} + +static inline int is_imx27_dma(struct imxdma_engine *imxdma) +{ + return imxdma->devtype == IMX27_DMA; +} static struct imxdma_channel *to_imxdma_chan(struct dma_chan *chan) { @@ -212,7 +249,9 @@ static unsigned imx_dmav1_readl(struct imxdma_engine *imxdma, unsigned offset) static int imxdma_hw_chain(struct imxdma_channel *imxdmac) { - if (cpu_is_mx27()) + struct imxdma_engine *imxdma = imxdmac->imxdma; + + if (is_imx27_dma(imxdma)) return imxdmac->hw_chaining; else return 0; @@ -267,7 +306,7 @@ static void imxdma_enable_hw(struct imxdma_desc *d) imx_dmav1_writel(imxdma, imx_dmav1_readl(imxdma, DMA_CCR(channel)) | CCR_CEN | CCR_ACRPT, DMA_CCR(channel)); - if ((cpu_is_mx21() || cpu_is_mx27()) && + if (!is_imx1_dma(imxdma) && d->sg && imxdma_hw_chain(imxdmac)) { d->sg = sg_next(d->sg); if (d->sg) { @@ -436,7 +475,7 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id) struct imxdma_engine *imxdma = dev_id; int i, disr; - if (cpu_is_mx21() || cpu_is_mx27()) + if (!is_imx1_dma(imxdma)) imxdma_err_handler(irq, dev_id); disr = imx_dmav1_readl(imxdma, DMA_DISR); @@ -961,35 +1000,32 @@ static void imxdma_issue_pending(struct dma_chan *chan) static int __init imxdma_probe(struct platform_device *pdev) { struct imxdma_engine *imxdma; + struct resource *res; int ret, i; + int irq, irq_err; - - imxdma = kzalloc(sizeof(*imxdma), GFP_KERNEL); + imxdma = devm_kzalloc(&pdev->dev, sizeof(*imxdma), GFP_KERNEL); if (!imxdma) return -ENOMEM; - if (cpu_is_mx1()) { - imxdma->base = MX1_IO_ADDRESS(MX1_DMA_BASE_ADDR); - } else if (cpu_is_mx21()) { - imxdma->base = MX21_IO_ADDRESS(MX21_DMA_BASE_ADDR); - } else if (cpu_is_mx27()) { - imxdma->base = MX27_IO_ADDRESS(MX27_DMA_BASE_ADDR); - } else { - kfree(imxdma); - return 0; - } + imxdma->devtype = pdev->id_entry->driver_data; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + imxdma->base = devm_request_and_ioremap(&pdev->dev, res); + if (!imxdma->base) + return -EADDRNOTAVAIL; + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; imxdma->dma_ipg = devm_clk_get(&pdev->dev, "ipg"); - if (IS_ERR(imxdma->dma_ipg)) { - ret = PTR_ERR(imxdma->dma_ipg); - goto err_clk; - } + if (IS_ERR(imxdma->dma_ipg)) + return PTR_ERR(imxdma->dma_ipg); imxdma->dma_ahb = devm_clk_get(&pdev->dev, "ahb"); - if (IS_ERR(imxdma->dma_ahb)) { - ret = PTR_ERR(imxdma->dma_ahb); - goto err_clk; - } + if (IS_ERR(imxdma->dma_ahb)) + return PTR_ERR(imxdma->dma_ahb); clk_prepare_enable(imxdma->dma_ipg); clk_prepare_enable(imxdma->dma_ahb); @@ -997,18 +1033,25 @@ static int __init imxdma_probe(struct platform_device *pdev) /* reset DMA module */ imx_dmav1_writel(imxdma, DCR_DRST, DMA_DCR); - if (cpu_is_mx1()) { - ret = request_irq(MX1_DMA_INT, dma_irq_handler, 0, "DMA", imxdma); + if (is_imx1_dma(imxdma)) { + ret = devm_request_irq(&pdev->dev, irq, + dma_irq_handler, 0, "DMA", imxdma); if (ret) { dev_warn(imxdma->dev, "Can't register IRQ for DMA\n"); - goto err_enable; + goto err; + } + + irq_err = platform_get_irq(pdev, 1); + if (irq_err < 0) { + ret = irq_err; + goto err; } - ret = request_irq(MX1_DMA_ERR, imxdma_err_handler, 0, "DMA", imxdma); + ret = devm_request_irq(&pdev->dev, irq_err, + imxdma_err_handler, 0, "DMA", imxdma); if (ret) { dev_warn(imxdma->dev, "Can't register ERRIRQ for DMA\n"); - free_irq(MX1_DMA_INT, NULL); - goto err_enable; + goto err; } } @@ -1038,14 +1081,14 @@ static int __init imxdma_probe(struct platform_device *pdev) for (i = 0; i < IMX_DMA_CHANNELS; i++) { struct imxdma_channel *imxdmac = &imxdma->channel[i]; - if (cpu_is_mx21() || cpu_is_mx27()) { - ret = request_irq(MX2x_INT_DMACH0 + i, + if (!is_imx1_dma(imxdma)) { + ret = devm_request_irq(&pdev->dev, irq + i, dma_irq_handler, 0, "DMA", imxdma); if (ret) { dev_warn(imxdma->dev, "Can't register IRQ %d " "for DMA channel %d\n", - MX2x_INT_DMACH0 + i, i); - goto err_init; + irq + i, i); + goto err; } init_timer(&imxdmac->watchdog); imxdmac->watchdog.function = &imxdma_watchdog; @@ -1091,46 +1134,25 @@ static int __init imxdma_probe(struct platform_device *pdev) ret = dma_async_device_register(&imxdma->dma_device); if (ret) { dev_err(&pdev->dev, "unable to register\n"); - goto err_init; + goto err; } return 0; -err_init: - - if (cpu_is_mx21() || cpu_is_mx27()) { - while (--i >= 0) - free_irq(MX2x_INT_DMACH0 + i, NULL); - } else if cpu_is_mx1() { - free_irq(MX1_DMA_INT, NULL); - free_irq(MX1_DMA_ERR, NULL); - } -err_enable: +err: clk_disable_unprepare(imxdma->dma_ipg); clk_disable_unprepare(imxdma->dma_ahb); -err_clk: - kfree(imxdma); return ret; } static int __exit imxdma_remove(struct platform_device *pdev) { struct imxdma_engine *imxdma = platform_get_drvdata(pdev); - int i; dma_async_device_unregister(&imxdma->dma_device); - if (cpu_is_mx21() || cpu_is_mx27()) { - for (i = 0; i < IMX_DMA_CHANNELS; i++) - free_irq(MX2x_INT_DMACH0 + i, NULL); - } else if cpu_is_mx1() { - free_irq(MX1_DMA_INT, NULL); - free_irq(MX1_DMA_ERR, NULL); - } - clk_disable_unprepare(imxdma->dma_ipg); clk_disable_unprepare(imxdma->dma_ahb); - kfree(imxdma); return 0; } @@ -1139,6 +1161,7 @@ static struct platform_driver imxdma_driver = { .driver = { .name = "imx-dma", }, + .id_table = imx_dma_devtype, .remove = __exit_p(imxdma_remove), }; diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index c099ca0846f4..f082aa3a918c 100644 --- a/drivers/dma/imx-sdma.c +++ b/drivers/dma/imx-sdma.c @@ -40,7 +40,6 @@ #include <asm/irq.h> #include <linux/platform_data/dma-imx-sdma.h> #include <linux/platform_data/dma-imx.h> -#include <mach/hardware.h> #include "dmaengine.h" diff --git a/drivers/dma/ipu/ipu_idmac.c b/drivers/dma/ipu/ipu_idmac.c index c7573e50aa14..65855373cee6 100644 --- a/drivers/dma/ipu/ipu_idmac.c +++ b/drivers/dma/ipu/ipu_idmac.c @@ -22,8 +22,7 @@ #include <linux/interrupt.h> #include <linux/io.h> #include <linux/module.h> - -#include <mach/ipu.h> +#include <linux/dma/ipu-dma.h> #include "../dmaengine.h" #include "ipu_intern.h" diff --git a/drivers/dma/ipu/ipu_irq.c b/drivers/dma/ipu/ipu_irq.c index fa95bcc3de1f..a5ee37d5320f 100644 --- a/drivers/dma/ipu/ipu_irq.c +++ b/drivers/dma/ipu/ipu_irq.c @@ -15,8 +15,7 @@ #include <linux/irq.h> #include <linux/io.h> #include <linux/module.h> - -#include <mach/ipu.h> +#include <linux/dma/ipu-dma.h> #include "ipu_intern.h" diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index d055cee36942..f11d8e3b4041 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -47,7 +47,7 @@ if GPIOLIB config OF_GPIO def_bool y - depends on OF && !SPARC + depends on OF config DEBUG_GPIO bool "Debug GPIO calls" diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c index 98d52cb3fd1a..6ab8afbc4697 100644 --- a/drivers/gpio/gpio-pxa.c +++ b/drivers/gpio/gpio-pxa.c @@ -448,7 +448,7 @@ static int pxa_gpio_nums(void) } else if (cpu_is_pxa27x()) { count = 120; gpio_type = PXA27X_GPIO; - } else if (cpu_is_pxa93x() || cpu_is_pxa95x()) { + } else if (cpu_is_pxa93x()) { count = 191; gpio_type = PXA93X_GPIO; } else if (cpu_is_pxa3xx()) { diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c index 7ef1b673e1be..133b4132983e 100644 --- a/drivers/gpu/drm/drm_fops.c +++ b/drivers/gpu/drm/drm_fops.c @@ -121,6 +121,8 @@ int drm_open(struct inode *inode, struct file *filp) int minor_id = iminor(inode); struct drm_minor *minor; int retcode = 0; + int need_setup = 0; + struct address_space *old_mapping; minor = idr_find(&drm_minors_idr, minor_id); if (!minor) @@ -132,23 +134,37 @@ int drm_open(struct inode *inode, struct file *filp) if (drm_device_is_unplugged(dev)) return -ENODEV; + if (!dev->open_count++) + need_setup = 1; + mutex_lock(&dev->struct_mutex); + old_mapping = dev->dev_mapping; + if (old_mapping == NULL) + dev->dev_mapping = &inode->i_data; + /* ihold ensures nobody can remove inode with our i_data */ + ihold(container_of(dev->dev_mapping, struct inode, i_data)); + inode->i_mapping = dev->dev_mapping; + filp->f_mapping = dev->dev_mapping; + mutex_unlock(&dev->struct_mutex); + retcode = drm_open_helper(inode, filp, dev); - if (!retcode) { - atomic_inc(&dev->counts[_DRM_STAT_OPENS]); - if (!dev->open_count++) - retcode = drm_setup(dev); - } - if (!retcode) { - mutex_lock(&dev->struct_mutex); - if (dev->dev_mapping == NULL) - dev->dev_mapping = &inode->i_data; - /* ihold ensures nobody can remove inode with our i_data */ - ihold(container_of(dev->dev_mapping, struct inode, i_data)); - inode->i_mapping = dev->dev_mapping; - filp->f_mapping = dev->dev_mapping; - mutex_unlock(&dev->struct_mutex); + if (retcode) + goto err_undo; + atomic_inc(&dev->counts[_DRM_STAT_OPENS]); + if (need_setup) { + retcode = drm_setup(dev); + if (retcode) + goto err_undo; } + return 0; +err_undo: + mutex_lock(&dev->struct_mutex); + filp->f_mapping = old_mapping; + inode->i_mapping = old_mapping; + iput(container_of(dev->dev_mapping, struct inode, i_data)); + dev->dev_mapping = old_mapping; + mutex_unlock(&dev->struct_mutex); + dev->open_count--; return retcode; } EXPORT_SYMBOL(drm_open); diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c index 16a9afb1060b..05a909a17cee 100644 --- a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c +++ b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c @@ -22,6 +22,8 @@ * Authors: Ben Skeggs */ +#include <subdev/bar.h> + #include <engine/software.h> #include <engine/disp.h> @@ -37,6 +39,7 @@ nv50_disp_sclass[] = { static void nv50_disp_intr_vblank(struct nv50_disp_priv *priv, int crtc) { + struct nouveau_bar *bar = nouveau_bar(priv); struct nouveau_disp *disp = &priv->base; struct nouveau_software_chan *chan, *temp; unsigned long flags; @@ -46,18 +49,19 @@ nv50_disp_intr_vblank(struct nv50_disp_priv *priv, int crtc) if (chan->vblank.crtc != crtc) continue; - nv_wr32(priv, 0x001704, chan->vblank.channel); - nv_wr32(priv, 0x001710, 0x80000000 | chan->vblank.ctxdma); - if (nv_device(priv)->chipset == 0x50) { + nv_wr32(priv, 0x001704, chan->vblank.channel); + nv_wr32(priv, 0x001710, 0x80000000 | chan->vblank.ctxdma); + bar->flush(bar); nv_wr32(priv, 0x001570, chan->vblank.offset); nv_wr32(priv, 0x001574, chan->vblank.value); } else { - if (nv_device(priv)->chipset >= 0xc0) { - nv_wr32(priv, 0x06000c, - upper_32_bits(chan->vblank.offset)); - } - nv_wr32(priv, 0x060010, chan->vblank.offset); + nv_wr32(priv, 0x001718, 0x80000000 | chan->vblank.channel); + bar->flush(bar); + nv_wr32(priv, 0x06000c, + upper_32_bits(chan->vblank.offset)); + nv_wr32(priv, 0x060010, + lower_32_bits(chan->vblank.offset)); nv_wr32(priv, 0x060014, chan->vblank.value); } diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nv40.c b/drivers/gpu/drm/nouveau/core/engine/graph/nv40.c index 8d0021049ec0..425001204a89 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/nv40.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nv40.c @@ -156,8 +156,8 @@ nv40_graph_context_ctor(struct nouveau_object *parent, static int nv40_graph_context_fini(struct nouveau_object *object, bool suspend) { - struct nv04_graph_priv *priv = (void *)object->engine; - struct nv04_graph_chan *chan = (void *)object; + struct nv40_graph_priv *priv = (void *)object->engine; + struct nv40_graph_chan *chan = (void *)object; u32 inst = 0x01000000 | nv_gpuobj(chan)->addr >> 4; int ret = 0; diff --git a/drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c b/drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c index 12418574efea..f7c581ad1991 100644 --- a/drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c +++ b/drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c @@ -38,7 +38,7 @@ struct nv40_mpeg_priv { }; struct nv40_mpeg_chan { - struct nouveau_mpeg base; + struct nouveau_mpeg_chan base; }; /******************************************************************************* diff --git a/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c index 49050d991e75..9474cfca6e4c 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c +++ b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c @@ -67,7 +67,7 @@ nv41_vm_unmap(struct nouveau_gpuobj *pgt, u32 pte, u32 cnt) static void nv41_vm_flush(struct nouveau_vm *vm) { - struct nv04_vm_priv *priv = (void *)vm->vmm; + struct nv04_vmmgr_priv *priv = (void *)vm->vmm; mutex_lock(&nv_subdev(priv)->mutex); nv_wr32(priv, 0x100810, 0x00000022); diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c index 9a6e2cb282dc..d3595b23434a 100644 --- a/drivers/gpu/drm/nouveau/nouveau_connector.c +++ b/drivers/gpu/drm/nouveau/nouveau_connector.c @@ -355,7 +355,7 @@ nouveau_connector_detect_lvds(struct drm_connector *connector, bool force) * valid - it's not (rh#613284) */ if (nv_encoder->dcb->lvdsconf.use_acpi_for_edid) { - if (!(nv_connector->edid = nouveau_acpi_edid(dev, connector))) { + if ((nv_connector->edid = nouveau_acpi_edid(dev, connector))) { status = connector_status_connected; goto out; } diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index 2e566e123e9e..3bce0299f64a 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c @@ -1696,35 +1696,43 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc) return ATOM_PPLL2; DRM_ERROR("unable to allocate a PPLL\n"); return ATOM_PPLL_INVALID; - } else { - if (ASIC_IS_AVIVO(rdev)) { - /* in DP mode, the DP ref clock can come from either PPLL - * depending on the asic: - * DCE3: PPLL1 or PPLL2 - */ - if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(radeon_crtc->encoder))) { - /* use the same PPLL for all DP monitors */ - pll = radeon_get_shared_dp_ppll(crtc); - if (pll != ATOM_PPLL_INVALID) - return pll; - } else { - /* use the same PPLL for all monitors with the same clock */ - pll = radeon_get_shared_nondp_ppll(crtc); - if (pll != ATOM_PPLL_INVALID) - return pll; - } - /* all other cases */ - pll_in_use = radeon_get_pll_use_mask(crtc); + } else if (ASIC_IS_AVIVO(rdev)) { + /* in DP mode, the DP ref clock can come from either PPLL + * depending on the asic: + * DCE3: PPLL1 or PPLL2 + */ + if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(radeon_crtc->encoder))) { + /* use the same PPLL for all DP monitors */ + pll = radeon_get_shared_dp_ppll(crtc); + if (pll != ATOM_PPLL_INVALID) + return pll; + } else { + /* use the same PPLL for all monitors with the same clock */ + pll = radeon_get_shared_nondp_ppll(crtc); + if (pll != ATOM_PPLL_INVALID) + return pll; + } + /* all other cases */ + pll_in_use = radeon_get_pll_use_mask(crtc); + /* the order shouldn't matter here, but we probably + * need this until we have atomic modeset + */ + if (rdev->flags & RADEON_IS_IGP) { if (!(pll_in_use & (1 << ATOM_PPLL1))) return ATOM_PPLL1; if (!(pll_in_use & (1 << ATOM_PPLL2))) return ATOM_PPLL2; - DRM_ERROR("unable to allocate a PPLL\n"); - return ATOM_PPLL_INVALID; } else { - /* on pre-R5xx asics, the crtc to pll mapping is hardcoded */ - return radeon_crtc->crtc_id; + if (!(pll_in_use & (1 << ATOM_PPLL2))) + return ATOM_PPLL2; + if (!(pll_in_use & (1 << ATOM_PPLL1))) + return ATOM_PPLL1; } + DRM_ERROR("unable to allocate a PPLL\n"); + return ATOM_PPLL_INVALID; + } else { + /* on pre-R5xx asics, the crtc to pll mapping is hardcoded */ + return radeon_crtc->crtc_id; } } diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 14313ad43b76..af31f829f4a8 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -1372,7 +1372,7 @@ void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *s WREG32(BIF_FB_EN, FB_READ_EN | FB_WRITE_EN); for (i = 0; i < rdev->num_crtc; i++) { - if (save->crtc_enabled) { + if (save->crtc_enabled[i]) { if (ASIC_IS_DCE6(rdev)) { tmp = RREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i]); tmp |= EVERGREEN_CRTC_BLANK_DATA_EN; diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c b/drivers/gpu/drm/radeon/evergreen_cs.c index 95e6318b6268..c042e497e450 100644 --- a/drivers/gpu/drm/radeon/evergreen_cs.c +++ b/drivers/gpu/drm/radeon/evergreen_cs.c @@ -2725,6 +2725,9 @@ static bool evergreen_vm_reg_valid(u32 reg) /* check config regs */ switch (reg) { case GRBM_GFX_INDEX: + case CP_STRMOUT_CNTL: + case CP_COHER_CNTL: + case CP_COHER_SIZE: case VGT_VTX_VECT_EJECT_REG: case VGT_CACHE_INVALIDATION: case VGT_GS_VERTEX_REUSE: diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h index df542f1a5dfb..2bc0f6a1b428 100644 --- a/drivers/gpu/drm/radeon/evergreend.h +++ b/drivers/gpu/drm/radeon/evergreend.h @@ -91,6 +91,10 @@ #define FB_READ_EN (1 << 0) #define FB_WRITE_EN (1 << 1) +#define CP_STRMOUT_CNTL 0x84FC + +#define CP_COHER_CNTL 0x85F0 +#define CP_COHER_SIZE 0x85F4 #define CP_COHER_BASE 0x85F8 #define CP_STALLED_STAT1 0x8674 #define CP_STALLED_STAT2 0x8678 diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index b0db712060fb..4422d630b33b 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c @@ -2474,6 +2474,7 @@ static bool si_vm_reg_valid(u32 reg) /* check config regs */ switch (reg) { case GRBM_GFX_INDEX: + case CP_STRMOUT_CNTL: case VGT_VTX_VECT_EJECT_REG: case VGT_CACHE_INVALIDATION: case VGT_ESGS_RING_SIZE: diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h index 7d2a20e56577..a8871afc5b4e 100644 --- a/drivers/gpu/drm/radeon/sid.h +++ b/drivers/gpu/drm/radeon/sid.h @@ -424,6 +424,7 @@ # define RDERR_INT_ENABLE (1 << 0) # define GUI_IDLE_INT_ENABLE (1 << 19) +#define CP_STRMOUT_CNTL 0x84FC #define SCRATCH_REG0 0x8500 #define SCRATCH_REG1 0x8504 #define SCRATCH_REG2 0x8508 diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c index 3ce68a2e312d..d1498bfd7873 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c @@ -306,7 +306,7 @@ void vmw_bo_pin(struct ttm_buffer_object *bo, bool pin) BUG_ON(!atomic_read(&bo->reserved)); BUG_ON(old_mem_type != TTM_PL_VRAM && - old_mem_type != VMW_PL_FLAG_GMR); + old_mem_type != VMW_PL_GMR); pl_flags = TTM_PL_FLAG_VRAM | VMW_PL_FLAG_GMR | TTM_PL_FLAG_CACHED; if (pin) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c index ed3c1e7ddde9..2dd185e42f21 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c @@ -1098,6 +1098,11 @@ static void vmw_pm_complete(struct device *kdev) struct drm_device *dev = pci_get_drvdata(pdev); struct vmw_private *dev_priv = vmw_priv(dev); + mutex_lock(&dev_priv->hw_mutex); + vmw_write(dev_priv, SVGA_REG_ID, SVGA_ID_2); + (void) vmw_read(dev_priv, SVGA_REG_ID); + mutex_unlock(&dev_priv->hw_mutex); + /** * Reclaim 3d reference held by fbdev and potentially * start fifo. diff --git a/drivers/hid/hidraw.c b/drivers/hid/hidraw.c index 17d15bb610d1..7c47fc3f7b2b 100644 --- a/drivers/hid/hidraw.c +++ b/drivers/hid/hidraw.c @@ -42,7 +42,6 @@ static struct cdev hidraw_cdev; static struct class *hidraw_class; static struct hidraw *hidraw_table[HIDRAW_MAX_DEVICES]; static DEFINE_MUTEX(minors_lock); -static void drop_ref(struct hidraw *hid, int exists_bit); static ssize_t hidraw_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos) { @@ -114,7 +113,7 @@ static ssize_t hidraw_send_report(struct file *file, const char __user *buffer, __u8 *buf; int ret = 0; - if (!hidraw_table[minor] || !hidraw_table[minor]->exist) { + if (!hidraw_table[minor]) { ret = -ENODEV; goto out; } @@ -262,7 +261,7 @@ static int hidraw_open(struct inode *inode, struct file *file) } mutex_lock(&minors_lock); - if (!hidraw_table[minor] || !hidraw_table[minor]->exist) { + if (!hidraw_table[minor]) { err = -ENODEV; goto out_unlock; } @@ -299,12 +298,36 @@ out: static int hidraw_release(struct inode * inode, struct file * file) { unsigned int minor = iminor(inode); + struct hidraw *dev; struct hidraw_list *list = file->private_data; + int ret; + int i; + + mutex_lock(&minors_lock); + if (!hidraw_table[minor]) { + ret = -ENODEV; + goto unlock; + } - drop_ref(hidraw_table[minor], 0); list_del(&list->node); + dev = hidraw_table[minor]; + if (!--dev->open) { + if (list->hidraw->exist) { + hid_hw_power(dev->hid, PM_HINT_NORMAL); + hid_hw_close(dev->hid); + } else { + kfree(list->hidraw); + } + } + + for (i = 0; i < HIDRAW_BUFFER_SIZE; ++i) + kfree(list->buffer[i].value); kfree(list); - return 0; + ret = 0; +unlock: + mutex_unlock(&minors_lock); + + return ret; } static long hidraw_ioctl(struct file *file, unsigned int cmd, @@ -506,7 +529,21 @@ EXPORT_SYMBOL_GPL(hidraw_connect); void hidraw_disconnect(struct hid_device *hid) { struct hidraw *hidraw = hid->hidraw; - drop_ref(hidraw, 1); + + mutex_lock(&minors_lock); + hidraw->exist = 0; + + device_destroy(hidraw_class, MKDEV(hidraw_major, hidraw->minor)); + + hidraw_table[hidraw->minor] = NULL; + + if (hidraw->open) { + hid_hw_close(hid); + wake_up_interruptible(&hidraw->wait); + } else { + kfree(hidraw); + } + mutex_unlock(&minors_lock); } EXPORT_SYMBOL_GPL(hidraw_disconnect); @@ -555,23 +592,3 @@ void hidraw_exit(void) unregister_chrdev_region(dev_id, HIDRAW_MAX_DEVICES); } - -static void drop_ref(struct hidraw *hidraw, int exists_bit) -{ - mutex_lock(&minors_lock); - if (exists_bit) { - hid_hw_close(hidraw->hid); - hidraw->exist = 0; - if (hidraw->open) - wake_up_interruptible(&hidraw->wait); - } else { - --hidraw->open; - } - - if (!hidraw->open && !hidraw->exist) { - device_destroy(hidraw_class, MKDEV(hidraw_major, hidraw->minor)); - hidraw_table[hidraw->minor] = NULL; - kfree(hidraw); - } - mutex_unlock(&minors_lock); -} diff --git a/drivers/hwmon/asb100.c b/drivers/hwmon/asb100.c index a227be47149f..520e5bf4f76d 100644 --- a/drivers/hwmon/asb100.c +++ b/drivers/hwmon/asb100.c @@ -32,7 +32,7 @@ * ASB100-A supports pwm1, while plain ASB100 does not. There is no known * way for the driver to tell which one is there. * - * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA + * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA * asb100 7 3 1 4 0x31 0x0694 yes no */ diff --git a/drivers/hwmon/w83627ehf.c b/drivers/hwmon/w83627ehf.c index 1821b7423d5b..de3c7e04c3b5 100644 --- a/drivers/hwmon/w83627ehf.c +++ b/drivers/hwmon/w83627ehf.c @@ -2083,6 +2083,7 @@ static int __devinit w83627ehf_probe(struct platform_device *pdev) mutex_init(&data->lock); mutex_init(&data->update_lock); data->name = w83627ehf_device_names[sio_data->kind]; + data->bank = 0xff; /* Force initial bank selection */ platform_set_drvdata(pdev, data); /* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */ diff --git a/drivers/hwmon/w83627hf.c b/drivers/hwmon/w83627hf.c index 5b1a6a666441..af1589908709 100644 --- a/drivers/hwmon/w83627hf.c +++ b/drivers/hwmon/w83627hf.c @@ -25,7 +25,7 @@ /* * Supports following chips: * - * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA + * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA * w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC) * w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC) * w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC) diff --git a/drivers/hwmon/w83781d.c b/drivers/hwmon/w83781d.c index 5a5046d94c3e..20f11d31da40 100644 --- a/drivers/hwmon/w83781d.c +++ b/drivers/hwmon/w83781d.c @@ -24,7 +24,7 @@ /* * Supports following chips: * - * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA + * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA * as99127f 7 3 0 3 0x31 0x12c3 yes no * as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no * w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes diff --git a/drivers/hwmon/w83791d.c b/drivers/hwmon/w83791d.c index 39ab7bcc616e..ed397c645198 100644 --- a/drivers/hwmon/w83791d.c +++ b/drivers/hwmon/w83791d.c @@ -22,7 +22,7 @@ /* * Supports following chips: * - * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA + * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA * w83791d 10 5 5 3 0x71 0x5ca3 yes no * * The w83791d chip appears to be part way between the 83781d and the diff --git a/drivers/hwmon/w83792d.c b/drivers/hwmon/w83792d.c index 053645279f38..301942d08453 100644 --- a/drivers/hwmon/w83792d.c +++ b/drivers/hwmon/w83792d.c @@ -31,7 +31,7 @@ /* * Supports following chips: * - * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA + * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA * w83792d 9 7 7 3 0x7a 0x5ca3 yes no */ diff --git a/drivers/hwmon/w83l786ng.c b/drivers/hwmon/w83l786ng.c index f0e8286c3c70..79710bcac2f7 100644 --- a/drivers/hwmon/w83l786ng.c +++ b/drivers/hwmon/w83l786ng.c @@ -20,7 +20,7 @@ /* * Supports following chips: * - * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA + * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA * w83l786ng 3 2 2 2 0x7b 0x5ca3 yes no */ diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c index 2ef162d148cb..b9734747d610 100644 --- a/drivers/i2c/busses/i2c-imx.c +++ b/drivers/i2c/busses/i2c-imx.c @@ -52,8 +52,6 @@ #include <linux/of_device.h> #include <linux/of_i2c.h> #include <linux/pinctrl/consumer.h> - -#include <mach/hardware.h> #include <linux/platform_data/i2c-imx.h> /** Defines ******************************************************************** @@ -115,6 +113,11 @@ static u16 __initdata i2c_clk_div[50][2] = { { 3072, 0x1E }, { 3840, 0x1F } }; +enum imx_i2c_type { + IMX1_I2C, + IMX21_I2C, +}; + struct imx_i2c_struct { struct i2c_adapter adapter; struct clk *clk; @@ -124,13 +127,33 @@ struct imx_i2c_struct { unsigned int disable_delay; int stopped; unsigned int ifdr; /* IMX_I2C_IFDR */ + enum imx_i2c_type devtype; +}; + +static struct platform_device_id imx_i2c_devtype[] = { + { + .name = "imx1-i2c", + .driver_data = IMX1_I2C, + }, { + .name = "imx21-i2c", + .driver_data = IMX21_I2C, + }, { + /* sentinel */ + } }; +MODULE_DEVICE_TABLE(platform, imx_i2c_devtype); static const struct of_device_id i2c_imx_dt_ids[] = { - { .compatible = "fsl,imx1-i2c", }, + { .compatible = "fsl,imx1-i2c", .data = &imx_i2c_devtype[IMX1_I2C], }, + { .compatible = "fsl,imx21-i2c", .data = &imx_i2c_devtype[IMX21_I2C], }, { /* sentinel */ } }; +static inline int is_imx1_i2c(struct imx_i2c_struct *i2c_imx) +{ + return i2c_imx->devtype == IMX1_I2C; +} + /** Functions for IMX I2C adapter driver *************************************** *******************************************************************************/ @@ -223,7 +246,7 @@ static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx) temp &= ~(I2CR_MSTA | I2CR_MTX); writeb(temp, i2c_imx->base + IMX_I2C_I2CR); } - if (cpu_is_mx1()) { + if (is_imx1_i2c(i2c_imx)) { /* * This delay caused by an i.MXL hardware bug. * If no (or too short) delay, no "STOP" bit will be generated. @@ -465,6 +488,8 @@ static struct i2c_algorithm i2c_imx_algo = { static int __init i2c_imx_probe(struct platform_device *pdev) { + const struct of_device_id *of_id = of_match_device(i2c_imx_dt_ids, + &pdev->dev); struct imx_i2c_struct *i2c_imx; struct resource *res; struct imxi2c_platform_data *pdata = pdev->dev.platform_data; @@ -497,6 +522,10 @@ static int __init i2c_imx_probe(struct platform_device *pdev) return -ENOMEM; } + if (of_id) + pdev->id_entry = of_id->data; + i2c_imx->devtype = pdev->id_entry->driver_data; + /* Setup i2c_imx driver structure */ strlcpy(i2c_imx->adapter.name, pdev->name, sizeof(i2c_imx->adapter.name)); i2c_imx->adapter.owner = THIS_MODULE; @@ -593,7 +622,8 @@ static struct platform_driver i2c_imx_driver = { .name = DRIVER_NAME, .owner = THIS_MODULE, .of_match_table = i2c_imx_dt_ids, - } + }, + .id_table = imx_i2c_devtype, }; static int __init i2c_adap_imx_init(void) diff --git a/drivers/isdn/Kconfig b/drivers/isdn/Kconfig index a233ed53913a..86cd75a0e84d 100644 --- a/drivers/isdn/Kconfig +++ b/drivers/isdn/Kconfig @@ -4,7 +4,7 @@ menuconfig ISDN bool "ISDN support" - depends on NET + depends on NET && NETDEVICES depends on !S390 && !UML ---help--- ISDN ("Integrated Services Digital Network", called RNIS in France) diff --git a/drivers/isdn/i4l/Kconfig b/drivers/isdn/i4l/Kconfig index 2302fbe70ac6..9c6650ea848e 100644 --- a/drivers/isdn/i4l/Kconfig +++ b/drivers/isdn/i4l/Kconfig @@ -6,7 +6,7 @@ if ISDN_I4L config ISDN_PPP bool "Support synchronous PPP" - depends on INET && NETDEVICES + depends on INET select SLHC help Over digital connections such as ISDN, there is no need to diff --git a/drivers/isdn/i4l/isdn_common.c b/drivers/isdn/i4l/isdn_common.c index 8c610fa6782b..e2a945ee9f05 100644 --- a/drivers/isdn/i4l/isdn_common.c +++ b/drivers/isdn/i4l/isdn_common.c @@ -1312,7 +1312,6 @@ isdn_ioctl(struct file *file, uint cmd, ulong arg) } else return -EINVAL; break; -#ifdef CONFIG_NETDEVICES case IIOCNETGPN: /* Get peer phone number of a connected * isdn network interface */ @@ -1322,7 +1321,6 @@ isdn_ioctl(struct file *file, uint cmd, ulong arg) return isdn_net_getpeer(&phone, argp); } else return -EINVAL; -#endif default: return -EINVAL; } @@ -1352,7 +1350,6 @@ isdn_ioctl(struct file *file, uint cmd, ulong arg) case IIOCNETLCR: printk(KERN_INFO "INFO: ISDN_ABC_LCR_SUPPORT not enabled\n"); return -ENODEV; -#ifdef CONFIG_NETDEVICES case IIOCNETAIF: /* Add a network-interface */ if (arg) { @@ -1491,7 +1488,6 @@ isdn_ioctl(struct file *file, uint cmd, ulong arg) return -EFAULT; return isdn_net_force_hangup(name); break; -#endif /* CONFIG_NETDEVICES */ case IIOCSETVER: dev->net_verbose = arg; printk(KERN_INFO "isdn: Verbose-Level is %d\n", dev->net_verbose); diff --git a/drivers/media/platform/soc_camera/mx2_camera.c b/drivers/media/platform/soc_camera/mx2_camera.c index 9fd9d1c5b218..e575ae82771d 100644 --- a/drivers/media/platform/soc_camera/mx2_camera.c +++ b/drivers/media/platform/soc_camera/mx2_camera.c @@ -41,7 +41,6 @@ #include <linux/videodev2.h> #include <linux/platform_data/camera-mx2.h> -#include <mach/hardware.h> #include <asm/dma.h> @@ -121,11 +120,13 @@ #define CSICR1 0x00 #define CSICR2 0x04 -#define CSISR (cpu_is_mx27() ? 0x08 : 0x18) +#define CSISR_IMX25 0x18 +#define CSISR_IMX27 0x08 #define CSISTATFIFO 0x0c #define CSIRFIFO 0x10 #define CSIRXCNT 0x14 -#define CSICR3 (cpu_is_mx27() ? 0x1C : 0x08) +#define CSICR3_IMX25 0x08 +#define CSICR3_IMX27 0x1c #define CSIDMASA_STATFIFO 0x20 #define CSIDMATA_STATFIFO 0x24 #define CSIDMASA_FB1 0x28 @@ -268,6 +269,11 @@ struct mx2_buffer { struct mx2_buf_internal internal; }; +enum mx2_camera_type { + IMX25_CAMERA, + IMX27_CAMERA, +}; + struct mx2_camera_dev { struct device *dev; struct soc_camera_host soc_host; @@ -291,6 +297,9 @@ struct mx2_camera_dev { struct mx2_buffer *fb2_active; u32 csicr1; + u32 reg_csisr; + u32 reg_csicr3; + enum mx2_camera_type devtype; struct mx2_buf_internal buf_discard[2]; void *discard_buffer; @@ -303,6 +312,29 @@ struct mx2_camera_dev { struct vb2_alloc_ctx *alloc_ctx; }; +static struct platform_device_id mx2_camera_devtype[] = { + { + .name = "imx25-camera", + .driver_data = IMX25_CAMERA, + }, { + .name = "imx27-camera", + .driver_data = IMX27_CAMERA, + }, { + /* sentinel */ + } +}; +MODULE_DEVICE_TABLE(platform, mx2_camera_devtype); + +static inline int is_imx25_camera(struct mx2_camera_dev *pcdev) +{ + return pcdev->devtype == IMX25_CAMERA; +} + +static inline int is_imx27_camera(struct mx2_camera_dev *pcdev) +{ + return pcdev->devtype == IMX27_CAMERA; +} + static struct mx2_buffer *mx2_ibuf_to_buf(struct mx2_buf_internal *int_buf) { return container_of(int_buf, struct mx2_buffer, internal); @@ -434,9 +466,9 @@ static void mx2_camera_deactivate(struct mx2_camera_dev *pcdev) clk_disable_unprepare(pcdev->clk_csi); writel(0, pcdev->base_csi + CSICR1); - if (cpu_is_mx27()) { + if (is_imx27_camera(pcdev)) { writel(0, pcdev->base_emma + PRP_CNTL); - } else if (cpu_is_mx25()) { + } else if (is_imx25_camera(pcdev)) { spin_lock_irqsave(&pcdev->lock, flags); pcdev->fb1_active = NULL; pcdev->fb2_active = NULL; @@ -466,7 +498,7 @@ static int mx2_camera_add_device(struct soc_camera_device *icd) csicr1 = CSICR1_MCLKEN; - if (cpu_is_mx27()) + if (is_imx27_camera(pcdev)) csicr1 |= CSICR1_PRP_IF_EN | CSICR1_FCC | CSICR1_RXFF_LEVEL(0); @@ -542,7 +574,7 @@ out: static irqreturn_t mx25_camera_irq(int irq_csi, void *data) { struct mx2_camera_dev *pcdev = data; - u32 status = readl(pcdev->base_csi + CSISR); + u32 status = readl(pcdev->base_csi + pcdev->reg_csisr); if (status & CSISR_DMA_TSF_FB1_INT) mx25_camera_frame_done(pcdev, 1, MX2_STATE_DONE); @@ -551,7 +583,7 @@ static irqreturn_t mx25_camera_irq(int irq_csi, void *data) /* FIXME: handle CSISR_RFF_OR_INT */ - writel(status, pcdev->base_csi + CSISR); + writel(status, pcdev->base_csi + pcdev->reg_csisr); return IRQ_HANDLED; } @@ -636,7 +668,7 @@ static void mx2_videobuf_queue(struct vb2_buffer *vb) buf->state = MX2_STATE_QUEUED; list_add_tail(&buf->internal.queue, &pcdev->capture); - if (cpu_is_mx25()) { + if (is_imx25_camera(pcdev)) { u32 csicr3, dma_inten = 0; if (pcdev->fb1_active == NULL) { @@ -655,20 +687,20 @@ static void mx2_videobuf_queue(struct vb2_buffer *vb) list_del(&buf->internal.queue); buf->state = MX2_STATE_ACTIVE; - csicr3 = readl(pcdev->base_csi + CSICR3); + csicr3 = readl(pcdev->base_csi + pcdev->reg_csicr3); /* Reflash DMA */ writel(csicr3 | CSICR3_DMA_REFLASH_RFF, - pcdev->base_csi + CSICR3); + pcdev->base_csi + pcdev->reg_csicr3); /* clear & enable interrupts */ - writel(dma_inten, pcdev->base_csi + CSISR); + writel(dma_inten, pcdev->base_csi + pcdev->reg_csisr); pcdev->csicr1 |= dma_inten; writel(pcdev->csicr1, pcdev->base_csi + CSICR1); /* enable DMA */ csicr3 |= CSICR3_DMA_REQ_EN_RFF | CSICR3_RXFF_LEVEL(1); - writel(csicr3, pcdev->base_csi + CSICR3); + writel(csicr3, pcdev->base_csi + pcdev->reg_csicr3); } } @@ -712,7 +744,7 @@ static void mx2_videobuf_release(struct vb2_buffer *vb) */ spin_lock_irqsave(&pcdev->lock, flags); - if (cpu_is_mx25() && buf->state == MX2_STATE_ACTIVE) { + if (is_imx25_camera(pcdev) && buf->state == MX2_STATE_ACTIVE) { if (pcdev->fb1_active == buf) { pcdev->csicr1 &= ~CSICR1_FB1_DMA_INTEN; writel(0, pcdev->base_csi + CSIDMASA_FB1); @@ -835,7 +867,7 @@ static int mx2_start_streaming(struct vb2_queue *q, unsigned int count) unsigned long phys; int bytesperline; - if (cpu_is_mx27()) { + if (is_imx27_camera(pcdev)) { unsigned long flags; if (count < 2) return -EINVAL; @@ -930,7 +962,7 @@ static int mx2_stop_streaming(struct vb2_queue *q) void *b; u32 cntl; - if (cpu_is_mx27()) { + if (is_imx27_camera(pcdev)) { spin_lock_irqsave(&pcdev->lock, flags); cntl = readl(pcdev->base_emma + PRP_CNTL); @@ -1082,11 +1114,11 @@ static int mx2_camera_set_bus_param(struct soc_camera_device *icd) if (bytesperline < 0) return bytesperline; - if (cpu_is_mx27()) { + if (is_imx27_camera(pcdev)) { ret = mx27_camera_emma_prp_reset(pcdev); if (ret) return ret; - } else if (cpu_is_mx25()) { + } else if (is_imx25_camera(pcdev)) { writel((bytesperline * icd->user_height) >> 2, pcdev->base_csi + CSIRXCNT); writel((bytesperline << 16) | icd->user_height, @@ -1392,7 +1424,7 @@ static int mx2_camera_try_fmt(struct soc_camera_device *icd, /* FIXME: implement MX27 limits */ /* limit to MX25 hardware capabilities */ - if (cpu_is_mx25()) { + if (is_imx25_camera(pcdev)) { if (xlate->host_fmt->bits_per_sample <= 8) width_limit = 0xffff * 4; else @@ -1726,6 +1758,20 @@ static int __devinit mx2_camera_probe(struct platform_device *pdev) goto exit; } + pcdev->devtype = pdev->id_entry->driver_data; + switch (pcdev->devtype) { + case IMX25_CAMERA: + pcdev->reg_csisr = CSISR_IMX25; + pcdev->reg_csicr3 = CSICR3_IMX25; + break; + case IMX27_CAMERA: + pcdev->reg_csisr = CSISR_IMX27; + pcdev->reg_csicr3 = CSICR3_IMX27; + break; + default: + break; + } + pcdev->clk_csi = devm_clk_get(&pdev->dev, "ahb"); if (IS_ERR(pcdev->clk_csi)) { dev_err(&pdev->dev, "Could not get csi clock\n"); @@ -1763,7 +1809,7 @@ static int __devinit mx2_camera_probe(struct platform_device *pdev) pcdev->dev = &pdev->dev; platform_set_drvdata(pdev, pcdev); - if (cpu_is_mx25()) { + if (is_imx25_camera(pcdev)) { err = devm_request_irq(&pdev->dev, irq_csi, mx25_camera_irq, 0, MX2_CAM_DRV_NAME, pcdev); if (err) { @@ -1772,7 +1818,7 @@ static int __devinit mx2_camera_probe(struct platform_device *pdev) } } - if (cpu_is_mx27()) { + if (is_imx27_camera(pcdev)) { err = mx27_camera_emma_init(pdev); if (err) goto exit; @@ -1789,7 +1835,7 @@ static int __devinit mx2_camera_probe(struct platform_device *pdev) pcdev->soc_host.priv = pcdev; pcdev->soc_host.v4l2_dev.dev = &pdev->dev; pcdev->soc_host.nr = pdev->id; - if (cpu_is_mx25()) + if (is_imx25_camera(pcdev)) pcdev->soc_host.capabilities = SOCAM_HOST_CAP_STRIDE; pcdev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev); @@ -1809,7 +1855,7 @@ static int __devinit mx2_camera_probe(struct platform_device *pdev) exit_free_emma: vb2_dma_contig_cleanup_ctx(pcdev->alloc_ctx); eallocctx: - if (cpu_is_mx27()) { + if (is_imx27_camera(pcdev)) { clk_disable_unprepare(pcdev->clk_emma_ipg); clk_disable_unprepare(pcdev->clk_emma_ahb); } @@ -1827,7 +1873,7 @@ static int __devexit mx2_camera_remove(struct platform_device *pdev) vb2_dma_contig_cleanup_ctx(pcdev->alloc_ctx); - if (cpu_is_mx27()) { + if (is_imx27_camera(pcdev)) { clk_disable_unprepare(pcdev->clk_emma_ipg); clk_disable_unprepare(pcdev->clk_emma_ahb); } @@ -1841,6 +1887,7 @@ static struct platform_driver mx2_camera_driver = { .driver = { .name = MX2_CAM_DRV_NAME, }, + .id_table = mx2_camera_devtype, .remove = __devexit_p(mx2_camera_remove), }; diff --git a/drivers/media/platform/soc_camera/mx3_camera.c b/drivers/media/platform/soc_camera/mx3_camera.c index 3557ac97e430..64d39b1b5582 100644 --- a/drivers/media/platform/soc_camera/mx3_camera.c +++ b/drivers/media/platform/soc_camera/mx3_camera.c @@ -17,6 +17,7 @@ #include <linux/vmalloc.h> #include <linux/interrupt.h> #include <linux/sched.h> +#include <linux/dma/ipu-dma.h> #include <media/v4l2-common.h> #include <media/v4l2-dev.h> @@ -24,7 +25,6 @@ #include <media/soc_camera.h> #include <media/soc_mediabus.h> -#include <mach/ipu.h> #include <linux/platform_data/camera-mx3.h> #include <linux/platform_data/dma-imx.h> diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c index 660bbc528862..4d50da618166 100644 --- a/drivers/mmc/host/dw_mmc-exynos.c +++ b/drivers/mmc/host/dw_mmc-exynos.c @@ -208,7 +208,7 @@ static unsigned long exynos5250_dwmmc_caps[4] = { MMC_CAP_CMD23, }; -static struct dw_mci_drv_data exynos5250_drv_data = { +static const struct dw_mci_drv_data exynos5250_drv_data = { .caps = exynos5250_dwmmc_caps, .init = dw_mci_exynos_priv_init, .setup_clock = dw_mci_exynos_setup_clock, @@ -220,14 +220,14 @@ static struct dw_mci_drv_data exynos5250_drv_data = { static const struct of_device_id dw_mci_exynos_match[] = { { .compatible = "samsung,exynos5250-dw-mshc", - .data = (void *)&exynos5250_drv_data, }, + .data = &exynos5250_drv_data, }, {}, }; -MODULE_DEVICE_TABLE(of, dw_mci_pltfm_match); +MODULE_DEVICE_TABLE(of, dw_mci_exynos_match); int dw_mci_exynos_probe(struct platform_device *pdev) { - struct dw_mci_drv_data *drv_data; + const struct dw_mci_drv_data *drv_data; const struct of_device_id *match; match = of_match_node(dw_mci_exynos_match, pdev->dev.of_node); diff --git a/drivers/mmc/host/dw_mmc-pltfm.c b/drivers/mmc/host/dw_mmc-pltfm.c index c960ca7ffbe6..917936bee5d5 100644 --- a/drivers/mmc/host/dw_mmc-pltfm.c +++ b/drivers/mmc/host/dw_mmc-pltfm.c @@ -24,7 +24,7 @@ #include "dw_mmc.h" int dw_mci_pltfm_register(struct platform_device *pdev, - struct dw_mci_drv_data *drv_data) + const struct dw_mci_drv_data *drv_data) { struct dw_mci *host; struct resource *regs; @@ -50,8 +50,8 @@ int dw_mci_pltfm_register(struct platform_device *pdev, if (!host->regs) return -ENOMEM; - if (host->drv_data->init) { - ret = host->drv_data->init(host); + if (drv_data && drv_data->init) { + ret = drv_data->init(host); if (ret) return ret; } diff --git a/drivers/mmc/host/dw_mmc-pltfm.h b/drivers/mmc/host/dw_mmc-pltfm.h index 301f24541fc2..2ac37b81de4d 100644 --- a/drivers/mmc/host/dw_mmc-pltfm.h +++ b/drivers/mmc/host/dw_mmc-pltfm.h @@ -13,7 +13,7 @@ #define _DW_MMC_PLTFM_H_ extern int dw_mci_pltfm_register(struct platform_device *pdev, - struct dw_mci_drv_data *drv_data); + const struct dw_mci_drv_data *drv_data); extern int __devexit dw_mci_pltfm_remove(struct platform_device *pdev); extern const struct dev_pm_ops dw_mci_pltfm_pmops; diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c index c2828f35c3b8..c0667c8af2bd 100644 --- a/drivers/mmc/host/dw_mmc.c +++ b/drivers/mmc/host/dw_mmc.c @@ -232,6 +232,7 @@ static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd) { struct mmc_data *data; struct dw_mci_slot *slot = mmc_priv(mmc); + struct dw_mci_drv_data *drv_data = slot->host->drv_data; u32 cmdr; cmd->error = -EINPROGRESS; @@ -261,8 +262,8 @@ static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd) cmdr |= SDMMC_CMD_DAT_WR; } - if (slot->host->drv_data->prepare_command) - slot->host->drv_data->prepare_command(slot->host, &cmdr); + if (drv_data && drv_data->prepare_command) + drv_data->prepare_command(slot->host, &cmdr); return cmdr; } @@ -434,7 +435,7 @@ static int dw_mci_idmac_init(struct dw_mci *host) return 0; } -static struct dw_mci_dma_ops dw_mci_idmac_ops = { +static const struct dw_mci_dma_ops dw_mci_idmac_ops = { .init = dw_mci_idmac_init, .start = dw_mci_idmac_start_dma, .stop = dw_mci_idmac_stop_dma, @@ -772,6 +773,7 @@ static void dw_mci_request(struct mmc_host *mmc, struct mmc_request *mrq) static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) { struct dw_mci_slot *slot = mmc_priv(mmc); + struct dw_mci_drv_data *drv_data = slot->host->drv_data; u32 regs; /* set default 1 bit mode */ @@ -807,8 +809,8 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) slot->clock = ios->clock; } - if (slot->host->drv_data->set_ios) - slot->host->drv_data->set_ios(slot->host, ios); + if (drv_data && drv_data->set_ios) + drv_data->set_ios(slot->host, ios); switch (ios->power_mode) { case MMC_POWER_UP: @@ -1815,6 +1817,7 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) { struct mmc_host *mmc; struct dw_mci_slot *slot; + struct dw_mci_drv_data *drv_data = host->drv_data; int ctrl_id, ret; u8 bus_width; @@ -1854,8 +1857,8 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) } else { ctrl_id = to_platform_device(host->dev)->id; } - if (host->drv_data && host->drv_data->caps) - mmc->caps |= host->drv_data->caps[ctrl_id]; + if (drv_data && drv_data->caps) + mmc->caps |= drv_data->caps[ctrl_id]; if (host->pdata->caps2) mmc->caps2 = host->pdata->caps2; @@ -1867,10 +1870,10 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) else bus_width = 1; - if (host->drv_data->setup_bus) { + if (drv_data && drv_data->setup_bus) { struct device_node *slot_np; slot_np = dw_mci_of_find_slot_node(host->dev, slot->id); - ret = host->drv_data->setup_bus(host, slot_np, bus_width); + ret = drv_data->setup_bus(host, slot_np, bus_width); if (ret) goto err_setup_bus; } @@ -1968,7 +1971,7 @@ static void dw_mci_init_dma(struct dw_mci *host) /* Determine which DMA interface to use */ #ifdef CONFIG_MMC_DW_IDMAC host->dma_ops = &dw_mci_idmac_ops; - dev_info(&host->dev, "Using internal DMA controller.\n"); + dev_info(host->dev, "Using internal DMA controller.\n"); #endif if (!host->dma_ops) @@ -2035,6 +2038,7 @@ static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) struct dw_mci_board *pdata; struct device *dev = host->dev; struct device_node *np = dev->of_node; + struct dw_mci_drv_data *drv_data = host->drv_data; int idx, ret; pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); @@ -2062,8 +2066,8 @@ static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) of_property_read_u32(np, "card-detect-delay", &pdata->detect_delay_ms); - if (host->drv_data->parse_dt) { - ret = host->drv_data->parse_dt(host); + if (drv_data && drv_data->parse_dt) { + ret = drv_data->parse_dt(host); if (ret) return ERR_PTR(ret); } @@ -2080,6 +2084,7 @@ static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) int dw_mci_probe(struct dw_mci *host) { + struct dw_mci_drv_data *drv_data = host->drv_data; int width, i, ret = 0; u32 fifo_size; int init_slots = 0; @@ -2127,8 +2132,8 @@ int dw_mci_probe(struct dw_mci *host) else host->bus_hz = clk_get_rate(host->ciu_clk); - if (host->drv_data->setup_clock) { - ret = host->drv_data->setup_clock(host); + if (drv_data && drv_data->setup_clock) { + ret = drv_data->setup_clock(host); if (ret) { dev_err(host->dev, "implementation specific clock setup failed\n"); @@ -2228,6 +2233,21 @@ int dw_mci_probe(struct dw_mci *host) else host->num_slots = ((mci_readl(host, HCON) >> 1) & 0x1F) + 1; + /* + * Enable interrupts for command done, data over, data empty, card det, + * receive ready and error such as transmit, receive timeout, crc error + */ + mci_writel(host, RINTSTS, 0xFFFFFFFF); + mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | + SDMMC_INT_TXDR | SDMMC_INT_RXDR | + DW_MCI_ERROR_FLAGS | SDMMC_INT_CD); + mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); /* Enable mci interrupt */ + + dev_info(host->dev, "DW MMC controller at irq %d, " + "%d bit host data width, " + "%u deep fifo\n", + host->irq, width, fifo_size); + /* We need at least one slot to succeed */ for (i = 0; i < host->num_slots; i++) { ret = dw_mci_init_slot(host, i); @@ -2257,20 +2277,6 @@ int dw_mci_probe(struct dw_mci *host) else host->data_offset = DATA_240A_OFFSET; - /* - * Enable interrupts for command done, data over, data empty, card det, - * receive ready and error such as transmit, receive timeout, crc error - */ - mci_writel(host, RINTSTS, 0xFFFFFFFF); - mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | - SDMMC_INT_TXDR | SDMMC_INT_RXDR | - DW_MCI_ERROR_FLAGS | SDMMC_INT_CD); - mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); /* Enable mci interrupt */ - - dev_info(host->dev, "DW MMC controller at irq %d, " - "%d bit host data width, " - "%u deep fifo\n", - host->irq, width, fifo_size); if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) dev_info(host->dev, "Internal DMAC interrupt fix enabled.\n"); diff --git a/drivers/mmc/host/mxcmmc.c b/drivers/mmc/host/mxcmmc.c index 565c2e4fac75..477f63bad521 100644 --- a/drivers/mmc/host/mxcmmc.c +++ b/drivers/mmc/host/mxcmmc.c @@ -41,7 +41,6 @@ #include <linux/platform_data/mmc-mxcmmc.h> #include <linux/platform_data/dma-imx.h> -#include <mach/hardware.h> #define DRIVER_NAME "mxc-mmc" #define MXCMCI_TIMEOUT_MS 10000 @@ -113,6 +112,11 @@ #define INT_WRITE_OP_DONE_EN (1 << 1) #define INT_READ_OP_EN (1 << 0) +enum mxcmci_type { + IMX21_MMC, + IMX31_MMC, +}; + struct mxcmci_host { struct mmc_host *mmc; struct resource *res; @@ -153,7 +157,26 @@ struct mxcmci_host { struct imx_dma_data dma_data; struct timer_list watchdog; + enum mxcmci_type devtype; +}; + +static struct platform_device_id mxcmci_devtype[] = { + { + .name = "imx21-mmc", + .driver_data = IMX21_MMC, + }, { + .name = "imx31-mmc", + .driver_data = IMX31_MMC, + }, { + /* sentinel */ + } }; +MODULE_DEVICE_TABLE(platform, mxcmci_devtype); + +static inline int is_imx31_mmc(struct mxcmci_host *host) +{ + return host->devtype == IMX31_MMC; +} static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios); @@ -843,6 +866,8 @@ static void mxcmci_enable_sdio_irq(struct mmc_host *mmc, int enable) static void mxcmci_init_card(struct mmc_host *host, struct mmc_card *card) { + struct mxcmci_host *mxcmci = mmc_priv(host); + /* * MX3 SoCs have a silicon bug which corrupts CRC calculation of * multi-block transfers when connected SDIO peripheral doesn't @@ -850,7 +875,7 @@ static void mxcmci_init_card(struct mmc_host *host, struct mmc_card *card) * One way to prevent this is to only allow 1-bit transfers. */ - if (cpu_is_mx3() && card->type == MMC_TYPE_SDIO) + if (is_imx31_mmc(mxcmci) && card->type == MMC_TYPE_SDIO) host->caps &= ~MMC_CAP_4_BIT_DATA; else host->caps |= MMC_CAP_4_BIT_DATA; @@ -948,6 +973,7 @@ static int mxcmci_probe(struct platform_device *pdev) host->mmc = mmc; host->pdata = pdev->dev.platform_data; + host->devtype = pdev->id_entry->driver_data; spin_lock_init(&host->lock); mxcmci_init_ocr(host); @@ -1120,6 +1146,7 @@ static const struct dev_pm_ops mxcmci_pm_ops = { static struct platform_driver mxcmci_driver = { .probe = mxcmci_probe, .remove = mxcmci_remove, + .id_table = mxcmci_devtype, .driver = { .name = DRIVER_NAME, .owner = THIS_MODULE, @@ -1134,4 +1161,4 @@ module_platform_driver(mxcmci_driver); MODULE_DESCRIPTION("i.MX Multimedia Card Interface Driver"); MODULE_AUTHOR("Sascha Hauer, Pengutronix"); MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:imx-mmc"); +MODULE_ALIAS("platform:mxc-mmc"); diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 9b24bd46aad3..e7c185233b18 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -176,7 +176,8 @@ struct omap_hsmmc_host { static int omap_hsmmc_card_detect(struct device *dev, int slot) { - struct omap_mmc_platform_data *mmc = dev->platform_data; + struct omap_hsmmc_host *host = dev_get_drvdata(dev); + struct omap_mmc_platform_data *mmc = host->pdata; /* NOTE: assumes card detect signal is active-low */ return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); @@ -184,7 +185,8 @@ static int omap_hsmmc_card_detect(struct device *dev, int slot) static int omap_hsmmc_get_wp(struct device *dev, int slot) { - struct omap_mmc_platform_data *mmc = dev->platform_data; + struct omap_hsmmc_host *host = dev_get_drvdata(dev); + struct omap_mmc_platform_data *mmc = host->pdata; /* NOTE: assumes write protect signal is active-high */ return gpio_get_value_cansleep(mmc->slots[0].gpio_wp); @@ -192,7 +194,8 @@ static int omap_hsmmc_get_wp(struct device *dev, int slot) static int omap_hsmmc_get_cover_state(struct device *dev, int slot) { - struct omap_mmc_platform_data *mmc = dev->platform_data; + struct omap_hsmmc_host *host = dev_get_drvdata(dev); + struct omap_mmc_platform_data *mmc = host->pdata; /* NOTE: assumes card detect signal is active-low */ return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); @@ -202,7 +205,8 @@ static int omap_hsmmc_get_cover_state(struct device *dev, int slot) static int omap_hsmmc_suspend_cdirq(struct device *dev, int slot) { - struct omap_mmc_platform_data *mmc = dev->platform_data; + struct omap_hsmmc_host *host = dev_get_drvdata(dev); + struct omap_mmc_platform_data *mmc = host->pdata; disable_irq(mmc->slots[0].card_detect_irq); return 0; @@ -210,7 +214,8 @@ static int omap_hsmmc_suspend_cdirq(struct device *dev, int slot) static int omap_hsmmc_resume_cdirq(struct device *dev, int slot) { - struct omap_mmc_platform_data *mmc = dev->platform_data; + struct omap_hsmmc_host *host = dev_get_drvdata(dev); + struct omap_mmc_platform_data *mmc = host->pdata; enable_irq(mmc->slots[0].card_detect_irq); return 0; @@ -2007,9 +2012,9 @@ static int __devexit omap_hsmmc_remove(struct platform_device *pdev) clk_put(host->dbclk); } - mmc_free_host(host->mmc); + omap_hsmmc_gpio_free(host->pdata); iounmap(host->base); - omap_hsmmc_gpio_free(pdev->dev.platform_data); + mmc_free_host(host->mmc); res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (res) diff --git a/drivers/mmc/host/sdhci-dove.c b/drivers/mmc/host/sdhci-dove.c index 90140eb03e36..8fd50a211037 100644 --- a/drivers/mmc/host/sdhci-dove.c +++ b/drivers/mmc/host/sdhci-dove.c @@ -19,6 +19,7 @@ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ +#include <linux/err.h> #include <linux/io.h> #include <linux/clk.h> #include <linux/err.h> @@ -84,30 +85,32 @@ static int __devinit sdhci_dove_probe(struct platform_device *pdev) struct sdhci_dove_priv *priv; int ret; - ret = sdhci_pltfm_register(pdev, &sdhci_dove_pdata); - if (ret) - goto sdhci_dove_register_fail; - priv = devm_kzalloc(&pdev->dev, sizeof(struct sdhci_dove_priv), GFP_KERNEL); if (!priv) { dev_err(&pdev->dev, "unable to allocate private data"); - ret = -ENOMEM; - goto sdhci_dove_allocate_fail; + return -ENOMEM; } + priv->clk = clk_get(&pdev->dev, NULL); + if (!IS_ERR(priv->clk)) + clk_prepare_enable(priv->clk); + + ret = sdhci_pltfm_register(pdev, &sdhci_dove_pdata); + if (ret) + goto sdhci_dove_register_fail; + host = platform_get_drvdata(pdev); pltfm_host = sdhci_priv(host); pltfm_host->priv = priv; - priv->clk = clk_get(&pdev->dev, NULL); - if (!IS_ERR(priv->clk)) - clk_prepare_enable(priv->clk); return 0; -sdhci_dove_allocate_fail: - sdhci_pltfm_unregister(pdev); sdhci_dove_register_fail: + if (!IS_ERR(priv->clk)) { + clk_disable_unprepare(priv->clk); + clk_put(priv->clk); + } return ret; } @@ -117,14 +120,13 @@ static int __devexit sdhci_dove_remove(struct platform_device *pdev) struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_dove_priv *priv = pltfm_host->priv; - if (priv->clk) { - if (!IS_ERR(priv->clk)) { - clk_disable_unprepare(priv->clk); - clk_put(priv->clk); - } - devm_kfree(&pdev->dev, priv->clk); + sdhci_pltfm_unregister(pdev); + + if (!IS_ERR(priv->clk)) { + clk_disable_unprepare(priv->clk); + clk_put(priv->clk); } - return sdhci_pltfm_unregister(pdev); + return 0; } static const struct of_device_id sdhci_dove_of_match_table[] __devinitdata = { diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c index ae5fcbfa1eef..63d219f57cae 100644 --- a/drivers/mmc/host/sdhci-of-esdhc.c +++ b/drivers/mmc/host/sdhci-of-esdhc.c @@ -169,6 +169,16 @@ static void esdhc_of_resume(struct sdhci_host *host) } #endif +static void esdhc_of_platform_init(struct sdhci_host *host) +{ + u32 vvn; + + vvn = in_be32(host->ioaddr + SDHCI_SLOT_INT_STATUS); + vvn = (vvn & SDHCI_VENDOR_VER_MASK) >> SDHCI_VENDOR_VER_SHIFT; + if (vvn == VENDOR_V_22) + host->quirks2 |= SDHCI_QUIRK2_HOST_NO_CMD23; +} + static struct sdhci_ops sdhci_esdhc_ops = { .read_l = esdhc_readl, .read_w = esdhc_readw, @@ -180,6 +190,7 @@ static struct sdhci_ops sdhci_esdhc_ops = { .enable_dma = esdhc_of_enable_dma, .get_max_clock = esdhc_of_get_max_clock, .get_min_clock = esdhc_of_get_min_clock, + .platform_init = esdhc_of_platform_init, #ifdef CONFIG_PM .platform_suspend = esdhc_of_suspend, .platform_resume = esdhc_of_resume, diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c index 4bb74b042a06..04936f353ced 100644 --- a/drivers/mmc/host/sdhci-pci.c +++ b/drivers/mmc/host/sdhci-pci.c @@ -1196,7 +1196,7 @@ static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot( return ERR_PTR(-ENODEV); } - if (pci_resource_len(pdev, bar) != 0x100) { + if (pci_resource_len(pdev, bar) < 0x100) { dev_err(&pdev->dev, "Invalid iomem size. You may " "experience problems.\n"); } diff --git a/drivers/mmc/host/sdhci-pltfm.c b/drivers/mmc/host/sdhci-pltfm.c index 65551a9709cc..27164457f861 100644 --- a/drivers/mmc/host/sdhci-pltfm.c +++ b/drivers/mmc/host/sdhci-pltfm.c @@ -150,6 +150,13 @@ struct sdhci_host *sdhci_pltfm_init(struct platform_device *pdev, goto err_remap; } + /* + * Some platforms need to probe the controller to be able to + * determine which caps should be used. + */ + if (host->ops && host->ops->platform_init) + host->ops->platform_init(host); + platform_set_drvdata(pdev, host); return host; diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c index 2903949594c6..a54dd5d7a5f9 100644 --- a/drivers/mmc/host/sdhci-s3c.c +++ b/drivers/mmc/host/sdhci-s3c.c @@ -211,8 +211,8 @@ static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock) if (ourhost->cur_clk != best_src) { struct clk *clk = ourhost->clk_bus[best_src]; - clk_enable(clk); - clk_disable(ourhost->clk_bus[ourhost->cur_clk]); + clk_prepare_enable(clk); + clk_disable_unprepare(ourhost->clk_bus[ourhost->cur_clk]); /* turn clock off to card before changing clock source */ writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL); @@ -607,7 +607,7 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev) } /* enable the local io clock and keep it running for the moment. */ - clk_enable(sc->clk_io); + clk_prepare_enable(sc->clk_io); for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) { struct clk *clk; @@ -638,7 +638,7 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev) } #ifndef CONFIG_PM_RUNTIME - clk_enable(sc->clk_bus[sc->cur_clk]); + clk_prepare_enable(sc->clk_bus[sc->cur_clk]); #endif res = platform_get_resource(pdev, IORESOURCE_MEM, 0); @@ -747,13 +747,14 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev) sdhci_s3c_setup_card_detect_gpio(sc); #ifdef CONFIG_PM_RUNTIME - clk_disable(sc->clk_io); + if (pdata->cd_type != S3C_SDHCI_CD_INTERNAL) + clk_disable_unprepare(sc->clk_io); #endif return 0; err_req_regs: #ifndef CONFIG_PM_RUNTIME - clk_disable(sc->clk_bus[sc->cur_clk]); + clk_disable_unprepare(sc->clk_bus[sc->cur_clk]); #endif for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) { if (sc->clk_bus[ptr]) { @@ -762,7 +763,7 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev) } err_no_busclks: - clk_disable(sc->clk_io); + clk_disable_unprepare(sc->clk_io); clk_put(sc->clk_io); err_io_clk: @@ -794,7 +795,8 @@ static int __devexit sdhci_s3c_remove(struct platform_device *pdev) gpio_free(sc->ext_cd_gpio); #ifdef CONFIG_PM_RUNTIME - clk_enable(sc->clk_io); + if (pdata->cd_type != S3C_SDHCI_CD_INTERNAL) + clk_prepare_enable(sc->clk_io); #endif sdhci_remove_host(host, 1); @@ -802,14 +804,14 @@ static int __devexit sdhci_s3c_remove(struct platform_device *pdev) pm_runtime_disable(&pdev->dev); #ifndef CONFIG_PM_RUNTIME - clk_disable(sc->clk_bus[sc->cur_clk]); + clk_disable_unprepare(sc->clk_bus[sc->cur_clk]); #endif for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) { if (sc->clk_bus[ptr]) { clk_put(sc->clk_bus[ptr]); } } - clk_disable(sc->clk_io); + clk_disable_unprepare(sc->clk_io); clk_put(sc->clk_io); if (pdev->dev.of_node) { @@ -849,8 +851,8 @@ static int sdhci_s3c_runtime_suspend(struct device *dev) ret = sdhci_runtime_suspend_host(host); - clk_disable(ourhost->clk_bus[ourhost->cur_clk]); - clk_disable(busclk); + clk_disable_unprepare(ourhost->clk_bus[ourhost->cur_clk]); + clk_disable_unprepare(busclk); return ret; } @@ -861,8 +863,8 @@ static int sdhci_s3c_runtime_resume(struct device *dev) struct clk *busclk = ourhost->clk_io; int ret; - clk_enable(busclk); - clk_enable(ourhost->clk_bus[ourhost->cur_clk]); + clk_prepare_enable(busclk); + clk_prepare_enable(ourhost->clk_bus[ourhost->cur_clk]); ret = sdhci_runtime_resume_host(host); return ret; } diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 7922adb42386..c7851c0aabce 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1315,16 +1315,19 @@ static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq) */ if ((host->flags & SDHCI_NEEDS_RETUNING) && !(present_state & (SDHCI_DOING_WRITE | SDHCI_DOING_READ))) { - /* eMMC uses cmd21 while sd and sdio use cmd19 */ - tuning_opcode = mmc->card->type == MMC_TYPE_MMC ? - MMC_SEND_TUNING_BLOCK_HS200 : - MMC_SEND_TUNING_BLOCK; - spin_unlock_irqrestore(&host->lock, flags); - sdhci_execute_tuning(mmc, tuning_opcode); - spin_lock_irqsave(&host->lock, flags); - - /* Restore original mmc_request structure */ - host->mrq = mrq; + if (mmc->card) { + /* eMMC uses cmd21 but sd and sdio use cmd19 */ + tuning_opcode = + mmc->card->type == MMC_TYPE_MMC ? + MMC_SEND_TUNING_BLOCK_HS200 : + MMC_SEND_TUNING_BLOCK; + spin_unlock_irqrestore(&host->lock, flags); + sdhci_execute_tuning(mmc, tuning_opcode); + spin_lock_irqsave(&host->lock, flags); + + /* Restore original mmc_request structure */ + host->mrq = mrq; + } } if (mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23)) @@ -2837,6 +2840,9 @@ int sdhci_add_host(struct sdhci_host *host) if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA)) mmc->caps |= MMC_CAP_4_BIT_DATA; + if (host->quirks2 & SDHCI_QUIRK2_HOST_NO_CMD23) + mmc->caps &= ~MMC_CAP_CMD23; + if (caps[0] & SDHCI_CAN_DO_HISPD) mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; @@ -2846,9 +2852,12 @@ int sdhci_add_host(struct sdhci_host *host) /* If vqmmc regulator and no 1.8V signalling, then there's no UHS */ host->vqmmc = regulator_get(mmc_dev(mmc), "vqmmc"); - if (IS_ERR(host->vqmmc)) { - pr_info("%s: no vqmmc regulator found\n", mmc_hostname(mmc)); - host->vqmmc = NULL; + if (IS_ERR_OR_NULL(host->vqmmc)) { + if (PTR_ERR(host->vqmmc) < 0) { + pr_info("%s: no vqmmc regulator found\n", + mmc_hostname(mmc)); + host->vqmmc = NULL; + } } else if (regulator_is_supported_voltage(host->vqmmc, 1800000, 1800000)) regulator_enable(host->vqmmc); @@ -2904,9 +2913,12 @@ int sdhci_add_host(struct sdhci_host *host) ocr_avail = 0; host->vmmc = regulator_get(mmc_dev(mmc), "vmmc"); - if (IS_ERR(host->vmmc)) { - pr_info("%s: no vmmc regulator found\n", mmc_hostname(mmc)); - host->vmmc = NULL; + if (IS_ERR_OR_NULL(host->vmmc)) { + if (PTR_ERR(host->vmmc) < 0) { + pr_info("%s: no vmmc regulator found\n", + mmc_hostname(mmc)); + host->vmmc = NULL; + } } else regulator_enable(host->vmmc); diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 97653ea8942b..71a4a7ed46c5 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -278,6 +278,7 @@ struct sdhci_ops { void (*hw_reset)(struct sdhci_host *host); void (*platform_suspend)(struct sdhci_host *host); void (*platform_resume)(struct sdhci_host *host); + void (*platform_init)(struct sdhci_host *host); }; #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c index 11d2bc3b51d5..d25bc97dc5c6 100644 --- a/drivers/mmc/host/sh_mmcif.c +++ b/drivers/mmc/host/sh_mmcif.c @@ -1466,9 +1466,9 @@ static int __devexit sh_mmcif_remove(struct platform_device *pdev) platform_set_drvdata(pdev, NULL); + clk_disable(host->hclk); mmc_free_host(host->mmc); pm_runtime_put_sync(&pdev->dev); - clk_disable(host->hclk); pm_runtime_disable(&pdev->dev); return 0; diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c index 72e31d86030d..022dcdc256fb 100644 --- a/drivers/mtd/nand/mxc_nand.c +++ b/drivers/mtd/nand/mxc_nand.c @@ -37,15 +37,9 @@ #include <asm/mach/flash.h> #include <linux/platform_data/mtd-mxc_nand.h> -#include <mach/hardware.h> #define DRIVER_NAME "mxc_nand" -#define nfc_is_v21() (cpu_is_mx25() || cpu_is_mx35()) -#define nfc_is_v1() (cpu_is_mx31() || cpu_is_mx27() || cpu_is_mx21()) -#define nfc_is_v3_2a() cpu_is_mx51() -#define nfc_is_v3_2b() cpu_is_mx53() - /* Addresses for NFC registers */ #define NFC_V1_V2_BUF_SIZE (host->regs + 0x00) #define NFC_V1_V2_BUF_ADDR (host->regs + 0x04) @@ -1283,6 +1277,53 @@ static const struct mxc_nand_devtype_data imx53_nand_devtype_data = { .ppb_shift = 8, }; +static inline int is_imx21_nfc(struct mxc_nand_host *host) +{ + return host->devtype_data == &imx21_nand_devtype_data; +} + +static inline int is_imx27_nfc(struct mxc_nand_host *host) +{ + return host->devtype_data == &imx27_nand_devtype_data; +} + +static inline int is_imx25_nfc(struct mxc_nand_host *host) +{ + return host->devtype_data == &imx25_nand_devtype_data; +} + +static inline int is_imx51_nfc(struct mxc_nand_host *host) +{ + return host->devtype_data == &imx51_nand_devtype_data; +} + +static inline int is_imx53_nfc(struct mxc_nand_host *host) +{ + return host->devtype_data == &imx53_nand_devtype_data; +} + +static struct platform_device_id mxcnd_devtype[] = { + { + .name = "imx21-nand", + .driver_data = (kernel_ulong_t) &imx21_nand_devtype_data, + }, { + .name = "imx27-nand", + .driver_data = (kernel_ulong_t) &imx27_nand_devtype_data, + }, { + .name = "imx25-nand", + .driver_data = (kernel_ulong_t) &imx25_nand_devtype_data, + }, { + .name = "imx51-nand", + .driver_data = (kernel_ulong_t) &imx51_nand_devtype_data, + }, { + .name = "imx53-nand", + .driver_data = (kernel_ulong_t) &imx53_nand_devtype_data, + }, { + /* sentinel */ + } +}; +MODULE_DEVICE_TABLE(platform, mxcnd_devtype); + #ifdef CONFIG_OF_MTD static const struct of_device_id mxcnd_dt_ids[] = { { @@ -1337,32 +1378,6 @@ static int __init mxcnd_probe_dt(struct mxc_nand_host *host) } #endif -static int __init mxcnd_probe_pdata(struct mxc_nand_host *host) -{ - struct mxc_nand_platform_data *pdata = host->dev->platform_data; - - if (!pdata) - return -ENODEV; - - host->pdata = *pdata; - - if (nfc_is_v1()) { - if (cpu_is_mx21()) - host->devtype_data = &imx21_nand_devtype_data; - else - host->devtype_data = &imx27_nand_devtype_data; - } else if (nfc_is_v21()) { - host->devtype_data = &imx25_nand_devtype_data; - } else if (nfc_is_v3_2a()) { - host->devtype_data = &imx51_nand_devtype_data; - } else if (nfc_is_v3_2b()) { - host->devtype_data = &imx53_nand_devtype_data; - } else - BUG(); - - return 0; -} - static int __devinit mxcnd_probe(struct platform_device *pdev) { struct nand_chip *this; @@ -1404,8 +1419,16 @@ static int __devinit mxcnd_probe(struct platform_device *pdev) return PTR_ERR(host->clk); err = mxcnd_probe_dt(host); - if (err > 0) - err = mxcnd_probe_pdata(host); + if (err > 0) { + struct mxc_nand_platform_data *pdata = pdev->dev.platform_data; + if (pdata) { + host->pdata = *pdata; + host->devtype_data = (struct mxc_nand_devtype_data *) + pdev->id_entry->driver_data; + } else { + err = -ENODEV; + } + } if (err < 0) return err; @@ -1494,7 +1517,7 @@ static int __devinit mxcnd_probe(struct platform_device *pdev) } /* first scan to find the device and get the page size */ - if (nand_scan_ident(mtd, nfc_is_v21() ? 4 : 1, NULL)) { + if (nand_scan_ident(mtd, is_imx25_nfc(host) ? 4 : 1, NULL)) { err = -ENXIO; goto escan; } @@ -1508,7 +1531,7 @@ static int __devinit mxcnd_probe(struct platform_device *pdev) this->ecc.layout = host->devtype_data->ecclayout_4k; if (this->ecc.mode == NAND_ECC_HW) { - if (nfc_is_v1()) + if (is_imx21_nfc(host) || is_imx27_nfc(host)) this->ecc.strength = 1; else this->ecc.strength = (host->eccsize == 4) ? 4 : 8; @@ -1555,6 +1578,7 @@ static struct platform_driver mxcnd_driver = { .owner = THIS_MODULE, .of_match_table = of_match_ptr(mxcnd_dt_ids), }, + .id_table = mxcnd_devtype, .probe = mxcnd_probe, .remove = __devexit_p(mxcnd_remove), }; diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c index c65295dded39..6e5bdd1a31d9 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c @@ -1702,7 +1702,7 @@ static int bnx2x_set_eee(struct net_device *dev, struct ethtool_eee *edata) SHMEM_EEE_ADV_STATUS_SHIFT); if ((advertised != (eee_cfg & SHMEM_EEE_ADV_STATUS_MASK))) { DP(BNX2X_MSG_ETHTOOL, - "Direct manipulation of EEE advertisment is not supported\n"); + "Direct manipulation of EEE advertisement is not supported\n"); return -EINVAL; } diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c index 6dd0dd076cc5..f6cfdc6cf20f 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c @@ -9941,7 +9941,7 @@ static int bnx2x_848x3_config_init(struct bnx2x_phy *phy, else rc = bnx2x_8483x_disable_eee(phy, params, vars); if (rc) { - DP(NETIF_MSG_LINK, "Failed to set EEE advertisment\n"); + DP(NETIF_MSG_LINK, "Failed to set EEE advertisement\n"); return rc; } } else { @@ -12987,7 +12987,7 @@ static u8 bnx2x_analyze_link_error(struct link_params *params, DP(NETIF_MSG_LINK, "Analyze TX Fault\n"); break; default: - DP(NETIF_MSG_LINK, "Analyze UNKOWN\n"); + DP(NETIF_MSG_LINK, "Analyze UNKNOWN\n"); } DP(NETIF_MSG_LINK, "Link changed:[%x %x]->%x\n", vars->link_up, old_status, status); diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c index 32eec15fe4c2..730ae2cfa49e 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c +++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c @@ -2519,6 +2519,7 @@ int t4_fw_bye(struct adapter *adap, unsigned int mbox) { struct fw_bye_cmd c; + memset(&c, 0, sizeof(c)); INIT_CMD(c, BYE, WRITE); return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL); } @@ -2535,6 +2536,7 @@ int t4_early_init(struct adapter *adap, unsigned int mbox) { struct fw_initialize_cmd c; + memset(&c, 0, sizeof(c)); INIT_CMD(c, INITIALIZE, WRITE); return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL); } @@ -2551,6 +2553,7 @@ int t4_fw_reset(struct adapter *adap, unsigned int mbox, int reset) { struct fw_reset_cmd c; + memset(&c, 0, sizeof(c)); INIT_CMD(c, RESET, WRITE); c.val = htonl(reset); return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL); @@ -2828,7 +2831,7 @@ int t4_fixup_host_params(struct adapter *adap, unsigned int page_size, HOSTPAGESIZEPF7(sge_hps)); t4_set_reg_field(adap, SGE_CONTROL, - INGPADBOUNDARY(INGPADBOUNDARY_MASK) | + INGPADBOUNDARY_MASK | EGRSTATUSPAGESIZE_MASK, INGPADBOUNDARY(fl_align_log - 5) | EGRSTATUSPAGESIZE(stat_len != 64)); @@ -3278,6 +3281,7 @@ int t4_identify_port(struct adapter *adap, unsigned int mbox, unsigned int viid, { struct fw_vi_enable_cmd c; + memset(&c, 0, sizeof(c)); c.op_to_viid = htonl(FW_CMD_OP(FW_VI_ENABLE_CMD) | FW_CMD_REQUEST | FW_CMD_EXEC | FW_VI_ENABLE_CMD_VIID(viid)); c.ien_to_len16 = htonl(FW_VI_ENABLE_CMD_LED | FW_LEN16(c)); diff --git a/drivers/net/ethernet/freescale/gianfar.c b/drivers/net/ethernet/freescale/gianfar.c index 1d03dcdd5e56..19ac096cb07b 100644 --- a/drivers/net/ethernet/freescale/gianfar.c +++ b/drivers/net/ethernet/freescale/gianfar.c @@ -1353,8 +1353,11 @@ static int gfar_restore(struct device *dev) struct gfar_private *priv = dev_get_drvdata(dev); struct net_device *ndev = priv->ndev; - if (!netif_running(ndev)) + if (!netif_running(ndev)) { + netif_device_attach(ndev); + return 0; + } gfar_init_bds(ndev); init_registers(ndev); diff --git a/drivers/net/ethernet/jme.c b/drivers/net/ethernet/jme.c index f8064df10cc4..92317e9c0f73 100644 --- a/drivers/net/ethernet/jme.c +++ b/drivers/net/ethernet/jme.c @@ -1948,10 +1948,10 @@ jme_close(struct net_device *netdev) JME_NAPI_DISABLE(jme); - tasklet_disable(&jme->linkch_task); - tasklet_disable(&jme->txclean_task); - tasklet_disable(&jme->rxclean_task); - tasklet_disable(&jme->rxempty_task); + tasklet_kill(&jme->linkch_task); + tasklet_kill(&jme->txclean_task); + tasklet_kill(&jme->rxclean_task); + tasklet_kill(&jme->rxempty_task); jme_disable_rx_engine(jme); jme_disable_tx_engine(jme); diff --git a/drivers/net/ethernet/marvell/skge.c b/drivers/net/ethernet/marvell/skge.c index 9b9c2ac5c4c2..d19a143aa5a8 100644 --- a/drivers/net/ethernet/marvell/skge.c +++ b/drivers/net/ethernet/marvell/skge.c @@ -4026,7 +4026,7 @@ static void __devexit skge_remove(struct pci_dev *pdev) dev0 = hw->dev[0]; unregister_netdev(dev0); - tasklet_disable(&hw->phy_task); + tasklet_kill(&hw->phy_task); spin_lock_irq(&hw->hw_lock); hw->intr_mask = 0; diff --git a/drivers/net/ethernet/micrel/ksz884x.c b/drivers/net/ethernet/micrel/ksz884x.c index 318fee91c79d..e558edd1cb6c 100644 --- a/drivers/net/ethernet/micrel/ksz884x.c +++ b/drivers/net/ethernet/micrel/ksz884x.c @@ -5407,8 +5407,8 @@ static int netdev_close(struct net_device *dev) /* Delay for receive task to stop scheduling itself. */ msleep(2000 / HZ); - tasklet_disable(&hw_priv->rx_tasklet); - tasklet_disable(&hw_priv->tx_tasklet); + tasklet_kill(&hw_priv->rx_tasklet); + tasklet_kill(&hw_priv->tx_tasklet); free_irq(dev->irq, hw_priv->dev); transmit_cleanup(hw_priv, 0); diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c index e7ff886e8047..927aa33d4349 100644 --- a/drivers/net/ethernet/realtek/r8169.c +++ b/drivers/net/ethernet/realtek/r8169.c @@ -3827,6 +3827,8 @@ static void rtl_wol_suspend_quirk(struct rtl8169_private *tp) void __iomem *ioaddr = tp->mmio_addr; switch (tp->mac_version) { + case RTL_GIGA_MAC_VER_25: + case RTL_GIGA_MAC_VER_26: case RTL_GIGA_MAC_VER_29: case RTL_GIGA_MAC_VER_30: case RTL_GIGA_MAC_VER_32: @@ -4519,6 +4521,9 @@ static void rtl_set_rx_mode(struct net_device *dev) mc_filter[1] = swab32(data); } + if (tp->mac_version == RTL_GIGA_MAC_VER_35) + mc_filter[1] = mc_filter[0] = 0xffffffff; + RTL_W32(MAR0 + 4, mc_filter[1]); RTL_W32(MAR0 + 0, mc_filter[0]); diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c index 0793299bd39e..1d04754a6637 100644 --- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c +++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c @@ -990,7 +990,7 @@ static int axienet_stop(struct net_device *ndev) axienet_setoptions(ndev, lp->options & ~(XAE_OPTION_TXEN | XAE_OPTION_RXEN)); - tasklet_disable(&lp->dma_err_tasklet); + tasklet_kill(&lp->dma_err_tasklet); free_irq(lp->tx_irq, ndev); free_irq(lp->rx_irq, ndev); diff --git a/drivers/net/usb/cdc_eem.c b/drivers/net/usb/cdc_eem.c index c81e278629ff..08d55b6bf272 100644 --- a/drivers/net/usb/cdc_eem.c +++ b/drivers/net/usb/cdc_eem.c @@ -31,6 +31,7 @@ #include <linux/usb/cdc.h> #include <linux/usb/usbnet.h> #include <linux/gfp.h> +#include <linux/if_vlan.h> /* @@ -92,7 +93,7 @@ static int eem_bind(struct usbnet *dev, struct usb_interface *intf) /* no jumbogram (16K) support for now */ - dev->net->hard_header_len += EEM_HEAD + ETH_FCS_LEN; + dev->net->hard_header_len += EEM_HEAD + ETH_FCS_LEN + VLAN_HLEN; dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len; return 0; diff --git a/drivers/net/usb/smsc95xx.c b/drivers/net/usb/smsc95xx.c index 7479a5761d0d..3286166415b4 100644 --- a/drivers/net/usb/smsc95xx.c +++ b/drivers/net/usb/smsc95xx.c @@ -1344,6 +1344,7 @@ static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev, } else { u32 csum_preamble = smsc95xx_calc_csum_preamble(skb); skb_push(skb, 4); + cpu_to_le32s(&csum_preamble); memcpy(skb->data, &csum_preamble, 4); } } diff --git a/drivers/net/usb/usbnet.c b/drivers/net/usb/usbnet.c index cb04f900cc46..edb81ed06950 100644 --- a/drivers/net/usb/usbnet.c +++ b/drivers/net/usb/usbnet.c @@ -359,10 +359,12 @@ static enum skb_state defer_bh(struct usbnet *dev, struct sk_buff *skb, void usbnet_defer_kevent (struct usbnet *dev, int work) { set_bit (work, &dev->flags); - if (!schedule_work (&dev->kevent)) - netdev_err(dev->net, "kevent %d may have been dropped\n", work); - else + if (!schedule_work (&dev->kevent)) { + if (net_ratelimit()) + netdev_err(dev->net, "kevent %d may have been dropped\n", work); + } else { netdev_dbg(dev->net, "kevent %d scheduled\n", work); + } } EXPORT_SYMBOL_GPL(usbnet_defer_kevent); diff --git a/drivers/net/wireless/b43legacy/pio.c b/drivers/net/wireless/b43legacy/pio.c index 192251adf986..282eedec675e 100644 --- a/drivers/net/wireless/b43legacy/pio.c +++ b/drivers/net/wireless/b43legacy/pio.c @@ -382,7 +382,7 @@ static void cancel_transfers(struct b43legacy_pioqueue *queue) { struct b43legacy_pio_txpacket *packet, *tmp_packet; - tasklet_disable(&queue->txtask); + tasklet_kill(&queue->txtask); list_for_each_entry_safe(packet, tmp_packet, &queue->txrunning, list) free_txpacket(packet, 0); diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c index 6241fd05bd41..a543746fb354 100644 --- a/drivers/pci/bus.c +++ b/drivers/pci/bus.c @@ -320,10 +320,7 @@ void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), } else next = dev->bus_list.next; - /* Run device routines with the device locked */ - device_lock(&dev->dev); retval = cb(dev, userdata); - device_unlock(&dev->dev); if (retval) break; } diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c index 94c6e2aa03d6..6c94fc9489e7 100644 --- a/drivers/pci/pci-driver.c +++ b/drivers/pci/pci-driver.c @@ -398,6 +398,8 @@ static void pci_device_shutdown(struct device *dev) struct pci_dev *pci_dev = to_pci_dev(dev); struct pci_driver *drv = pci_dev->driver; + pm_runtime_resume(dev); + if (drv && drv->shutdown) drv->shutdown(pci_dev); pci_msi_shutdown(pci_dev); @@ -408,16 +410,6 @@ static void pci_device_shutdown(struct device *dev) * continue to do DMA */ pci_disable_device(pci_dev); - - /* - * Devices may be enabled to wake up by runtime PM, but they need not - * be supposed to wake up the system from its "power off" state (e.g. - * ACPI S5). Therefore disable wakeup for all devices that aren't - * supposed to wake up the system at this point. The state argument - * will be ignored by pci_enable_wake(). - */ - if (!device_may_wakeup(dev)) - pci_enable_wake(pci_dev, PCI_UNKNOWN, false); } #ifdef CONFIG_PM diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c index 02d107b15281..f39378d9da15 100644 --- a/drivers/pci/pci-sysfs.c +++ b/drivers/pci/pci-sysfs.c @@ -458,40 +458,6 @@ boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf) } struct device_attribute vga_attr = __ATTR_RO(boot_vga); -static void -pci_config_pm_runtime_get(struct pci_dev *pdev) -{ - struct device *dev = &pdev->dev; - struct device *parent = dev->parent; - - if (parent) - pm_runtime_get_sync(parent); - pm_runtime_get_noresume(dev); - /* - * pdev->current_state is set to PCI_D3cold during suspending, - * so wait until suspending completes - */ - pm_runtime_barrier(dev); - /* - * Only need to resume devices in D3cold, because config - * registers are still accessible for devices suspended but - * not in D3cold. - */ - if (pdev->current_state == PCI_D3cold) - pm_runtime_resume(dev); -} - -static void -pci_config_pm_runtime_put(struct pci_dev *pdev) -{ - struct device *dev = &pdev->dev; - struct device *parent = dev->parent; - - pm_runtime_put(dev); - if (parent) - pm_runtime_put_sync(parent); -} - static ssize_t pci_read_config(struct file *filp, struct kobject *kobj, struct bin_attribute *bin_attr, diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 54858838f098..aabf64798bda 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -1858,6 +1858,38 @@ bool pci_dev_run_wake(struct pci_dev *dev) } EXPORT_SYMBOL_GPL(pci_dev_run_wake); +void pci_config_pm_runtime_get(struct pci_dev *pdev) +{ + struct device *dev = &pdev->dev; + struct device *parent = dev->parent; + + if (parent) + pm_runtime_get_sync(parent); + pm_runtime_get_noresume(dev); + /* + * pdev->current_state is set to PCI_D3cold during suspending, + * so wait until suspending completes + */ + pm_runtime_barrier(dev); + /* + * Only need to resume devices in D3cold, because config + * registers are still accessible for devices suspended but + * not in D3cold. + */ + if (pdev->current_state == PCI_D3cold) + pm_runtime_resume(dev); +} + +void pci_config_pm_runtime_put(struct pci_dev *pdev) +{ + struct device *dev = &pdev->dev; + struct device *parent = dev->parent; + + pm_runtime_put(dev); + if (parent) + pm_runtime_put_sync(parent); +} + /** * pci_pm_init - Initialize PM functions of given PCI device * @dev: PCI device to handle. diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index bacbcba69cf3..fd92aab9904b 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -72,6 +72,8 @@ extern void pci_disable_enabled_device(struct pci_dev *dev); extern int pci_finish_runtime_suspend(struct pci_dev *dev); extern int __pci_pme_wakeup(struct pci_dev *dev, void *ign); extern void pci_wakeup_bus(struct pci_bus *bus); +extern void pci_config_pm_runtime_get(struct pci_dev *dev); +extern void pci_config_pm_runtime_put(struct pci_dev *dev); extern void pci_pm_init(struct pci_dev *dev); extern void platform_pci_wakeup_init(struct pci_dev *dev); extern void pci_allocate_cap_save_buffers(struct pci_dev *dev); diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c index 06bad96af415..af4e31cd3a3b 100644 --- a/drivers/pci/pcie/aer/aerdrv_core.c +++ b/drivers/pci/pcie/aer/aerdrv_core.c @@ -213,6 +213,7 @@ static int report_error_detected(struct pci_dev *dev, void *data) struct aer_broadcast_data *result_data; result_data = (struct aer_broadcast_data *) data; + device_lock(&dev->dev); dev->error_state = result_data->state; if (!dev->driver || @@ -231,12 +232,14 @@ static int report_error_detected(struct pci_dev *dev, void *data) dev->driver ? "no AER-aware driver" : "no driver"); } - return 0; + goto out; } err_handler = dev->driver->err_handler; vote = err_handler->error_detected(dev, result_data->state); result_data->result = merge_result(result_data->result, vote); +out: + device_unlock(&dev->dev); return 0; } @@ -247,14 +250,17 @@ static int report_mmio_enabled(struct pci_dev *dev, void *data) struct aer_broadcast_data *result_data; result_data = (struct aer_broadcast_data *) data; + device_lock(&dev->dev); if (!dev->driver || !dev->driver->err_handler || !dev->driver->err_handler->mmio_enabled) - return 0; + goto out; err_handler = dev->driver->err_handler; vote = err_handler->mmio_enabled(dev); result_data->result = merge_result(result_data->result, vote); +out: + device_unlock(&dev->dev); return 0; } @@ -265,14 +271,17 @@ static int report_slot_reset(struct pci_dev *dev, void *data) struct aer_broadcast_data *result_data; result_data = (struct aer_broadcast_data *) data; + device_lock(&dev->dev); if (!dev->driver || !dev->driver->err_handler || !dev->driver->err_handler->slot_reset) - return 0; + goto out; err_handler = dev->driver->err_handler; vote = err_handler->slot_reset(dev); result_data->result = merge_result(result_data->result, vote); +out: + device_unlock(&dev->dev); return 0; } @@ -280,15 +289,18 @@ static int report_resume(struct pci_dev *dev, void *data) { const struct pci_error_handlers *err_handler; + device_lock(&dev->dev); dev->error_state = pci_channel_io_normal; if (!dev->driver || !dev->driver->err_handler || !dev->driver->err_handler->resume) - return 0; + goto out; err_handler = dev->driver->err_handler; err_handler->resume(dev); +out: + device_unlock(&dev->dev); return 0; } diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c index d03a7a39b2d8..ed129b414624 100644 --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c @@ -272,7 +272,8 @@ static int get_port_device_capability(struct pci_dev *dev) } /* Hot-Plug Capable */ - if (cap_mask & PCIE_PORT_SERVICE_HP) { + if ((cap_mask & PCIE_PORT_SERVICE_HP) && + dev->pcie_flags_reg & PCI_EXP_FLAGS_SLOT) { pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, ®32); if (reg32 & PCI_EXP_SLTCAP_HPC) { services |= PCIE_PORT_SERVICE_HP; diff --git a/drivers/pci/proc.c b/drivers/pci/proc.c index eb907a8faf2a..9b8505ccc56d 100644 --- a/drivers/pci/proc.c +++ b/drivers/pci/proc.c @@ -76,6 +76,8 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp if (!access_ok(VERIFY_WRITE, buf, cnt)) return -EINVAL; + pci_config_pm_runtime_get(dev); + if ((pos & 1) && cnt) { unsigned char val; pci_user_read_config_byte(dev, pos, &val); @@ -121,6 +123,8 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp cnt--; } + pci_config_pm_runtime_put(dev); + *ppos = pos; return nbytes; } @@ -146,6 +150,8 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof if (!access_ok(VERIFY_READ, buf, cnt)) return -EINVAL; + pci_config_pm_runtime_get(dev); + if ((pos & 1) && cnt) { unsigned char val; __get_user(val, buf); @@ -191,6 +197,8 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof cnt--; } + pci_config_pm_runtime_put(dev); + *ppos = pos; i_size_write(ino, dp->size); return nbytes; diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 7bf914df6e91..d96caefd914a 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -179,11 +179,13 @@ config PINCTRL_COH901 config PINCTRL_SAMSUNG bool "Samsung pinctrl driver" + depends on OF && GPIOLIB select PINMUX select PINCONF config PINCTRL_EXYNOS4 bool "Pinctrl driver data for Exynos4 SoC" + depends on OF && GPIOLIB select PINCTRL_SAMSUNG config PINCTRL_MVEBU diff --git a/drivers/pinctrl/spear/pinctrl-spear.c b/drivers/pinctrl/spear/pinctrl-spear.c index 5d4f44f462f0..b1fd6ee33c6c 100644 --- a/drivers/pinctrl/spear/pinctrl-spear.c +++ b/drivers/pinctrl/spear/pinctrl-spear.c @@ -244,7 +244,7 @@ static int spear_pinctrl_endisable(struct pinctrl_dev *pctldev, else temp = ~muxreg->val; - val |= temp; + val |= muxreg->mask & temp; pmx_writel(pmx, val, muxreg->reg); } } diff --git a/drivers/pinctrl/spear/pinctrl-spear1310.c b/drivers/pinctrl/spear/pinctrl-spear1310.c index d6cca8c81b92..0436fc7895d6 100644 --- a/drivers/pinctrl/spear/pinctrl-spear1310.c +++ b/drivers/pinctrl/spear/pinctrl-spear1310.c @@ -25,8 +25,8 @@ static const struct pinctrl_pin_desc spear1310_pins[] = { }; /* registers */ -#define PERIP_CFG 0x32C - #define MCIF_SEL_SHIFT 3 +#define PERIP_CFG 0x3B0 + #define MCIF_SEL_SHIFT 5 #define MCIF_SEL_SD (0x1 << MCIF_SEL_SHIFT) #define MCIF_SEL_CF (0x2 << MCIF_SEL_SHIFT) #define MCIF_SEL_XD (0x3 << MCIF_SEL_SHIFT) @@ -164,6 +164,10 @@ static const struct pinctrl_pin_desc spear1310_pins[] = { #define PMX_SSP0_CS0_MASK (1 << 29) #define PMX_SSP0_CS1_2_MASK (1 << 30) +#define PAD_DIRECTION_SEL_0 0x65C +#define PAD_DIRECTION_SEL_1 0x660 +#define PAD_DIRECTION_SEL_2 0x664 + /* combined macros */ #define PMX_GMII_MASK (PMX_GMIICLK_MASK | \ PMX_GMIICOL_CRS_XFERER_MIITXCLK_MASK | \ @@ -237,6 +241,10 @@ static struct spear_muxreg i2c0_muxreg[] = { .reg = PAD_FUNCTION_EN_0, .mask = PMX_I2C0_MASK, .val = PMX_I2C0_MASK, + }, { + .reg = PAD_DIRECTION_SEL_0, + .mask = PMX_I2C0_MASK, + .val = PMX_I2C0_MASK, }, }; @@ -269,6 +277,10 @@ static struct spear_muxreg ssp0_muxreg[] = { .reg = PAD_FUNCTION_EN_0, .mask = PMX_SSP0_MASK, .val = PMX_SSP0_MASK, + }, { + .reg = PAD_DIRECTION_SEL_0, + .mask = PMX_SSP0_MASK, + .val = PMX_SSP0_MASK, }, }; @@ -294,6 +306,10 @@ static struct spear_muxreg ssp0_cs0_muxreg[] = { .reg = PAD_FUNCTION_EN_2, .mask = PMX_SSP0_CS0_MASK, .val = PMX_SSP0_CS0_MASK, + }, { + .reg = PAD_DIRECTION_SEL_2, + .mask = PMX_SSP0_CS0_MASK, + .val = PMX_SSP0_CS0_MASK, }, }; @@ -319,6 +335,10 @@ static struct spear_muxreg ssp0_cs1_2_muxreg[] = { .reg = PAD_FUNCTION_EN_2, .mask = PMX_SSP0_CS1_2_MASK, .val = PMX_SSP0_CS1_2_MASK, + }, { + .reg = PAD_DIRECTION_SEL_2, + .mask = PMX_SSP0_CS1_2_MASK, + .val = PMX_SSP0_CS1_2_MASK, }, }; @@ -352,6 +372,10 @@ static struct spear_muxreg i2s0_muxreg[] = { .reg = PAD_FUNCTION_EN_0, .mask = PMX_I2S0_MASK, .val = PMX_I2S0_MASK, + }, { + .reg = PAD_DIRECTION_SEL_0, + .mask = PMX_I2S0_MASK, + .val = PMX_I2S0_MASK, }, }; @@ -384,6 +408,10 @@ static struct spear_muxreg i2s1_muxreg[] = { .reg = PAD_FUNCTION_EN_1, .mask = PMX_I2S1_MASK, .val = PMX_I2S1_MASK, + }, { + .reg = PAD_DIRECTION_SEL_1, + .mask = PMX_I2S1_MASK, + .val = PMX_I2S1_MASK, }, }; @@ -418,6 +446,10 @@ static struct spear_muxreg clcd_muxreg[] = { .reg = PAD_FUNCTION_EN_0, .mask = PMX_CLCD1_MASK, .val = PMX_CLCD1_MASK, + }, { + .reg = PAD_DIRECTION_SEL_0, + .mask = PMX_CLCD1_MASK, + .val = PMX_CLCD1_MASK, }, }; @@ -443,6 +475,10 @@ static struct spear_muxreg clcd_high_res_muxreg[] = { .reg = PAD_FUNCTION_EN_1, .mask = PMX_CLCD2_MASK, .val = PMX_CLCD2_MASK, + }, { + .reg = PAD_DIRECTION_SEL_1, + .mask = PMX_CLCD2_MASK, + .val = PMX_CLCD2_MASK, }, }; @@ -461,7 +497,7 @@ static struct spear_pingroup clcd_high_res_pingroup = { .nmodemuxs = ARRAY_SIZE(clcd_high_res_modemux), }; -static const char *const clcd_grps[] = { "clcd_grp", "clcd_high_res" }; +static const char *const clcd_grps[] = { "clcd_grp", "clcd_high_res_grp" }; static struct spear_function clcd_function = { .name = "clcd", .groups = clcd_grps, @@ -479,6 +515,14 @@ static struct spear_muxreg arm_gpio_muxreg[] = { .reg = PAD_FUNCTION_EN_1, .mask = PMX_EGPIO_1_GRP_MASK, .val = PMX_EGPIO_1_GRP_MASK, + }, { + .reg = PAD_DIRECTION_SEL_0, + .mask = PMX_EGPIO_0_GRP_MASK, + .val = PMX_EGPIO_0_GRP_MASK, + }, { + .reg = PAD_DIRECTION_SEL_1, + .mask = PMX_EGPIO_1_GRP_MASK, + .val = PMX_EGPIO_1_GRP_MASK, }, }; @@ -511,6 +555,10 @@ static struct spear_muxreg smi_2_chips_muxreg[] = { .reg = PAD_FUNCTION_EN_0, .mask = PMX_SMI_MASK, .val = PMX_SMI_MASK, + }, { + .reg = PAD_DIRECTION_SEL_0, + .mask = PMX_SMI_MASK, + .val = PMX_SMI_MASK, }, }; @@ -539,6 +587,14 @@ static struct spear_muxreg smi_4_chips_muxreg[] = { .reg = PAD_FUNCTION_EN_1, .mask = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK, .val = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK, + }, { + .reg = PAD_DIRECTION_SEL_0, + .mask = PMX_SMI_MASK, + .val = PMX_SMI_MASK, + }, { + .reg = PAD_DIRECTION_SEL_1, + .mask = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK, + .val = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK, }, }; @@ -573,6 +629,10 @@ static struct spear_muxreg gmii_muxreg[] = { .reg = PAD_FUNCTION_EN_0, .mask = PMX_GMII_MASK, .val = PMX_GMII_MASK, + }, { + .reg = PAD_DIRECTION_SEL_0, + .mask = PMX_GMII_MASK, + .val = PMX_GMII_MASK, }, }; @@ -615,6 +675,18 @@ static struct spear_muxreg rgmii_muxreg[] = { .reg = PAD_FUNCTION_EN_2, .mask = PMX_RGMII_REG2_MASK, .val = 0, + }, { + .reg = PAD_DIRECTION_SEL_0, + .mask = PMX_RGMII_REG0_MASK, + .val = PMX_RGMII_REG0_MASK, + }, { + .reg = PAD_DIRECTION_SEL_1, + .mask = PMX_RGMII_REG1_MASK, + .val = PMX_RGMII_REG1_MASK, + }, { + .reg = PAD_DIRECTION_SEL_2, + .mask = PMX_RGMII_REG2_MASK, + .val = PMX_RGMII_REG2_MASK, }, }; @@ -649,6 +721,10 @@ static struct spear_muxreg smii_0_1_2_muxreg[] = { .reg = PAD_FUNCTION_EN_1, .mask = PMX_SMII_0_1_2_MASK, .val = 0, + }, { + .reg = PAD_DIRECTION_SEL_1, + .mask = PMX_SMII_0_1_2_MASK, + .val = PMX_SMII_0_1_2_MASK, }, }; @@ -681,6 +757,10 @@ static struct spear_muxreg ras_mii_txclk_muxreg[] = { .reg = PAD_FUNCTION_EN_1, .mask = PMX_NFCE2_MASK, .val = 0, + }, { + .reg = PAD_DIRECTION_SEL_1, + .mask = PMX_NFCE2_MASK, + .val = PMX_NFCE2_MASK, }, }; @@ -721,6 +801,14 @@ static struct spear_muxreg nand_8bit_muxreg[] = { .reg = PAD_FUNCTION_EN_1, .mask = PMX_NAND8BIT_1_MASK, .val = PMX_NAND8BIT_1_MASK, + }, { + .reg = PAD_DIRECTION_SEL_0, + .mask = PMX_NAND8BIT_0_MASK, + .val = PMX_NAND8BIT_0_MASK, + }, { + .reg = PAD_DIRECTION_SEL_1, + .mask = PMX_NAND8BIT_1_MASK, + .val = PMX_NAND8BIT_1_MASK, }, }; @@ -747,6 +835,10 @@ static struct spear_muxreg nand_16bit_muxreg[] = { .reg = PAD_FUNCTION_EN_1, .mask = PMX_NAND16BIT_1_MASK, .val = PMX_NAND16BIT_1_MASK, + }, { + .reg = PAD_DIRECTION_SEL_1, + .mask = PMX_NAND16BIT_1_MASK, + .val = PMX_NAND16BIT_1_MASK, }, }; @@ -772,6 +864,10 @@ static struct spear_muxreg nand_4_chips_muxreg[] = { .reg = PAD_FUNCTION_EN_1, .mask = PMX_NAND_4CHIPS_MASK, .val = PMX_NAND_4CHIPS_MASK, + }, { + .reg = PAD_DIRECTION_SEL_1, + .mask = PMX_NAND_4CHIPS_MASK, + .val = PMX_NAND_4CHIPS_MASK, }, }; @@ -833,6 +929,10 @@ static struct spear_muxreg keyboard_rowcol6_8_muxreg[] = { .reg = PAD_FUNCTION_EN_1, .mask = PMX_KBD_ROWCOL68_MASK, .val = PMX_KBD_ROWCOL68_MASK, + }, { + .reg = PAD_DIRECTION_SEL_1, + .mask = PMX_KBD_ROWCOL68_MASK, + .val = PMX_KBD_ROWCOL68_MASK, }, }; @@ -866,6 +966,10 @@ static struct spear_muxreg uart0_muxreg[] = { .reg = PAD_FUNCTION_EN_0, .mask = PMX_UART0_MASK, .val = PMX_UART0_MASK, + }, { + .reg = PAD_DIRECTION_SEL_0, + .mask = PMX_UART0_MASK, + .val = PMX_UART0_MASK, }, }; @@ -891,6 +995,10 @@ static struct spear_muxreg uart0_modem_muxreg[] = { .reg = PAD_FUNCTION_EN_1, .mask = PMX_UART0_MODEM_MASK, .val = PMX_UART0_MODEM_MASK, + }, { + .reg = PAD_DIRECTION_SEL_1, + .mask = PMX_UART0_MODEM_MASK, + .val = PMX_UART0_MODEM_MASK, }, }; @@ -923,6 +1031,10 @@ static struct spear_muxreg gpt0_tmr0_muxreg[] = { .reg = PAD_FUNCTION_EN_1, .mask = PMX_GPT0_TMR0_MASK, .val = PMX_GPT0_TMR0_MASK, + }, { + .reg = PAD_DIRECTION_SEL_1, + .mask = PMX_GPT0_TMR0_MASK, + .val = PMX_GPT0_TMR0_MASK, }, }; @@ -948,6 +1060,10 @@ static struct spear_muxreg gpt0_tmr1_muxreg[] = { .reg = PAD_FUNCTION_EN_1, .mask = PMX_GPT0_TMR1_MASK, .val = PMX_GPT0_TMR1_MASK, + }, { + .reg = PAD_DIRECTION_SEL_1, + .mask = PMX_GPT0_TMR1_MASK, + .val = PMX_GPT0_TMR1_MASK, }, }; @@ -980,6 +1096,10 @@ static struct spear_muxreg gpt1_tmr0_muxreg[] = { .reg = PAD_FUNCTION_EN_1, .mask = PMX_GPT1_TMR0_MASK, .val = PMX_GPT1_TMR0_MASK, + }, { + .reg = PAD_DIRECTION_SEL_1, + .mask = PMX_GPT1_TMR0_MASK, + .val = PMX_GPT1_TMR0_MASK, }, }; @@ -1005,6 +1125,10 @@ static struct spear_muxreg gpt1_tmr1_muxreg[] = { .reg = PAD_FUNCTION_EN_1, .mask = PMX_GPT1_TMR1_MASK, .val = PMX_GPT1_TMR1_MASK, + }, { + .reg = PAD_DIRECTION_SEL_1, + .mask = PMX_GPT1_TMR1_MASK, + .val = PMX_GPT1_TMR1_MASK, }, }; @@ -1049,6 +1173,20 @@ static const unsigned mcif_pins[] = { 86, 87, 88, 89, 90, 91, 92, 93, 213, 214, .reg = PAD_FUNCTION_EN_2, \ .mask = PMX_MCIFALL_2_MASK, \ .val = PMX_MCIFALL_2_MASK, \ + }, { \ + .reg = PAD_DIRECTION_SEL_0, \ + .mask = PMX_MCI_DATA8_15_MASK, \ + .val = PMX_MCI_DATA8_15_MASK, \ + }, { \ + .reg = PAD_DIRECTION_SEL_1, \ + .mask = PMX_MCIFALL_1_MASK | PMX_NFWPRT1_MASK | \ + PMX_NFWPRT2_MASK, \ + .val = PMX_MCIFALL_1_MASK | PMX_NFWPRT1_MASK | \ + PMX_NFWPRT2_MASK, \ + }, { \ + .reg = PAD_DIRECTION_SEL_2, \ + .mask = PMX_MCIFALL_2_MASK, \ + .val = PMX_MCIFALL_2_MASK, \ } /* sdhci device */ @@ -1154,6 +1292,10 @@ static struct spear_muxreg touch_xy_muxreg[] = { .reg = PAD_FUNCTION_EN_2, .mask = PMX_TOUCH_XY_MASK, .val = PMX_TOUCH_XY_MASK, + }, { + .reg = PAD_DIRECTION_SEL_2, + .mask = PMX_TOUCH_XY_MASK, + .val = PMX_TOUCH_XY_MASK, }, }; @@ -1187,6 +1329,10 @@ static struct spear_muxreg uart1_dis_i2c_muxreg[] = { .reg = PAD_FUNCTION_EN_0, .mask = PMX_I2C0_MASK, .val = 0, + }, { + .reg = PAD_DIRECTION_SEL_0, + .mask = PMX_I2C0_MASK, + .val = PMX_I2C0_MASK, }, }; @@ -1213,6 +1359,12 @@ static struct spear_muxreg uart1_dis_sd_muxreg[] = { .mask = PMX_MCIDATA1_MASK | PMX_MCIDATA2_MASK, .val = 0, + }, { + .reg = PAD_DIRECTION_SEL_1, + .mask = PMX_MCIDATA1_MASK | + PMX_MCIDATA2_MASK, + .val = PMX_MCIDATA1_MASK | + PMX_MCIDATA2_MASK, }, }; @@ -1246,6 +1398,10 @@ static struct spear_muxreg uart2_3_muxreg[] = { .reg = PAD_FUNCTION_EN_0, .mask = PMX_I2S0_MASK, .val = 0, + }, { + .reg = PAD_DIRECTION_SEL_0, + .mask = PMX_I2S0_MASK, + .val = PMX_I2S0_MASK, }, }; @@ -1278,6 +1434,10 @@ static struct spear_muxreg uart4_muxreg[] = { .reg = PAD_FUNCTION_EN_0, .mask = PMX_I2S0_MASK | PMX_CLCD1_MASK, .val = 0, + }, { + .reg = PAD_DIRECTION_SEL_0, + .mask = PMX_I2S0_MASK | PMX_CLCD1_MASK, + .val = PMX_I2S0_MASK | PMX_CLCD1_MASK, }, }; @@ -1310,6 +1470,10 @@ static struct spear_muxreg uart5_muxreg[] = { .reg = PAD_FUNCTION_EN_0, .mask = PMX_CLCD1_MASK, .val = 0, + }, { + .reg = PAD_DIRECTION_SEL_0, + .mask = PMX_CLCD1_MASK, + .val = PMX_CLCD1_MASK, }, }; @@ -1344,6 +1508,10 @@ static struct spear_muxreg rs485_0_1_tdm_0_1_muxreg[] = { .reg = PAD_FUNCTION_EN_0, .mask = PMX_CLCD1_MASK, .val = 0, + }, { + .reg = PAD_DIRECTION_SEL_0, + .mask = PMX_CLCD1_MASK, + .val = PMX_CLCD1_MASK, }, }; @@ -1376,6 +1544,10 @@ static struct spear_muxreg i2c_1_2_muxreg[] = { .reg = PAD_FUNCTION_EN_0, .mask = PMX_CLCD1_MASK, .val = 0, + }, { + .reg = PAD_DIRECTION_SEL_0, + .mask = PMX_CLCD1_MASK, + .val = PMX_CLCD1_MASK, }, }; @@ -1409,6 +1581,10 @@ static struct spear_muxreg i2c3_dis_smi_clcd_muxreg[] = { .reg = PAD_FUNCTION_EN_0, .mask = PMX_CLCD1_MASK | PMX_SMI_MASK, .val = 0, + }, { + .reg = PAD_DIRECTION_SEL_0, + .mask = PMX_CLCD1_MASK | PMX_SMI_MASK, + .val = PMX_CLCD1_MASK | PMX_SMI_MASK, }, }; @@ -1435,6 +1611,10 @@ static struct spear_muxreg i2c3_dis_sd_i2s0_muxreg[] = { .reg = PAD_FUNCTION_EN_1, .mask = PMX_I2S1_MASK | PMX_MCIDATA3_MASK, .val = 0, + }, { + .reg = PAD_DIRECTION_SEL_1, + .mask = PMX_I2S1_MASK | PMX_MCIDATA3_MASK, + .val = PMX_I2S1_MASK | PMX_MCIDATA3_MASK, }, }; @@ -1469,6 +1649,10 @@ static struct spear_muxreg i2c_4_5_dis_smi_muxreg[] = { .reg = PAD_FUNCTION_EN_0, .mask = PMX_SMI_MASK, .val = 0, + }, { + .reg = PAD_DIRECTION_SEL_0, + .mask = PMX_SMI_MASK, + .val = PMX_SMI_MASK, }, }; @@ -1499,6 +1683,14 @@ static struct spear_muxreg i2c4_dis_sd_muxreg[] = { .reg = PAD_FUNCTION_EN_2, .mask = PMX_MCIDATA5_MASK, .val = 0, + }, { + .reg = PAD_DIRECTION_SEL_1, + .mask = PMX_MCIDATA4_MASK, + .val = PMX_MCIDATA4_MASK, + }, { + .reg = PAD_DIRECTION_SEL_2, + .mask = PMX_MCIDATA5_MASK, + .val = PMX_MCIDATA5_MASK, }, }; @@ -1526,6 +1718,12 @@ static struct spear_muxreg i2c5_dis_sd_muxreg[] = { .mask = PMX_MCIDATA6_MASK | PMX_MCIDATA7_MASK, .val = 0, + }, { + .reg = PAD_DIRECTION_SEL_2, + .mask = PMX_MCIDATA6_MASK | + PMX_MCIDATA7_MASK, + .val = PMX_MCIDATA6_MASK | + PMX_MCIDATA7_MASK, }, }; @@ -1560,6 +1758,10 @@ static struct spear_muxreg i2c_6_7_dis_kbd_muxreg[] = { .reg = PAD_FUNCTION_EN_1, .mask = PMX_KBD_ROWCOL25_MASK, .val = 0, + }, { + .reg = PAD_DIRECTION_SEL_1, + .mask = PMX_KBD_ROWCOL25_MASK, + .val = PMX_KBD_ROWCOL25_MASK, }, }; @@ -1587,6 +1789,12 @@ static struct spear_muxreg i2c6_dis_sd_muxreg[] = { .mask = PMX_MCIIORDRE_MASK | PMX_MCIIOWRWE_MASK, .val = 0, + }, { + .reg = PAD_DIRECTION_SEL_2, + .mask = PMX_MCIIORDRE_MASK | + PMX_MCIIOWRWE_MASK, + .val = PMX_MCIIORDRE_MASK | + PMX_MCIIOWRWE_MASK, }, }; @@ -1613,6 +1821,12 @@ static struct spear_muxreg i2c7_dis_sd_muxreg[] = { .mask = PMX_MCIRESETCF_MASK | PMX_MCICS0CE_MASK, .val = 0, + }, { + .reg = PAD_DIRECTION_SEL_2, + .mask = PMX_MCIRESETCF_MASK | + PMX_MCICS0CE_MASK, + .val = PMX_MCIRESETCF_MASK | + PMX_MCICS0CE_MASK, }, }; @@ -1651,6 +1865,14 @@ static struct spear_muxreg can0_dis_nor_muxreg[] = { .reg = PAD_FUNCTION_EN_1, .mask = PMX_NFRSTPWDWN3_MASK, .val = 0, + }, { + .reg = PAD_DIRECTION_SEL_0, + .mask = PMX_NFRSTPWDWN2_MASK, + .val = PMX_NFRSTPWDWN2_MASK, + }, { + .reg = PAD_DIRECTION_SEL_1, + .mask = PMX_NFRSTPWDWN3_MASK, + .val = PMX_NFRSTPWDWN3_MASK, }, }; @@ -1677,6 +1899,10 @@ static struct spear_muxreg can0_dis_sd_muxreg[] = { .reg = PAD_FUNCTION_EN_2, .mask = PMX_MCICFINTR_MASK | PMX_MCIIORDY_MASK, .val = 0, + }, { + .reg = PAD_DIRECTION_SEL_2, + .mask = PMX_MCICFINTR_MASK | PMX_MCIIORDY_MASK, + .val = PMX_MCICFINTR_MASK | PMX_MCIIORDY_MASK, }, }; @@ -1711,6 +1937,10 @@ static struct spear_muxreg can1_dis_sd_muxreg[] = { .reg = PAD_FUNCTION_EN_2, .mask = PMX_MCICS1_MASK | PMX_MCIDMAACK_MASK, .val = 0, + }, { + .reg = PAD_DIRECTION_SEL_2, + .mask = PMX_MCICS1_MASK | PMX_MCIDMAACK_MASK, + .val = PMX_MCICS1_MASK | PMX_MCIDMAACK_MASK, }, }; @@ -1737,6 +1967,10 @@ static struct spear_muxreg can1_dis_kbd_muxreg[] = { .reg = PAD_FUNCTION_EN_1, .mask = PMX_KBD_ROWCOL25_MASK, .val = 0, + }, { + .reg = PAD_DIRECTION_SEL_1, + .mask = PMX_KBD_ROWCOL25_MASK, + .val = PMX_KBD_ROWCOL25_MASK, }, }; @@ -1763,29 +1997,64 @@ static struct spear_function can1_function = { .ngroups = ARRAY_SIZE(can1_grps), }; -/* Pad multiplexing for pci device */ -static const unsigned pci_sata_pins[] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 18, +/* Pad multiplexing for (ras-ip) pci device */ +static const unsigned pci_pins[] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99 }; -#define PCI_SATA_MUXREG \ - { \ - .reg = PAD_FUNCTION_EN_0, \ - .mask = PMX_MCI_DATA8_15_MASK, \ - .val = 0, \ - }, { \ - .reg = PAD_FUNCTION_EN_1, \ - .mask = PMX_PCI_REG1_MASK, \ - .val = 0, \ - }, { \ - .reg = PAD_FUNCTION_EN_2, \ - .mask = PMX_PCI_REG2_MASK, \ - .val = 0, \ - } -/* pad multiplexing for pcie0 device */ +static struct spear_muxreg pci_muxreg[] = { + { + .reg = PAD_FUNCTION_EN_0, + .mask = PMX_MCI_DATA8_15_MASK, + .val = 0, + }, { + .reg = PAD_FUNCTION_EN_1, + .mask = PMX_PCI_REG1_MASK, + .val = 0, + }, { + .reg = PAD_FUNCTION_EN_2, + .mask = PMX_PCI_REG2_MASK, + .val = 0, + }, { + .reg = PAD_DIRECTION_SEL_0, + .mask = PMX_MCI_DATA8_15_MASK, + .val = PMX_MCI_DATA8_15_MASK, + }, { + .reg = PAD_DIRECTION_SEL_1, + .mask = PMX_PCI_REG1_MASK, + .val = PMX_PCI_REG1_MASK, + }, { + .reg = PAD_DIRECTION_SEL_2, + .mask = PMX_PCI_REG2_MASK, + .val = PMX_PCI_REG2_MASK, + }, +}; + +static struct spear_modemux pci_modemux[] = { + { + .muxregs = pci_muxreg, + .nmuxregs = ARRAY_SIZE(pci_muxreg), + }, +}; + +static struct spear_pingroup pci_pingroup = { + .name = "pci_grp", + .pins = pci_pins, + .npins = ARRAY_SIZE(pci_pins), + .modemuxs = pci_modemux, + .nmodemuxs = ARRAY_SIZE(pci_modemux), +}; + +static const char *const pci_grps[] = { "pci_grp" }; +static struct spear_function pci_function = { + .name = "pci", + .groups = pci_grps, + .ngroups = ARRAY_SIZE(pci_grps), +}; + +/* pad multiplexing for (fix-part) pcie0 device */ static struct spear_muxreg pcie0_muxreg[] = { - PCI_SATA_MUXREG, { .reg = PCIE_SATA_CFG, .mask = PCIE_CFG_VAL(0), @@ -1802,15 +2071,12 @@ static struct spear_modemux pcie0_modemux[] = { static struct spear_pingroup pcie0_pingroup = { .name = "pcie0_grp", - .pins = pci_sata_pins, - .npins = ARRAY_SIZE(pci_sata_pins), .modemuxs = pcie0_modemux, .nmodemuxs = ARRAY_SIZE(pcie0_modemux), }; -/* pad multiplexing for pcie1 device */ +/* pad multiplexing for (fix-part) pcie1 device */ static struct spear_muxreg pcie1_muxreg[] = { - PCI_SATA_MUXREG, { .reg = PCIE_SATA_CFG, .mask = PCIE_CFG_VAL(1), @@ -1827,15 +2093,12 @@ static struct spear_modemux pcie1_modemux[] = { static struct spear_pingroup pcie1_pingroup = { .name = "pcie1_grp", - .pins = pci_sata_pins, - .npins = ARRAY_SIZE(pci_sata_pins), .modemuxs = pcie1_modemux, .nmodemuxs = ARRAY_SIZE(pcie1_modemux), }; -/* pad multiplexing for pcie2 device */ +/* pad multiplexing for (fix-part) pcie2 device */ static struct spear_muxreg pcie2_muxreg[] = { - PCI_SATA_MUXREG, { .reg = PCIE_SATA_CFG, .mask = PCIE_CFG_VAL(2), @@ -1852,22 +2115,20 @@ static struct spear_modemux pcie2_modemux[] = { static struct spear_pingroup pcie2_pingroup = { .name = "pcie2_grp", - .pins = pci_sata_pins, - .npins = ARRAY_SIZE(pci_sata_pins), .modemuxs = pcie2_modemux, .nmodemuxs = ARRAY_SIZE(pcie2_modemux), }; -static const char *const pci_grps[] = { "pcie0_grp", "pcie1_grp", "pcie2_grp" }; -static struct spear_function pci_function = { - .name = "pci", - .groups = pci_grps, - .ngroups = ARRAY_SIZE(pci_grps), +static const char *const pcie_grps[] = { "pcie0_grp", "pcie1_grp", "pcie2_grp" +}; +static struct spear_function pcie_function = { + .name = "pci_express", + .groups = pcie_grps, + .ngroups = ARRAY_SIZE(pcie_grps), }; /* pad multiplexing for sata0 device */ static struct spear_muxreg sata0_muxreg[] = { - PCI_SATA_MUXREG, { .reg = PCIE_SATA_CFG, .mask = SATA_CFG_VAL(0), @@ -1884,15 +2145,12 @@ static struct spear_modemux sata0_modemux[] = { static struct spear_pingroup sata0_pingroup = { .name = "sata0_grp", - .pins = pci_sata_pins, - .npins = ARRAY_SIZE(pci_sata_pins), .modemuxs = sata0_modemux, .nmodemuxs = ARRAY_SIZE(sata0_modemux), }; /* pad multiplexing for sata1 device */ static struct spear_muxreg sata1_muxreg[] = { - PCI_SATA_MUXREG, { .reg = PCIE_SATA_CFG, .mask = SATA_CFG_VAL(1), @@ -1909,15 +2167,12 @@ static struct spear_modemux sata1_modemux[] = { static struct spear_pingroup sata1_pingroup = { .name = "sata1_grp", - .pins = pci_sata_pins, - .npins = ARRAY_SIZE(pci_sata_pins), .modemuxs = sata1_modemux, .nmodemuxs = ARRAY_SIZE(sata1_modemux), }; /* pad multiplexing for sata2 device */ static struct spear_muxreg sata2_muxreg[] = { - PCI_SATA_MUXREG, { .reg = PCIE_SATA_CFG, .mask = SATA_CFG_VAL(2), @@ -1934,8 +2189,6 @@ static struct spear_modemux sata2_modemux[] = { static struct spear_pingroup sata2_pingroup = { .name = "sata2_grp", - .pins = pci_sata_pins, - .npins = ARRAY_SIZE(pci_sata_pins), .modemuxs = sata2_modemux, .nmodemuxs = ARRAY_SIZE(sata2_modemux), }; @@ -1957,6 +2210,14 @@ static struct spear_muxreg ssp1_dis_kbd_muxreg[] = { PMX_KBD_COL0_MASK | PMX_NFIO8_15_MASK | PMX_NFCE1_MASK | PMX_NFCE2_MASK, .val = 0, + }, { + .reg = PAD_DIRECTION_SEL_1, + .mask = PMX_KBD_ROWCOL25_MASK | PMX_KBD_COL1_MASK | + PMX_KBD_COL0_MASK | PMX_NFIO8_15_MASK | PMX_NFCE1_MASK | + PMX_NFCE2_MASK, + .val = PMX_KBD_ROWCOL25_MASK | PMX_KBD_COL1_MASK | + PMX_KBD_COL0_MASK | PMX_NFIO8_15_MASK | PMX_NFCE1_MASK | + PMX_NFCE2_MASK, }, }; @@ -1983,6 +2244,12 @@ static struct spear_muxreg ssp1_dis_sd_muxreg[] = { .mask = PMX_MCIADDR0ALE_MASK | PMX_MCIADDR2_MASK | PMX_MCICECF_MASK | PMX_MCICEXD_MASK, .val = 0, + }, { + .reg = PAD_DIRECTION_SEL_2, + .mask = PMX_MCIADDR0ALE_MASK | PMX_MCIADDR2_MASK | + PMX_MCICECF_MASK | PMX_MCICEXD_MASK, + .val = PMX_MCIADDR0ALE_MASK | PMX_MCIADDR2_MASK | + PMX_MCICECF_MASK | PMX_MCICEXD_MASK, }, }; @@ -2017,6 +2284,12 @@ static struct spear_muxreg gpt64_muxreg[] = { .mask = PMX_MCICDCF1_MASK | PMX_MCICDCF2_MASK | PMX_MCICDXD_MASK | PMX_MCILEDS_MASK, .val = 0, + }, { + .reg = PAD_DIRECTION_SEL_2, + .mask = PMX_MCICDCF1_MASK | PMX_MCICDCF2_MASK | PMX_MCICDXD_MASK + | PMX_MCILEDS_MASK, + .val = PMX_MCICDCF1_MASK | PMX_MCICDCF2_MASK | PMX_MCICDXD_MASK + | PMX_MCILEDS_MASK, }, }; @@ -2093,6 +2366,7 @@ static struct spear_pingroup *spear1310_pingroups[] = { &can0_dis_sd_pingroup, &can1_dis_sd_pingroup, &can1_dis_kbd_pingroup, + &pci_pingroup, &pcie0_pingroup, &pcie1_pingroup, &pcie2_pingroup, @@ -2138,6 +2412,7 @@ static struct spear_function *spear1310_functions[] = { &can0_function, &can1_function, &pci_function, + &pcie_function, &sata_function, &ssp1_function, &gpt64_function, diff --git a/drivers/pinctrl/spear/pinctrl-spear1340.c b/drivers/pinctrl/spear/pinctrl-spear1340.c index a0eb057e55bd..0606b8cf3f2c 100644 --- a/drivers/pinctrl/spear/pinctrl-spear1340.c +++ b/drivers/pinctrl/spear/pinctrl-spear1340.c @@ -213,7 +213,7 @@ static const struct pinctrl_pin_desc spear1340_pins[] = { * Pad multiplexing for making all pads as gpio's. This is done to override the * values passed from bootloader and start from scratch. */ -static const unsigned pads_as_gpio_pins[] = { 251 }; +static const unsigned pads_as_gpio_pins[] = { 12, 88, 89, 251 }; static struct spear_muxreg pads_as_gpio_muxreg[] = { { .reg = PAD_FUNCTION_EN_1, @@ -1692,7 +1692,43 @@ static struct spear_pingroup clcd_pingroup = { .nmodemuxs = ARRAY_SIZE(clcd_modemux), }; -static const char *const clcd_grps[] = { "clcd_grp" }; +/* Disable cld runtime to save panel damage */ +static struct spear_muxreg clcd_sleep_muxreg[] = { + { + .reg = PAD_SHARED_IP_EN_1, + .mask = ARM_TRACE_MASK | MIPHY_DBG_MASK, + .val = 0, + }, { + .reg = PAD_FUNCTION_EN_5, + .mask = CLCD_REG4_MASK | CLCD_AND_ARM_TRACE_REG4_MASK, + .val = 0x0, + }, { + .reg = PAD_FUNCTION_EN_6, + .mask = CLCD_AND_ARM_TRACE_REG5_MASK, + .val = 0x0, + }, { + .reg = PAD_FUNCTION_EN_7, + .mask = CLCD_AND_ARM_TRACE_REG6_MASK, + .val = 0x0, + }, +}; + +static struct spear_modemux clcd_sleep_modemux[] = { + { + .muxregs = clcd_sleep_muxreg, + .nmuxregs = ARRAY_SIZE(clcd_sleep_muxreg), + }, +}; + +static struct spear_pingroup clcd_sleep_pingroup = { + .name = "clcd_sleep_grp", + .pins = clcd_pins, + .npins = ARRAY_SIZE(clcd_pins), + .modemuxs = clcd_sleep_modemux, + .nmodemuxs = ARRAY_SIZE(clcd_sleep_modemux), +}; + +static const char *const clcd_grps[] = { "clcd_grp", "clcd_sleep_grp" }; static struct spear_function clcd_function = { .name = "clcd", .groups = clcd_grps, @@ -1893,6 +1929,7 @@ static struct spear_pingroup *spear1340_pingroups[] = { &sdhci_pingroup, &cf_pingroup, &xd_pingroup, + &clcd_sleep_pingroup, &clcd_pingroup, &arm_trace_pingroup, &miphy_dbg_pingroup, diff --git a/drivers/pinctrl/spear/pinctrl-spear320.c b/drivers/pinctrl/spear/pinctrl-spear320.c index 020b1e0bdb3e..ca47b0e50780 100644 --- a/drivers/pinctrl/spear/pinctrl-spear320.c +++ b/drivers/pinctrl/spear/pinctrl-spear320.c @@ -2240,6 +2240,10 @@ static struct spear_muxreg pwm2_pin_34_muxreg[] = { .mask = PMX_SSP_CS_MASK, .val = 0, }, { + .reg = MODE_CONFIG_REG, + .mask = PMX_PWM_MASK, + .val = PMX_PWM_MASK, + }, { .reg = IP_SEL_PAD_30_39_REG, .mask = PMX_PL_34_MASK, .val = PMX_PWM2_PL_34_VAL, @@ -2956,9 +2960,9 @@ static struct spear_function mii2_function = { }; /* Pad multiplexing for cadence mii 1_2 as smii or rmii device */ -static const unsigned smii0_1_pins[] = { 10, 11, 13, 14, 15, 16, 17, 18, 19, 20, +static const unsigned rmii0_1_pins[] = { 10, 11, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27 }; -static const unsigned rmii0_1_pins[] = { 10, 11, 21, 22, 23, 24, 25, 26, 27 }; +static const unsigned smii0_1_pins[] = { 10, 11, 21, 22, 23, 24, 25, 26, 27 }; static struct spear_muxreg mii0_1_muxreg[] = { { .reg = PMX_CONFIG_REG, diff --git a/drivers/pinctrl/spear/pinctrl-spear3xx.h b/drivers/pinctrl/spear/pinctrl-spear3xx.h index 31f44347f17c..7860b36053c4 100644 --- a/drivers/pinctrl/spear/pinctrl-spear3xx.h +++ b/drivers/pinctrl/spear/pinctrl-spear3xx.h @@ -15,6 +15,7 @@ #include "pinctrl-spear.h" /* pad mux declarations */ +#define PMX_PWM_MASK (1 << 16) #define PMX_FIRDA_MASK (1 << 14) #define PMX_I2C_MASK (1 << 13) #define PMX_SSP_CS_MASK (1 << 12) diff --git a/drivers/rtc/rtc-mxc.c b/drivers/rtc/rtc-mxc.c index cd0106293a49..7304139934aa 100644 --- a/drivers/rtc/rtc-mxc.c +++ b/drivers/rtc/rtc-mxc.c @@ -17,8 +17,6 @@ #include <linux/platform_device.h> #include <linux/clk.h> -#include <mach/hardware.h> - #define RTC_INPUT_CLK_32768HZ (0x00 << 5) #define RTC_INPUT_CLK_32000HZ (0x01 << 5) #define RTC_INPUT_CLK_38400HZ (0x02 << 5) @@ -72,14 +70,38 @@ static const u32 PIE_BIT_DEF[MAX_PIE_NUM][2] = { #define RTC_TEST2 0x2C /* 32bit rtc test reg 2 */ #define RTC_TEST3 0x30 /* 32bit rtc test reg 3 */ +enum imx_rtc_type { + IMX1_RTC, + IMX21_RTC, +}; + struct rtc_plat_data { struct rtc_device *rtc; void __iomem *ioaddr; int irq; struct clk *clk; struct rtc_time g_rtc_alarm; + enum imx_rtc_type devtype; }; +static struct platform_device_id imx_rtc_devtype[] = { + { + .name = "imx1-rtc", + .driver_data = IMX1_RTC, + }, { + .name = "imx21-rtc", + .driver_data = IMX21_RTC, + }, { + /* sentinel */ + } +}; +MODULE_DEVICE_TABLE(platform, imx_rtc_devtype); + +static inline int is_imx1_rtc(struct rtc_plat_data *data) +{ + return data->devtype == IMX1_RTC; +} + /* * This function is used to obtain the RTC time or the alarm value in * second. @@ -278,10 +300,13 @@ static int mxc_rtc_read_time(struct device *dev, struct rtc_time *tm) */ static int mxc_rtc_set_mmss(struct device *dev, unsigned long time) { + struct platform_device *pdev = to_platform_device(dev); + struct rtc_plat_data *pdata = platform_get_drvdata(pdev); + /* * TTC_DAYR register is 9-bit in MX1 SoC, save time and day of year only */ - if (cpu_is_mx1()) { + if (is_imx1_rtc(pdata)) { struct rtc_time tm; rtc_time_to_tm(time, &tm); @@ -360,6 +385,8 @@ static int __devinit mxc_rtc_probe(struct platform_device *pdev) if (!pdata) return -ENOMEM; + pdata->devtype = pdev->id_entry->driver_data; + if (!devm_request_mem_region(&pdev->dev, res->start, resource_size(res), pdev->name)) return -EBUSY; @@ -480,6 +507,7 @@ static struct platform_driver mxc_rtc_driver = { #endif .owner = THIS_MODULE, }, + .id_table = imx_rtc_devtype, .probe = mxc_rtc_probe, .remove = __devexit_p(mxc_rtc_remove), }; diff --git a/drivers/s390/cio/css.h b/drivers/s390/cio/css.h index 33bb4d891e16..4af3dfe70ef5 100644 --- a/drivers/s390/cio/css.h +++ b/drivers/s390/cio/css.h @@ -112,9 +112,6 @@ extern int for_each_subchannel(int(*fn)(struct subchannel_id, void *), void *); extern void css_reiterate_subchannels(void); void css_update_ssd_info(struct subchannel *sch); -#define __MAX_SUBCHANNEL 65535 -#define __MAX_SSID 3 - struct channel_subsystem { u8 cssid; int valid; diff --git a/drivers/s390/cio/device.c b/drivers/s390/cio/device.c index fc916f5d7314..fd3143c291c6 100644 --- a/drivers/s390/cio/device.c +++ b/drivers/s390/cio/device.c @@ -1424,7 +1424,7 @@ static enum io_sch_action sch_get_action(struct subchannel *sch) } if (device_is_disconnected(cdev)) return IO_SCH_REPROBE; - if (cdev->online) + if (cdev->online && !cdev->private->flags.resuming) return IO_SCH_VERIFY; if (cdev->private->state == DEV_STATE_NOT_OPER) return IO_SCH_UNREG_ATTACH; @@ -1469,12 +1469,6 @@ static int io_subchannel_sch_event(struct subchannel *sch, int process) rc = 0; goto out_unlock; case IO_SCH_VERIFY: - if (cdev->private->flags.resuming == 1) { - if (cio_enable_subchannel(sch, (u32)(addr_t)sch)) { - ccw_device_set_notoper(cdev); - break; - } - } /* Trigger path verification. */ io_subchannel_verify(sch); rc = 0; diff --git a/drivers/s390/cio/idset.c b/drivers/s390/cio/idset.c index 199bc6791177..65d13e38803f 100644 --- a/drivers/s390/cio/idset.c +++ b/drivers/s390/cio/idset.c @@ -125,8 +125,7 @@ int idset_is_empty(struct idset *set) void idset_add_set(struct idset *to, struct idset *from) { - int len = min(__BITOPS_WORDS(to->num_ssid * to->num_id), - __BITOPS_WORDS(from->num_ssid * from->num_id)); + int len = min(to->num_ssid * to->num_id, from->num_ssid * from->num_id); bitmap_or(to->bitmap, to->bitmap, from->bitmap, len); } diff --git a/drivers/scsi/qlogicpti.c b/drivers/scsi/qlogicpti.c index b191dd549207..71fddbc60f18 100644 --- a/drivers/scsi/qlogicpti.c +++ b/drivers/scsi/qlogicpti.c @@ -1294,26 +1294,19 @@ static struct scsi_host_template qpti_template = { static const struct of_device_id qpti_match[]; static int __devinit qpti_sbus_probe(struct platform_device *op) { - const struct of_device_id *match; - struct scsi_host_template *tpnt; struct device_node *dp = op->dev.of_node; struct Scsi_Host *host; struct qlogicpti *qpti; static int nqptis; const char *fcode; - match = of_match_device(qpti_match, &op->dev); - if (!match) - return -EINVAL; - tpnt = match->data; - /* Sometimes Antares cards come up not completely * setup, and we get a report of a zero IRQ. */ if (op->archdata.irqs[0] == 0) return -ENODEV; - host = scsi_host_alloc(tpnt, sizeof(struct qlogicpti)); + host = scsi_host_alloc(&qpti_template, sizeof(struct qlogicpti)); if (!host) return -ENOMEM; @@ -1445,19 +1438,15 @@ static int __devexit qpti_sbus_remove(struct platform_device *op) static const struct of_device_id qpti_match[] = { { .name = "ptisp", - .data = &qpti_template, }, { .name = "PTI,ptisp", - .data = &qpti_template, }, { .name = "QLGC,isp", - .data = &qpti_template, }, { .name = "SUNW,isp", - .data = &qpti_template, }, {}, }; diff --git a/drivers/usb/gadget/u_ether.c b/drivers/usb/gadget/u_ether.c index 6458764994ef..4ec3c0d7a18b 100644 --- a/drivers/usb/gadget/u_ether.c +++ b/drivers/usb/gadget/u_ether.c @@ -20,6 +20,7 @@ #include <linux/ctype.h> #include <linux/etherdevice.h> #include <linux/ethtool.h> +#include <linux/if_vlan.h> #include "u_ether.h" @@ -295,7 +296,7 @@ static void rx_complete(struct usb_ep *ep, struct usb_request *req) while (skb2) { if (status < 0 || ETH_HLEN > skb2->len - || skb2->len > ETH_FRAME_LEN) { + || skb2->len > VLAN_ETH_FRAME_LEN) { dev->net->stats.rx_errors++; dev->net->stats.rx_length_errors++; DBG(dev, "rx length %d\n", skb2->len); diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c index 4a08fc0b27c9..8e58a5fa1994 100644 --- a/drivers/usb/host/ehci-mxc.c +++ b/drivers/usb/host/ehci-mxc.c @@ -24,7 +24,6 @@ #include <linux/usb/ulpi.h> #include <linux/slab.h> -#include <mach/hardware.h> #include <linux/platform_data/usb-ehci-mxc.h> #include <asm/mach-types.h> diff --git a/drivers/video/imxfb.c b/drivers/video/imxfb.c index cf2688de0832..e501dbc966b3 100644 --- a/drivers/video/imxfb.c +++ b/drivers/video/imxfb.c @@ -33,7 +33,6 @@ #include <linux/math64.h> #include <linux/platform_data/video-imxfb.h> -#include <mach/hardware.h> /* * Complain if VAR is out of range. @@ -53,8 +52,8 @@ #define LCDC_SIZE 0x04 #define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20) -#define YMAX_MASK (cpu_is_mx1() ? 0x1ff : 0x3ff) -#define SIZE_YMAX(y) ((y) & YMAX_MASK) +#define YMAX_MASK_IMX1 0x1ff +#define YMAX_MASK_IMX21 0x3ff #define LCDC_VPW 0x08 #define VPW_VPW(x) ((x) & 0x3ff) @@ -128,12 +127,18 @@ struct imxfb_rgb { struct fb_bitfield transp; }; +enum imxfb_type { + IMX1_FB, + IMX21_FB, +}; + struct imxfb_info { struct platform_device *pdev; void __iomem *regs; struct clk *clk_ipg; struct clk *clk_ahb; struct clk *clk_per; + enum imxfb_type devtype; /* * These are the addresses we mapped @@ -168,6 +173,24 @@ struct imxfb_info { void (*backlight_power)(int); }; +static struct platform_device_id imxfb_devtype[] = { + { + .name = "imx1-fb", + .driver_data = IMX1_FB, + }, { + .name = "imx21-fb", + .driver_data = IMX21_FB, + }, { + /* sentinel */ + } +}; +MODULE_DEVICE_TABLE(platform, imxfb_devtype); + +static inline int is_imx1_fb(struct imxfb_info *fbi) +{ + return fbi->devtype == IMX1_FB; +} + #define IMX_NAME "IMX" /* @@ -366,7 +389,7 @@ static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) break; case 16: default: - if (cpu_is_mx1()) + if (is_imx1_fb(fbi)) pcr |= PCR_BPIX_12; else pcr |= PCR_BPIX_16; @@ -596,6 +619,7 @@ static struct fb_ops imxfb_ops = { static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *info) { struct imxfb_info *fbi = info->par; + u32 ymax_mask = is_imx1_fb(fbi) ? YMAX_MASK_IMX1 : YMAX_MASK_IMX21; pr_debug("var: xres=%d hslen=%d lm=%d rm=%d\n", var->xres, var->hsync_len, @@ -617,7 +641,7 @@ static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *inf if (var->right_margin > 255) printk(KERN_ERR "%s: invalid right_margin %d\n", info->fix.id, var->right_margin); - if (var->yres < 1 || var->yres > YMAX_MASK) + if (var->yres < 1 || var->yres > ymax_mask) printk(KERN_ERR "%s: invalid yres %d\n", info->fix.id, var->yres); if (var->vsync_len > 100) @@ -645,7 +669,7 @@ static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *inf VCR_V_WAIT_2(var->upper_margin), fbi->regs + LCDC_VCR); - writel(SIZE_XMAX(var->xres) | SIZE_YMAX(var->yres), + writel(SIZE_XMAX(var->xres) | (var->yres & ymax_mask), fbi->regs + LCDC_SIZE); writel(fbi->pcr, fbi->regs + LCDC_PCR); @@ -765,6 +789,7 @@ static int __init imxfb_probe(struct platform_device *pdev) return -ENOMEM; fbi = info->par; + fbi->devtype = pdev->id_entry->driver_data; if (!fb_mode) fb_mode = pdata->mode[0].mode.name; @@ -939,6 +964,7 @@ static struct platform_driver imxfb_driver = { .driver = { .name = DRIVER_NAME, }, + .id_table = imxfb_devtype, }; static int imxfb_setup(void) diff --git a/drivers/video/mx3fb.c b/drivers/video/mx3fb.c index ce1d452464ed..736887208574 100644 --- a/drivers/video/mx3fb.c +++ b/drivers/video/mx3fb.c @@ -26,10 +26,9 @@ #include <linux/console.h> #include <linux/clk.h> #include <linux/mutex.h> +#include <linux/dma/ipu-dma.h> #include <linux/platform_data/dma-imx.h> -#include <mach/hardware.h> -#include <mach/ipu.h> #include <linux/platform_data/video-mx3fb.h> #include <asm/io.h> diff --git a/drivers/virtio/virtio.c b/drivers/virtio/virtio.c index 1e8659ca27ef..809b0de59c09 100644 --- a/drivers/virtio/virtio.c +++ b/drivers/virtio/virtio.c @@ -225,8 +225,10 @@ EXPORT_SYMBOL_GPL(register_virtio_device); void unregister_virtio_device(struct virtio_device *dev) { + int index = dev->index; /* save for after device release */ + device_unregister(&dev->dev); - ida_simple_remove(&virtio_index_ida, dev->index); + ida_simple_remove(&virtio_index_ida, index); } EXPORT_SYMBOL_GPL(unregister_virtio_device); diff --git a/drivers/watchdog/imx2_wdt.c b/drivers/watchdog/imx2_wdt.c index bcfab2b00ad2..9a45d0294cf4 100644 --- a/drivers/watchdog/imx2_wdt.c +++ b/drivers/watchdog/imx2_wdt.c @@ -33,7 +33,6 @@ #include <linux/uaccess.h> #include <linux/timer.h> #include <linux/jiffies.h> -#include <mach/hardware.h> #define DRIVER_NAME "imx2-wdt" diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c index f5db18dbc0f9..477a1d47a64c 100644 --- a/drivers/watchdog/omap_wdt.c +++ b/drivers/watchdog/omap_wdt.c @@ -46,8 +46,8 @@ #include <linux/slab.h> #include <linux/pm_runtime.h> #include <mach/hardware.h> -#include <plat/cpu.h> -#include <plat/prcm.h> + +#include <linux/platform_data/omap-wd-timer.h> #include "omap_wdt.h" @@ -202,8 +202,10 @@ static ssize_t omap_wdt_write(struct file *file, const char __user *data, static long omap_wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg) { + struct omap_wd_timer_platform_data *pdata; struct omap_wdt_dev *wdev; - int new_margin; + u32 rs; + int new_margin, bs; static const struct watchdog_info ident = { .identity = "OMAP Watchdog", .options = WDIOF_SETTIMEOUT, @@ -211,6 +213,7 @@ static long omap_wdt_ioctl(struct file *file, unsigned int cmd, }; wdev = file->private_data; + pdata = wdev->dev->platform_data; switch (cmd) { case WDIOC_GETSUPPORT: @@ -219,17 +222,12 @@ static long omap_wdt_ioctl(struct file *file, unsigned int cmd, case WDIOC_GETSTATUS: return put_user(0, (int __user *)arg); case WDIOC_GETBOOTSTATUS: -#ifdef CONFIG_ARCH_OMAP1 - if (cpu_is_omap16xx()) - return put_user(__raw_readw(ARM_SYSST), - (int __user *)arg); -#endif -#ifdef CONFIG_ARCH_OMAP2PLUS - if (cpu_is_omap24xx()) - return put_user(omap_prcm_get_reset_sources(), - (int __user *)arg); -#endif - return put_user(0, (int __user *)arg); + if (!pdata || !pdata->read_reset_sources) + return put_user(0, (int __user *)arg); + rs = pdata->read_reset_sources(); + bs = (rs & (1 << OMAP_MPU_WD_RST_SRC_ID_SHIFT)) ? + WDIOF_CARDRESET : 0; + return put_user(bs, (int __user *)arg); case WDIOC_KEEPALIVE: spin_lock(&wdt_lock); omap_wdt_ping(wdev); diff --git a/drivers/xen/Makefile b/drivers/xen/Makefile index 0e8637035457..74354708c6c4 100644 --- a/drivers/xen/Makefile +++ b/drivers/xen/Makefile @@ -2,6 +2,7 @@ ifneq ($(CONFIG_ARM),y) obj-y += manage.o balloon.o obj-$(CONFIG_HOTPLUG_CPU) += cpu_hotplug.o endif +obj-$(CONFIG_X86) += fallback.o obj-y += grant-table.o features.o events.o obj-y += xenbus/ diff --git a/drivers/xen/events.c b/drivers/xen/events.c index 912ac81b6dbf..0be4df39e953 100644 --- a/drivers/xen/events.c +++ b/drivers/xen/events.c @@ -1395,10 +1395,10 @@ void xen_evtchn_do_upcall(struct pt_regs *regs) { struct pt_regs *old_regs = set_irq_regs(regs); + irq_enter(); #ifdef CONFIG_X86 exit_idle(); #endif - irq_enter(); __xen_evtchn_do_upcall(); diff --git a/drivers/xen/fallback.c b/drivers/xen/fallback.c new file mode 100644 index 000000000000..0ef7c4d40f86 --- /dev/null +++ b/drivers/xen/fallback.c @@ -0,0 +1,80 @@ +#include <linux/kernel.h> +#include <linux/string.h> +#include <linux/bug.h> +#include <linux/export.h> +#include <asm/hypervisor.h> +#include <asm/xen/hypercall.h> + +int xen_event_channel_op_compat(int cmd, void *arg) +{ + struct evtchn_op op; + int rc; + + op.cmd = cmd; + memcpy(&op.u, arg, sizeof(op.u)); + rc = _hypercall1(int, event_channel_op_compat, &op); + + switch (cmd) { + case EVTCHNOP_close: + case EVTCHNOP_send: + case EVTCHNOP_bind_vcpu: + case EVTCHNOP_unmask: + /* no output */ + break; + +#define COPY_BACK(eop) \ + case EVTCHNOP_##eop: \ + memcpy(arg, &op.u.eop, sizeof(op.u.eop)); \ + break + + COPY_BACK(bind_interdomain); + COPY_BACK(bind_virq); + COPY_BACK(bind_pirq); + COPY_BACK(status); + COPY_BACK(alloc_unbound); + COPY_BACK(bind_ipi); +#undef COPY_BACK + + default: + WARN_ON(rc != -ENOSYS); + break; + } + + return rc; +} +EXPORT_SYMBOL_GPL(xen_event_channel_op_compat); + +int HYPERVISOR_physdev_op_compat(int cmd, void *arg) +{ + struct physdev_op op; + int rc; + + op.cmd = cmd; + memcpy(&op.u, arg, sizeof(op.u)); + rc = _hypercall1(int, physdev_op_compat, &op); + + switch (cmd) { + case PHYSDEVOP_IRQ_UNMASK_NOTIFY: + case PHYSDEVOP_set_iopl: + case PHYSDEVOP_set_iobitmap: + case PHYSDEVOP_apic_write: + /* no output */ + break; + +#define COPY_BACK(pop, fld) \ + case PHYSDEVOP_##pop: \ + memcpy(arg, &op.u.fld, sizeof(op.u.fld)); \ + break + + COPY_BACK(irq_status_query, irq_status_query); + COPY_BACK(apic_read, apic_op); + COPY_BACK(ASSIGN_VECTOR, irq_op); +#undef COPY_BACK + + default: + WARN_ON(rc != -ENOSYS); + break; + } + + return rc; +} diff --git a/fs/cifs/cifsacl.c b/fs/cifs/cifsacl.c index fc783e264420..0fb15bbbe43c 100644 --- a/fs/cifs/cifsacl.c +++ b/fs/cifs/cifsacl.c @@ -225,6 +225,13 @@ sid_to_str(struct cifs_sid *sidptr, char *sidstr) } static void +cifs_copy_sid(struct cifs_sid *dst, const struct cifs_sid *src) +{ + memcpy(dst, src, sizeof(*dst)); + dst->num_subauth = min_t(u8, src->num_subauth, NUM_SUBAUTHS); +} + +static void id_rb_insert(struct rb_root *root, struct cifs_sid *sidptr, struct cifs_sid_id **psidid, char *typestr) { @@ -248,7 +255,7 @@ id_rb_insert(struct rb_root *root, struct cifs_sid *sidptr, } } - memcpy(&(*psidid)->sid, sidptr, sizeof(struct cifs_sid)); + cifs_copy_sid(&(*psidid)->sid, sidptr); (*psidid)->time = jiffies - (SID_MAP_RETRY + 1); (*psidid)->refcount = 0; @@ -354,7 +361,7 @@ id_to_sid(unsigned long cid, uint sidtype, struct cifs_sid *ssid) * any fields of the node after a reference is put . */ if (test_bit(SID_ID_MAPPED, &psidid->state)) { - memcpy(ssid, &psidid->sid, sizeof(struct cifs_sid)); + cifs_copy_sid(ssid, &psidid->sid); psidid->time = jiffies; /* update ts for accessing */ goto id_sid_out; } @@ -370,14 +377,14 @@ id_to_sid(unsigned long cid, uint sidtype, struct cifs_sid *ssid) if (IS_ERR(sidkey)) { rc = -EINVAL; cFYI(1, "%s: Can't map and id to a SID", __func__); + } else if (sidkey->datalen < sizeof(struct cifs_sid)) { + rc = -EIO; + cFYI(1, "%s: Downcall contained malformed key " + "(datalen=%hu)", __func__, sidkey->datalen); } else { lsid = (struct cifs_sid *)sidkey->payload.data; - memcpy(&psidid->sid, lsid, - sidkey->datalen < sizeof(struct cifs_sid) ? - sidkey->datalen : sizeof(struct cifs_sid)); - memcpy(ssid, &psidid->sid, - sidkey->datalen < sizeof(struct cifs_sid) ? - sidkey->datalen : sizeof(struct cifs_sid)); + cifs_copy_sid(&psidid->sid, lsid); + cifs_copy_sid(ssid, &psidid->sid); set_bit(SID_ID_MAPPED, &psidid->state); key_put(sidkey); kfree(psidid->sidstr); @@ -396,7 +403,7 @@ id_to_sid(unsigned long cid, uint sidtype, struct cifs_sid *ssid) return rc; } if (test_bit(SID_ID_MAPPED, &psidid->state)) - memcpy(ssid, &psidid->sid, sizeof(struct cifs_sid)); + cifs_copy_sid(ssid, &psidid->sid); else rc = -EINVAL; } @@ -675,8 +682,6 @@ int compare_sids(const struct cifs_sid *ctsid, const struct cifs_sid *cwsid) static void copy_sec_desc(const struct cifs_ntsd *pntsd, struct cifs_ntsd *pnntsd, __u32 sidsoffset) { - int i; - struct cifs_sid *owner_sid_ptr, *group_sid_ptr; struct cifs_sid *nowner_sid_ptr, *ngroup_sid_ptr; @@ -692,26 +697,14 @@ static void copy_sec_desc(const struct cifs_ntsd *pntsd, owner_sid_ptr = (struct cifs_sid *)((char *)pntsd + le32_to_cpu(pntsd->osidoffset)); nowner_sid_ptr = (struct cifs_sid *)((char *)pnntsd + sidsoffset); - - nowner_sid_ptr->revision = owner_sid_ptr->revision; - nowner_sid_ptr->num_subauth = owner_sid_ptr->num_subauth; - for (i = 0; i < 6; i++) - nowner_sid_ptr->authority[i] = owner_sid_ptr->authority[i]; - for (i = 0; i < 5; i++) - nowner_sid_ptr->sub_auth[i] = owner_sid_ptr->sub_auth[i]; + cifs_copy_sid(nowner_sid_ptr, owner_sid_ptr); /* copy group sid */ group_sid_ptr = (struct cifs_sid *)((char *)pntsd + le32_to_cpu(pntsd->gsidoffset)); ngroup_sid_ptr = (struct cifs_sid *)((char *)pnntsd + sidsoffset + sizeof(struct cifs_sid)); - - ngroup_sid_ptr->revision = group_sid_ptr->revision; - ngroup_sid_ptr->num_subauth = group_sid_ptr->num_subauth; - for (i = 0; i < 6; i++) - ngroup_sid_ptr->authority[i] = group_sid_ptr->authority[i]; - for (i = 0; i < 5; i++) - ngroup_sid_ptr->sub_auth[i] = group_sid_ptr->sub_auth[i]; + cifs_copy_sid(ngroup_sid_ptr, group_sid_ptr); return; } @@ -1120,8 +1113,7 @@ static int build_sec_desc(struct cifs_ntsd *pntsd, struct cifs_ntsd *pnntsd, kfree(nowner_sid_ptr); return rc; } - memcpy(owner_sid_ptr, nowner_sid_ptr, - sizeof(struct cifs_sid)); + cifs_copy_sid(owner_sid_ptr, nowner_sid_ptr); kfree(nowner_sid_ptr); *aclflag = CIFS_ACL_OWNER; } @@ -1139,8 +1131,7 @@ static int build_sec_desc(struct cifs_ntsd *pntsd, struct cifs_ntsd *pnntsd, kfree(ngroup_sid_ptr); return rc; } - memcpy(group_sid_ptr, ngroup_sid_ptr, - sizeof(struct cifs_sid)); + cifs_copy_sid(group_sid_ptr, ngroup_sid_ptr); kfree(ngroup_sid_ptr); *aclflag = CIFS_ACL_GROUP; } diff --git a/fs/cifs/dir.c b/fs/cifs/dir.c index 7c0a81283645..d3671f2acb29 100644 --- a/fs/cifs/dir.c +++ b/fs/cifs/dir.c @@ -398,7 +398,16 @@ cifs_atomic_open(struct inode *inode, struct dentry *direntry, * in network traffic in the other paths. */ if (!(oflags & O_CREAT)) { - struct dentry *res = cifs_lookup(inode, direntry, 0); + struct dentry *res; + + /* + * Check for hashed negative dentry. We have already revalidated + * the dentry and it is fine. No need to perform another lookup. + */ + if (!d_unhashed(direntry)) + return -ENOENT; + + res = cifs_lookup(inode, direntry, 0); if (IS_ERR(res)) return PTR_ERR(res); diff --git a/fs/eventpoll.c b/fs/eventpoll.c index da72250ddc1c..cd96649bfe62 100644 --- a/fs/eventpoll.c +++ b/fs/eventpoll.c @@ -346,7 +346,7 @@ static inline struct epitem *ep_item_from_epqueue(poll_table *p) /* Tells if the epoll_ctl(2) operation needs an event copy from userspace */ static inline int ep_op_has_event(int op) { - return op == EPOLL_CTL_ADD || op == EPOLL_CTL_MOD; + return op != EPOLL_CTL_DEL; } /* Initialize the poll safe wake up structure */ @@ -676,34 +676,6 @@ static int ep_remove(struct eventpoll *ep, struct epitem *epi) return 0; } -/* - * Disables a "struct epitem" in the eventpoll set. Returns -EBUSY if the item - * had no event flags set, indicating that another thread may be currently - * handling that item's events (in the case that EPOLLONESHOT was being - * used). Otherwise a zero result indicates that the item has been disabled - * from receiving events. A disabled item may be re-enabled via - * EPOLL_CTL_MOD. Must be called with "mtx" held. - */ -static int ep_disable(struct eventpoll *ep, struct epitem *epi) -{ - int result = 0; - unsigned long flags; - - spin_lock_irqsave(&ep->lock, flags); - if (epi->event.events & ~EP_PRIVATE_BITS) { - if (ep_is_linked(&epi->rdllink)) - list_del_init(&epi->rdllink); - /* Ensure ep_poll_callback will not add epi back onto ready - list: */ - epi->event.events &= EP_PRIVATE_BITS; - } - else - result = -EBUSY; - spin_unlock_irqrestore(&ep->lock, flags); - - return result; -} - static void ep_free(struct eventpoll *ep) { struct rb_node *rbp; @@ -1048,6 +1020,8 @@ static void ep_rbtree_insert(struct eventpoll *ep, struct epitem *epi) rb_insert_color(&epi->rbn, &ep->rbr); } + + #define PATH_ARR_SIZE 5 /* * These are the number paths of length 1 to 5, that we are allowing to emanate @@ -1813,12 +1787,6 @@ SYSCALL_DEFINE4(epoll_ctl, int, epfd, int, op, int, fd, } else error = -ENOENT; break; - case EPOLL_CTL_DISABLE: - if (epi) - error = ep_disable(ep, epi); - else - error = -ENOENT; - break; } mutex_unlock(&ep->mtx); diff --git a/fs/gfs2/file.c b/fs/gfs2/file.c index 0def0504afc1..e056b4ce4877 100644 --- a/fs/gfs2/file.c +++ b/fs/gfs2/file.c @@ -516,15 +516,13 @@ static int gfs2_mmap(struct file *file, struct vm_area_struct *vma) struct gfs2_holder i_gh; int error; - gfs2_holder_init(ip->i_gl, LM_ST_SHARED, LM_FLAG_ANY, &i_gh); - error = gfs2_glock_nq(&i_gh); - if (error == 0) { - file_accessed(file); - gfs2_glock_dq(&i_gh); - } - gfs2_holder_uninit(&i_gh); + error = gfs2_glock_nq_init(ip->i_gl, LM_ST_SHARED, LM_FLAG_ANY, + &i_gh); if (error) return error; + /* grab lock to update inode */ + gfs2_glock_dq_uninit(&i_gh); + file_accessed(file); } vma->vm_ops = &gfs2_vm_ops; @@ -677,10 +675,8 @@ static ssize_t gfs2_file_aio_write(struct kiocb *iocb, const struct iovec *iov, size_t writesize = iov_length(iov, nr_segs); struct dentry *dentry = file->f_dentry; struct gfs2_inode *ip = GFS2_I(dentry->d_inode); - struct gfs2_sbd *sdp; int ret; - sdp = GFS2_SB(file->f_mapping->host); ret = gfs2_rs_alloc(ip); if (ret) return ret; diff --git a/fs/gfs2/lops.c b/fs/gfs2/lops.c index 8ff95a2d54ee..9ceccb1595a3 100644 --- a/fs/gfs2/lops.c +++ b/fs/gfs2/lops.c @@ -393,12 +393,10 @@ static void buf_lo_add(struct gfs2_sbd *sdp, struct gfs2_bufdata *bd) struct gfs2_meta_header *mh; struct gfs2_trans *tr; - lock_buffer(bd->bd_bh); - gfs2_log_lock(sdp); tr = current->journal_info; tr->tr_touched = 1; if (!list_empty(&bd->bd_list)) - goto out; + return; set_bit(GLF_LFLUSH, &bd->bd_gl->gl_flags); set_bit(GLF_DIRTY, &bd->bd_gl->gl_flags); mh = (struct gfs2_meta_header *)bd->bd_bh->b_data; @@ -414,9 +412,6 @@ static void buf_lo_add(struct gfs2_sbd *sdp, struct gfs2_bufdata *bd) sdp->sd_log_num_buf++; list_add(&bd->bd_list, &sdp->sd_log_le_buf); tr->tr_num_buf_new++; -out: - gfs2_log_unlock(sdp); - unlock_buffer(bd->bd_bh); } static void gfs2_check_magic(struct buffer_head *bh) @@ -621,7 +616,6 @@ static void revoke_lo_add(struct gfs2_sbd *sdp, struct gfs2_bufdata *bd) static void revoke_lo_before_commit(struct gfs2_sbd *sdp) { - struct gfs2_log_descriptor *ld; struct gfs2_meta_header *mh; unsigned int offset; struct list_head *head = &sdp->sd_log_le_revoke; @@ -634,7 +628,6 @@ static void revoke_lo_before_commit(struct gfs2_sbd *sdp) length = gfs2_struct2blk(sdp, sdp->sd_log_num_revoke, sizeof(u64)); page = gfs2_get_log_desc(sdp, GFS2_LOG_DESC_REVOKE, length, sdp->sd_log_num_revoke); - ld = page_address(page); offset = sizeof(struct gfs2_log_descriptor); list_for_each_entry(bd, head, bd_list) { @@ -777,12 +770,10 @@ static void databuf_lo_add(struct gfs2_sbd *sdp, struct gfs2_bufdata *bd) struct address_space *mapping = bd->bd_bh->b_page->mapping; struct gfs2_inode *ip = GFS2_I(mapping->host); - lock_buffer(bd->bd_bh); - gfs2_log_lock(sdp); if (tr) tr->tr_touched = 1; if (!list_empty(&bd->bd_list)) - goto out; + return; set_bit(GLF_LFLUSH, &bd->bd_gl->gl_flags); set_bit(GLF_DIRTY, &bd->bd_gl->gl_flags); if (gfs2_is_jdata(ip)) { @@ -793,9 +784,6 @@ static void databuf_lo_add(struct gfs2_sbd *sdp, struct gfs2_bufdata *bd) } else { list_add_tail(&bd->bd_list, &sdp->sd_log_le_ordered); } -out: - gfs2_log_unlock(sdp); - unlock_buffer(bd->bd_bh); } /** diff --git a/fs/gfs2/quota.c b/fs/gfs2/quota.c index 40c4b0d42fa8..c5af8e18f27a 100644 --- a/fs/gfs2/quota.c +++ b/fs/gfs2/quota.c @@ -497,8 +497,11 @@ int gfs2_quota_hold(struct gfs2_inode *ip, u32 uid, u32 gid) struct gfs2_quota_data **qd; int error; - if (ip->i_res == NULL) - gfs2_rs_alloc(ip); + if (ip->i_res == NULL) { + error = gfs2_rs_alloc(ip); + if (error) + return error; + } qd = ip->i_res->rs_qa_qd; diff --git a/fs/gfs2/rgrp.c b/fs/gfs2/rgrp.c index 3cc402ce6fea..38fe18f2f055 100644 --- a/fs/gfs2/rgrp.c +++ b/fs/gfs2/rgrp.c @@ -553,7 +553,6 @@ void gfs2_free_clones(struct gfs2_rgrpd *rgd) */ int gfs2_rs_alloc(struct gfs2_inode *ip) { - int error = 0; struct gfs2_blkreserv *res; if (ip->i_res) @@ -561,7 +560,7 @@ int gfs2_rs_alloc(struct gfs2_inode *ip) res = kmem_cache_zalloc(gfs2_rsrv_cachep, GFP_NOFS); if (!res) - error = -ENOMEM; + return -ENOMEM; RB_CLEAR_NODE(&res->rs_node); @@ -571,7 +570,7 @@ int gfs2_rs_alloc(struct gfs2_inode *ip) else ip->i_res = res; up_write(&ip->i_rw_mutex); - return error; + return 0; } static void dump_rs(struct seq_file *seq, const struct gfs2_blkreserv *rs) @@ -1263,7 +1262,9 @@ int gfs2_fitrim(struct file *filp, void __user *argp) int ret = 0; u64 amt; u64 trimmed = 0; + u64 start, end, minlen; unsigned int x; + unsigned bs_shift = sdp->sd_sb.sb_bsize_shift; if (!capable(CAP_SYS_ADMIN)) return -EPERM; @@ -1271,19 +1272,25 @@ int gfs2_fitrim(struct file *filp, void __user *argp) if (!blk_queue_discard(q)) return -EOPNOTSUPP; - if (argp == NULL) { - r.start = 0; - r.len = ULLONG_MAX; - r.minlen = 0; - } else if (copy_from_user(&r, argp, sizeof(r))) + if (copy_from_user(&r, argp, sizeof(r))) return -EFAULT; ret = gfs2_rindex_update(sdp); if (ret) return ret; - rgd = gfs2_blk2rgrpd(sdp, r.start, 0); - rgd_end = gfs2_blk2rgrpd(sdp, r.start + r.len, 0); + start = r.start >> bs_shift; + end = start + (r.len >> bs_shift); + minlen = max_t(u64, r.minlen, + q->limits.discard_granularity) >> bs_shift; + + rgd = gfs2_blk2rgrpd(sdp, start, 0); + rgd_end = gfs2_blk2rgrpd(sdp, end - 1, 0); + + if (end <= start || + minlen > sdp->sd_max_rg_data || + start > rgd_end->rd_data0 + rgd_end->rd_data) + return -EINVAL; while (1) { @@ -1295,7 +1302,9 @@ int gfs2_fitrim(struct file *filp, void __user *argp) /* Trim each bitmap in the rgrp */ for (x = 0; x < rgd->rd_length; x++) { struct gfs2_bitmap *bi = rgd->rd_bits + x; - ret = gfs2_rgrp_send_discards(sdp, rgd->rd_data0, NULL, bi, r.minlen, &amt); + ret = gfs2_rgrp_send_discards(sdp, + rgd->rd_data0, NULL, bi, minlen, + &amt); if (ret) { gfs2_glock_dq_uninit(&gh); goto out; @@ -1324,7 +1333,7 @@ int gfs2_fitrim(struct file *filp, void __user *argp) out: r.len = trimmed << 9; - if (argp && copy_to_user(argp, &r, sizeof(r))) + if (copy_to_user(argp, &r, sizeof(r))) return -EFAULT; return ret; diff --git a/fs/gfs2/super.c b/fs/gfs2/super.c index bc737261f234..d6488674d916 100644 --- a/fs/gfs2/super.c +++ b/fs/gfs2/super.c @@ -810,7 +810,8 @@ static void gfs2_dirty_inode(struct inode *inode, int flags) return; } need_unlock = 1; - } + } else if (WARN_ON_ONCE(ip->i_gl->gl_state != LM_ST_EXCLUSIVE)) + return; if (current->journal_info == NULL) { ret = gfs2_trans_begin(sdp, RES_DINODE, 0); diff --git a/fs/gfs2/trans.c b/fs/gfs2/trans.c index adbd27875ef9..413627072f36 100644 --- a/fs/gfs2/trans.c +++ b/fs/gfs2/trans.c @@ -155,14 +155,22 @@ void gfs2_trans_add_bh(struct gfs2_glock *gl, struct buffer_head *bh, int meta) struct gfs2_sbd *sdp = gl->gl_sbd; struct gfs2_bufdata *bd; + lock_buffer(bh); + gfs2_log_lock(sdp); bd = bh->b_private; if (bd) gfs2_assert(sdp, bd->bd_gl == gl); else { + gfs2_log_unlock(sdp); + unlock_buffer(bh); gfs2_attach_bufdata(gl, bh, meta); bd = bh->b_private; + lock_buffer(bh); + gfs2_log_lock(sdp); } lops_add(sdp, bd); + gfs2_log_unlock(sdp); + unlock_buffer(bh); } void gfs2_trans_add_revoke(struct gfs2_sbd *sdp, struct gfs2_bufdata *bd) diff --git a/fs/notify/fanotify/fanotify.c b/fs/notify/fanotify/fanotify.c index f35794b97e8e..a50636025364 100644 --- a/fs/notify/fanotify/fanotify.c +++ b/fs/notify/fanotify/fanotify.c @@ -21,6 +21,7 @@ static bool should_merge(struct fsnotify_event *old, struct fsnotify_event *new) if ((old->path.mnt == new->path.mnt) && (old->path.dentry == new->path.dentry)) return true; + break; case (FSNOTIFY_EVENT_NONE): return true; default: diff --git a/fs/xfs/xfs_alloc.c b/fs/xfs/xfs_alloc.c index 4f33c32affe3..335206a9c698 100644 --- a/fs/xfs/xfs_alloc.c +++ b/fs/xfs/xfs_alloc.c @@ -1866,6 +1866,7 @@ xfs_alloc_fix_freelist( /* * Initialize the args structure. */ + memset(&targs, 0, sizeof(targs)); targs.tp = tp; targs.mp = mp; targs.agbp = agbp; @@ -2207,7 +2208,7 @@ xfs_alloc_read_agf( * group or loop over the allocation groups to find the result. */ int /* error */ -__xfs_alloc_vextent( +xfs_alloc_vextent( xfs_alloc_arg_t *args) /* allocation argument structure */ { xfs_agblock_t agsize; /* allocation group size */ @@ -2417,46 +2418,6 @@ error0: return error; } -static void -xfs_alloc_vextent_worker( - struct work_struct *work) -{ - struct xfs_alloc_arg *args = container_of(work, - struct xfs_alloc_arg, work); - unsigned long pflags; - - /* we are in a transaction context here */ - current_set_flags_nested(&pflags, PF_FSTRANS); - - args->result = __xfs_alloc_vextent(args); - complete(args->done); - - current_restore_flags_nested(&pflags, PF_FSTRANS); -} - -/* - * Data allocation requests often come in with little stack to work on. Push - * them off to a worker thread so there is lots of stack to use. Metadata - * requests, OTOH, are generally from low stack usage paths, so avoid the - * context switch overhead here. - */ -int -xfs_alloc_vextent( - struct xfs_alloc_arg *args) -{ - DECLARE_COMPLETION_ONSTACK(done); - - if (!args->userdata) - return __xfs_alloc_vextent(args); - - - args->done = &done; - INIT_WORK_ONSTACK(&args->work, xfs_alloc_vextent_worker); - queue_work(xfs_alloc_wq, &args->work); - wait_for_completion(&done); - return args->result; -} - /* * Free an extent. * Just break up the extent address and hand off to xfs_free_ag_extent diff --git a/fs/xfs/xfs_alloc.h b/fs/xfs/xfs_alloc.h index 93be4a667ca1..feacb061bab7 100644 --- a/fs/xfs/xfs_alloc.h +++ b/fs/xfs/xfs_alloc.h @@ -120,9 +120,6 @@ typedef struct xfs_alloc_arg { char isfl; /* set if is freelist blocks - !acctg */ char userdata; /* set if this is user data */ xfs_fsblock_t firstblock; /* io first block allocated */ - struct completion *done; - struct work_struct work; - int result; } xfs_alloc_arg_t; /* diff --git a/fs/xfs/xfs_alloc_btree.c b/fs/xfs/xfs_alloc_btree.c index f1647caace8f..f7876c6d6165 100644 --- a/fs/xfs/xfs_alloc_btree.c +++ b/fs/xfs/xfs_alloc_btree.c @@ -121,6 +121,8 @@ xfs_allocbt_free_block( xfs_extent_busy_insert(cur->bc_tp, be32_to_cpu(agf->agf_seqno), bno, 1, XFS_EXTENT_BUSY_SKIP_DISCARD); xfs_trans_agbtree_delta(cur->bc_tp, -1); + + xfs_trans_binval(cur->bc_tp, bp); return 0; } diff --git a/fs/xfs/xfs_bmap.c b/fs/xfs/xfs_bmap.c index 848ffa77707b..83d0cf3df930 100644 --- a/fs/xfs/xfs_bmap.c +++ b/fs/xfs/xfs_bmap.c @@ -2437,6 +2437,7 @@ xfs_bmap_btalloc( * Normal allocation, done through xfs_alloc_vextent. */ tryagain = isaligned = 0; + memset(&args, 0, sizeof(args)); args.tp = ap->tp; args.mp = mp; args.fsbno = ap->blkno; @@ -3082,6 +3083,7 @@ xfs_bmap_extents_to_btree( * Convert to a btree with two levels, one record in root. */ XFS_IFORK_FMT_SET(ip, whichfork, XFS_DINODE_FMT_BTREE); + memset(&args, 0, sizeof(args)); args.tp = tp; args.mp = mp; args.firstblock = *firstblock; @@ -3237,6 +3239,7 @@ xfs_bmap_local_to_extents( xfs_buf_t *bp; /* buffer for extent block */ xfs_bmbt_rec_host_t *ep;/* extent record pointer */ + memset(&args, 0, sizeof(args)); args.tp = tp; args.mp = ip->i_mount; args.firstblock = *firstblock; @@ -4616,12 +4619,11 @@ xfs_bmapi_delay( STATIC int -xfs_bmapi_allocate( - struct xfs_bmalloca *bma, - int flags) +__xfs_bmapi_allocate( + struct xfs_bmalloca *bma) { struct xfs_mount *mp = bma->ip->i_mount; - int whichfork = (flags & XFS_BMAPI_ATTRFORK) ? + int whichfork = (bma->flags & XFS_BMAPI_ATTRFORK) ? XFS_ATTR_FORK : XFS_DATA_FORK; struct xfs_ifork *ifp = XFS_IFORK_PTR(bma->ip, whichfork); int tmp_logflags = 0; @@ -4654,24 +4656,27 @@ xfs_bmapi_allocate( * Indicate if this is the first user data in the file, or just any * user data. */ - if (!(flags & XFS_BMAPI_METADATA)) { + if (!(bma->flags & XFS_BMAPI_METADATA)) { bma->userdata = (bma->offset == 0) ? XFS_ALLOC_INITIAL_USER_DATA : XFS_ALLOC_USERDATA; } - bma->minlen = (flags & XFS_BMAPI_CONTIG) ? bma->length : 1; + bma->minlen = (bma->flags & XFS_BMAPI_CONTIG) ? bma->length : 1; /* * Only want to do the alignment at the eof if it is userdata and * allocation length is larger than a stripe unit. */ if (mp->m_dalign && bma->length >= mp->m_dalign && - !(flags & XFS_BMAPI_METADATA) && whichfork == XFS_DATA_FORK) { + !(bma->flags & XFS_BMAPI_METADATA) && whichfork == XFS_DATA_FORK) { error = xfs_bmap_isaeof(bma, whichfork); if (error) return error; } + if (bma->flags & XFS_BMAPI_STACK_SWITCH) + bma->stack_switch = 1; + error = xfs_bmap_alloc(bma); if (error) return error; @@ -4706,7 +4711,7 @@ xfs_bmapi_allocate( * A wasdelay extent has been initialized, so shouldn't be flagged * as unwritten. */ - if (!bma->wasdel && (flags & XFS_BMAPI_PREALLOC) && + if (!bma->wasdel && (bma->flags & XFS_BMAPI_PREALLOC) && xfs_sb_version_hasextflgbit(&mp->m_sb)) bma->got.br_state = XFS_EXT_UNWRITTEN; @@ -4734,6 +4739,45 @@ xfs_bmapi_allocate( return 0; } +static void +xfs_bmapi_allocate_worker( + struct work_struct *work) +{ + struct xfs_bmalloca *args = container_of(work, + struct xfs_bmalloca, work); + unsigned long pflags; + + /* we are in a transaction context here */ + current_set_flags_nested(&pflags, PF_FSTRANS); + + args->result = __xfs_bmapi_allocate(args); + complete(args->done); + + current_restore_flags_nested(&pflags, PF_FSTRANS); +} + +/* + * Some allocation requests often come in with little stack to work on. Push + * them off to a worker thread so there is lots of stack to use. Otherwise just + * call directly to avoid the context switch overhead here. + */ +int +xfs_bmapi_allocate( + struct xfs_bmalloca *args) +{ + DECLARE_COMPLETION_ONSTACK(done); + + if (!args->stack_switch) + return __xfs_bmapi_allocate(args); + + + args->done = &done; + INIT_WORK_ONSTACK(&args->work, xfs_bmapi_allocate_worker); + queue_work(xfs_alloc_wq, &args->work); + wait_for_completion(&done); + return args->result; +} + STATIC int xfs_bmapi_convert_unwritten( struct xfs_bmalloca *bma, @@ -4919,6 +4963,7 @@ xfs_bmapi_write( bma.conv = !!(flags & XFS_BMAPI_CONVERT); bma.wasdel = wasdelay; bma.offset = bno; + bma.flags = flags; /* * There's a 32/64 bit type mismatch between the @@ -4934,7 +4979,7 @@ xfs_bmapi_write( ASSERT(len > 0); ASSERT(bma.length > 0); - error = xfs_bmapi_allocate(&bma, flags); + error = xfs_bmapi_allocate(&bma); if (error) goto error0; if (bma.blkno == NULLFSBLOCK) diff --git a/fs/xfs/xfs_bmap.h b/fs/xfs/xfs_bmap.h index 803b56d7ce16..5f469c3516eb 100644 --- a/fs/xfs/xfs_bmap.h +++ b/fs/xfs/xfs_bmap.h @@ -77,6 +77,7 @@ typedef struct xfs_bmap_free * from written to unwritten, otherwise convert from unwritten to written. */ #define XFS_BMAPI_CONVERT 0x040 +#define XFS_BMAPI_STACK_SWITCH 0x080 #define XFS_BMAPI_FLAGS \ { XFS_BMAPI_ENTIRE, "ENTIRE" }, \ @@ -85,7 +86,8 @@ typedef struct xfs_bmap_free { XFS_BMAPI_PREALLOC, "PREALLOC" }, \ { XFS_BMAPI_IGSTATE, "IGSTATE" }, \ { XFS_BMAPI_CONTIG, "CONTIG" }, \ - { XFS_BMAPI_CONVERT, "CONVERT" } + { XFS_BMAPI_CONVERT, "CONVERT" }, \ + { XFS_BMAPI_STACK_SWITCH, "STACK_SWITCH" } static inline int xfs_bmapi_aflag(int w) @@ -133,6 +135,11 @@ typedef struct xfs_bmalloca { char userdata;/* set if is user data */ char aeof; /* allocated space at eof */ char conv; /* overwriting unwritten extents */ + char stack_switch; + int flags; + struct completion *done; + struct work_struct work; + int result; } xfs_bmalloca_t; /* diff --git a/fs/xfs/xfs_buf_item.c b/fs/xfs/xfs_buf_item.c index a8d0ed911196..becf4a97efc6 100644 --- a/fs/xfs/xfs_buf_item.c +++ b/fs/xfs/xfs_buf_item.c @@ -526,7 +526,25 @@ xfs_buf_item_unpin( } xfs_buf_relse(bp); } else if (freed && remove) { + /* + * There are currently two references to the buffer - the active + * LRU reference and the buf log item. What we are about to do + * here - simulate a failed IO completion - requires 3 + * references. + * + * The LRU reference is removed by the xfs_buf_stale() call. The + * buf item reference is removed by the xfs_buf_iodone() + * callback that is run by xfs_buf_do_callbacks() during ioend + * processing (via the bp->b_iodone callback), and then finally + * the ioend processing will drop the IO reference if the buffer + * is marked XBF_ASYNC. + * + * Hence we need to take an additional reference here so that IO + * completion processing doesn't free the buffer prematurely. + */ xfs_buf_lock(bp); + xfs_buf_hold(bp); + bp->b_flags |= XBF_ASYNC; xfs_buf_ioerror(bp, EIO); XFS_BUF_UNDONE(bp); xfs_buf_stale(bp); diff --git a/fs/xfs/xfs_fsops.c b/fs/xfs/xfs_fsops.c index c25b094efbf7..4beaede43277 100644 --- a/fs/xfs/xfs_fsops.c +++ b/fs/xfs/xfs_fsops.c @@ -399,9 +399,26 @@ xfs_growfs_data_private( /* update secondary superblocks. */ for (agno = 1; agno < nagcount; agno++) { - error = xfs_trans_read_buf(mp, NULL, mp->m_ddev_targp, + error = 0; + /* + * new secondary superblocks need to be zeroed, not read from + * disk as the contents of the new area we are growing into is + * completely unknown. + */ + if (agno < oagcount) { + error = xfs_trans_read_buf(mp, NULL, mp->m_ddev_targp, XFS_AGB_TO_DADDR(mp, agno, XFS_SB_BLOCK(mp)), XFS_FSS_TO_BB(mp, 1), 0, &bp); + } else { + bp = xfs_trans_get_buf(NULL, mp->m_ddev_targp, + XFS_AGB_TO_DADDR(mp, agno, XFS_SB_BLOCK(mp)), + XFS_FSS_TO_BB(mp, 1), 0); + if (bp) + xfs_buf_zero(bp, 0, BBTOB(bp->b_length)); + else + error = ENOMEM; + } + if (error) { xfs_warn(mp, "error %d reading secondary superblock for ag %d", @@ -423,7 +440,7 @@ xfs_growfs_data_private( break; /* no point in continuing */ } } - return 0; + return error; error0: xfs_trans_cancel(tp, XFS_TRANS_ABORT); diff --git a/fs/xfs/xfs_ialloc.c b/fs/xfs/xfs_ialloc.c index 445bf1aef31c..c5c4ef4f2bdb 100644 --- a/fs/xfs/xfs_ialloc.c +++ b/fs/xfs/xfs_ialloc.c @@ -250,6 +250,7 @@ xfs_ialloc_ag_alloc( /* boundary */ struct xfs_perag *pag; + memset(&args, 0, sizeof(args)); args.tp = tp; args.mp = tp->t_mountp; diff --git a/fs/xfs/xfs_inode.c b/fs/xfs/xfs_inode.c index 2778258fcfa2..1938b41ee9f5 100644 --- a/fs/xfs/xfs_inode.c +++ b/fs/xfs/xfs_inode.c @@ -1509,7 +1509,8 @@ xfs_ifree_cluster( * to mark all the active inodes on the buffer stale. */ bp = xfs_trans_get_buf(tp, mp->m_ddev_targp, blkno, - mp->m_bsize * blks_per_cluster, 0); + mp->m_bsize * blks_per_cluster, + XBF_UNMAPPED); if (!bp) return ENOMEM; diff --git a/fs/xfs/xfs_ioctl.c b/fs/xfs/xfs_ioctl.c index 8305f2ac6773..c1df3c623de2 100644 --- a/fs/xfs/xfs_ioctl.c +++ b/fs/xfs/xfs_ioctl.c @@ -70,7 +70,7 @@ xfs_find_handle( int hsize; xfs_handle_t handle; struct inode *inode; - struct fd f; + struct fd f = {0}; struct path path; int error; struct xfs_inode *ip; diff --git a/fs/xfs/xfs_iomap.c b/fs/xfs/xfs_iomap.c index 973dff6ad935..7f537663365b 100644 --- a/fs/xfs/xfs_iomap.c +++ b/fs/xfs/xfs_iomap.c @@ -584,7 +584,9 @@ xfs_iomap_write_allocate( * pointer that the caller gave to us. */ error = xfs_bmapi_write(tp, ip, map_start_fsb, - count_fsb, 0, &first_block, 1, + count_fsb, + XFS_BMAPI_STACK_SWITCH, + &first_block, 1, imap, &nimaps, &free_list); if (error) goto trans_cancel; diff --git a/fs/xfs/xfs_log.c b/fs/xfs/xfs_log.c index 7f4f9370d0e7..4dad756962d0 100644 --- a/fs/xfs/xfs_log.c +++ b/fs/xfs/xfs_log.c @@ -2387,14 +2387,27 @@ xlog_state_do_callback( /* - * update the last_sync_lsn before we drop the + * Completion of a iclog IO does not imply that + * a transaction has completed, as transactions + * can be large enough to span many iclogs. We + * cannot change the tail of the log half way + * through a transaction as this may be the only + * transaction in the log and moving th etail to + * point to the middle of it will prevent + * recovery from finding the start of the + * transaction. Hence we should only update the + * last_sync_lsn if this iclog contains + * transaction completion callbacks on it. + * + * We have to do this before we drop the * icloglock to ensure we are the only one that * can update it. */ ASSERT(XFS_LSN_CMP(atomic64_read(&log->l_last_sync_lsn), be64_to_cpu(iclog->ic_header.h_lsn)) <= 0); - atomic64_set(&log->l_last_sync_lsn, - be64_to_cpu(iclog->ic_header.h_lsn)); + if (iclog->ic_callback) + atomic64_set(&log->l_last_sync_lsn, + be64_to_cpu(iclog->ic_header.h_lsn)); } else ioerrors++; diff --git a/fs/xfs/xfs_log_recover.c b/fs/xfs/xfs_log_recover.c index 5da3ace352bf..d308749fabf1 100644 --- a/fs/xfs/xfs_log_recover.c +++ b/fs/xfs/xfs_log_recover.c @@ -3541,7 +3541,7 @@ xlog_do_recovery_pass( * - order is important. */ error = xlog_bread_offset(log, 0, - bblks - split_bblks, hbp, + bblks - split_bblks, dbp, offset + BBTOB(split_bblks)); if (error) goto bread_err2; diff --git a/arch/arm/plat-mxc/include/mach/ipu.h b/include/linux/dma/ipu-dma.h index 539e559d18b2..18031115c668 100644 --- a/arch/arm/plat-mxc/include/mach/ipu.h +++ b/include/linux/dma/ipu-dma.h @@ -9,8 +9,8 @@ * published by the Free Software Foundation. */ -#ifndef _IPU_H_ -#define _IPU_H_ +#ifndef __LINUX_DMA_IPU_DMA_H +#define __LINUX_DMA_IPU_DMA_H #include <linux/types.h> #include <linux/dmaengine.h> @@ -174,4 +174,4 @@ struct idmac_channel { #define to_tx_desc(tx) container_of(tx, struct idmac_tx_desc, txd) #define to_idmac_chan(c) container_of(c, struct idmac_channel, dma_chan) -#endif +#endif /* __LINUX_DMA_IPU_DMA_H */ diff --git a/include/linux/mmc/dw_mmc.h b/include/linux/mmc/dw_mmc.h index 7c6a1139d8fa..96531664a061 100644 --- a/include/linux/mmc/dw_mmc.h +++ b/include/linux/mmc/dw_mmc.h @@ -137,7 +137,7 @@ struct dw_mci { dma_addr_t sg_dma; void *sg_cpu; - struct dw_mci_dma_ops *dma_ops; + const struct dw_mci_dma_ops *dma_ops; #ifdef CONFIG_MMC_DW_IDMAC unsigned int ring_size; #else @@ -162,7 +162,7 @@ struct dw_mci { u16 data_offset; struct device *dev; struct dw_mci_board *pdata; - struct dw_mci_drv_data *drv_data; + const struct dw_mci_drv_data *drv_data; void *priv; struct clk *biu_clk; struct clk *ciu_clk; @@ -186,7 +186,7 @@ struct dw_mci { struct regulator *vmmc; /* Power regulator */ unsigned long irq_flags; /* IRQ flags */ - unsigned int irq; + int irq; }; /* DMA ops for Internal/External DMAC interface */ diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h index fa8529a859b8..1edcb4dad8c4 100644 --- a/include/linux/mmc/sdhci.h +++ b/include/linux/mmc/sdhci.h @@ -91,6 +91,7 @@ struct sdhci_host { unsigned int quirks2; /* More deviations from spec. */ #define SDHCI_QUIRK2_HOST_OFF_CARD_ON (1<<0) +#define SDHCI_QUIRK2_HOST_NO_CMD23 (1<<1) int irq; /* Device IRQ */ void __iomem *ioaddr; /* Mapped address */ diff --git a/include/linux/of_address.h b/include/linux/of_address.h index a1984dd037da..e20e3af68fb6 100644 --- a/include/linux/of_address.h +++ b/include/linux/of_address.h @@ -28,11 +28,13 @@ static inline unsigned long pci_address_to_pio(phys_addr_t addr) { return -1; } #endif #else /* CONFIG_OF_ADDRESS */ +#ifndef of_address_to_resource static inline int of_address_to_resource(struct device_node *dev, int index, struct resource *r) { return -EINVAL; } +#endif static inline struct device_node *of_find_matching_node_by_address( struct device_node *from, const struct of_device_id *matches, diff --git a/include/linux/platform_data/asoc-imx-ssi.h b/include/linux/platform_data/asoc-imx-ssi.h index 63f3c2804239..92c7fd72f636 100644 --- a/include/linux/platform_data/asoc-imx-ssi.h +++ b/include/linux/platform_data/asoc-imx-ssi.h @@ -17,5 +17,7 @@ struct imx_ssi_platform_data { void (*ac97_warm_reset)(struct snd_ac97 *ac97); }; +extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type); + #endif /* __MACH_SSI_H */ diff --git a/include/linux/platform_data/dma-imx.h b/include/linux/platform_data/dma-imx.h index 1b9080385b46..f6d30cc1cb77 100644 --- a/include/linux/platform_data/dma-imx.h +++ b/include/linux/platform_data/dma-imx.h @@ -61,7 +61,9 @@ static inline int imx_dma_is_ipu(struct dma_chan *chan) static inline int imx_dma_is_general_purpose(struct dma_chan *chan) { return strstr(dev_name(chan->device->dev), "sdma") || - !strcmp(dev_name(chan->device->dev), "imx-dma"); + !strcmp(dev_name(chan->device->dev), "imx1-dma") || + !strcmp(dev_name(chan->device->dev), "imx21-dma") || + !strcmp(dev_name(chan->device->dev), "imx27-dma"); } #endif diff --git a/include/linux/platform_data/omap-wd-timer.h b/include/linux/platform_data/omap-wd-timer.h new file mode 100644 index 000000000000..d75f5f802d98 --- /dev/null +++ b/include/linux/platform_data/omap-wd-timer.h @@ -0,0 +1,38 @@ +/* + * OMAP2+ WDTIMER-specific function prototypes + * + * Copyright (C) 2012 Texas Instruments, Inc. + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __LINUX_PLATFORM_DATA_OMAP_WD_TIMER_H +#define __LINUX_PLATFORM_DATA_OMAP_WD_TIMER_H + +#include <linux/types.h> + +/* + * Standardized OMAP reset source bits + * + * This is a subset of the ones listed in arch/arm/mach-omap2/prm.h + * and are the only ones needed in the watchdog driver. + */ +#define OMAP_MPU_WD_RST_SRC_ID_SHIFT 3 + +/** + * struct omap_wd_timer_platform_data - WDTIMER integration to the host SoC + * @read_reset_sources - fn ptr for the SoC to indicate the last reset cause + * + * The function pointed to by @read_reset_sources must return its data + * in a standard format - search for RST_SRC_ID_SHIFT in + * arch/arm/mach-omap2 + */ +struct omap_wd_timer_platform_data { + u32 (*read_reset_sources)(void); +}; + +#endif diff --git a/include/linux/ptp_clock_kernel.h b/include/linux/ptp_clock_kernel.h index f2dc6d8fc680..38a993508327 100644 --- a/include/linux/ptp_clock_kernel.h +++ b/include/linux/ptp_clock_kernel.h @@ -54,7 +54,8 @@ struct ptp_clock_request { * clock operations * * @adjfreq: Adjusts the frequency of the hardware clock. - * parameter delta: Desired period change in parts per billion. + * parameter delta: Desired frequency offset from nominal frequency + * in parts per billion * * @adjtime: Shifts the time of the hardware clock. * parameter delta: Desired change in nanoseconds. diff --git a/include/uapi/linux/eventpoll.h b/include/uapi/linux/eventpoll.h index 8c99ce7202c5..2c267bcbb85c 100644 --- a/include/uapi/linux/eventpoll.h +++ b/include/uapi/linux/eventpoll.h @@ -25,7 +25,6 @@ #define EPOLL_CTL_ADD 1 #define EPOLL_CTL_DEL 2 #define EPOLL_CTL_MOD 3 -#define EPOLL_CTL_DISABLE 4 /* * Request the handling of system wakeup events so as to prevent system suspends diff --git a/include/xen/hvm.h b/include/xen/hvm.h index b193fa2f9fdd..13e43e41637d 100644 --- a/include/xen/hvm.h +++ b/include/xen/hvm.h @@ -5,6 +5,36 @@ #include <xen/interface/hvm/params.h> #include <asm/xen/hypercall.h> +static const char *param_name(int op) +{ +#define PARAM(x) [HVM_PARAM_##x] = #x + static const char *const names[] = { + PARAM(CALLBACK_IRQ), + PARAM(STORE_PFN), + PARAM(STORE_EVTCHN), + PARAM(PAE_ENABLED), + PARAM(IOREQ_PFN), + PARAM(BUFIOREQ_PFN), + PARAM(TIMER_MODE), + PARAM(HPET_ENABLED), + PARAM(IDENT_PT), + PARAM(DM_DOMAIN), + PARAM(ACPI_S_STATE), + PARAM(VM86_TSS), + PARAM(VPT_ALIGN), + PARAM(CONSOLE_PFN), + PARAM(CONSOLE_EVTCHN), + }; +#undef PARAM + + if (op >= ARRAY_SIZE(names)) + return "unknown"; + + if (!names[op]) + return "reserved"; + + return names[op]; +} static inline int hvm_get_parameter(int idx, uint64_t *value) { struct xen_hvm_param xhv; @@ -14,8 +44,8 @@ static inline int hvm_get_parameter(int idx, uint64_t *value) xhv.index = idx; r = HYPERVISOR_hvm_op(HVMOP_get_param, &xhv); if (r < 0) { - printk(KERN_ERR "Cannot get hvm parameter %d: %d!\n", - idx, r); + printk(KERN_ERR "Cannot get hvm parameter %s (%d): %d!\n", + param_name(idx), idx, r); return r; } *value = xhv.value; diff --git a/kernel/module.c b/kernel/module.c index 6085f5ef88ea..6e48c3a43599 100644 --- a/kernel/module.c +++ b/kernel/module.c @@ -2293,12 +2293,17 @@ static void layout_symtab(struct module *mod, struct load_info *info) src = (void *)info->hdr + symsect->sh_offset; nsrc = symsect->sh_size / sizeof(*src); + /* strtab always starts with a nul, so offset 0 is the empty string. */ + strtab_size = 1; + /* Compute total space required for the core symbols' strtab. */ - for (ndst = i = strtab_size = 1; i < nsrc; ++i, ++src) - if (is_core_symbol(src, info->sechdrs, info->hdr->e_shnum)) { - strtab_size += strlen(&info->strtab[src->st_name]) + 1; + for (ndst = i = 0; i < nsrc; i++) { + if (i == 0 || + is_core_symbol(src+i, info->sechdrs, info->hdr->e_shnum)) { + strtab_size += strlen(&info->strtab[src[i].st_name])+1; ndst++; } + } /* Append room for core symbols at end of core part. */ info->symoffs = ALIGN(mod->core_size, symsect->sh_addralign ?: 1); @@ -2332,15 +2337,15 @@ static void add_kallsyms(struct module *mod, const struct load_info *info) mod->core_symtab = dst = mod->module_core + info->symoffs; mod->core_strtab = s = mod->module_core + info->stroffs; src = mod->symtab; - *dst = *src; *s++ = 0; - for (ndst = i = 1; i < mod->num_symtab; ++i, ++src) { - if (!is_core_symbol(src, info->sechdrs, info->hdr->e_shnum)) - continue; - - dst[ndst] = *src; - dst[ndst++].st_name = s - mod->core_strtab; - s += strlcpy(s, &mod->strtab[src->st_name], KSYM_NAME_LEN) + 1; + for (ndst = i = 0; i < mod->num_symtab; i++) { + if (i == 0 || + is_core_symbol(src+i, info->sechdrs, info->hdr->e_shnum)) { + dst[ndst] = src[i]; + dst[ndst++].st_name = s - mod->core_strtab; + s += strlcpy(s, &mod->strtab[src[i].st_name], + KSYM_NAME_LEN) + 1; + } } mod->core_num_syms = ndst; } diff --git a/mm/vmscan.c b/mm/vmscan.c index 2624edcfb420..8b055e9379bc 100644 --- a/mm/vmscan.c +++ b/mm/vmscan.c @@ -3017,6 +3017,8 @@ static int kswapd(void *p) &balanced_classzone_idx); } } + + current->reclaim_state = NULL; return 0; } diff --git a/net/core/dev.c b/net/core/dev.c index 09cb3f6dc40c..bda6d004f9f0 100644 --- a/net/core/dev.c +++ b/net/core/dev.c @@ -1666,7 +1666,7 @@ static inline int deliver_skb(struct sk_buff *skb, static inline bool skb_loop_sk(struct packet_type *ptype, struct sk_buff *skb) { - if (ptype->af_packet_priv == NULL) + if (!ptype->af_packet_priv || !skb->sk) return false; if (ptype->id_match) diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c index 76d4c2c3c89b..fad649ae4dec 100644 --- a/net/core/rtnetlink.c +++ b/net/core/rtnetlink.c @@ -2192,7 +2192,8 @@ static int nlmsg_populate_fdb(struct sk_buff *skb, goto skip; err = nlmsg_populate_fdb_fill(skb, dev, ha->addr, - portid, seq, 0, NTF_SELF); + portid, seq, + RTM_NEWNEIGH, NTF_SELF); if (err < 0) return err; skip: diff --git a/net/ipv4/inet_diag.c b/net/ipv4/inet_diag.c index 535584c00f91..0c34bfabc11f 100644 --- a/net/ipv4/inet_diag.c +++ b/net/ipv4/inet_diag.c @@ -892,13 +892,16 @@ static int __inet_diag_dump(struct sk_buff *skb, struct netlink_callback *cb, struct inet_diag_req_v2 *r, struct nlattr *bc) { const struct inet_diag_handler *handler; + int err = 0; handler = inet_diag_lock_handler(r->sdiag_protocol); if (!IS_ERR(handler)) handler->dump(skb, cb, r, bc); + else + err = PTR_ERR(handler); inet_diag_unlock_handler(handler); - return skb->len; + return err ? : skb->len; } static int inet_diag_dump(struct sk_buff *skb, struct netlink_callback *cb) diff --git a/net/ipv6/ip6_gre.c b/net/ipv6/ip6_gre.c index 0185679c5f53..d5cb3c4e66f8 100644 --- a/net/ipv6/ip6_gre.c +++ b/net/ipv6/ip6_gre.c @@ -1633,9 +1633,9 @@ static size_t ip6gre_get_size(const struct net_device *dev) /* IFLA_GRE_OKEY */ nla_total_size(4) + /* IFLA_GRE_LOCAL */ - nla_total_size(4) + + nla_total_size(sizeof(struct in6_addr)) + /* IFLA_GRE_REMOTE */ - nla_total_size(4) + + nla_total_size(sizeof(struct in6_addr)) + /* IFLA_GRE_TTL */ nla_total_size(1) + /* IFLA_GRE_TOS */ @@ -1659,8 +1659,8 @@ static int ip6gre_fill_info(struct sk_buff *skb, const struct net_device *dev) nla_put_be16(skb, IFLA_GRE_OFLAGS, p->o_flags) || nla_put_be32(skb, IFLA_GRE_IKEY, p->i_key) || nla_put_be32(skb, IFLA_GRE_OKEY, p->o_key) || - nla_put(skb, IFLA_GRE_LOCAL, sizeof(struct in6_addr), &p->raddr) || - nla_put(skb, IFLA_GRE_REMOTE, sizeof(struct in6_addr), &p->laddr) || + nla_put(skb, IFLA_GRE_LOCAL, sizeof(struct in6_addr), &p->laddr) || + nla_put(skb, IFLA_GRE_REMOTE, sizeof(struct in6_addr), &p->raddr) || nla_put_u8(skb, IFLA_GRE_TTL, p->hop_limit) || /*nla_put_u8(skb, IFLA_GRE_TOS, t->priority) ||*/ nla_put_u8(skb, IFLA_GRE_ENCAP_LIMIT, p->encap_limit) || diff --git a/net/ipv6/ndisc.c b/net/ipv6/ndisc.c index ff36194a71aa..2edce30ef733 100644 --- a/net/ipv6/ndisc.c +++ b/net/ipv6/ndisc.c @@ -535,7 +535,7 @@ static void ndisc_send_unsol_na(struct net_device *dev) { struct inet6_dev *idev; struct inet6_ifaddr *ifa; - struct in6_addr mcaddr; + struct in6_addr mcaddr = IN6ADDR_LINKLOCAL_ALLNODES_INIT; idev = in6_dev_get(dev); if (!idev) @@ -543,7 +543,6 @@ static void ndisc_send_unsol_na(struct net_device *dev) read_lock_bh(&idev->lock); list_for_each_entry(ifa, &idev->addr_list, if_list) { - addrconf_addr_solict_mult(&ifa->addr, &mcaddr); ndisc_send_na(dev, NULL, &mcaddr, &ifa->addr, /*router=*/ !!idev->cnf.forwarding, /*solicited=*/ false, /*override=*/ true, diff --git a/net/sched/sch_qfq.c b/net/sched/sch_qfq.c index f0dd83cff906..9687fa1c2275 100644 --- a/net/sched/sch_qfq.c +++ b/net/sched/sch_qfq.c @@ -84,18 +84,19 @@ * grp->index is the index of the group; and grp->slot_shift * is the shift for the corresponding (scaled) sigma_i. */ -#define QFQ_MAX_INDEX 19 -#define QFQ_MAX_WSHIFT 16 +#define QFQ_MAX_INDEX 24 +#define QFQ_MAX_WSHIFT 12 #define QFQ_MAX_WEIGHT (1<<QFQ_MAX_WSHIFT) -#define QFQ_MAX_WSUM (2*QFQ_MAX_WEIGHT) +#define QFQ_MAX_WSUM (16*QFQ_MAX_WEIGHT) #define FRAC_BITS 30 /* fixed point arithmetic */ #define ONE_FP (1UL << FRAC_BITS) #define IWSUM (ONE_FP/QFQ_MAX_WSUM) -#define QFQ_MTU_SHIFT 11 +#define QFQ_MTU_SHIFT 16 /* to support TSO/GSO */ #define QFQ_MIN_SLOT_SHIFT (FRAC_BITS + QFQ_MTU_SHIFT - QFQ_MAX_INDEX) +#define QFQ_MIN_LMAX 256 /* min possible lmax for a class */ /* * Possible group states. These values are used as indexes for the bitmaps @@ -231,6 +232,32 @@ static void qfq_update_class_params(struct qfq_sched *q, struct qfq_class *cl, q->wsum += delta_w; } +static void qfq_update_reactivate_class(struct qfq_sched *q, + struct qfq_class *cl, + u32 inv_w, u32 lmax, int delta_w) +{ + bool need_reactivation = false; + int i = qfq_calc_index(inv_w, lmax); + + if (&q->groups[i] != cl->grp && cl->qdisc->q.qlen > 0) { + /* + * shift cl->F back, to not charge the + * class for the not-yet-served head + * packet + */ + cl->F = cl->S; + /* remove class from its slot in the old group */ + qfq_deactivate_class(q, cl); + need_reactivation = true; + } + + qfq_update_class_params(q, cl, lmax, inv_w, delta_w); + + if (need_reactivation) /* activate in new group */ + qfq_activate_class(q, cl, qdisc_peek_len(cl->qdisc)); +} + + static int qfq_change_class(struct Qdisc *sch, u32 classid, u32 parentid, struct nlattr **tca, unsigned long *arg) { @@ -238,7 +265,7 @@ static int qfq_change_class(struct Qdisc *sch, u32 classid, u32 parentid, struct qfq_class *cl = (struct qfq_class *)*arg; struct nlattr *tb[TCA_QFQ_MAX + 1]; u32 weight, lmax, inv_w; - int i, err; + int err; int delta_w; if (tca[TCA_OPTIONS] == NULL) { @@ -270,16 +297,14 @@ static int qfq_change_class(struct Qdisc *sch, u32 classid, u32 parentid, if (tb[TCA_QFQ_LMAX]) { lmax = nla_get_u32(tb[TCA_QFQ_LMAX]); - if (!lmax || lmax > (1UL << QFQ_MTU_SHIFT)) { + if (lmax < QFQ_MIN_LMAX || lmax > (1UL << QFQ_MTU_SHIFT)) { pr_notice("qfq: invalid max length %u\n", lmax); return -EINVAL; } } else - lmax = 1UL << QFQ_MTU_SHIFT; + lmax = psched_mtu(qdisc_dev(sch)); if (cl != NULL) { - bool need_reactivation = false; - if (tca[TCA_RATE]) { err = gen_replace_estimator(&cl->bstats, &cl->rate_est, qdisc_root_sleeping_lock(sch), @@ -291,24 +316,8 @@ static int qfq_change_class(struct Qdisc *sch, u32 classid, u32 parentid, if (lmax == cl->lmax && inv_w == cl->inv_w) return 0; /* nothing to update */ - i = qfq_calc_index(inv_w, lmax); sch_tree_lock(sch); - if (&q->groups[i] != cl->grp && cl->qdisc->q.qlen > 0) { - /* - * shift cl->F back, to not charge the - * class for the not-yet-served head - * packet - */ - cl->F = cl->S; - /* remove class from its slot in the old group */ - qfq_deactivate_class(q, cl); - need_reactivation = true; - } - - qfq_update_class_params(q, cl, lmax, inv_w, delta_w); - - if (need_reactivation) /* activate in new group */ - qfq_activate_class(q, cl, qdisc_peek_len(cl->qdisc)); + qfq_update_reactivate_class(q, cl, inv_w, lmax, delta_w); sch_tree_unlock(sch); return 0; @@ -663,15 +672,48 @@ static void qfq_make_eligible(struct qfq_sched *q, u64 old_V) /* - * XXX we should make sure that slot becomes less than 32. - * This is guaranteed by the input values. - * roundedS is always cl->S rounded on grp->slot_shift bits. + * If the weight and lmax (max_pkt_size) of the classes do not change, + * then QFQ guarantees that the slot index is never higher than + * 2 + ((1<<QFQ_MTU_SHIFT)/QFQ_MIN_LMAX) * (QFQ_MAX_WEIGHT/QFQ_MAX_WSUM). + * + * With the current values of the above constants, the index is + * then guaranteed to never be higher than 2 + 256 * (1 / 16) = 18. + * + * When the weight of a class is increased or the lmax of the class is + * decreased, a new class with smaller slot size may happen to be + * activated. The activation of this class should be properly delayed + * to when the service of the class has finished in the ideal system + * tracked by QFQ. If the activation of the class is not delayed to + * this reference time instant, then this class may be unjustly served + * before other classes waiting for service. This may cause + * (unfrequently) the above bound to the slot index to be violated for + * some of these unlucky classes. + * + * Instead of delaying the activation of the new class, which is quite + * complex, the following inaccurate but simple solution is used: if + * the slot index is higher than QFQ_MAX_SLOTS-2, then the timestamps + * of the class are shifted backward so as to let the slot index + * become equal to QFQ_MAX_SLOTS-2. This threshold is used because, if + * the slot index is above it, then the data structure implementing + * the bucket list either gets immediately corrupted or may get + * corrupted on a possible next packet arrival that causes the start + * time of the group to be shifted backward. */ static void qfq_slot_insert(struct qfq_group *grp, struct qfq_class *cl, u64 roundedS) { u64 slot = (roundedS - grp->S) >> grp->slot_shift; - unsigned int i = (grp->front + slot) % QFQ_MAX_SLOTS; + unsigned int i; /* slot index in the bucket list */ + + if (unlikely(slot > QFQ_MAX_SLOTS - 2)) { + u64 deltaS = roundedS - grp->S - + ((u64)(QFQ_MAX_SLOTS - 2)<<grp->slot_shift); + cl->S -= deltaS; + cl->F -= deltaS; + slot = QFQ_MAX_SLOTS - 2; + } + + i = (grp->front + slot) % QFQ_MAX_SLOTS; hlist_add_head(&cl->next, &grp->slots[i]); __set_bit(slot, &grp->full_slots); @@ -892,6 +934,13 @@ static int qfq_enqueue(struct sk_buff *skb, struct Qdisc *sch) } pr_debug("qfq_enqueue: cl = %x\n", cl->common.classid); + if (unlikely(cl->lmax < qdisc_pkt_len(skb))) { + pr_debug("qfq: increasing maxpkt from %u to %u for class %u", + cl->lmax, qdisc_pkt_len(skb), cl->common.classid); + qfq_update_reactivate_class(q, cl, cl->inv_w, + qdisc_pkt_len(skb), 0); + } + err = qdisc_enqueue(skb, cl->qdisc); if (unlikely(err != NET_XMIT_SUCCESS)) { pr_debug("qfq_enqueue: enqueue failed %d\n", err); diff --git a/net/tipc/handler.c b/net/tipc/handler.c index 111ff8300ae5..b36f0fcd9bdf 100644 --- a/net/tipc/handler.c +++ b/net/tipc/handler.c @@ -116,7 +116,6 @@ void tipc_handler_stop(void) return; handler_enabled = 0; - tasklet_disable(&tipc_tasklet); tasklet_kill(&tipc_tasklet); spin_lock_bh(&qitem_lock); diff --git a/scripts/Makefile.modinst b/scripts/Makefile.modinst index dda4b2b61927..ecbb44797e28 100644 --- a/scripts/Makefile.modinst +++ b/scripts/Makefile.modinst @@ -16,8 +16,9 @@ PHONY += $(modules) __modinst: $(modules) @: +# Don't stop modules_install if we can't sign external modules. quiet_cmd_modules_install = INSTALL $@ - cmd_modules_install = mkdir -p $(2); cp $@ $(2) ; $(mod_strip_cmd) $(2)/$(notdir $@) ; $(mod_sign_cmd) $(2)/$(notdir $@) + cmd_modules_install = mkdir -p $(2); cp $@ $(2) ; $(mod_strip_cmd) $(2)/$(notdir $@) ; $(mod_sign_cmd) $(2)/$(notdir $@) $(patsubst %,|| true,$(KBUILD_EXTMOD)) # Modules built outside the kernel source tree go into extra by default INSTALL_MOD_DIR ?= extra diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl index 21a9f5de0a21..f18750e3bd6c 100755 --- a/scripts/checkpatch.pl +++ b/scripts/checkpatch.pl @@ -1890,8 +1890,10 @@ sub process { } if ($realfile =~ m@^(drivers/net/|net/)@ && - $rawline !~ m@^\+[ \t]*(\/\*|\*\/)@ && - $rawline =~ m@^\+[ \t]*.+\*\/[ \t]*$@) { + $rawline !~ m@^\+[ \t]*\*/[ \t]*$@ && #trailing */ + $rawline !~ m@^\+.*/\*.*\*/[ \t]*$@ && #inline /*...*/ + $rawline !~ m@^\+.*\*{2,}/[ \t]*$@ && #trailing **/ + $rawline =~ m@^\+[ \t]*.+\*\/[ \t]*$@) { #non blank */ WARN("NETWORKING_BLOCK_COMMENT_STYLE", "networking block comments put the trailing */ on a separate line\n" . $herecurr); } diff --git a/sound/core/oss/mixer_oss.c b/sound/core/oss/mixer_oss.c index a9a2e63c0222..e8a1d18774b2 100644 --- a/sound/core/oss/mixer_oss.c +++ b/sound/core/oss/mixer_oss.c @@ -76,6 +76,7 @@ static int snd_mixer_oss_open(struct inode *inode, struct file *file) snd_card_unref(card); return -EFAULT; } + snd_card_unref(card); return 0; } diff --git a/sound/core/oss/pcm_oss.c b/sound/core/oss/pcm_oss.c index f337b66a020b..4c1cc51772e6 100644 --- a/sound/core/oss/pcm_oss.c +++ b/sound/core/oss/pcm_oss.c @@ -2454,6 +2454,7 @@ static int snd_pcm_oss_open(struct inode *inode, struct file *file) mutex_unlock(&pcm->open_mutex); if (err < 0) goto __error; + snd_card_unref(pcm->card); return err; __error: diff --git a/sound/core/pcm_native.c b/sound/core/pcm_native.c index 6e8872de5ba0..f9ddecf2f4cd 100644 --- a/sound/core/pcm_native.c +++ b/sound/core/pcm_native.c @@ -2122,7 +2122,8 @@ static int snd_pcm_playback_open(struct inode *inode, struct file *file) pcm = snd_lookup_minor_data(iminor(inode), SNDRV_DEVICE_TYPE_PCM_PLAYBACK); err = snd_pcm_open(file, pcm, SNDRV_PCM_STREAM_PLAYBACK); - snd_card_unref(pcm->card); + if (pcm) + snd_card_unref(pcm->card); return err; } @@ -2135,7 +2136,8 @@ static int snd_pcm_capture_open(struct inode *inode, struct file *file) pcm = snd_lookup_minor_data(iminor(inode), SNDRV_DEVICE_TYPE_PCM_CAPTURE); err = snd_pcm_open(file, pcm, SNDRV_PCM_STREAM_CAPTURE); - snd_card_unref(pcm->card); + if (pcm) + snd_card_unref(pcm->card); return err; } diff --git a/sound/core/sound.c b/sound/core/sound.c index 89780c323f19..70ccdab74153 100644 --- a/sound/core/sound.c +++ b/sound/core/sound.c @@ -114,7 +114,7 @@ void *snd_lookup_minor_data(unsigned int minor, int type) mreg = snd_minors[minor]; if (mreg && mreg->type == type) { private_data = mreg->private_data; - if (mreg->card_ptr) + if (private_data && mreg->card_ptr) atomic_inc(&mreg->card_ptr->refcount); } else private_data = NULL; diff --git a/sound/core/sound_oss.c b/sound/core/sound_oss.c index e1d79ee35906..726a49ac9725 100644 --- a/sound/core/sound_oss.c +++ b/sound/core/sound_oss.c @@ -54,7 +54,7 @@ void *snd_lookup_oss_minor_data(unsigned int minor, int type) mreg = snd_oss_minors[minor]; if (mreg && mreg->type == type) { private_data = mreg->private_data; - if (mreg->card_ptr) + if (private_data && mreg->card_ptr) atomic_inc(&mreg->card_ptr->refcount); } else private_data = NULL; diff --git a/sound/i2c/other/ak4113.c b/sound/i2c/other/ak4113.c index ef68d710d08c..e04e750a77ed 100644 --- a/sound/i2c/other/ak4113.c +++ b/sound/i2c/other/ak4113.c @@ -426,7 +426,7 @@ static struct snd_kcontrol_new snd_ak4113_iec958_controls[] = { }, { .iface = SNDRV_CTL_ELEM_IFACE_PCM, - .name = "IEC958 Preample Capture Default", + .name = "IEC958 Preamble Capture Default", .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, .info = snd_ak4113_spdif_pinfo, diff --git a/sound/i2c/other/ak4114.c b/sound/i2c/other/ak4114.c index 816e7d225fb0..5bf4fca19e48 100644 --- a/sound/i2c/other/ak4114.c +++ b/sound/i2c/other/ak4114.c @@ -401,7 +401,7 @@ static struct snd_kcontrol_new snd_ak4114_iec958_controls[] = { }, { .iface = SNDRV_CTL_ELEM_IFACE_PCM, - .name = "IEC958 Preample Capture Default", + .name = "IEC958 Preamble Capture Default", .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, .info = snd_ak4114_spdif_pinfo, .get = snd_ak4114_spdif_pget, diff --git a/sound/i2c/other/ak4117.c b/sound/i2c/other/ak4117.c index b4b2a51fc117..40e33c9f2b09 100644 --- a/sound/i2c/other/ak4117.c +++ b/sound/i2c/other/ak4117.c @@ -380,7 +380,7 @@ static struct snd_kcontrol_new snd_ak4117_iec958_controls[] = { }, { .iface = SNDRV_CTL_ELEM_IFACE_PCM, - .name = "IEC958 Preample Capture Default", + .name = "IEC958 Preamble Capture Default", .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, .info = snd_ak4117_spdif_pinfo, .get = snd_ak4117_spdif_pget, diff --git a/sound/pci/es1968.c b/sound/pci/es1968.c index 5d0e568fdea1..50169bcfd903 100644 --- a/sound/pci/es1968.c +++ b/sound/pci/es1968.c @@ -2655,6 +2655,8 @@ static struct ess_device_list pm_whitelist[] __devinitdata = { { TYPE_MAESTRO2E, 0x1179 }, { TYPE_MAESTRO2E, 0x14c0 }, /* HP omnibook 4150 */ { TYPE_MAESTRO2E, 0x1558 }, + { TYPE_MAESTRO2E, 0x125d }, /* a PCI card, e.g. Terratec DMX */ + { TYPE_MAESTRO2, 0x125d }, /* a PCI card, e.g. SF64-PCE2 */ }; static struct ess_device_list mpu_blacklist[] __devinitdata = { diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 72b085ae7d46..cd2dbaf1be78 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -3563,6 +3563,8 @@ static DEFINE_PCI_DEVICE_TABLE(azx_ids) = { /* Teradici */ { PCI_DEVICE(0x6549, 0x1200), .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT }, + { PCI_DEVICE(0x6549, 0x2200), + .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT }, /* Creative X-Fi (CA0110-IBG) */ /* CTHDA chips */ { PCI_DEVICE(0x1102, 0x0010), diff --git a/sound/pci/hda/patch_analog.c b/sound/pci/hda/patch_analog.c index cdd43eadbc67..1eeba7386666 100644 --- a/sound/pci/hda/patch_analog.c +++ b/sound/pci/hda/patch_analog.c @@ -545,6 +545,7 @@ static int ad198x_build_pcms(struct hda_codec *codec) if (spec->multiout.dig_out_nid) { info++; codec->num_pcms++; + codec->spdif_status_reset = 1; info->name = "AD198x Digital"; info->pcm_type = HDA_PCM_TYPE_SPDIF; info->stream[SNDRV_PCM_STREAM_PLAYBACK] = ad198x_pcm_digital_playback; diff --git a/sound/pci/hda/patch_cirrus.c b/sound/pci/hda/patch_cirrus.c index 61a71131711c..d5f3a26d608d 100644 --- a/sound/pci/hda/patch_cirrus.c +++ b/sound/pci/hda/patch_cirrus.c @@ -101,8 +101,8 @@ enum { #define CS420X_VENDOR_NID 0x11 #define CS_DIG_OUT1_PIN_NID 0x10 #define CS_DIG_OUT2_PIN_NID 0x15 -#define CS_DMIC1_PIN_NID 0x12 -#define CS_DMIC2_PIN_NID 0x0e +#define CS_DMIC1_PIN_NID 0x0e +#define CS_DMIC2_PIN_NID 0x12 /* coef indices */ #define IDX_SPDIF_STAT 0x0000 @@ -1079,14 +1079,18 @@ static void init_input(struct hda_codec *codec) cs_automic(codec, NULL); coef = 0x000a; /* ADC1/2 - Digital and Analog Soft Ramp */ + cs_vendor_coef_set(codec, IDX_ADC_CFG, coef); + + coef = cs_vendor_coef_get(codec, IDX_BEEP_CFG); if (is_active_pin(codec, CS_DMIC2_PIN_NID)) - coef |= 0x0500; /* DMIC2 2 chan on, GPIO1 off */ + coef |= 1 << 4; /* DMIC2 2 chan on, GPIO1 off */ if (is_active_pin(codec, CS_DMIC1_PIN_NID)) - coef |= 0x1800; /* DMIC1 2 chan on, GPIO0 off + coef |= 1 << 3; /* DMIC1 2 chan on, GPIO0 off * No effect if SPDIF_OUT2 is * selected in IDX_SPDIF_CTL. */ - cs_vendor_coef_set(codec, IDX_ADC_CFG, coef); + + cs_vendor_coef_set(codec, IDX_BEEP_CFG, coef); } else { if (spec->mic_detect) cs_automic(codec, NULL); @@ -1107,7 +1111,7 @@ static const struct hda_verb cs_coef_init_verbs[] = { | 0x0400 /* Disable Coefficient Auto increment */ )}, /* Beep */ - {0x11, AC_VERB_SET_COEF_INDEX, IDX_DAC_CFG}, + {0x11, AC_VERB_SET_COEF_INDEX, IDX_BEEP_CFG}, {0x11, AC_VERB_SET_PROC_COEF, 0x0007}, /* Enable Beep thru DAC1/2/3 */ {} /* terminator */ @@ -1728,8 +1732,7 @@ static int cs421x_mux_enum_put(struct snd_kcontrol *kcontrol, } -static struct snd_kcontrol_new cs421x_capture_source = { - +static const struct snd_kcontrol_new cs421x_capture_source = { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = "Capture Source", .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, @@ -1946,7 +1949,7 @@ static int cs421x_suspend(struct hda_codec *codec) } #endif -static struct hda_codec_ops cs421x_patch_ops = { +static const struct hda_codec_ops cs421x_patch_ops = { .build_controls = cs421x_build_controls, .build_pcms = cs_build_pcms, .init = cs421x_init, diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index f7397ad02a0d..c0ce3b1f04b4 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -5840,7 +5840,7 @@ static int alc269_parse_auto_config(struct hda_codec *codec) return alc_parse_auto_config(codec, alc269_ignore, ssids); } -static void alc269_toggle_power_output(struct hda_codec *codec, int power_up) +static void alc269vb_toggle_power_output(struct hda_codec *codec, int power_up) { int val = alc_read_coef_idx(codec, 0x04); if (power_up) @@ -5857,10 +5857,10 @@ static void alc269_shutup(struct hda_codec *codec) if (spec->codec_variant != ALC269_TYPE_ALC269VB) return; - if ((alc_get_coef0(codec) & 0x00ff) == 0x017) - alc269_toggle_power_output(codec, 0); - if ((alc_get_coef0(codec) & 0x00ff) == 0x018) { - alc269_toggle_power_output(codec, 0); + if (spec->codec_variant == ALC269_TYPE_ALC269VB) + alc269vb_toggle_power_output(codec, 0); + if (spec->codec_variant == ALC269_TYPE_ALC269VB && + (alc_get_coef0(codec) & 0x00ff) == 0x018) { msleep(150); } } @@ -5870,24 +5870,22 @@ static int alc269_resume(struct hda_codec *codec) { struct alc_spec *spec = codec->spec; - if (spec->codec_variant == ALC269_TYPE_ALC269VB || + if (spec->codec_variant == ALC269_TYPE_ALC269VB) + alc269vb_toggle_power_output(codec, 0); + if (spec->codec_variant == ALC269_TYPE_ALC269VB && (alc_get_coef0(codec) & 0x00ff) == 0x018) { - alc269_toggle_power_output(codec, 0); msleep(150); } codec->patch_ops.init(codec); - if (spec->codec_variant == ALC269_TYPE_ALC269VB || + if (spec->codec_variant == ALC269_TYPE_ALC269VB) + alc269vb_toggle_power_output(codec, 1); + if (spec->codec_variant == ALC269_TYPE_ALC269VB && (alc_get_coef0(codec) & 0x00ff) == 0x017) { - alc269_toggle_power_output(codec, 1); msleep(200); } - if (spec->codec_variant == ALC269_TYPE_ALC269VB || - (alc_get_coef0(codec) & 0x00ff) == 0x018) - alc269_toggle_power_output(codec, 1); - snd_hda_codec_resume_amp(codec); snd_hda_codec_resume_cache(codec); hda_call_check_power_status(codec, 0x01); @@ -7079,6 +7077,7 @@ static const struct hda_codec_preset snd_hda_preset_realtek[] = { .patch = patch_alc662 }, { .id = 0x10ec0663, .name = "ALC663", .patch = patch_alc662 }, { .id = 0x10ec0665, .name = "ALC665", .patch = patch_alc662 }, + { .id = 0x10ec0668, .name = "ALC668", .patch = patch_alc662 }, { .id = 0x10ec0670, .name = "ALC670", .patch = patch_alc662 }, { .id = 0x10ec0680, .name = "ALC680", .patch = patch_alc680 }, { .id = 0x10ec0880, .name = "ALC880", .patch = patch_alc880 }, @@ -7096,6 +7095,7 @@ static const struct hda_codec_preset snd_hda_preset_realtek[] = { { .id = 0x10ec0889, .name = "ALC889", .patch = patch_alc882 }, { .id = 0x10ec0892, .name = "ALC892", .patch = patch_alc662 }, { .id = 0x10ec0899, .name = "ALC898", .patch = patch_alc882 }, + { .id = 0x10ec0900, .name = "ALC1150", .patch = patch_alc882 }, {} /* terminator */ }; diff --git a/sound/pci/hda/patch_via.c b/sound/pci/hda/patch_via.c index 72a2f60b087c..019e1a00414a 100644 --- a/sound/pci/hda/patch_via.c +++ b/sound/pci/hda/patch_via.c @@ -1809,11 +1809,11 @@ static int via_auto_fill_dac_nids(struct hda_codec *codec) { struct via_spec *spec = codec->spec; const struct auto_pin_cfg *cfg = &spec->autocfg; - int i, dac_num; + int i; hda_nid_t nid; + spec->multiout.num_dacs = 0; spec->multiout.dac_nids = spec->private_dac_nids; - dac_num = 0; for (i = 0; i < cfg->line_outs; i++) { hda_nid_t dac = 0; nid = cfg->line_out_pins[i]; @@ -1824,16 +1824,13 @@ static int via_auto_fill_dac_nids(struct hda_codec *codec) if (!i && parse_output_path(codec, nid, dac, 1, &spec->out_mix_path)) dac = spec->out_mix_path.path[0]; - if (dac) { - spec->private_dac_nids[i] = dac; - dac_num++; - } + if (dac) + spec->private_dac_nids[spec->multiout.num_dacs++] = dac; } if (!spec->out_path[0].depth && spec->out_mix_path.depth) { spec->out_path[0] = spec->out_mix_path; spec->out_mix_path.depth = 0; } - spec->multiout.num_dacs = dac_num; return 0; } @@ -3628,6 +3625,7 @@ static void set_widgets_power_state_vt2002P(struct hda_codec *codec) */ enum { VIA_FIXUP_INTMIC_BOOST, + VIA_FIXUP_ASUS_G75, }; static void via_fixup_intmic_boost(struct hda_codec *codec, @@ -3642,13 +3640,35 @@ static const struct hda_fixup via_fixups[] = { .type = HDA_FIXUP_FUNC, .v.func = via_fixup_intmic_boost, }, + [VIA_FIXUP_ASUS_G75] = { + .type = HDA_FIXUP_PINS, + .v.pins = (const struct hda_pintbl[]) { + /* set 0x24 and 0x33 as speakers */ + { 0x24, 0x991301f0 }, + { 0x33, 0x991301f1 }, /* subwoofer */ + { } + } + }, }; static const struct snd_pci_quirk vt2002p_fixups[] = { + SND_PCI_QUIRK(0x1043, 0x1487, "Asus G75", VIA_FIXUP_ASUS_G75), SND_PCI_QUIRK(0x1043, 0x8532, "Asus X202E", VIA_FIXUP_INTMIC_BOOST), {} }; +/* NIDs 0x24 and 0x33 on VT1802 have connections to non-existing NID 0x3e + * Replace this with mixer NID 0x1c + */ +static void fix_vt1802_connections(struct hda_codec *codec) +{ + static hda_nid_t conn_24[] = { 0x14, 0x1c }; + static hda_nid_t conn_33[] = { 0x1c }; + + snd_hda_override_conn_list(codec, 0x24, ARRAY_SIZE(conn_24), conn_24); + snd_hda_override_conn_list(codec, 0x33, ARRAY_SIZE(conn_33), conn_33); +} + /* patch for vt2002P */ static int patch_vt2002P(struct hda_codec *codec) { @@ -3663,6 +3683,8 @@ static int patch_vt2002P(struct hda_codec *codec) spec->aa_mix_nid = 0x21; override_mic_boost(codec, 0x2b, 0, 3, 40); override_mic_boost(codec, 0x29, 0, 3, 40); + if (spec->codec_type == VT1802) + fix_vt1802_connections(codec); add_secret_dac_path(codec); snd_hda_pick_fixup(codec, NULL, vt2002p_fixups, via_fixups); diff --git a/sound/pci/rme9652/hdspm.c b/sound/pci/rme9652/hdspm.c index f1cd1e387801..748e36c66603 100644 --- a/sound/pci/rme9652/hdspm.c +++ b/sound/pci/rme9652/hdspm.c @@ -3979,7 +3979,8 @@ static int snd_hdspm_get_sync_check(struct snd_kcontrol *kcontrol, case 8: /* SYNC IN */ val = hdspm_sync_in_sync_check(hdspm); break; default: - val = hdspm_s1_sync_check(hdspm, ucontrol->id.index-1); + val = hdspm_s1_sync_check(hdspm, + kcontrol->private_value-1); } break; @@ -4899,7 +4900,7 @@ snd_hdspm_proc_read_madi(struct snd_info_entry * entry, insel = "Coaxial"; break; default: - insel = "Unkown"; + insel = "Unknown"; } snd_iprintf(buffer, diff --git a/sound/soc/codecs/cs42l52.c b/sound/soc/codecs/cs42l52.c index 61599298fb26..4d8db3685e96 100644 --- a/sound/soc/codecs/cs42l52.c +++ b/sound/soc/codecs/cs42l52.c @@ -763,7 +763,7 @@ static int cs42l52_set_sysclk(struct snd_soc_dai *codec_dai, if ((freq >= CS42L52_MIN_CLK) && (freq <= CS42L52_MAX_CLK)) { cs42l52->sysclk = freq; } else { - dev_err(codec->dev, "Invalid freq paramter\n"); + dev_err(codec->dev, "Invalid freq parameter\n"); return -EINVAL; } return 0; diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c index 3fddc7ad1127..b2b2b37131bd 100644 --- a/sound/soc/codecs/wm8994.c +++ b/sound/soc/codecs/wm8994.c @@ -3722,7 +3722,7 @@ static irqreturn_t wm8958_mic_irq(int irq, void *data) } while (count--); if (count == 0) - dev_warn(codec->dev, "No impedence range reported for jack\n"); + dev_warn(codec->dev, "No impedance range reported for jack\n"); #ifndef CONFIG_SND_SOC_WM8994_MODULE trace_snd_soc_jack_irq(dev_name(codec->dev)); diff --git a/sound/soc/fsl/imx-pcm-fiq.c b/sound/soc/fsl/imx-pcm-fiq.c index 22c6130957ba..9ffc9e66308f 100644 --- a/sound/soc/fsl/imx-pcm-fiq.c +++ b/sound/soc/fsl/imx-pcm-fiq.c @@ -29,7 +29,6 @@ #include <asm/fiq.h> -#include <mach/irqs.h> #include <linux/platform_data/asoc-imx-ssi.h> #include "imx-ssi.h" diff --git a/sound/soc/fsl/imx-ssi.c b/sound/soc/fsl/imx-ssi.c index 006f7d465ed2..dd566444e3c3 100644 --- a/sound/soc/fsl/imx-ssi.c +++ b/sound/soc/fsl/imx-ssi.c @@ -48,7 +48,6 @@ #include <sound/soc.h> #include <linux/platform_data/asoc-imx-ssi.h> -#include <mach/hardware.h> #include "imx-ssi.h" diff --git a/sound/usb/endpoint.c b/sound/usb/endpoint.c index 7f78c6d782b0..34de6f2faf61 100644 --- a/sound/usb/endpoint.c +++ b/sound/usb/endpoint.c @@ -35,6 +35,7 @@ #define EP_FLAG_ACTIVATED 0 #define EP_FLAG_RUNNING 1 +#define EP_FLAG_STOPPING 2 /* * snd_usb_endpoint is a model that abstracts everything related to an @@ -502,10 +503,20 @@ static int wait_clear_urbs(struct snd_usb_endpoint *ep) if (alive) snd_printk(KERN_ERR "timeout: still %d active urbs on EP #%x\n", alive, ep->ep_num); + clear_bit(EP_FLAG_STOPPING, &ep->flags); return 0; } +/* sync the pending stop operation; + * this function itself doesn't trigger the stop operation + */ +void snd_usb_endpoint_sync_pending_stop(struct snd_usb_endpoint *ep) +{ + if (ep && test_bit(EP_FLAG_STOPPING, &ep->flags)) + wait_clear_urbs(ep); +} + /* * unlink active urbs. */ @@ -918,6 +929,8 @@ void snd_usb_endpoint_stop(struct snd_usb_endpoint *ep, if (wait) wait_clear_urbs(ep); + else + set_bit(EP_FLAG_STOPPING, &ep->flags); } } diff --git a/sound/usb/endpoint.h b/sound/usb/endpoint.h index 6376ccf10fd4..3d4c9705041f 100644 --- a/sound/usb/endpoint.h +++ b/sound/usb/endpoint.h @@ -19,6 +19,7 @@ int snd_usb_endpoint_set_params(struct snd_usb_endpoint *ep, int snd_usb_endpoint_start(struct snd_usb_endpoint *ep, int can_sleep); void snd_usb_endpoint_stop(struct snd_usb_endpoint *ep, int force, int can_sleep, int wait); +void snd_usb_endpoint_sync_pending_stop(struct snd_usb_endpoint *ep); int snd_usb_endpoint_activate(struct snd_usb_endpoint *ep); int snd_usb_endpoint_deactivate(struct snd_usb_endpoint *ep); void snd_usb_endpoint_free(struct list_head *head); diff --git a/sound/usb/pcm.c b/sound/usb/pcm.c index 37428f74dbb6..5c12a3fe8c3e 100644 --- a/sound/usb/pcm.c +++ b/sound/usb/pcm.c @@ -568,6 +568,9 @@ static int snd_usb_pcm_prepare(struct snd_pcm_substream *substream) goto unlock; } + snd_usb_endpoint_sync_pending_stop(subs->sync_endpoint); + snd_usb_endpoint_sync_pending_stop(subs->data_endpoint); + ret = set_format(subs, subs->cur_audiofmt); if (ret < 0) goto unlock; diff --git a/tools/testing/selftests/Makefile b/tools/testing/selftests/Makefile index 43480149119e..85baf11e2acd 100644 --- a/tools/testing/selftests/Makefile +++ b/tools/testing/selftests/Makefile @@ -1,4 +1,4 @@ -TARGETS = breakpoints kcmp mqueue vm cpu-hotplug memory-hotplug epoll +TARGETS = breakpoints kcmp mqueue vm cpu-hotplug memory-hotplug all: for TARGET in $(TARGETS); do \ diff --git a/tools/testing/selftests/epoll/Makefile b/tools/testing/selftests/epoll/Makefile deleted file mode 100644 index 19806ed62f50..000000000000 --- a/tools/testing/selftests/epoll/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -# Makefile for epoll selftests - -all: test_epoll -%: %.c - gcc -pthread -g -o $@ $^ - -run_tests: all - ./test_epoll - -clean: - $(RM) test_epoll diff --git a/tools/testing/selftests/epoll/test_epoll.c b/tools/testing/selftests/epoll/test_epoll.c deleted file mode 100644 index f7525392ce84..000000000000 --- a/tools/testing/selftests/epoll/test_epoll.c +++ /dev/null @@ -1,344 +0,0 @@ -/* - * tools/testing/selftests/epoll/test_epoll.c - * - * Copyright 2012 Adobe Systems Incorporated - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * Paton J. Lewis <[email protected]> - * - */ - -#include <errno.h> -#include <fcntl.h> -#include <pthread.h> -#include <stdio.h> -#include <stdlib.h> -#include <unistd.h> -#include <sys/epoll.h> -#include <sys/socket.h> - -/* - * A pointer to an epoll_item_private structure will be stored in the epoll - * item's event structure so that we can get access to the epoll_item_private - * data after calling epoll_wait: - */ -struct epoll_item_private { - int index; /* Position of this struct within the epoll_items array. */ - int fd; - uint32_t events; - pthread_mutex_t mutex; /* Guards the following variables... */ - int stop; - int status; /* Stores any error encountered while handling item. */ - /* The following variable allows us to test whether we have encountered - a problem while attempting to cancel and delete the associated - event. When the test program exits, 'deleted' should be exactly - one. If it is greater than one, then the failed test reflects a real - world situation where we would have tried to access the epoll item's - private data after deleting it: */ - int deleted; -}; - -struct epoll_item_private *epoll_items; - -/* - * Delete the specified item from the epoll set. In a real-world secneario this - * is where we would free the associated data structure, but in this testing - * environment we retain the structure so that we can test for double-deletion: - */ -void delete_item(int index) -{ - __sync_fetch_and_add(&epoll_items[index].deleted, 1); -} - -/* - * A pointer to a read_thread_data structure will be passed as the argument to - * each read thread: - */ -struct read_thread_data { - int stop; - int status; /* Indicates any error encountered by the read thread. */ - int epoll_set; -}; - -/* - * The function executed by the read threads: - */ -void *read_thread_function(void *function_data) -{ - struct read_thread_data *thread_data = - (struct read_thread_data *)function_data; - struct epoll_event event_data; - struct epoll_item_private *item_data; - char socket_data; - - /* Handle events until we encounter an error or this thread's 'stop' - condition is set: */ - while (1) { - int result = epoll_wait(thread_data->epoll_set, - &event_data, - 1, /* Number of desired events */ - 1000); /* Timeout in ms */ - if (result < 0) { - /* Breakpoints signal all threads. Ignore that while - debugging: */ - if (errno == EINTR) - continue; - thread_data->status = errno; - return 0; - } else if (thread_data->stop) - return 0; - else if (result == 0) /* Timeout */ - continue; - - /* We need the mutex here because checking for the stop - condition and re-enabling the epoll item need to be done - together as one atomic operation when EPOLL_CTL_DISABLE is - available: */ - item_data = (struct epoll_item_private *)event_data.data.ptr; - pthread_mutex_lock(&item_data->mutex); - - /* Remove the item from the epoll set if we want to stop - handling that event: */ - if (item_data->stop) - delete_item(item_data->index); - else { - /* Clear the data that was written to the other end of - our non-blocking socket: */ - do { - if (read(item_data->fd, &socket_data, 1) < 1) { - if ((errno == EAGAIN) || - (errno == EWOULDBLOCK)) - break; - else - goto error_unlock; - } - } while (item_data->events & EPOLLET); - - /* The item was one-shot, so re-enable it: */ - event_data.events = item_data->events; - if (epoll_ctl(thread_data->epoll_set, - EPOLL_CTL_MOD, - item_data->fd, - &event_data) < 0) - goto error_unlock; - } - - pthread_mutex_unlock(&item_data->mutex); - } - -error_unlock: - thread_data->status = item_data->status = errno; - pthread_mutex_unlock(&item_data->mutex); - return 0; -} - -/* - * A pointer to a write_thread_data structure will be passed as the argument to - * the write thread: - */ -struct write_thread_data { - int stop; - int status; /* Indicates any error encountered by the write thread. */ - int n_fds; - int *fds; -}; - -/* - * The function executed by the write thread. It writes a single byte to each - * socket in turn until the stop condition for this thread is set. If writing to - * a socket would block (i.e. errno was EAGAIN), we leave that socket alone for - * the moment and just move on to the next socket in the list. We don't care - * about the order in which we deliver events to the epoll set. In fact we don't - * care about the data we're writing to the pipes at all; we just want to - * trigger epoll events: - */ -void *write_thread_function(void *function_data) -{ - const char data = 'X'; - int index; - struct write_thread_data *thread_data = - (struct write_thread_data *)function_data; - while (!thread_data->stop) - for (index = 0; - !thread_data->stop && (index < thread_data->n_fds); - ++index) - if ((write(thread_data->fds[index], &data, 1) < 1) && - (errno != EAGAIN) && - (errno != EWOULDBLOCK)) { - thread_data->status = errno; - return; - } -} - -/* - * Arguments are currently ignored: - */ -int main(int argc, char **argv) -{ - const int n_read_threads = 100; - const int n_epoll_items = 500; - int index; - int epoll_set = epoll_create1(0); - struct write_thread_data write_thread_data = { - 0, 0, n_epoll_items, malloc(n_epoll_items * sizeof(int)) - }; - struct read_thread_data *read_thread_data = - malloc(n_read_threads * sizeof(struct read_thread_data)); - pthread_t *read_threads = malloc(n_read_threads * sizeof(pthread_t)); - pthread_t write_thread; - - printf("-----------------\n"); - printf("Runing test_epoll\n"); - printf("-----------------\n"); - - epoll_items = malloc(n_epoll_items * sizeof(struct epoll_item_private)); - - if (epoll_set < 0 || epoll_items == 0 || write_thread_data.fds == 0 || - read_thread_data == 0 || read_threads == 0) - goto error; - - if (sysconf(_SC_NPROCESSORS_ONLN) < 2) { - printf("Error: please run this test on a multi-core system.\n"); - goto error; - } - - /* Create the socket pairs and epoll items: */ - for (index = 0; index < n_epoll_items; ++index) { - int socket_pair[2]; - struct epoll_event event_data; - if (socketpair(AF_UNIX, - SOCK_STREAM | SOCK_NONBLOCK, - 0, - socket_pair) < 0) - goto error; - write_thread_data.fds[index] = socket_pair[0]; - epoll_items[index].index = index; - epoll_items[index].fd = socket_pair[1]; - if (pthread_mutex_init(&epoll_items[index].mutex, NULL) != 0) - goto error; - /* We always use EPOLLONESHOT because this test is currently - structured to demonstrate the need for EPOLL_CTL_DISABLE, - which only produces useful information in the EPOLLONESHOT - case (without EPOLLONESHOT, calling epoll_ctl with - EPOLL_CTL_DISABLE will never return EBUSY). If support for - testing events without EPOLLONESHOT is desired, it should - probably be implemented in a separate unit test. */ - epoll_items[index].events = EPOLLIN | EPOLLONESHOT; - if (index < n_epoll_items / 2) - epoll_items[index].events |= EPOLLET; - epoll_items[index].stop = 0; - epoll_items[index].status = 0; - epoll_items[index].deleted = 0; - event_data.events = epoll_items[index].events; - event_data.data.ptr = &epoll_items[index]; - if (epoll_ctl(epoll_set, - EPOLL_CTL_ADD, - epoll_items[index].fd, - &event_data) < 0) - goto error; - } - - /* Create and start the read threads: */ - for (index = 0; index < n_read_threads; ++index) { - read_thread_data[index].stop = 0; - read_thread_data[index].status = 0; - read_thread_data[index].epoll_set = epoll_set; - if (pthread_create(&read_threads[index], - NULL, - read_thread_function, - &read_thread_data[index]) != 0) - goto error; - } - - if (pthread_create(&write_thread, - NULL, - write_thread_function, - &write_thread_data) != 0) - goto error; - - /* Cancel all event pollers: */ -#ifdef EPOLL_CTL_DISABLE - for (index = 0; index < n_epoll_items; ++index) { - pthread_mutex_lock(&epoll_items[index].mutex); - ++epoll_items[index].stop; - if (epoll_ctl(epoll_set, - EPOLL_CTL_DISABLE, - epoll_items[index].fd, - NULL) == 0) - delete_item(index); - else if (errno != EBUSY) { - pthread_mutex_unlock(&epoll_items[index].mutex); - goto error; - } - /* EBUSY means events were being handled; allow the other thread - to delete the item. */ - pthread_mutex_unlock(&epoll_items[index].mutex); - } -#else - for (index = 0; index < n_epoll_items; ++index) { - pthread_mutex_lock(&epoll_items[index].mutex); - ++epoll_items[index].stop; - pthread_mutex_unlock(&epoll_items[index].mutex); - /* Wait in case a thread running read_thread_function is - currently executing code between epoll_wait and - pthread_mutex_lock with this item. Note that a longer delay - would make double-deletion less likely (at the expense of - performance), but there is no guarantee that any delay would - ever be sufficient. Note also that we delete all event - pollers at once for testing purposes, but in a real-world - environment we are likely to want to be able to cancel event - pollers at arbitrary times. Therefore we can't improve this - situation by just splitting this loop into two loops - (i.e. signal 'stop' for all items, sleep, and then delete all - items). We also can't fix the problem via EPOLL_CTL_DEL - because that command can't prevent the case where some other - thread is executing read_thread_function within the region - mentioned above: */ - usleep(1); - pthread_mutex_lock(&epoll_items[index].mutex); - if (!epoll_items[index].deleted) - delete_item(index); - pthread_mutex_unlock(&epoll_items[index].mutex); - } -#endif - - /* Shut down the read threads: */ - for (index = 0; index < n_read_threads; ++index) - __sync_fetch_and_add(&read_thread_data[index].stop, 1); - for (index = 0; index < n_read_threads; ++index) { - if (pthread_join(read_threads[index], NULL) != 0) - goto error; - if (read_thread_data[index].status) - goto error; - } - - /* Shut down the write thread: */ - __sync_fetch_and_add(&write_thread_data.stop, 1); - if ((pthread_join(write_thread, NULL) != 0) || write_thread_data.status) - goto error; - - /* Check for final error conditions: */ - for (index = 0; index < n_epoll_items; ++index) { - if (epoll_items[index].status != 0) - goto error; - if (pthread_mutex_destroy(&epoll_items[index].mutex) < 0) - goto error; - } - for (index = 0; index < n_epoll_items; ++index) - if (epoll_items[index].deleted != 1) { - printf("Error: item data deleted %1d times.\n", - epoll_items[index].deleted); - goto error; - } - - printf("[PASS]\n"); - return 0; - - error: - printf("[FAIL]\n"); - return errno; -} |