diff options
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_display_types.h | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp_link_training.c | 8 |
3 files changed, 14 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 1af3d48a7b86..a50310f412dd 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1771,6 +1771,8 @@ struct intel_dp { int max_lane_count; /* Max rate for the current link */ int max_rate; + /* Sequential link training failures after a passing LT */ + int seq_train_failures; } link; bool reset_link_params; int mso_link_count; diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 0833302baabc..5f54b0a9f597 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2961,6 +2961,7 @@ static void intel_dp_reset_link_params(struct intel_dp *intel_dp) { intel_dp->link.max_lane_count = intel_dp_max_common_lane_count(intel_dp); intel_dp->link.max_rate = intel_dp_max_common_rate(intel_dp); + intel_dp->link.seq_train_failures = 0; } /* Enable backlight PWM and backlight PP control. */ @@ -5075,6 +5076,9 @@ intel_dp_needs_link_retrain(struct intel_dp *intel_dp) intel_dp->lane_count)) return false; + if (intel_dp->link.seq_train_failures) + return true; + /* Retrain if link not ok */ return !intel_dp_link_ok(intel_dp, link_status); } diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c index 1164255cf5f2..8caf740e642f 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c @@ -1487,10 +1487,13 @@ void intel_dp_start_link_train(struct intel_dp *intel_dp, passed = intel_dp_link_train_all_phys(intel_dp, crtc_state, lttpr_count); if (passed) { + intel_dp->link.seq_train_failures = 0; intel_encoder_link_check_queue_work(encoder, 2000); return; } + intel_dp->link.seq_train_failures++; + /* * Ignore the link failure in CI * @@ -1508,6 +1511,11 @@ void intel_dp_start_link_train(struct intel_dp *intel_dp, return; } + if (intel_dp->link.seq_train_failures < 2) { + intel_encoder_link_check_queue_work(encoder, 0); + return; + } + intel_dp_schedule_fallback_link_training(intel_dp, crtc_state); } |