diff options
704 files changed, 20405 insertions, 4356 deletions
diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt index 06fc7602593a..37b2cafa4e52 100644 --- a/Documentation/devicetree/bindings/arm/arch_timer.txt +++ b/Documentation/devicetree/bindings/arm/arch_timer.txt @@ -19,6 +19,9 @@ to deliver its interrupts via SPIs. - clock-frequency : The frequency of the main counter, in Hz. Optional. +- always-on : a boolean property. If present, the timer is powered through an + always-on power domain, therefore it never loses context. + Example: timer { diff --git a/Documentation/devicetree/bindings/arm/exynos/smp-sysram.txt b/Documentation/devicetree/bindings/arm/exynos/smp-sysram.txt new file mode 100644 index 000000000000..4a0a4f70a0ce --- /dev/null +++ b/Documentation/devicetree/bindings/arm/exynos/smp-sysram.txt @@ -0,0 +1,38 @@ +Samsung Exynos SYSRAM for SMP bringup: +------------------------------------ + +Samsung SMP-capable Exynos SoCs use part of the SYSRAM for the bringup +of the secondary cores. Once the core gets powered up it executes the +code that is residing at some specific location of the SYSRAM. + +Therefore reserved section sub-nodes have to be added to the mmio-sram +declaration. These nodes are of two types depending upon secure or +non-secure execution environment. + +Required sub-node properties: +- compatible : depending upon boot mode, should be + "samsung,exynos4210-sysram" : for Secure SYSRAM + "samsung,exynos4210-sysram-ns" : for Non-secure SYSRAM + +The rest of the properties should follow the generic mmio-sram discription +found in ../../misc/sysram.txt + +Example: + + sysram@02020000 { + compatible = "mmio-sram"; + reg = <0x02020000 0x54000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x02020000 0x54000>; + + smp-sysram@0 { + compatible = "samsung,exynos4210-sysram"; + reg = <0x0 0x1000>; + }; + + smp-sysram@53000 { + compatible = "samsung,exynos4210-sysram-ns"; + reg = <0x53000 0x1000>; + }; + }; diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt new file mode 100644 index 000000000000..857f12636eb2 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/rockchip.txt @@ -0,0 +1,10 @@ +Rockchip platforms device tree bindings +--------------------------------------- + +- bq Curie 2 tablet: + Required root node properties: + - compatible = "mundoreader,bq-curie2", "rockchip,rk3066a"; + +- Radxa Rock board: + Required root node properties: + - compatible = "radxa,rock", "rockchip,rk3188"; diff --git a/Documentation/devicetree/bindings/ata/apm-xgene.txt b/Documentation/devicetree/bindings/ata/apm-xgene.txt index 7bcfbf59810e..a668f0e7d001 100644 --- a/Documentation/devicetree/bindings/ata/apm-xgene.txt +++ b/Documentation/devicetree/bindings/ata/apm-xgene.txt @@ -24,6 +24,7 @@ Required properties: * "sata-phy" for the SATA 6.0Gbps PHY Optional properties: +- dma-coherent : Present if dma operations are coherent - status : Shall be "ok" if enabled or "disabled" if disabled. Default is "ok". @@ -55,6 +56,7 @@ Example: <0x0 0x1f22e000 0x0 0x1000>, <0x0 0x1f227000 0x0 0x1000>; interrupts = <0x0 0x87 0x4>; + dma-coherent; status = "ok"; clocks = <&sataclk 0>; phys = <&phy2 0>; @@ -69,6 +71,7 @@ Example: <0x0 0x1f23e000 0x0 0x1000>, <0x0 0x1f237000 0x0 0x1000>; interrupts = <0x0 0x88 0x4>; + dma-coherent; status = "ok"; clocks = <&sataclk 0>; phys = <&phy3 0>; diff --git a/Documentation/devicetree/bindings/clock/altr_socfpga.txt b/Documentation/devicetree/bindings/clock/altr_socfpga.txt index 5dfd145d3ccf..f72e80e0dade 100644 --- a/Documentation/devicetree/bindings/clock/altr_socfpga.txt +++ b/Documentation/devicetree/bindings/clock/altr_socfpga.txt @@ -21,8 +21,8 @@ Optional properties: - fixed-divider : If clocks have a fixed divider value, use this property. - clk-gate : For "socfpga-gate-clk", clk-gate contains the gating register and the bit index. -- div-reg : For "socfpga-gate-clk", div-reg contains the divider register, bit shift, - and width. +- div-reg : For "socfpga-gate-clk" and "socfpga-periph-clock", div-reg contains + the divider register, bit shift, and width. - clk-phase : For the sdmmc_clk, contains the value of the clock phase that controls the SDMMC CIU clock. The first value is the clk_sample(smpsel), and the second value is the cclk_in_drv(drvsel). The clk-phase is used to enable the correct diff --git a/Documentation/devicetree/bindings/clock/at91-clock.txt b/Documentation/devicetree/bindings/clock/at91-clock.txt index cd5e23912888..b3d544ca522a 100644 --- a/Documentation/devicetree/bindings/clock/at91-clock.txt +++ b/Documentation/devicetree/bindings/clock/at91-clock.txt @@ -6,6 +6,16 @@ This binding uses the common clock binding[1]. Required properties: - compatible : shall be one of the following: + "atmel,at91sam9x5-sckc": + at91 SCKC (Slow Clock Controller) + This node contains the slow clock definitions. + + "atmel,at91sam9x5-clk-slow-osc": + at91 slow oscillator + + "atmel,at91sam9x5-clk-slow-rc-osc": + at91 internal slow RC oscillator + "atmel,at91rm9200-pmc" or "atmel,at91sam9g45-pmc" or "atmel,at91sam9n12-pmc" or @@ -15,8 +25,18 @@ Required properties: All at91 specific clocks (clocks defined below) must be child node of the PMC node. + "atmel,at91sam9x5-clk-slow" (under sckc node) + or + "atmel,at91sam9260-clk-slow" (under pmc node): + at91 slow clk + + "atmel,at91rm9200-clk-main-osc" + "atmel,at91sam9x5-clk-main-rc-osc" + at91 main clk sources + + "atmel,at91sam9x5-clk-main" "atmel,at91rm9200-clk-main": - at91 main oscillator + at91 main clock "atmel,at91rm9200-clk-master" or "atmel,at91sam9x5-clk-master": @@ -54,6 +74,63 @@ Required properties: "atmel,at91sam9x5-clk-utmi": at91 utmi clock +Required properties for SCKC node: +- reg : defines the IO memory reserved for the SCKC. +- #size-cells : shall be 0 (reg is used to encode clk id). +- #address-cells : shall be 1 (reg is used to encode clk id). + + +For example: + sckc: sckc@fffffe50 { + compatible = "atmel,sama5d3-pmc"; + reg = <0xfffffe50 0x4> + #size-cells = <0>; + #address-cells = <1>; + + /* put at91 slow clocks here */ + }; + + +Required properties for internal slow RC oscillator: +- #clock-cells : from common clock binding; shall be set to 0. +- clock-frequency : define the internal RC oscillator frequency. + +Optional properties: +- clock-accuracy : define the internal RC oscillator accuracy. + +For example: + slow_rc_osc: slow_rc_osc { + compatible = "atmel,at91sam9x5-clk-slow-rc-osc"; + clock-frequency = <32768>; + clock-accuracy = <50000000>; + }; + +Required properties for slow oscillator: +- #clock-cells : from common clock binding; shall be set to 0. +- clocks : shall encode the main osc source clk sources (see atmel datasheet). + +Optional properties: +- atmel,osc-bypass : boolean property. Set this when a clock signal is directly + provided on XIN. + +For example: + slow_osc: slow_osc { + compatible = "atmel,at91rm9200-clk-slow-osc"; + #clock-cells = <0>; + clocks = <&slow_xtal>; + }; + +Required properties for slow clock: +- #clock-cells : from common clock binding; shall be set to 0. +- clocks : shall encode the slow clk sources (see atmel datasheet). + +For example: + clk32k: slck { + compatible = "atmel,at91sam9x5-clk-slow"; + #clock-cells = <0>; + clocks = <&slow_rc_osc &slow_osc>; + }; + Required properties for PMC node: - reg : defines the IO memory reserved for the PMC. - #size-cells : shall be 0 (reg is used to encode clk id). @@ -62,7 +139,7 @@ Required properties for PMC node: - interrupt-controller : tell that the PMC is an interrupt controller. - #interrupt-cells : must be set to 1. The first cell encodes the interrupt id, and reflect the bit position in the PMC_ER/DR/SR registers. - You can use the dt macros defined in dt-bindings/clk/at91.h. + You can use the dt macros defined in dt-bindings/clock/at91.h. 0 (AT91_PMC_MOSCS) -> main oscillator ready 1 (AT91_PMC_LOCKA) -> PLL A ready 2 (AT91_PMC_LOCKB) -> PLL B ready @@ -85,24 +162,57 @@ For example: /* put at91 clocks here */ }; +Required properties for main clock internal RC oscillator: +- interrupt-parent : must reference the PMC node. +- interrupts : shall be set to "<0>". +- clock-frequency : define the internal RC oscillator frequency. + +Optional properties: +- clock-accuracy : define the internal RC oscillator accuracy. + +For example: + main_rc_osc: main_rc_osc { + compatible = "atmel,at91sam9x5-clk-main-rc-osc"; + interrupt-parent = <&pmc>; + interrupts = <0>; + clock-frequency = <12000000>; + clock-accuracy = <50000000>; + }; + +Required properties for main clock oscillator: +- interrupt-parent : must reference the PMC node. +- interrupts : shall be set to "<0>". +- #clock-cells : from common clock binding; shall be set to 0. +- clocks : shall encode the main osc source clk sources (see atmel datasheet). + +Optional properties: +- atmel,osc-bypass : boolean property. Specified if a clock signal is provided + on XIN. + + clock signal is directly provided on XIN pin. + +For example: + main_osc: main_osc { + compatible = "atmel,at91rm9200-clk-main-osc"; + interrupt-parent = <&pmc>; + interrupts = <0>; + #clock-cells = <0>; + clocks = <&main_xtal>; + }; + Required properties for main clock: - interrupt-parent : must reference the PMC node. - interrupts : shall be set to "<0>". - #clock-cells : from common clock binding; shall be set to 0. -- clocks (optional if clock-frequency is provided) : shall be the slow clock - phandle. This clock is used to calculate the main clock rate if - "clock-frequency" is not provided. -- clock-frequency : the main oscillator frequency.Prefer the use of - "clock-frequency" over automatic clock rate calculation. +- clocks : shall encode the main clk sources (see atmel datasheet). For example: main: mainck { - compatible = "atmel,at91rm9200-clk-main"; + compatible = "atmel,at91sam9x5-clk-main"; interrupt-parent = <&pmc>; interrupts = <0>; #clock-cells = <0>; - clocks = <&ck32k>; - clock-frequency = <18432000>; + clocks = <&main_rc_osc &main_osc>; }; Required properties for master clock: diff --git a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt b/Documentation/devicetree/bindings/net/socfpga-dwmac.txt index 636f0ac4e223..2a60cd3e8d5d 100644 --- a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt +++ b/Documentation/devicetree/bindings/net/socfpga-dwmac.txt @@ -23,5 +23,5 @@ gmac0: ethernet@ff700000 { interrupt-names = "macirq"; mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */ clocks = <&emac_0_clk>; - clocks-names = "stmmaceth"; + clock-names = "stmmaceth"; }; diff --git a/Documentation/devicetree/bindings/net/stmmac.txt b/Documentation/devicetree/bindings/net/stmmac.txt index 80c1fb8bfbb8..a2acd2b26baf 100644 --- a/Documentation/devicetree/bindings/net/stmmac.txt +++ b/Documentation/devicetree/bindings/net/stmmac.txt @@ -33,7 +33,7 @@ Optional properties: - max-frame-size: See ethernet.txt file in the same directory - clocks: If present, the first clock should be the GMAC main clock, further clocks may be specified in derived bindings. -- clocks-names: One name for each entry in the clocks property, the +- clock-names: One name for each entry in the clocks property, the first one should be "stmmaceth". Examples: diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-st.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-st.txt index 4bd5be0e5e7d..26bcb18f4e60 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-st.txt +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-st.txt @@ -83,7 +83,7 @@ Example: reg = <0xfe61f080 0x4>; reg-names = "irqmux"; interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>; - interrupts-names = "irqmux"; + interrupt-names = "irqmux"; ranges = <0 0xfe610000 0x5000>; PIO0: gpio@fe610000 { @@ -165,7 +165,7 @@ sdhci0:sdhci@fe810000{ interrupt-parent = <&PIO3>; #interrupt-cells = <2>; interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; /* Interrupt line via PIO3-3 */ - interrupts-names = "card-detect"; + interrupt-names = "card-detect"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mmc>; }; diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-reset.txt b/Documentation/devicetree/bindings/reset/socfpga-reset.txt index ecdb57d69dbf..32c1c8bfd5dc 100644 --- a/Documentation/devicetree/bindings/arm/altera/socfpga-reset.txt +++ b/Documentation/devicetree/bindings/reset/socfpga-reset.txt @@ -3,9 +3,11 @@ Altera SOCFPGA Reset Manager Required properties: - compatible : "altr,rst-mgr" - reg : Should contain 1 register ranges(address and length) +- #reset-cells: 1 Example: rstmgr@ffd05000 { + #reset-cells = <1>; compatible = "altr,rst-mgr"; reg = <0xffd05000 0x1000>; }; diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.txt new file mode 100644 index 000000000000..4ce24d425bf1 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.txt @@ -0,0 +1,78 @@ +QCOM GSBI (General Serial Bus Interface) Driver + +The GSBI controller is modeled as a node with zero or more child nodes, each +representing a serial sub-node device that is mux'd as part of the GSBI +configuration settings. The mode setting will govern the input/output mode of +the 4 GSBI IOs. + +Required properties: +- compatible: must contain "qcom,gsbi-v1.0.0" for APQ8064/IPQ8064 +- reg: Address range for GSBI registers +- clocks: required clock +- clock-names: must contain "iface" entry +- qcom,mode : indicates MUX value for configuration of the serial interface. + Please reference dt-bindings/soc/qcom,gsbi.h for valid mux values. + +Optional properties: +- qcom,crci : indicates CRCI MUX value for QUP CRCI ports. Please reference + dt-bindings/soc/qcom,gsbi.h for valid CRCI mux values. + +Required properties if child node exists: +- #address-cells: Must be 1 +- #size-cells: Must be 1 +- ranges: Must be present + +Properties for children: + +A GSBI controller node can contain 0 or more child nodes representing serial +devices. These serial devices can be a QCOM UART, I2C controller, spi +controller, or some combination of aforementioned devices. + +See the following for child node definitions: +Documentation/devicetree/bindings/i2c/qcom,i2c-qup.txt +Documentation/devicetree/bindings/spi/qcom,spi-qup.txt +Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt + +Example for APQ8064: + +#include <dt-bindings/soc/qcom,gsbi.h> + + gsbi4@16300000 { + compatible = "qcom,gsbi-v1.0.0"; + reg = <0x16300000 0x100>; + clocks = <&gcc GSBI4_H_CLK>; + clock-names = "iface"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + qcom,mode = <GSBI_PROT_I2C_UART>; + qcom,crci = <GSBI_CRCI_QUP>; + + /* child nodes go under here */ + + i2c_qup4: i2c@16380000 { + compatible = "qcom,i2c-qup-v1.1.1"; + reg = <0x16380000 0x1000>; + interrupts = <0 153 0>; + + clocks = <&gcc GSBI4_QUP_CLK>, <&gcc GSBI4_H_CLK>; + clock-names = "core", "iface"; + + clock-frequency = <200000>; + + #address-cells = <1>; + #size-cells = <0>; + + }; + + uart4: serial@16340000 { + compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; + reg = <0x16340000 0x1000>, + <0x16300000 0x1000>; + interrupts = <0 152 0x0>; + clocks = <&gcc GSBI4_UART_CLK>, <&gcc GSBI4_H_CLK>; + clock-names = "core", "iface"; + status = "ok"; + }; + }; + diff --git a/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt b/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt index 569b26c4a81e..60ca07996458 100644 --- a/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt +++ b/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt @@ -47,7 +47,7 @@ mcasp0: mcasp0@1d00000 { reg = <0x100000 0x3000>; reg-names "mpu"; interrupts = <82>, <83>; - interrupts-names = "tx", "rx"; + interrupt-names = "tx", "rx"; op-mode = <0>; /* MCASP_IIS_MODE */ tdm-slots = <2>; serial-dir = < diff --git a/Documentation/devicetree/bindings/sound/tlv320aic31xx.txt b/Documentation/devicetree/bindings/sound/tlv320aic31xx.txt index 74c66dee3e14..eff12be5e789 100644 --- a/Documentation/devicetree/bindings/sound/tlv320aic31xx.txt +++ b/Documentation/devicetree/bindings/sound/tlv320aic31xx.txt @@ -13,6 +13,9 @@ Required properties: "ti,tlv320aic3111" - TLV320AIC3111 (stereo speaker amp, MiniDSP) - reg - <int> - I2C slave address +- HPVDD-supply, SPRVDD-supply, SPLVDD-supply, AVDD-supply, IOVDD-supply, + DVDD-supply : power supplies for the device as covered in + Documentation/devicetree/bindings/regulator/regulator.txt Optional properties: @@ -24,9 +27,6 @@ Optional properties: 3 or MICBIAS_AVDD - MICBIAS output is connected to AVDD If this node is not mentioned or if the value is unknown, then micbias is set to 2.0V. -- HPVDD-supply, SPRVDD-supply, SPLVDD-supply, AVDD-supply, IOVDD-supply, - DVDD-supply : power supplies for the device as covered in - Documentation/devicetree/bindings/regulator/regulator.txt CODEC output pins: * HPL diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index abc308083acb..15772f36b71f 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -79,6 +79,7 @@ microchip Microchip Technology Inc. mosaixtech Mosaix Technologies, Inc. moxa Moxa mpl MPL AG +mundoreader Mundo Reader S.L. mxicy Macronix International Co., Ltd. national National Semiconductor neonode Neonode Inc. @@ -98,6 +99,7 @@ powervr PowerVR (deprecated, use img) qca Qualcomm Atheros, Inc. qcom Qualcomm Technologies, Inc qnap QNAP Systems, Inc. +radxa Radxa raidsonic RaidSonic Technology GmbH ralink Mediatek/Ralink Technology Corp. ramtron Ramtron International @@ -123,6 +125,7 @@ stericsson ST-Ericsson synology Synology, Inc. ti Texas Instruments tlm Trusted Logic Mobility +toradex Toradex AG toshiba Toshiba Corporation toumaz Toumaz usi Universal Scientifc Industrial Co., Ltd. diff --git a/MAINTAINERS b/MAINTAINERS index e67ea2442041..285e03fcfed9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1617,12 +1617,6 @@ S: Supported F: drivers/misc/atmel_tclib.c F: drivers/clocksource/tcb_clksrc.c -ATMEL TSADCC DRIVER -M: Josh Wu <[email protected]> -S: Supported -F: drivers/input/touchscreen/atmel_tsadcc.c - ATMEL USBA UDC DRIVER M: Nicolas Ferre <[email protected]> L: [email protected] (moderated for non-subscribers) @@ -3485,6 +3479,12 @@ S: Maintained F: drivers/extcon/ F: Documentation/extcon/ +EXYNOS DP DRIVER +M: Jingoo Han <[email protected]> +S: Maintained +F: drivers/gpu/drm/exynos/exynos_dp* + EXYNOS MIPI DISPLAY DRIVERS M: Inki Dae <[email protected]> M: Donghwa Lee <[email protected]> @@ -3550,7 +3550,7 @@ F: include/scsi/libfcoe.h F: include/uapi/scsi/fc/ FILE LOCKING (flock() and fcntl()/lockf()) -M: Jeff Layton <[email protected]> +M: Jeff Layton <[email protected]> M: J. Bruce Fields <[email protected]> S: Maintained @@ -5108,14 +5108,19 @@ F: drivers/s390/kvm/ KERNEL VIRTUAL MACHINE (KVM) FOR ARM M: Christoffer Dall <[email protected]> +M: Marc Zyngier <[email protected]> +L: [email protected] (moderated for non-subscribers) W: http://systems.cs.columbia.edu/projects/kvm-arm S: Supported F: arch/arm/include/uapi/asm/kvm* F: arch/arm/include/asm/kvm* F: arch/arm/kvm/ +F: virt/kvm/arm/ +F: include/kvm/arm_* KERNEL VIRTUAL MACHINE FOR ARM64 (KVM/arm64) +M: Christoffer Dall <[email protected]> M: Marc Zyngier <[email protected]> L: [email protected] (moderated for non-subscribers) @@ -1,7 +1,7 @@ VERSION = 3 PATCHLEVEL = 15 SUBLEVEL = 0 -EXTRAVERSION = -rc2 +EXTRAVERSION = -rc4 NAME = Shuffling Zombie Juror # *DOCUMENTATION* diff --git a/arch/arc/kernel/entry.S b/arch/arc/kernel/entry.S index 819dd5f7eb05..29b82adbf0b4 100644 --- a/arch/arc/kernel/entry.S +++ b/arch/arc/kernel/entry.S @@ -614,11 +614,13 @@ resume_user_mode_begin: resume_kernel_mode: -#ifdef CONFIG_PREEMPT - - ; This is a must for preempt_schedule_irq() + ; Disable Interrupts from this point on + ; CONFIG_PREEMPT: This is a must for preempt_schedule_irq() + ; !CONFIG_PREEMPT: To ensure restore_regs is intr safe IRQ_DISABLE r9 +#ifdef CONFIG_PREEMPT + ; Can't preempt if preemption disabled GET_CURR_THR_INFO_FROM_SP r10 ld r8, [r10, THREAD_INFO_PREEMPT_COUNT] diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ab438cb5af55..2bb6bcee025c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -30,9 +30,9 @@ config ARM select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT) select HAVE_ARCH_TRACEHOOK select HAVE_BPF_JIT + select HAVE_CC_STACKPROTECTOR select HAVE_CONTEXT_TRACKING select HAVE_C_RECORDMCOUNT - select HAVE_CC_STACKPROTECTOR select HAVE_DEBUG_KMEMLEAK select HAVE_DMA_API_DEBUG select HAVE_DMA_ATTRS @@ -311,6 +311,7 @@ config ARCH_MULTIPLATFORM select ARM_HAS_SG_CHAIN select ARM_PATCH_PHYS_VIRT select AUTO_ZRELADDR + select CLKSRC_OF select COMMON_CLK select GENERIC_CLOCKEVENTS select MULTI_IRQ_HANDLER @@ -375,7 +376,6 @@ config ARCH_AT91 select ARCH_REQUIRE_GPIOLIB select CLKDEV_LOOKUP select IRQ_DOMAIN - select NEED_MACH_GPIO_H select NEED_MACH_IO_H if PCCARD select PINCTRL select PINCTRL_AT91 if USE_OF @@ -422,8 +422,8 @@ config ARCH_EFM32 bool "Energy Micro efm32" depends on !MMU select ARCH_REQUIRE_GPIOLIB - select AUTO_ZRELADDR select ARM_NVIC + select AUTO_ZRELADDR select CLKSRC_OF select COMMON_CLK select CPU_V7M @@ -511,8 +511,8 @@ config ARCH_IXP4XX bool "IXP4xx-based" depends on MMU select ARCH_HAS_DMA_SET_COHERENT_MASK - select ARCH_SUPPORTS_BIG_ENDIAN select ARCH_REQUIRE_GPIOLIB + select ARCH_SUPPORTS_BIG_ENDIAN select CLKSRC_MMIO select CPU_XSCALE select DMABOUNCE if PCI @@ -843,6 +843,7 @@ config ARCH_EXYNOS select HAVE_S3C_RTC if RTC_CLASS select NEED_MACH_MEMORY_H select SPARSE_IRQ + select SRAM select USE_OF help Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5) @@ -1110,9 +1111,9 @@ config ARM_NR_BANKS default 8 config IWMMXT - bool "Enable iWMMXt support" if !CPU_PJ4 - depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 - default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4 + bool "Enable iWMMXt support" + depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 || CPU_PJ4B + default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4 || CPU_PJ4B help Enable support for iWMMXt context switching at run time if running on a CPU that supports it. @@ -1575,8 +1576,8 @@ config BIG_LITTLE config BL_SWITCHER bool "big.LITTLE switcher support" depends on BIG_LITTLE && MCPM && HOTPLUG_CPU - select CPU_PM select ARM_CPU_SUSPEND + select CPU_PM help The big.LITTLE "switcher" provides the core functionality to transparently handle transition between a cluster of A15's @@ -1920,9 +1921,9 @@ config XEN depends on CPU_V7 && !CPU_V6 depends on !GENERIC_ATOMIC64 depends on MMU + select ARCH_DMA_ADDR_T_64BIT select ARM_PSCI select SWIOTLB_XEN - select ARCH_DMA_ADDR_T_64BIT help Say Y if you want to run Linux in a Virtual Machine on Xen on ARM. diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 4a2fc0bf6fc9..eab8ecbe69c1 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -1030,9 +1030,9 @@ config DEBUG_UART_PHYS default 0x40100000 if DEBUG_PXA_UART1 default 0x42000000 if ARCH_GEMINI default 0x7c0003f8 if FOOTBRIDGE - default 0x80230000 if DEBUG_PICOXCELL_UART default 0x80070000 if DEBUG_IMX23_UART default 0x80074000 if DEBUG_IMX28_UART + default 0x80230000 if DEBUG_PICOXCELL_UART default 0x808c0000 if ARCH_EP93XX default 0x90020000 if DEBUG_NSPIRE_CLASSIC_UART || DEBUG_NSPIRE_CX_UART default 0xb0090000 if DEBUG_VEXPRESS_UART0_CRX @@ -1096,22 +1096,22 @@ config DEBUG_UART_VIRT default 0xfeb26000 if DEBUG_RK3X_UART1 default 0xfeb30c00 if DEBUG_KEYSTONE_UART0 default 0xfeb31000 if DEBUG_KEYSTONE_UART1 - default 0xfec12000 if DEBUG_MVEBU_UART || DEBUG_MVEBU_UART_ALTERNATE - default 0xfed60000 if DEBUG_RK29_UART0 - default 0xfed64000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2 - default 0xfed68000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3 default 0xfec02000 if DEBUG_SOCFPGA_UART + default 0xfec12000 if DEBUG_MVEBU_UART || DEBUG_MVEBU_UART_ALTERNATE default 0xfec20000 if DEBUG_DAVINCI_DMx_UART0 default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1 default 0xfed0d000 if DEBUG_DAVINCI_DA8XX_UART2 default 0xfed12000 if ARCH_KIRKWOOD + default 0xfed60000 if DEBUG_RK29_UART0 + default 0xfed64000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2 + default 0xfed68000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3 default 0xfedc0000 if ARCH_EP93XX default 0xfee003f8 if FOOTBRIDGE default 0xfee20000 if DEBUG_NSPIRE_CLASSIC_UART || DEBUG_NSPIRE_CX_UART - default 0xfef36000 if DEBUG_HIGHBANK_UART default 0xfee82340 if ARCH_IOP13XX default 0xfef00000 if ARCH_IXP4XX && !CPU_BIG_ENDIAN default 0xfef00003 if ARCH_IXP4XX && CPU_BIG_ENDIAN + default 0xfef36000 if DEBUG_HIGHBANK_UART default 0xfefff700 if ARCH_IOP33X default 0xff003000 if DEBUG_U300_UART default DEBUG_UART_PHYS if !MMU diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 35c146f31e46..e095bd265111 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -51,10 +51,9 @@ dtb-$(CONFIG_ARCH_AT91) += sama5d36ek.dtb dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb +dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm28155-ap.dtb \ bcm21664-garnet.dtb -dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb -dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb dtb-$(CONFIG_ARCH_BERLIN) += \ berlin2-sony-nsz-gs7.dtb \ berlin2cd-google-chromecast.dtb @@ -74,6 +73,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ exynos5250-smdk5250.dtb \ exynos5250-snow.dtb \ exynos5420-arndale-octa.dtb \ + exynos5420-peach-pit.dtb \ exynos5420-smdk5420.dtb \ exynos5440-sd5v1.dtb \ exynos5440-ssdk5440.dtb @@ -158,10 +158,12 @@ dtb-$(CONFIG_ARCH_MXC) += \ imx27-phytec-phycard-s-rdk.dtb \ imx31-bug.dtb \ imx35-eukrea-mbimxsd35-baseboard.dtb \ + imx35-pdk.dtb \ imx50-evk.dtb \ imx51-apf51.dtb \ imx51-apf51dev.dtb \ imx51-babbage.dtb \ + imx51-digi-connectcore-jsk.dtb \ imx51-eukrea-mbimxsd51-baseboard.dtb \ imx53-ard.dtb \ imx53-m53evk.dtb \ @@ -180,6 +182,8 @@ dtb-$(CONFIG_ARCH_MXC) += \ imx6dl-gw54xx.dtb \ imx6dl-hummingboard.dtb \ imx6dl-nitrogen6x.dtb \ + imx6dl-phytec-pbab01.dtb \ + imx6dl-riotboard.dtb \ imx6dl-sabreauto.dtb \ imx6dl-sabrelite.dtb \ imx6dl-sabresd.dtb \ @@ -204,6 +208,7 @@ dtb-$(CONFIG_ARCH_MXC) += \ imx6q-udoo.dtb \ imx6q-wandboard.dtb \ imx6sl-evk.dtb \ + vf610-colibri.dtb \ vf610-cosmic.dtb \ vf610-twr.dtb dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ @@ -246,6 +251,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ omap3-sbc-t3730.dtb \ omap3-devkit8000.dtb \ omap3-beagle-xm.dtb \ + omap3-beagle-xm-ab.dtb \ omap3-evm.dtb \ omap3-evm-37xx.dtb \ omap3-ldp.dtb \ @@ -294,13 +300,6 @@ dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb dtb-$(CONFIG_ARCH_QCOM) += qcom-msm8660-surf.dtb \ qcom-msm8960-cdp.dtb \ qcom-apq8074-dragonboard.dtb -dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \ - ste-hrefprev60-stuib.dtb \ - ste-hrefprev60-tvk.dtb \ - ste-hrefv60plus-stuib.dtb \ - ste-hrefv60plus-tvk.dtb \ - ste-ccu8540.dtb \ - ste-ccu9540.dtb dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb dtb-$(CONFIG_ARCH_S3C64XX) += s3c6410-mini6410.dtb \ s3c6410-smdk6410.dtb @@ -322,11 +321,13 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \ sh7372-mackerel.dtb dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \ r7s72100-genmai-reference.dtb \ + r8a7791-henninger.dtb \ r8a7791-koelsch.dtb \ r8a7790-lager.dtb dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_arria5_socdk.dtb \ socfpga_cyclone5_socdk.dtb \ socfpga_cyclone5_sockit.dtb \ + socfpga_cyclone5_socrates.dtb \ socfpga_vt.dtb dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \ spear1340-evb.dtb @@ -335,10 +336,12 @@ dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \ spear320-evb.dtb \ spear320-hmi.dtb dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb -dtb-$(CONFIG_ARCH_STI)+= stih415-b2000.dtb \ - stih416-b2000.dtb \ +dtb-$(CONFIG_ARCH_STI)+= stih407-b2120.dtb \ + stih415-b2000.dtb \ stih415-b2020.dtb \ - stih416-b2020.dtb + stih416-b2000.dtb \ + stih416-b2020.dtb \ + stih416-b2020-revE.dtb dtb-$(CONFIG_ARCH_SUNXI) += \ sun4i-a10-a1000.dtb \ sun4i-a10-cubieboard.dtb \ @@ -348,9 +351,12 @@ dtb-$(CONFIG_ARCH_SUNXI) += \ sun4i-a10-olinuxino-lime.dtb \ sun4i-a10-pcduino.dtb \ sun5i-a10s-olinuxino-micro.dtb \ + sun5i-a10s-r7-tv-dongle.dtb \ sun5i-a13-olinuxino.dtb \ sun5i-a13-olinuxino-micro.dtb \ + sun6i-a31-app4-evb1.dtb \ sun6i-a31-colombus.dtb \ + sun6i-a31-m9.dtb \ sun7i-a20-cubieboard2.dtb \ sun7i-a20-cubietruck.dtb \ sun7i-a20-olinuxino-micro.dtb @@ -367,11 +373,22 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \ tegra30-beaver.dtb \ tegra30-cardhu-a02.dtb \ tegra30-cardhu-a04.dtb \ + tegra30-colibri-eval-v3.dtb \ tegra114-dalmore.dtb \ + tegra114-roth.dtb \ + tegra114-tn7.dtb \ + tegra124-jetson-tk1.dtb \ tegra124-venice2.dtb +dtb-$(CONFIG_ARCH_U300) += ste-u300.dtb +dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \ + ste-hrefprev60-stuib.dtb \ + ste-hrefprev60-tvk.dtb \ + ste-hrefv60plus-stuib.dtb \ + ste-hrefv60plus-tvk.dtb \ + ste-ccu8540.dtb \ + ste-ccu9540.dtb dtb-$(CONFIG_ARCH_VERSATILE) += versatile-ab.dtb \ versatile-pb.dtb -dtb-$(CONFIG_ARCH_U300) += ste-u300.dtb dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \ vexpress-v2p-ca9.dtb \ vexpress-v2p-ca15-tc1.dtb \ diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi index e3f27ec31718..2e7d932887b5 100644 --- a/arch/arm/boot/dts/am335x-bone-common.dtsi +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi @@ -183,7 +183,7 @@ &usb { status = "okay"; - control@44e10000 { + control@44e10620 { status = "okay"; }; @@ -204,7 +204,7 @@ dr_mode = "host"; }; - dma-controller@07402000 { + dma-controller@47402000 { status = "okay"; }; }; diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index 28ae040e7c3d..6028217ace0f 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -301,8 +301,8 @@ am335x_evm_audio_pins: am335x_evm_audio_pins { pinctrl-single,pins = < - 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rx_dv.mcasp1_aclkx */ - 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_txd3.mcasp1_fsx */ + 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */ + 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */ 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */ 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ >; @@ -331,7 +331,7 @@ &usb { status = "okay"; - control@44e10000 { + control@44e10620 { status = "okay"; }; @@ -352,7 +352,7 @@ dr_mode = "host"; }; - dma-controller@07402000 { + dma-controller@47402000 { status = "okay"; }; }; diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts index ec08f6f677c3..ab238850a7b2 100644 --- a/arch/arm/boot/dts/am335x-evmsk.dts +++ b/arch/arm/boot/dts/am335x-evmsk.dts @@ -364,7 +364,7 @@ &usb { status = "okay"; - control@44e10000 { + control@44e10620 { status = "okay"; }; @@ -385,7 +385,7 @@ dr_mode = "host"; }; - dma-controller@07402000 { + dma-controller@47402000 { status = "okay"; }; }; diff --git a/arch/arm/boot/dts/am335x-igep0033.dtsi b/arch/arm/boot/dts/am335x-igep0033.dtsi index 7063311a58d9..9f22c189f636 100644 --- a/arch/arm/boot/dts/am335x-igep0033.dtsi +++ b/arch/arm/boot/dts/am335x-igep0033.dtsi @@ -118,7 +118,6 @@ reg = <0 0 0>; /* CS0, offset 0 */ nand-bus-width = <8>; ti,nand-ecc-opt = "bch8"; - gpmc,device-nand = "true"; gpmc,device-width = <1>; gpmc,sync-clk-ps = <0>; gpmc,cs-on-ns = <0>; @@ -202,7 +201,7 @@ &usb { status = "okay"; - control@44e10000 { + control@44e10620 { status = "okay"; }; @@ -223,7 +222,7 @@ dr_mode = "host"; }; - dma-controller@07402000 { + dma-controller@47402000 { status = "okay"; }; }; diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index 9770e35f2536..cb6811e5ae5a 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -72,7 +72,7 @@ }; /* - * The soc node represents the soc top level view. It is uses for IPs + * The soc node represents the soc top level view. It is used for IPs * that are not memory mapped in the MPU view or for the MPU itself. */ soc { @@ -94,8 +94,8 @@ /* * XXX: Use a flat representation of the AM33XX interconnect. - * The real AM33XX interconnect network is quite complex.Since - * that will not bring real advantage to represent that in DT + * The real AM33XX interconnect network is quite complex. Since + * it will not bring real advantage to represent that in DT * for the moment, just use a fake OCP bus entry to represent * the whole bus hierarchy. */ @@ -802,7 +802,7 @@ <0x46000000 0x400000>; reg-names = "mpu", "dat"; interrupts = <80>, <81>; - interrupts-names = "tx", "rx"; + interrupt-names = "tx", "rx"; status = "disabled"; dmas = <&edma 8>, <&edma 9>; @@ -816,7 +816,7 @@ <0x46400000 0x400000>; reg-names = "mpu", "dat"; interrupts = <82>, <83>; - interrupts-names = "tx", "rx"; + interrupt-names = "tx", "rx"; status = "disabled"; dmas = <&edma 10>, <&edma 11>; diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index 36d523a26831..d1f8707ff1df 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -691,7 +691,7 @@ <0x46000000 0x400000>; reg-names = "mpu", "dat"; interrupts = <80>, <81>; - interrupts-names = "tx", "rx"; + interrupt-names = "tx", "rx"; status = "disabled"; dmas = <&edma 8>, <&edma 9>; @@ -705,7 +705,7 @@ <0x46400000 0x400000>; reg-names = "mpu", "dat"; interrupts = <82>, <83>; - interrupts-names = "tx", "rx"; + interrupt-names = "tx", "rx"; status = "disabled"; dmas = <&edma 10>, <&edma 11>; diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts index 82f238a9063f..ba1a43118f8f 100644 --- a/arch/arm/boot/dts/armada-370-db.dts +++ b/arch/arm/boot/dts/armada-370-db.dts @@ -35,7 +35,6 @@ internal-regs { serial@12000 { - clock-frequency = <200000000>; status = "okay"; }; sata@a0000 { diff --git a/arch/arm/boot/dts/armada-370-mirabox.dts b/arch/arm/boot/dts/armada-370-mirabox.dts index 2354fe023ee0..097df7d8f0f6 100644 --- a/arch/arm/boot/dts/armada-370-mirabox.dts +++ b/arch/arm/boot/dts/armada-370-mirabox.dts @@ -47,7 +47,6 @@ internal-regs { serial@12000 { - clock-frequency = <200000000>; status = "okay"; }; timer@20300 { diff --git a/arch/arm/boot/dts/armada-370-netgear-rn102.dts b/arch/arm/boot/dts/armada-370-netgear-rn102.dts index 651aeb5ef439..d6d572e5af32 100644 --- a/arch/arm/boot/dts/armada-370-netgear-rn102.dts +++ b/arch/arm/boot/dts/armada-370-netgear-rn102.dts @@ -50,7 +50,6 @@ internal-regs { serial@12000 { - clock-frequency = <200000000>; status = "okay"; }; diff --git a/arch/arm/boot/dts/armada-370-netgear-rn104.dts b/arch/arm/boot/dts/armada-370-netgear-rn104.dts index 4e27587667bf..c5fe8b5dcdc7 100644 --- a/arch/arm/boot/dts/armada-370-netgear-rn104.dts +++ b/arch/arm/boot/dts/armada-370-netgear-rn104.dts @@ -50,7 +50,6 @@ internal-regs { serial@12000 { - clock-frequency = <200000000>; status = "okay"; }; diff --git a/arch/arm/boot/dts/armada-370-rd.dts b/arch/arm/boot/dts/armada-370-rd.dts index 3e2c857d6000..4169f4096ea3 100644 --- a/arch/arm/boot/dts/armada-370-rd.dts +++ b/arch/arm/boot/dts/armada-370-rd.dts @@ -51,7 +51,6 @@ internal-regs { serial@12000 { - clock-frequency = <200000000>; status = "okay"; }; sata@a0000 { diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi index bbb40f62037d..23227e0027ec 100644 --- a/arch/arm/boot/dts/armada-370-xp.dtsi +++ b/arch/arm/boot/dts/armada-370-xp.dtsi @@ -157,6 +157,7 @@ reg-shift = <2>; interrupts = <41>; reg-io-width = <1>; + clocks = <&coreclk 0>; status = "disabled"; }; serial@12100 { @@ -165,6 +166,7 @@ reg-shift = <2>; interrupts = <42>; reg-io-width = <1>; + clocks = <&coreclk 0>; status = "disabled"; }; @@ -203,6 +205,11 @@ reg = <0x20300 0x34>, <0x20704 0x4>; }; + pmsu@22000 { + compatible = "marvell,armada-370-pmsu"; + reg = <0x22000 0x1000>; + }; + usb@50000 { compatible = "marvell,orion-ehci"; reg = <0x50000 0x500>; @@ -230,6 +237,7 @@ #size-cells = <0>; compatible = "marvell,orion-mdio"; reg = <0x72004 0x4>; + clocks = <&gateclk 4>; }; eth1: ethernet@74000 { diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi index af1f11e9e5a0..21b588b6f6bd 100644 --- a/arch/arm/boot/dts/armada-370.dtsi +++ b/arch/arm/boot/dts/armada-370.dtsi @@ -220,6 +220,11 @@ clocks = <&coreclk 2>; }; + cpurst@20800 { + compatible = "marvell,armada-370-cpu-reset"; + reg = <0x20800 0x8>; + }; + audio_controller: audio-controller@30000 { compatible = "marvell,armada370-audio"; reg = <0x30000 0x4000>; diff --git a/arch/arm/boot/dts/armada-375-db.dts b/arch/arm/boot/dts/armada-375-db.dts index 9378d3136b41..2f26b963eee9 100644 --- a/arch/arm/boot/dts/armada-375-db.dts +++ b/arch/arm/boot/dts/armada-375-db.dts @@ -68,7 +68,6 @@ }; serial@12000 { - clock-frequency = <200000000>; status = "okay"; }; diff --git a/arch/arm/boot/dts/armada-375.dtsi b/arch/arm/boot/dts/armada-375.dtsi index 3877693fb2d8..3b6de4c0e379 100644 --- a/arch/arm/boot/dts/armada-375.dtsi +++ b/arch/arm/boot/dts/armada-375.dtsi @@ -39,6 +39,8 @@ cpus { #address-cells = <1>; #size-cells = <0>; + enable-method = "marvell,armada-375-smp"; + cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a9"; @@ -128,6 +130,11 @@ cache-level = <2>; }; + scu@c000 { + compatible = "arm,cortex-a9-scu"; + reg = <0xc000 0x58>; + }; + timer@c600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0xc600 0x20>; @@ -194,6 +201,7 @@ reg-shift = <2>; interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; reg-io-width = <1>; + clocks = <&coreclk 0>; status = "disabled"; }; @@ -203,6 +211,7 @@ reg-shift = <2>; interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; reg-io-width = <1>; + clocks = <&coreclk 0>; status = "disabled"; }; @@ -320,6 +329,22 @@ clocks = <&coreclk 0>; }; + watchdog@20300 { + compatible = "marvell,armada-375-wdt"; + reg = <0x20300 0x34>, <0x20704 0x4>, <0x18254 0x4>; + clocks = <&coreclk 0>; + }; + + cpurst@20800 { + compatible = "marvell,armada-370-cpu-reset"; + reg = <0x20800 0x10>; + }; + + coherency-fabric@21010 { + compatible = "marvell,armada-375-coherency-fabric"; + reg = <0x21010 0x1c>; + }; + xor@60800 { compatible = "marvell,orion-xor"; reg = <0x60800 0x100 @@ -391,6 +416,12 @@ status = "disabled"; }; + thermal@e8078 { + compatible = "marvell,armada375-thermal"; + reg = <0xe8078 0x4>, <0xe807c 0x8>; + status = "okay"; + }; + coreclk: mvebu-sar@e8204 { compatible = "marvell,armada-375-core-clock"; reg = <0xe8204 0x04>; diff --git a/arch/arm/boot/dts/armada-380.dtsi b/arch/arm/boot/dts/armada-380.dtsi index 068031f0f263..aa71718b549d 100644 --- a/arch/arm/boot/dts/armada-380.dtsi +++ b/arch/arm/boot/dts/armada-380.dtsi @@ -21,6 +21,8 @@ cpus { #address-cells = <1>; #size-cells = <0>; + enable-method = "marvell,armada-380-smp"; + cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a9"; diff --git a/arch/arm/boot/dts/armada-385-db.dts b/arch/arm/boot/dts/armada-385-db.dts index 6828d77696a6..7fcbc0d2a85f 100644 --- a/arch/arm/boot/dts/armada-385-db.dts +++ b/arch/arm/boot/dts/armada-385-db.dts @@ -55,7 +55,6 @@ }; serial@12000 { - clock-frequency = <200000000>; status = "okay"; }; @@ -81,6 +80,14 @@ }; }; + sata@a8000 { + status = "okay"; + }; + + sata@e0000 { + status = "okay"; + }; + flash@d0000 { status = "okay"; num-cs = <1>; @@ -101,6 +108,14 @@ reg = <0x1000000 0x3f000000>; }; }; + + sdhci@d8000 { + clock-frequency = <200000000>; + broken-cd; + wp-inverted; + bus-width = <8>; + status = "okay"; + }; }; pcie-controller { diff --git a/arch/arm/boot/dts/armada-385-rd.dts b/arch/arm/boot/dts/armada-385-rd.dts index 45250c88814b..4b39bed4ed07 100644 --- a/arch/arm/boot/dts/armada-385-rd.dts +++ b/arch/arm/boot/dts/armada-385-rd.dts @@ -51,7 +51,6 @@ }; serial@12000 { - clock-frequency = <200000000>; status = "okay"; }; diff --git a/arch/arm/boot/dts/armada-385.dtsi b/arch/arm/boot/dts/armada-385.dtsi index e2919f02e1d4..2c7990d6efa2 100644 --- a/arch/arm/boot/dts/armada-385.dtsi +++ b/arch/arm/boot/dts/armada-385.dtsi @@ -21,6 +21,8 @@ cpus { #address-cells = <1>; #size-cells = <0>; + enable-method = "marvell,armada-380-smp"; + cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a9"; diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi index a064f59da02d..6ee59a344089 100644 --- a/arch/arm/boot/dts/armada-38x.dtsi +++ b/arch/arm/boot/dts/armada-38x.dtsi @@ -108,6 +108,11 @@ cache-level = <2>; }; + scu@c000 { + compatible = "arm,cortex-a9-scu"; + reg = <0xc000 0x58>; + }; + timer@c600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0xc600 0x20>; @@ -174,6 +179,7 @@ reg-shift = <2>; interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; reg-io-width = <1>; + clocks = <&coreclk 0>; status = "disabled"; }; @@ -183,6 +189,7 @@ reg-shift = <2>; interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; reg-io-width = <1>; + clocks = <&coreclk 0>; status = "disabled"; }; @@ -267,6 +274,28 @@ clock-names = "nbclk", "fixed"; }; + watchdog@20300 { + compatible = "marvell,armada-380-wdt"; + reg = <0x20300 0x34>, <0x20704 0x4>, <0x18260 0x4>; + clocks = <&coreclk 2>, <&refclk>; + clock-names = "nbclk", "fixed"; + }; + + cpurst@20800 { + compatible = "marvell,armada-370-cpu-reset"; + reg = <0x20800 0x10>; + }; + + coherency-fabric@21010 { + compatible = "marvell,armada-380-coherency-fabric"; + reg = <0x21010 0x1c>; + }; + + pmsu@22000 { + compatible = "marvell,armada-380-pmsu"; + reg = <0x22000 0x1000>; + }; + eth1: ethernet@30000 { compatible = "marvell,armada-370-neta"; reg = <0x30000 0x4000>; @@ -336,6 +365,23 @@ #size-cells = <0>; compatible = "marvell,orion-mdio"; reg = <0x72004 0x4>; + clocks = <&gateclk 4>; + }; + + sata@a8000 { + compatible = "marvell,armada-380-ahci"; + reg = <0xa8000 0x2000>; + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&gateclk 15>; + status = "disabled"; + }; + + sata@e0000 { + compatible = "marvell,armada-380-ahci"; + reg = <0xe0000 0x2000>; + interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&gateclk 30>; + status = "disabled"; }; coredivclk: clock@e4250 { @@ -346,6 +392,12 @@ clock-output-names = "nand"; }; + thermal@e8078 { + compatible = "marvell,armada380-thermal"; + reg = <0xe4078 0x4>, <0xe4074 0x4>; + status = "okay"; + }; + flash@d0000 { compatible = "marvell,armada370-nand"; reg = <0xd0000 0x54>; @@ -355,6 +407,15 @@ clocks = <&coredivclk 0>; status = "disabled"; }; + + sdhci@d8000 { + compatible = "marvell,armada-380-sdhci"; + reg = <0xd8000 0x1000>, <0xdc000 0x100>; + interrupts = <0 25 0x4>; + clocks = <&gateclk 17>; + mrvl,clk-delay-cycles = <0x1F>; + status = "disabled"; + }; }; }; diff --git a/arch/arm/boot/dts/armada-xp-axpwifiap.dts b/arch/arm/boot/dts/armada-xp-axpwifiap.dts index d83d7d69ac01..a55a97a70505 100644 --- a/arch/arm/boot/dts/armada-xp-axpwifiap.dts +++ b/arch/arm/boot/dts/armada-xp-axpwifiap.dts @@ -95,12 +95,10 @@ }; serial@12000 { - clock-frequency = <250000000>; status = "okay"; }; serial@12100 { - clock-frequency = <250000000>; status = "okay"; }; diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts index 448373c4b0e5..2b598ef32285 100644 --- a/arch/arm/boot/dts/armada-xp-db.dts +++ b/arch/arm/boot/dts/armada-xp-db.dts @@ -106,19 +106,15 @@ internal-regs { serial@12000 { - clock-frequency = <250000000>; status = "okay"; }; serial@12100 { - clock-frequency = <250000000>; status = "okay"; }; serial@12200 { - clock-frequency = <250000000>; status = "okay"; }; serial@12300 { - clock-frequency = <250000000>; status = "okay"; }; diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts index 61bda687f782..eb0013f000b0 100644 --- a/arch/arm/boot/dts/armada-xp-gp.dts +++ b/arch/arm/boot/dts/armada-xp-gp.dts @@ -104,19 +104,15 @@ internal-regs { serial@12000 { - clock-frequency = <250000000>; status = "okay"; }; serial@12100 { - clock-frequency = <250000000>; status = "okay"; }; serial@12200 { - clock-frequency = <250000000>; status = "okay"; }; serial@12300 { - clock-frequency = <250000000>; status = "okay"; }; diff --git a/arch/arm/boot/dts/armada-xp-matrix.dts b/arch/arm/boot/dts/armada-xp-matrix.dts index c2242745b9b8..25674fe81f70 100644 --- a/arch/arm/boot/dts/armada-xp-matrix.dts +++ b/arch/arm/boot/dts/armada-xp-matrix.dts @@ -37,19 +37,15 @@ internal-regs { serial@12000 { - clock-frequency = <250000000>; status = "okay"; }; serial@12100 { - clock-frequency = <250000000>; status = "okay"; }; serial@12200 { - clock-frequency = <250000000>; status = "okay"; }; serial@12300 { - clock-frequency = <250000000>; status = "okay"; }; diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi index 98335fb34b7a..1257ff1ed278 100644 --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi @@ -27,6 +27,7 @@ cpus { #address-cells = <1>; #size-cells = <0>; + enable-method = "marvell,armada-xp-smp"; cpu@0 { device_type = "cpu"; diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi index 9480cf891f8c..3396b25b39e1 100644 --- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi @@ -29,6 +29,7 @@ cpus { #address-cells = <1>; #size-cells = <0>; + enable-method = "marvell,armada-xp-smp"; cpu@0 { device_type = "cpu"; diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi index 31ba6d8fbadf..6da84bf40aaf 100644 --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi @@ -30,6 +30,7 @@ cpus { #address-cells = <1>; #size-cells = <0>; + enable-method = "marvell,armada-xp-smp"; cpu@0 { device_type = "cpu"; diff --git a/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts b/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts index ff049ee862eb..0cf999abc4ed 100644 --- a/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts +++ b/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts @@ -138,7 +138,6 @@ }; serial@12000 { - clocks = <&coreclk 0>; status = "okay"; }; diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts index 985948ce67b3..cf26d1313d5f 100644 --- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts +++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts @@ -72,11 +72,9 @@ internal-regs { serial@12000 { - clock-frequency = <250000000>; status = "okay"; }; serial@12100 { - clock-frequency = <250000000>; status = "okay"; }; pinctrl { diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index abb9f9dcc525..5902e8359c91 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -58,6 +58,7 @@ reg-shift = <2>; interrupts = <43>; reg-io-width = <1>; + clocks = <&coreclk 0>; status = "disabled"; }; serial@12300 { @@ -66,6 +67,7 @@ reg-shift = <2>; interrupts = <44>; reg-io-width = <1>; + clocks = <&coreclk 0>; status = "disabled"; }; @@ -117,9 +119,9 @@ clock-names = "nbclk", "fixed"; }; - armada-370-xp-pmsu@22000 { - compatible = "marvell,armada-370-xp-pmsu"; - reg = <0x22100 0x400>, <0x20800 0x20>; + cpurst@20800 { + compatible = "marvell,armada-370-cpu-reset"; + reg = <0x20800 0x20>; }; eth2: ethernet@30000 { diff --git a/arch/arm/boot/dts/at91-cosino_mega2560.dts b/arch/arm/boot/dts/at91-cosino_mega2560.dts index a542d5837a17..27ebb0f722fd 100644 --- a/arch/arm/boot/dts/at91-cosino_mega2560.dts +++ b/arch/arm/boot/dts/at91-cosino_mega2560.dts @@ -32,11 +32,6 @@ status = "okay"; }; - - tsadcc: tsadcc@f804c000 { - status = "okay"; - }; - rtc@fffffeb0 { status = "okay"; }; diff --git a/arch/arm/boot/dts/at91-sama5d3_xplained.dts b/arch/arm/boot/dts/at91-sama5d3_xplained.dts index ce1375595e5f..5b8e40400bec 100644 --- a/arch/arm/boot/dts/at91-sama5d3_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d3_xplained.dts @@ -21,6 +21,14 @@ reg = <0x20000000 0x10000000>; }; + slow_xtal { + clock-frequency = <32768>; + }; + + main_xtal { + clock-frequency = <12000000>; + }; + ahb { apb { mmc0: mmc@f0000000 { @@ -34,7 +42,7 @@ }; spi0: spi@f0004000 { - cs-gpios = <&pioD 13 0>; + cs-gpios = <&pioD 13 0>, <0>, <0>, <&pioD 16 0>; status = "okay"; }; @@ -43,11 +51,54 @@ }; i2c0: i2c@f0014000 { + pinctrl-0 = <&pinctrl_i2c0_pu>; status = "okay"; }; i2c1: i2c@f0018000 { status = "okay"; + + pmic: act8865@5b { + compatible = "active-semi,act8865"; + reg = <0x5b>; + status = "okay"; + + regulators { + vcc_1v8_reg: DCDC_REG1 { + regulator-name = "VCC_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + vcc_1v2_reg: DCDC_REG2 { + regulator-name = "VCC_1V2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + vcc_3v3_reg: DCDC_REG3 { + regulator-name = "VCC_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vddfuse_reg: LDO_REG1 { + regulator-name = "FUSE_2V5"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + }; + + vddana_reg: LDO_REG2 { + regulator-name = "VDDANA"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; + }; }; macb0: ethernet@f0028000 { @@ -55,6 +106,12 @@ status = "okay"; }; + pwm0: pwm@f002c000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0_pwmh0_0 &pinctrl_pwm0_pwmh1_0>; + status = "okay"; + }; + usart0: serial@f001c000 { status = "okay"; }; @@ -79,7 +136,7 @@ }; spi1: spi@f8008000 { - cs-gpios = <&pioC 25 0>, <0>, <0>, <&pioD 16 0>; + cs-gpios = <&pioC 25 0>; status = "okay"; }; @@ -102,6 +159,7 @@ i2c2: i2c@f801c000 { dmas = <0>, <0>; /* Do not use DMA for i2c2 */ + pinctrl-0 = <&pinctrl_i2c2_pu>; status = "okay"; }; @@ -116,6 +174,18 @@ pinctrl@fffff200 { board { + pinctrl_i2c0_pu: i2c0_pu { + atmel,pins = + <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, + <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; + }; + + pinctrl_i2c2_pu: i2c2_pu { + atmel,pins = + <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>, + <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; + }; + pinctrl_mmc0_cd: mmc0_cd { atmel,pins = <AT91_PIOE 0 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi index e21dda0e8986..b309c1c6e848 100644 --- a/arch/arm/boot/dts/at91sam9261.dtsi +++ b/arch/arm/boot/dts/at91sam9261.dtsi @@ -10,7 +10,7 @@ #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/clk/at91.h> +#include <dt-bindings/clock/at91.h> / { model = "Atmel AT91SAM9261 family SoC"; @@ -29,6 +29,7 @@ i2c0 = &i2c0; ssc0 = &ssc0; ssc1 = &ssc1; + ssc2 = &ssc2; }; cpus { @@ -45,6 +46,18 @@ reg = <0x20000000 0x08000000>; }; + main_xtal: main_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + slow_xtal: slow_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + ahb { compatible = "simple-bus"; #address-cells = <1>; @@ -182,6 +195,8 @@ interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; + clocks = <&ssc0_clk>; + clock-names = "pclk"; status = "disabled"; }; @@ -191,6 +206,19 @@ interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; + clocks = <&ssc1_clk>; + clock-names = "pclk"; + status = "disabled"; + }; + + ssc2: ssc@fffc4000 { + compatible = "atmel,at91rm9200-ssc"; + reg = <0xfffc4000 0x4000>; + interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>; + clocks = <&ssc2_clk>; + clock-names = "pclk"; status = "disabled"; }; @@ -385,6 +413,22 @@ }; }; + ssc2 { + pinctrl_ssc2_tx: ssc2_tx-0 { + atmel,pins = + <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_ssc2_rx: ssc2_rx-0 { + atmel,pins = + <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + }; + spi0 { pinctrl_spi0: spi0-0 { atmel,pins = @@ -524,17 +568,24 @@ #size-cells = <0>; #interrupt-cells = <1>; - clk32k: slck { + slow_rc_osc: slow_rc_osc { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <32768>; + clock-accuracy = <50000000>; + }; + + clk32k: slck { + compatible = "atmel,at91sam9260-clk-slow"; + #clock-cells = <0>; + clocks = <&slow_rc_osc &slow_xtal>; }; main: mainck { compatible = "atmel,at91rm9200-clk-main"; #clock-cells = <0>; interrupts-extended = <&pmc AT91_PMC_MOSCS>; - clocks = <&clk32k>; + clocks = <&main_xtal>; }; plla: pllack { @@ -545,7 +596,8 @@ reg = <0>; atmel,clk-input-range = <1000000 32000000>; #atmel,pll-clk-output-range-cells = <4>; - atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>; + atmel,pll-clk-output-ranges = <80000000 200000000 0 1>, + <190000000 240000000 2 1>; }; pllb: pllbck { @@ -554,9 +606,9 @@ interrupts-extended = <&pmc AT91_PMC_LOCKB>; clocks = <&main>; reg = <1>; - atmel,clk-input-range = <1000000 32000000>; + atmel,clk-input-range = <1000000 5000000>; #atmel,pll-clk-output-range-cells = <4>; - atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>; + atmel,pll-clk-output-ranges = <70000000 130000000 1 1>; }; mck: masterck { @@ -565,16 +617,48 @@ interrupts-extended = <&pmc AT91_PMC_MCKRDY>; clocks = <&clk32k>, <&main>, <&plla>, <&pllb>; atmel,clk-output-range = <0 94000000>; - atmel,clk-divisors = <1 2 4 3>; + atmel,clk-divisors = <1 2 4 0>; }; usb: usbck { compatible = "atmel,at91rm9200-clk-usb"; #clock-cells = <0>; - atmel,clk-divisors = <1 2 4 3>; + atmel,clk-divisors = <1 2 4 0>; clocks = <&pllb>; }; + prog: progck { + compatible = "atmel,at91rm9200-clk-programmable"; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = <&pmc>; + clocks = <&clk32k>, <&main>, <&plla>, <&pllb>; + + prog0: prog0 { + #clock-cells = <0>; + reg = <0>; + interrupts = <AT91_PMC_PCKRDY(0)>; + }; + + prog1: prog1 { + #clock-cells = <0>; + reg = <1>; + interrupts = <AT91_PMC_PCKRDY(1)>; + }; + + prog2: prog2 { + #clock-cells = <0>; + reg = <2>; + interrupts = <AT91_PMC_PCKRDY(2)>; + }; + + prog3: prog3 { + #clock-cells = <0>; + reg = <3>; + interrupts = <AT91_PMC_PCKRDY(3)>; + }; + }; + systemck { compatible = "atmel,at91rm9200-clk-system"; #address-cells = <1>; @@ -592,6 +676,30 @@ clocks = <&usb>; }; + pck0: pck0 { + #clock-cells = <0>; + reg = <8>; + clocks = <&prog0>; + }; + + pck1: pck1 { + #clock-cells = <0>; + reg = <9>; + clocks = <&prog1>; + }; + + pck2: pck2 { + #clock-cells = <0>; + reg = <10>; + clocks = <&prog2>; + }; + + pck3: pck3 { + #clock-cells = <0>; + reg = <11>; + clocks = <&prog3>; + }; + hclk0: hclk0 { #clock-cells = <0>; reg = <16>; @@ -666,6 +774,21 @@ reg = <13>; }; + ssc0_clk: ssc0_clk { + #clock-cells = <0>; + reg = <14>; + }; + + ssc1_clk: ssc1_clk { + #clock-cells = <0>; + reg = <15>; + }; + + ssc2_clk: ssc2_clk { + #clock-cells = <0>; + reg = <16>; + }; + tc0_clk: tc0_clk { #clock-cells = <0>; reg = <17>; diff --git a/arch/arm/boot/dts/at91sam9261ek.dts b/arch/arm/boot/dts/at91sam9261ek.dts index 2ce527e70c7a..c6683ea8b743 100644 --- a/arch/arm/boot/dts/at91sam9261ek.dts +++ b/arch/arm/boot/dts/at91sam9261ek.dts @@ -20,6 +20,10 @@ reg = <0x20000000 0x4000000>; }; + main_xtal { + clock-frequency = <18432000>; + }; + clocks { #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi index 9cdaecff13b3..ace6bf197b70 100644 --- a/arch/arm/boot/dts/at91sam9g45.dtsi +++ b/arch/arm/boot/dts/at91sam9g45.dtsi @@ -136,6 +136,36 @@ >; /* shared pinctrl settings */ + adc0 { + pinctrl_adc0_adtrg: adc0_adtrg { + atmel,pins = <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + pinctrl_adc0_ad0: adc0_ad0 { + atmel,pins = <AT91_PIOD 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; + }; + pinctrl_adc0_ad1: adc0_ad1 { + atmel,pins = <AT91_PIOD 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; + }; + pinctrl_adc0_ad2: adc0_ad2 { + atmel,pins = <AT91_PIOD 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; + }; + pinctrl_adc0_ad3: adc0_ad3 { + atmel,pins = <AT91_PIOD 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; + }; + pinctrl_adc0_ad4: adc0_ad4 { + atmel,pins = <AT91_PIOD 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; + }; + pinctrl_adc0_ad5: adc0_ad5 { + atmel,pins = <AT91_PIOD 25 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; + }; + pinctrl_adc0_ad6: adc0_ad6 { + atmel,pins = <AT91_PIOD 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; + }; + pinctrl_adc0_ad7: adc0_ad7 { + atmel,pins = <AT91_PIOD 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; + }; + }; + dbgu { pinctrl_dbgu: dbgu-0 { atmel,pins = @@ -634,10 +664,9 @@ adc0: adc@fffb0000 { #address-cells = <1>; #size-cells = <0>; - compatible = "atmel,at91sam9260-adc"; + compatible = "atmel,at91sam9g45-adc"; reg = <0xfffb0000 0x100>; interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; - atmel,adc-use-external-triggers; atmel,adc-channels-used = <0xff>; atmel,adc-vref = <3300>; atmel,adc-startup-time = <40>; diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts index 7ff665a8c708..9f5b0a674995 100644 --- a/arch/arm/boot/dts/at91sam9m10g45ek.dts +++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts @@ -8,6 +8,7 @@ */ /dts-v1/; #include "at91sam9g45.dtsi" +#include <dt-bindings/pwm/pwm.h> / { model = "Atmel AT91SAM9M10G45-EK"; @@ -130,6 +131,21 @@ status = "okay"; }; + adc0: adc@fffb0000 { + pinctrl-names = "default"; + pinctrl-0 = < + &pinctrl_adc0_ad0 + &pinctrl_adc0_ad1 + &pinctrl_adc0_ad2 + &pinctrl_adc0_ad3 + &pinctrl_adc0_ad4 + &pinctrl_adc0_ad5 + &pinctrl_adc0_ad6 + &pinctrl_adc0_ad7>; + atmel,adc-ts-wires = <4>; + status = "okay"; + }; + pwm0: pwm@fffb8000 { status = "okay"; @@ -216,14 +232,14 @@ d6 { label = "d6"; - pwms = <&pwm0 3 5000 0>; + pwms = <&pwm0 3 5000 PWM_POLARITY_INVERTED>; max-brightness = <255>; linux,default-trigger = "nand-disk"; }; d7 { label = "d7"; - pwms = <&pwm0 1 5000 0>; + pwms = <&pwm0 1 5000 PWM_POLARITY_INVERTED>; max-brightness = <255>; linux,default-trigger = "mmc0"; }; diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi index 9f04808fc697..d1b82e6635d5 100644 --- a/arch/arm/boot/dts/at91sam9n12.dtsi +++ b/arch/arm/boot/dts/at91sam9n12.dtsi @@ -12,6 +12,7 @@ #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/clock/at91.h> / { model = "Atmel AT91SAM9N12 SoC"; @@ -49,6 +50,18 @@ reg = <0x20000000 0x10000000>; }; + slow_xtal: slow_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + main_xtal: main_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + ahb { compatible = "simple-bus"; #address-cells = <1>; @@ -75,8 +88,280 @@ }; pmc: pmc@fffffc00 { - compatible = "atmel,at91rm9200-pmc"; - reg = <0xfffffc00 0x100>; + compatible = "atmel,at91sam9n12-pmc"; + reg = <0xfffffc00 0x200>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + interrupt-controller; + #address-cells = <1>; + #size-cells = <0>; + #interrupt-cells = <1>; + + main_rc_osc: main_rc_osc { + compatible = "atmel,at91sam9x5-clk-main-rc-osc"; + #clock-cells = <0>; + interrupts-extended = <&pmc AT91_PMC_MOSCRCS>; + clock-frequency = <12000000>; + clock-accuracy = <50000000>; + }; + + main_osc: main_osc { + compatible = "atmel,at91rm9200-clk-main-osc"; + #clock-cells = <0>; + interrupts-extended = <&pmc AT91_PMC_MOSCS>; + clocks = <&main_xtal>; + }; + + main: mainck { + compatible = "atmel,at91sam9x5-clk-main"; + #clock-cells = <0>; + interrupts-extended = <&pmc AT91_PMC_MOSCSELS>; + clocks = <&main_rc_osc>, <&main_osc>; + }; + + plla: pllack { + compatible = "atmel,at91rm9200-clk-pll"; + #clock-cells = <0>; + interrupts-extended = <&pmc AT91_PMC_LOCKA>; + clocks = <&main>; + reg = <0>; + atmel,clk-input-range = <2000000 32000000>; + #atmel,pll-clk-output-range-cells = <4>; + atmel,pll-clk-output-ranges = <745000000 800000000 0 0>, + <695000000 750000000 1 0>, + <645000000 700000000 2 0>, + <595000000 650000000 3 0>, + <545000000 600000000 0 1>, + <495000000 555000000 1 1>, + <445000000 500000000 1 2>, + <400000000 450000000 1 3>; + }; + + plladiv: plladivck { + compatible = "atmel,at91sam9x5-clk-plldiv"; + #clock-cells = <0>; + clocks = <&plla>; + }; + + pllb: pllbck { + compatible = "atmel,at91rm9200-clk-pll"; + #clock-cells = <0>; + interrupts-extended = <&pmc AT91_PMC_LOCKB>; + clocks = <&main>; + reg = <1>; + atmel,clk-input-range = <2000000 32000000>; + #atmel,pll-clk-output-range-cells = <3>; + atmel,pll-clk-output-ranges = <30000000 100000000 0>; + }; + + mck: masterck { + compatible = "atmel,at91sam9x5-clk-master"; + #clock-cells = <0>; + interrupts-extended = <&pmc AT91_PMC_MCKRDY>; + clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>; + atmel,clk-output-range = <0 133333333>; + atmel,clk-divisors = <1 2 4 3>; + atmel,master-clk-have-div3-pres; + }; + + usb: usbck { + compatible = "atmel,at91sam9n12-clk-usb"; + #clock-cells = <0>; + clocks = <&pllb>; + }; + + prog: progck { + compatible = "atmel,at91sam9x5-clk-programmable"; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = <&pmc>; + clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>, <&mck>; + + prog0: prog0 { + #clock-cells = <0>; + reg = <0>; + interrupts = <AT91_PMC_PCKRDY(0)>; + }; + + prog1: prog1 { + #clock-cells = <0>; + reg = <1>; + interrupts = <AT91_PMC_PCKRDY(1)>; + }; + }; + + systemck { + compatible = "atmel,at91rm9200-clk-system"; + #address-cells = <1>; + #size-cells = <0>; + + ddrck: ddrck { + #clock-cells = <0>; + reg = <2>; + clocks = <&mck>; + }; + + lcdck: lcdck { + #clock-cells = <0>; + reg = <3>; + clocks = <&mck>; + }; + + uhpck: uhpck { + #clock-cells = <0>; + reg = <6>; + clocks = <&usb>; + }; + + udpck: udpck { + #clock-cells = <0>; + reg = <7>; + clocks = <&usb>; + }; + + pck0: pck0 { + #clock-cells = <0>; + reg = <8>; + clocks = <&prog0>; + }; + + pck1: pck1 { + #clock-cells = <0>; + reg = <9>; + clocks = <&prog1>; + }; + }; + + periphck { + compatible = "atmel,at91sam9x5-clk-peripheral"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&mck>; + + pioAB_clk: pioAB_clk { + #clock-cells = <0>; + reg = <2>; + }; + + pioCD_clk: pioCD_clk { + #clock-cells = <0>; + reg = <3>; + }; + + fuse_clk: fuse_clk { + #clock-cells = <0>; + reg = <4>; + }; + + usart0_clk: usart0_clk { + #clock-cells = <0>; + reg = <5>; + }; + + usart1_clk: usart1_clk { + #clock-cells = <0>; + reg = <6>; + }; + + usart2_clk: usart2_clk { + #clock-cells = <0>; + reg = <7>; + }; + + usart3_clk: usart3_clk { + #clock-cells = <0>; + reg = <8>; + }; + + twi0_clk: twi0_clk { + reg = <9>; + #clock-cells = <0>; + }; + + twi1_clk: twi1_clk { + #clock-cells = <0>; + reg = <10>; + }; + + mci0_clk: mci0_clk { + #clock-cells = <0>; + reg = <12>; + }; + + spi0_clk: spi0_clk { + #clock-cells = <0>; + reg = <13>; + }; + + spi1_clk: spi1_clk { + #clock-cells = <0>; + reg = <14>; + }; + + uart0_clk: uart0_clk { + #clock-cells = <0>; + reg = <15>; + }; + + uart1_clk: uart1_clk { + #clock-cells = <0>; + reg = <16>; + }; + + tcb_clk: tcb_clk { + #clock-cells = <0>; + reg = <17>; + }; + + pwm_clk: pwm_clk { + #clock-cells = <0>; + reg = <18>; + }; + + adc_clk: adc_clk { + #clock-cells = <0>; + reg = <19>; + }; + + dma0_clk: dma0_clk { + #clock-cells = <0>; + reg = <20>; + }; + + uhphs_clk: uhphs_clk { + #clock-cells = <0>; + reg = <22>; + }; + + udphs_clk: udphs_clk { + #clock-cells = <0>; + reg = <23>; + }; + + lcdc_clk: lcdc_clk { + #clock-cells = <0>; + reg = <25>; + }; + + sha_clk: sha_clk { + #clock-cells = <0>; + reg = <27>; + }; + + ssc0_clk: ssc0_clk { + #clock-cells = <0>; + reg = <28>; + }; + + aes_clk: aes_clk { + #clock-cells = <0>; + reg = <29>; + }; + + trng_clk: trng_clk { + #clock-cells = <0>; + reg = <30>; + }; + }; }; rstc@fffffe00 { @@ -88,6 +373,7 @@ compatible = "atmel,at91sam9260-pit"; reg = <0xfffffe30 0xf>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&mck>; }; shdwc@fffffe10 { @@ -95,12 +381,38 @@ reg = <0xfffffe10 0x10>; }; + sckc@fffffe50 { + compatible = "atmel,at91sam9x5-sckc"; + reg = <0xfffffe50 0x4>; + + slow_osc: slow_osc { + compatible = "atmel,at91sam9x5-clk-slow-osc"; + #clock-cells = <0>; + clocks = <&slow_xtal>; + }; + + slow_rc_osc: slow_rc_osc { + compatible = "atmel,at91sam9x5-clk-slow-rc-osc"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-accuracy = <50000000>; + }; + + clk32k: slck { + compatible = "atmel,at91sam9x5-clk-slow"; + #clock-cells = <0>; + clocks = <&slow_rc_osc>, <&slow_osc>; + }; + }; + mmc0: mmc@f0008000 { compatible = "atmel,hsmci"; reg = <0xf0008000 0x600>; interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>; dma-names = "rxtx"; + clocks = <&mci0_clk>; + clock-names = "mci_clk"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -110,12 +422,16 @@ compatible = "atmel,at91sam9x5-tcb"; reg = <0xf8008000 0x100>; interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&tcb_clk>; + clock-names = "t0_clk"; }; tcb1: timer@f800c000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf800c000 0x100>; interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&tcb_clk>; + clock-names = "t0_clk"; }; dma: dma-controller@ffffec00 { @@ -123,6 +439,8 @@ reg = <0xffffec00 0x200>; interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; #dma-cells = <2>; + clocks = <&dma0_clk>; + clock-names = "dma_clk"; }; pinctrl@fffff400 { @@ -392,6 +710,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; + clocks = <&pioAB_clk>; }; pioB: gpio@fffff600 { @@ -402,6 +721,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; + clocks = <&pioAB_clk>; }; pioC: gpio@fffff800 { @@ -412,6 +732,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; + clocks = <&pioCD_clk>; }; pioD: gpio@fffffa00 { @@ -422,6 +743,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; + clocks = <&pioCD_clk>; }; }; @@ -431,6 +753,8 @@ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; + clocks = <&mck>; + clock-names = "usart"; status = "disabled"; }; @@ -443,6 +767,8 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; + clocks = <&ssc0_clk>; + clock-names = "pclk"; status = "disabled"; }; @@ -452,6 +778,8 @@ interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart0>; + clocks = <&usart0_clk>; + clock-names = "usart"; status = "disabled"; }; @@ -461,6 +789,8 @@ interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart1>; + clocks = <&usart1_clk>; + clock-names = "usart"; status = "disabled"; }; @@ -470,6 +800,8 @@ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart2>; + clocks = <&usart2_clk>; + clock-names = "usart"; status = "disabled"; }; @@ -479,6 +811,8 @@ interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart3>; + clocks = <&usart3_clk>; + clock-names = "usart"; status = "disabled"; }; @@ -493,6 +827,7 @@ #size-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c0>; + clocks = <&twi0_clk>; status = "disabled"; }; @@ -507,6 +842,7 @@ #size-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; + clocks = <&twi1_clk>; status = "disabled"; }; @@ -521,6 +857,8 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi0>; + clocks = <&spi0_clk>; + clock-names = "spi_clk"; status = "disabled"; }; @@ -535,6 +873,8 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi1>; + clocks = <&spi1_clk>; + clock-names = "spi_clk"; status = "disabled"; }; @@ -554,6 +894,7 @@ reg = <0xf8034000 0x300>; interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>; #pwm-cells = <3>; + clocks = <&pwm_clk>; status = "disabled"; }; }; @@ -584,6 +925,9 @@ compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00500000 0x00100000>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; + clocks = <&usb>, <&uhphs_clk>, <&udphs_clk>, + <&uhpck>; + clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck"; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts b/arch/arm/boot/dts/at91sam9n12ek.dts index 924a6a6ffd0f..64bbe46e4f90 100644 --- a/arch/arm/boot/dts/at91sam9n12ek.dts +++ b/arch/arm/boot/dts/at91sam9n12ek.dts @@ -21,6 +21,14 @@ reg = <0x20000000 0x8000000>; }; + slow_xtal { + clock-frequency = <32768>; + }; + + main_xtal { + clock-frequency = <16000000>; + }; + clocks { #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi index 63e1784d272c..1da183155eee 100644 --- a/arch/arm/boot/dts/at91sam9rl.dtsi +++ b/arch/arm/boot/dts/at91sam9rl.dtsi @@ -8,9 +8,10 @@ #include "skeleton.dtsi" #include <dt-bindings/pinctrl/at91.h> -#include <dt-bindings/clk/at91.h> +#include <dt-bindings/clock/at91.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/pwm/pwm.h> / { model = "Atmel AT91SAM9RL family SoC"; @@ -32,6 +33,7 @@ i2c1 = &i2c1; ssc0 = &ssc0; ssc1 = &ssc1; + pwm0 = &pwm0; }; cpus { @@ -48,12 +50,43 @@ reg = <0x20000000 0x04000000>; }; + slow_xtal: slow_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + main_xtal: main_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + clocks { + adc_op_clk: adc_op_clk{ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <1000000>; + }; + }; + ahb { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; + fb0: fb@00500000 { + compatible = "atmel,at91sam9rl-lcdc"; + reg = <0x00500000 0x1000>; + interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fb>; + clocks = <&lcd_clk>, <&lcd_clk>; + clock-names = "hclk", "lcdc_clk"; + status = "disabled"; + }; + nand0: nand@40000000 { compatible = "atmel,at91rm9200-nand"; #address-cells = <1>; @@ -187,6 +220,16 @@ status = "disabled"; }; + pwm0: pwm@fffc8000 { + compatible = "atmel,at91sam9rl-pwm"; + reg = <0xfffc8000 0x300>; + interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>; + #pwm-cells = <3>; + clocks = <&pwm_clk>; + clock-names = "pwm_clk"; + status = "disabled"; + }; + spi0: spi@fffcc000 { #address-cells = <1>; #size-cells = <0>; @@ -200,6 +243,111 @@ status = "disabled"; }; + adc0: adc@fffd0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "atmel,at91sam9rl-adc"; + reg = <0xfffd0000 0x100>; + interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&adc_clk>, <&adc_op_clk>; + clock-names = "adc_clk", "adc_op_clk"; + atmel,adc-use-external-triggers; + atmel,adc-channels-used = <0x3f>; + atmel,adc-vref = <3300>; + atmel,adc-startup-time = <40>; + atmel,adc-res = <8 10>; + atmel,adc-res-names = "lowres", "highres"; + atmel,adc-use-res = "highres"; + + trigger@0 { + reg = <0>; + trigger-name = "timer-counter-0"; + trigger-value = <0x1>; + }; + trigger@1 { + reg = <1>; + trigger-name = "timer-counter-1"; + trigger-value = <0x3>; + }; + + trigger@2 { + reg = <2>; + trigger-name = "timer-counter-2"; + trigger-value = <0x5>; + }; + + trigger@3 { + reg = <3>; + trigger-name = "external"; + trigger-value = <0x13>; + trigger-external; + }; + }; + + usb0: gadget@fffd4000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "atmel,at91sam9rl-udc"; + reg = <0x00600000 0x100000>, + <0xfffd4000 0x4000>; + interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; + clocks = <&udphs_clk>, <&utmi>; + clock-names = "pclk", "hclk"; + status = "disabled"; + + ep0 { + reg = <0>; + atmel,fifo-size = <64>; + atmel,nb-banks = <1>; + }; + + ep1 { + reg = <1>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <2>; + atmel,can-dma; + atmel,can-isoc; + }; + + ep2 { + reg = <2>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <2>; + atmel,can-dma; + atmel,can-isoc; + }; + + ep3 { + reg = <3>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <3>; + atmel,can-dma; + }; + + ep4 { + reg = <4>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <3>; + atmel,can-dma; + }; + + ep5 { + reg = <5>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <3>; + atmel,can-dma; + atmel,can-isoc; + }; + + ep6 { + reg = <6>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <3>; + atmel,can-dma; + atmel,can-isoc; + }; + }; + ramc0: ramc@ffffea00 { compatible = "atmel,at91sam9260-sdramc"; reg = <0xffffea00 0x200>; @@ -238,6 +386,44 @@ <0x003fffff 0x0001ff3c>; /* pioD */ /* shared pinctrl settings */ + adc0 { + pinctrl_adc0_ts: adc0_ts-0 { + atmel,pins = + <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_adc0_ad0: adc0_ad0-0 { + atmel,pins = <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_adc0_ad1: adc0_ad1-0 { + atmel,pins = <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_adc0_ad2: adc0_ad2-0 { + atmel,pins = <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_adc0_ad3: adc0_ad3-0 { + atmel,pins = <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_adc0_ad4: adc0_ad4-0 { + atmel,pins = <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_adc0_ad5: adc0_ad5-0 { + atmel,pins = <AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_adc0_adtrg: adc0_adtrg-0 { + atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + }; + dbgu { pinctrl_dbgu: dbgu-0 { atmel,pins = @@ -246,6 +432,33 @@ }; }; + fb { + pinctrl_fb: fb-0 { + atmel,pins = + <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>, + <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + }; + i2c_gpio0 { pinctrl_i2c_gpio0: i2c_gpio0-0 { atmel,pins = @@ -307,6 +520,61 @@ }; }; + pwm0 { + pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 { + atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 { + atmel,pins = <AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 { + atmel,pins = <AT91_PIOD 14 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 { + atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 { + atmel,pins = <AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 { + atmel,pins = <AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 { + atmel,pins = <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 { + atmel,pins = <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + + pinctrl_pwm0_pwm2_2: pwm0_pwm2-2 { + atmel,pins = <AT91_PIOD 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 { + atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + + pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 { + atmel,pins = <AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + }; + + spi0 { + pinctrl_spi0: spi0-0 { + atmel,pins = + <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + }; + ssc0 { pinctrl_ssc0_tx: ssc0_tx-0 { atmel,pins = @@ -339,15 +607,6 @@ }; }; - spi0 { - pinctrl_spi0: spi0-0 { - atmel,pins = - <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>, - <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>, - <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; - }; - }; - tcb0 { pinctrl_tcb0_tclk0: tcb0_tclk0-0 { atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; @@ -548,17 +807,11 @@ #size-cells = <0>; #interrupt-cells = <1>; - clk32k: slck { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <32768>; - }; - main: mainck { compatible = "atmel,at91rm9200-clk-main"; #clock-cells = <0>; interrupts-extended = <&pmc AT91_PMC_MOSCS>; - clocks = <&clk32k>; + clocks = <&main_xtal>; }; plla: pllack { @@ -568,8 +821,9 @@ clocks = <&main>; reg = <0>; atmel,clk-input-range = <1000000 32000000>; - #atmel,pll-clk-output-range-cells = <4>; - atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>; + #atmel,pll-clk-output-range-cells = <3>; + atmel,pll-clk-output-ranges = <80000000 200000000 0>, + <190000000 240000000 2>; }; utmi: utmick { @@ -586,7 +840,7 @@ interrupts-extended = <&pmc AT91_PMC_MCKRDY>; clocks = <&clk32k>, <&main>, <&plla>, <&utmi>; atmel,clk-output-range = <0 94000000>; - atmel,clk-divisors = <1 2 4 3>; + atmel,clk-divisors = <1 2 4 0>; }; prog: progck { @@ -769,6 +1023,32 @@ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; status = "disabled"; }; + + sckc@fffffd50 { + compatible = "atmel,at91sam9x5-sckc"; + reg = <0xfffffd50 0x4>; + + slow_osc: slow_osc { + compatible = "atmel,at91sam9x5-clk-slow-osc"; + #clock-cells = <0>; + atmel,startup-time-usec = <1200000>; + clocks = <&slow_xtal>; + }; + + slow_rc_osc: slow_rc_osc { + compatible = "atmel,at91sam9x5-clk-slow-rc-osc"; + #clock-cells = <0>; + atmel,startup-time-usec = <75>; + clock-frequency = <32768>; + clock-accuracy = <50000000>; + }; + + clk32k: slck { + compatible = "atmel,at91sam9x5-clk-slow"; + #clock-cells = <0>; + clocks = <&slow_rc_osc &slow_osc>; + }; + }; }; }; diff --git a/arch/arm/boot/dts/at91sam9rlek.dts b/arch/arm/boot/dts/at91sam9rlek.dts index cddb37825fad..d4a010e40fe3 100644 --- a/arch/arm/boot/dts/at91sam9rlek.dts +++ b/arch/arm/boot/dts/at91sam9rlek.dts @@ -20,6 +20,15 @@ reg = <0x20000000 0x4000000>; }; + + slow_xtal { + clock-frequency = <32768>; + }; + + main_xtal { + clock-frequency = <12000000>; + }; + clocks { #address-cells = <1>; #size-cells = <1>; @@ -32,6 +41,37 @@ }; ahb { + fb0: fb@00500000 { + display = <&display0>; + status = "okay"; + + display0: display { + bits-per-pixel = <16>; + atmel,lcdcon-backlight; + atmel,dmacon = <0x1>; + atmel,lcdcon2 = <0x80008002>; + atmel,guard-time = <1>; + atmel,lcd-wiring-mode = "RGB"; + + display-timings { + native-mode = <&timing0>; + timing0: timing0 { + clock-frequency = <4965000>; + hactive = <240>; + vactive = <320>; + hback-porch = <1>; + hfront-porch = <33>; + vback-porch = <1>; + vfront-porch = <0>; + hsync-len = <5>; + vsync-len = <1>; + hsync-active = <1>; + vsync-active = <1>; + }; + }; + }; + }; + nand0: nand@40000000 { nand-bus-width = <8>; nand-ecc-mode = "soft"; @@ -92,6 +132,43 @@ status = "okay"; }; + adc0: adc@fffd0000 { + pinctrl-names = "default"; + pinctrl-0 = < + &pinctrl_adc0_ad0 + &pinctrl_adc0_ad1 + &pinctrl_adc0_ad2 + &pinctrl_adc0_ad3 + &pinctrl_adc0_ad4 + &pinctrl_adc0_ad5 + &pinctrl_adc0_adtrg>; + atmel,adc-ts-wires = <4>; + status = "okay"; + }; + + usb0: gadget@fffd4000 { + atmel,vbus-gpio = <&pioA 8 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + spi0: spi@fffcc000 { + status = "okay"; + cs-gpios = <&pioA 28 0>, <0>, <0>, <0>; + mtd_dataflash@0 { + compatible = "atmel,at45", "atmel,dataflash"; + spi-max-frequency = <15000000>; + reg = <0>; + }; + }; + + pwm0: pwm@fffc8000 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0_pwm1_2>, + <&pinctrl_pwm0_pwm2_2>; + }; + dbgu: serial@fffff200 { status = "okay"; }; @@ -117,18 +194,24 @@ }; }; - leds { - compatible = "gpio-leds"; + pwmleds { + compatible = "pwm-leds"; ds1 { label = "ds1"; - gpios = <&pioD 15 GPIO_ACTIVE_LOW>; + pwms = <&pwm0 1 5000 PWM_POLARITY_INVERTED>; + max-brightness = <255>; }; ds2 { label = "ds2"; - gpios = <&pioD 16 GPIO_ACTIVE_LOW>; + pwms = <&pwm0 2 5000 PWM_POLARITY_INVERTED>; + max-brightness = <255>; }; + }; + + leds { + compatible = "gpio-leds"; ds3 { label = "ds3"; @@ -154,4 +237,12 @@ gpio-key,wakeup; }; }; + + i2c@0 { + status = "okay"; + }; + + i2c@1 { + status = "okay"; + }; }; diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index fc13c9240da8..1a57298636a5 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi @@ -14,6 +14,7 @@ #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/clock/at91.h> / { model = "Atmel AT91SAM9x5 family SoC"; @@ -51,6 +52,24 @@ reg = <0x20000000 0x10000000>; }; + slow_xtal: slow_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + main_xtal: main_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + adc_op_clk: adc_op_clk{ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <5000000>; + }; + ahb { compatible = "simple-bus"; #address-cells = <1>; @@ -77,8 +96,272 @@ }; pmc: pmc@fffffc00 { - compatible = "atmel,at91rm9200-pmc"; + compatible = "atmel,at91sam9x5-pmc"; reg = <0xfffffc00 0x100>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + interrupt-controller; + #address-cells = <1>; + #size-cells = <0>; + #interrupt-cells = <1>; + + main_rc_osc: main_rc_osc { + compatible = "atmel,at91sam9x5-clk-main-rc-osc"; + #clock-cells = <0>; + interrupts-extended = <&pmc AT91_PMC_MOSCRCS>; + clock-frequency = <12000000>; + clock-accuracy = <50000000>; + }; + + main_osc: main_osc { + compatible = "atmel,at91rm9200-clk-main-osc"; + #clock-cells = <0>; + interrupts-extended = <&pmc AT91_PMC_MOSCS>; + clocks = <&main_xtal>; + }; + + main: mainck { + compatible = "atmel,at91sam9x5-clk-main"; + #clock-cells = <0>; + interrupts-extended = <&pmc AT91_PMC_MOSCSELS>; + clocks = <&main_rc_osc>, <&main_osc>; + }; + + plla: pllack { + compatible = "atmel,at91rm9200-clk-pll"; + #clock-cells = <0>; + interrupts-extended = <&pmc AT91_PMC_LOCKA>; + clocks = <&main>; + reg = <0>; + atmel,clk-input-range = <2000000 32000000>; + #atmel,pll-clk-output-range-cells = <4>; + atmel,pll-clk-output-ranges = <745000000 800000000 0 0 + 695000000 750000000 1 0 + 645000000 700000000 2 0 + 595000000 650000000 3 0 + 545000000 600000000 0 1 + 495000000 555000000 1 1 + 445000000 500000000 1 2 + 400000000 450000000 1 3>; + }; + + plladiv: plladivck { + compatible = "atmel,at91sam9x5-clk-plldiv"; + #clock-cells = <0>; + clocks = <&plla>; + }; + + utmi: utmick { + compatible = "atmel,at91sam9x5-clk-utmi"; + #clock-cells = <0>; + interrupts-extended = <&pmc AT91_PMC_LOCKU>; + clocks = <&main>; + }; + + mck: masterck { + compatible = "atmel,at91sam9x5-clk-master"; + #clock-cells = <0>; + interrupts-extended = <&pmc AT91_PMC_MCKRDY>; + clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>; + atmel,clk-output-range = <0 133333333>; + atmel,clk-divisors = <1 2 4 3>; + atmel,master-clk-have-div3-pres; + }; + + usb: usbck { + compatible = "atmel,at91sam9x5-clk-usb"; + #clock-cells = <0>; + clocks = <&plladiv>, <&utmi>; + }; + + prog: progck { + compatible = "atmel,at91sam9x5-clk-programmable"; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = <&pmc>; + clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>; + + prog0: prog0 { + #clock-cells = <0>; + reg = <0>; + interrupts = <AT91_PMC_PCKRDY(0)>; + }; + + prog1: prog1 { + #clock-cells = <0>; + reg = <1>; + interrupts = <AT91_PMC_PCKRDY(1)>; + }; + }; + + smd: smdclk { + compatible = "atmel,at91sam9x5-clk-smd"; + #clock-cells = <0>; + clocks = <&plladiv>, <&utmi>; + }; + + systemck { + compatible = "atmel,at91rm9200-clk-system"; + #address-cells = <1>; + #size-cells = <0>; + + ddrck: ddrck { + #clock-cells = <0>; + reg = <2>; + clocks = <&mck>; + }; + + smdck: smdck { + #clock-cells = <0>; + reg = <4>; + clocks = <&smd>; + }; + + uhpck: uhpck { + #clock-cells = <0>; + reg = <6>; + clocks = <&usb>; + }; + + udpck: udpck { + #clock-cells = <0>; + reg = <7>; + clocks = <&usb>; + }; + + pck0: pck0 { + #clock-cells = <0>; + reg = <8>; + clocks = <&prog0>; + }; + + pck1: pck1 { + #clock-cells = <0>; + reg = <9>; + clocks = <&prog1>; + }; + }; + + periphck { + compatible = "atmel,at91sam9x5-clk-peripheral"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&mck>; + + pioAB_clk: pioAB_clk { + #clock-cells = <0>; + reg = <2>; + }; + + pioCD_clk: pioCD_clk { + #clock-cells = <0>; + reg = <3>; + }; + + smd_clk: smd_clk { + #clock-cells = <0>; + reg = <4>; + }; + + usart0_clk: usart0_clk { + #clock-cells = <0>; + reg = <5>; + }; + + usart1_clk: usart1_clk { + #clock-cells = <0>; + reg = <6>; + }; + + usart2_clk: usart2_clk { + #clock-cells = <0>; + reg = <7>; + }; + + twi0_clk: twi0_clk { + reg = <9>; + #clock-cells = <0>; + }; + + twi1_clk: twi1_clk { + #clock-cells = <0>; + reg = <10>; + }; + + twi2_clk: twi2_clk { + #clock-cells = <0>; + reg = <11>; + }; + + mci0_clk: mci0_clk { + #clock-cells = <0>; + reg = <12>; + }; + + spi0_clk: spi0_clk { + #clock-cells = <0>; + reg = <13>; + }; + + spi1_clk: spi1_clk { + #clock-cells = <0>; + reg = <14>; + }; + + uart0_clk: uart0_clk { + #clock-cells = <0>; + reg = <15>; + }; + + uart1_clk: uart1_clk { + #clock-cells = <0>; + reg = <16>; + }; + + tcb0_clk: tcb0_clk { + #clock-cells = <0>; + reg = <17>; + }; + + pwm_clk: pwm_clk { + #clock-cells = <0>; + reg = <18>; + }; + + adc_clk: adc_clk { + #clock-cells = <0>; + reg = <19>; + }; + + dma0_clk: dma0_clk { + #clock-cells = <0>; + reg = <20>; + }; + + dma1_clk: dma1_clk { + #clock-cells = <0>; + reg = <21>; + }; + + uhphs_clk: uhphs_clk { + #clock-cells = <0>; + reg = <22>; + }; + + udphs_clk: udphs_clk { + #clock-cells = <0>; + reg = <23>; + }; + + mci1_clk: mci1_clk { + #clock-cells = <0>; + reg = <26>; + }; + + ssc0_clk: ssc0_clk { + #clock-cells = <0>; + reg = <28>; + }; + }; }; rstc@fffffe00 { @@ -95,18 +378,47 @@ compatible = "atmel,at91sam9260-pit"; reg = <0xfffffe30 0xf>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&mck>; + }; + + sckc@fffffe50 { + compatible = "atmel,at91sam9x5-sckc"; + reg = <0xfffffe50 0x4>; + + slow_osc: slow_osc { + compatible = "atmel,at91sam9x5-clk-slow-osc"; + #clock-cells = <0>; + clocks = <&slow_xtal>; + }; + + slow_rc_osc: slow_rc_osc { + compatible = "atmel,at91sam9x5-clk-slow-rc-osc"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-accuracy = <50000000>; + }; + + clk32k: slck { + compatible = "atmel,at91sam9x5-clk-slow"; + #clock-cells = <0>; + clocks = <&slow_rc_osc>, <&slow_osc>; + }; }; tcb0: timer@f8008000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf8008000 0x100>; interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&tcb0_clk>; + clock-names = "t0_clk"; }; tcb1: timer@f800c000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf800c000 0x100>; interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&tcb0_clk>; + clock-names = "t0_clk"; }; dma0: dma-controller@ffffec00 { @@ -114,6 +426,8 @@ reg = <0xffffec00 0x200>; interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; #dma-cells = <2>; + clocks = <&dma0_clk>; + clock-names = "dma_clk"; }; dma1: dma-controller@ffffee00 { @@ -121,6 +435,8 @@ reg = <0xffffee00 0x200>; interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; #dma-cells = <2>; + clocks = <&dma1_clk>; + clock-names = "dma_clk"; }; pinctrl@fffff400 { @@ -453,6 +769,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; + clocks = <&pioAB_clk>; }; pioB: gpio@fffff600 { @@ -464,6 +781,7 @@ #gpio-lines = <19>; interrupt-controller; #interrupt-cells = <2>; + clocks = <&pioAB_clk>; }; pioC: gpio@fffff800 { @@ -474,6 +792,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; + clocks = <&pioCD_clk>; }; pioD: gpio@fffffa00 { @@ -485,6 +804,7 @@ #gpio-lines = <22>; interrupt-controller; #interrupt-cells = <2>; + clocks = <&pioCD_clk>; }; }; @@ -497,6 +817,8 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; + clocks = <&ssc0_clk>; + clock-names = "pclk"; status = "disabled"; }; @@ -507,6 +829,8 @@ dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>; dma-names = "rxtx"; pinctrl-names = "default"; + clocks = <&mci0_clk>; + clock-names = "mci_clk"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -519,6 +843,8 @@ dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>; dma-names = "rxtx"; pinctrl-names = "default"; + clocks = <&mci1_clk>; + clock-names = "mci_clk"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -530,6 +856,8 @@ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; + clocks = <&mck>; + clock-names = "usart"; status = "disabled"; }; @@ -539,6 +867,8 @@ interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart0>; + clocks = <&usart0_clk>; + clock-names = "usart"; status = "disabled"; }; @@ -548,6 +878,8 @@ interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart1>; + clocks = <&usart1_clk>; + clock-names = "usart"; status = "disabled"; }; @@ -557,6 +889,8 @@ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart2>; + clocks = <&usart2_clk>; + clock-names = "usart"; status = "disabled"; }; @@ -571,6 +905,7 @@ #size-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c0>; + clocks = <&twi0_clk>; status = "disabled"; }; @@ -585,6 +920,7 @@ #size-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; + clocks = <&twi1_clk>; status = "disabled"; }; @@ -599,6 +935,7 @@ #size-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; + clocks = <&twi2_clk>; status = "disabled"; }; @@ -608,6 +945,8 @@ interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart0>; + clocks = <&uart0_clk>; + clock-names = "usart"; status = "disabled"; }; @@ -617,6 +956,8 @@ interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; + clocks = <&uart1_clk>; + clock-names = "usart"; status = "disabled"; }; @@ -626,6 +967,9 @@ compatible = "atmel,at91sam9260-adc"; reg = <0xf804c000 0x100>; interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&adc_clk>, + <&adc_op_clk>; + clock-names = "adc_clk", "adc_op_clk"; atmel,adc-use-external-triggers; atmel,adc-channels-used = <0xffff>; atmel,adc-vref = <3300>; @@ -673,6 +1017,8 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi0>; + clocks = <&spi0_clk>; + clock-names = "spi_clk"; status = "disabled"; }; @@ -687,6 +1033,8 @@ dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi1>; + clocks = <&spi1_clk>; + clock-names = "spi_clk"; status = "disabled"; }; @@ -805,6 +1153,9 @@ compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00600000 0x100000>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; + clocks = <&usb>, <&uhphs_clk>, <&udphs_clk>, + <&uhpck>; + clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck"; status = "disabled"; }; @@ -812,6 +1163,8 @@ compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; reg = <0x00700000 0x100000>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; + clocks = <&usb>, <&uhphs_clk>, <&uhpck>; + clock-names = "usb_clk", "ehci_clk", "uhpck"; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/at91sam9x5_can.dtsi b/arch/arm/boot/dts/at91sam9x5_can.dtsi new file mode 100644 index 000000000000..f44ab7702a12 --- /dev/null +++ b/arch/arm/boot/dts/at91sam9x5_can.dtsi @@ -0,0 +1,31 @@ +/* + * at91sam9x5_macb0.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 1 + * Ethernet interface. + * + * Copyright (C) 2013 Boris BREZILLON <[email protected]> + * + * Licensed under GPLv2. + */ + +#include <dt-bindings/pinctrl/at91.h> +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + ahb { + apb { + pmc: pmc@fffffc00 { + periphck { + can0_clk: can0_clk { + #clock-cells = <0>; + reg = <29>; + }; + + can1_clk: can1_clk { + #clock-cells = <0>; + reg = <30>; + }; + }; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/at91sam9x5_isi.dtsi b/arch/arm/boot/dts/at91sam9x5_isi.dtsi new file mode 100644 index 000000000000..98bc877a68ef --- /dev/null +++ b/arch/arm/boot/dts/at91sam9x5_isi.dtsi @@ -0,0 +1,26 @@ +/* + * at91sam9x5_isi.dtsi - Device Tree Include file for AT91SAM9x5 SoC with an + * Image Sensor Interface. + * + * Copyright (C) 2013 Boris BREZILLON <[email protected]> + * + * Licensed under GPLv2. + */ + +#include <dt-bindings/pinctrl/at91.h> +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + ahb { + apb { + pmc: pmc@fffffc00 { + periphck { + isi_clk: isi_clk { + #clock-cells = <0>; + reg = <25>; + }; + }; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/at91sam9x5_lcd.dtsi b/arch/arm/boot/dts/at91sam9x5_lcd.dtsi new file mode 100644 index 000000000000..485302e8233d --- /dev/null +++ b/arch/arm/boot/dts/at91sam9x5_lcd.dtsi @@ -0,0 +1,26 @@ +/* + * at91sam9x5_lcd.dtsi - Device Tree Include file for AT91SAM9x5 SoC with an + * LCD controller. + * + * Copyright (C) 2013 Boris BREZILLON <[email protected]> + * + * Licensed under GPLv2. + */ + +#include <dt-bindings/pinctrl/at91.h> +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + ahb { + apb { + pmc: pmc@fffffc00 { + periphck { + lcdc_clk: lcdc_clk { + #clock-cells = <0>; + reg = <25>; + }; + }; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/at91sam9x5_macb0.dtsi b/arch/arm/boot/dts/at91sam9x5_macb0.dtsi index 55731ffba764..57e89d1d0325 100644 --- a/arch/arm/boot/dts/at91sam9x5_macb0.dtsi +++ b/arch/arm/boot/dts/at91sam9x5_macb0.dtsi @@ -43,12 +43,23 @@ }; }; + pmc: pmc@fffffc00 { + periphck { + macb0_clk: macb0_clk { + #clock-cells = <0>; + reg = <24>; + }; + }; + }; + macb0: ethernet@f802c000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xf802c000 0x100>; interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_macb0_rmii>; + clocks = <&macb0_clk>, <&macb0_clk>; + clock-names = "hclk", "pclk"; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/at91sam9x5_macb1.dtsi b/arch/arm/boot/dts/at91sam9x5_macb1.dtsi index 77425a627a94..663676c02861 100644 --- a/arch/arm/boot/dts/at91sam9x5_macb1.dtsi +++ b/arch/arm/boot/dts/at91sam9x5_macb1.dtsi @@ -31,12 +31,23 @@ }; }; + pmc: pmc@fffffc00 { + periphck { + macb1_clk: macb1_clk { + #clock-cells = <0>; + reg = <27>; + }; + }; + }; + macb1: ethernet@f8030000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xf8030000 0x100>; interrupts = <27 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_macb1_rmii>; + clocks = <&macb1_clk>, <&macb1_clk>; + clock-names = "hclk", "pclk"; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/at91sam9x5_usart3.dtsi b/arch/arm/boot/dts/at91sam9x5_usart3.dtsi index 6801106fa1f8..140217a54384 100644 --- a/arch/arm/boot/dts/at91sam9x5_usart3.dtsi +++ b/arch/arm/boot/dts/at91sam9x5_usart3.dtsi @@ -42,12 +42,23 @@ }; }; + pmc: pmc@fffffc00 { + periphck { + usart3_clk: usart3_clk { + #clock-cells = <0>; + reg = <8>; + }; + }; + }; + usart3: serial@f8028000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8028000 0x200>; interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart3>; + clocks = <&usart3_clk>; + clock-names = "usart"; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/at91sam9x5cm.dtsi b/arch/arm/boot/dts/at91sam9x5cm.dtsi index 4a5ee5cc115a..8413e21192eb 100644 --- a/arch/arm/boot/dts/at91sam9x5cm.dtsi +++ b/arch/arm/boot/dts/at91sam9x5cm.dtsi @@ -23,6 +23,14 @@ }; }; + slow_xtal { + clock-frequency = <32768>; + }; + + main_xtal { + clock-frequency = <12000000>; + }; + ahb { apb { pinctrl@fffff400 { diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 1c0f8e1893ae..149b55099935 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -80,7 +80,7 @@ }; /* - * The soc node represents the soc top level view. It is uses for IPs + * The soc node represents the soc top level view. It is used for IPs * that are not memory mapped in the MPU view or for the MPU itself. */ soc { @@ -94,7 +94,7 @@ /* * XXX: Use a flat representation of the SOC interconnect. * The real OMAP interconnect network is quite complex. - * Since that will not bring real advantage to represent that in DT for + * Since it will not bring real advantage to represent that in DT for * the moment, just use a fake OCP bus entry to represent the whole bus * hierarchy. */ diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi index e96da9a898ad..cfb8fc753f50 100644 --- a/arch/arm/boot/dts/dra7xx-clocks.dtsi +++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi @@ -1640,7 +1640,7 @@ #clock-cells = <0>; compatible = "ti,mux-clock"; clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atlclkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>; - ti,bit-shift = <28>; + ti,bit-shift = <24>; reg = <0x1860>; }; diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index 2f8bcd068d17..58ff8e28c74f 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -129,12 +129,10 @@ status = "disabled"; #address-cells = <1>; #size-cells = <1>; + #clock-cells = <1>; + clock-output-names = "cam_a_clkout", "cam_b_clkout"; ranges; - clock_cam: clock-controller { - #clock-cells = <1>; - }; - fimc_0: fimc@11800000 { compatible = "samsung,exynos4210-fimc"; reg = <0x11800000 0x1000>; @@ -371,6 +369,8 @@ interrupts = <0 60 0>; clocks = <&clock CLK_I2C2>; clock-names = "i2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_bus>; status = "disabled"; }; @@ -382,6 +382,8 @@ interrupts = <0 61 0>; clocks = <&clock CLK_I2C3>; clock-names = "i2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_bus>; status = "disabled"; }; @@ -393,6 +395,8 @@ interrupts = <0 62 0>; clocks = <&clock CLK_I2C4>; clock-names = "i2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c4_bus>; status = "disabled"; }; @@ -404,6 +408,8 @@ interrupts = <0 63 0>; clocks = <&clock CLK_I2C5>; clock-names = "i2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c5_bus>; status = "disabled"; }; @@ -415,6 +421,8 @@ interrupts = <0 64 0>; clocks = <&clock CLK_I2C6>; clock-names = "i2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c6_bus>; status = "disabled"; }; @@ -426,6 +434,8 @@ interrupts = <0 65 0>; clocks = <&clock CLK_I2C7>; clock-names = "i2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c7_bus>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts index 63e34b24b04f..9296dee10e26 100644 --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts @@ -28,6 +28,21 @@ bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rw rootwait earlyprintk panic=5 maxcpus=1"; }; + sysram@02020000 { + smp-sysram@0 { + status = "disabled"; + }; + + smp-sysram@5000 { + compatible = "samsung,exynos4210-sysram"; + reg = <0x5000 0x1000>; + }; + + smp-sysram@1f000 { + status = "disabled"; + }; + }; + mct@10050000 { compatible = "none"; }; diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index cacf6140dd2f..ee3001f38821 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -31,6 +31,24 @@ pinctrl2 = &pinctrl_2; }; + sysram@02020000 { + compatible = "mmio-sram"; + reg = <0x02020000 0x20000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x02020000 0x20000>; + + smp-sysram@0 { + compatible = "samsung,exynos4210-sysram"; + reg = <0x0 0x1000>; + }; + + smp-sysram@1f000 { + compatible = "samsung,exynos4210-sysram-ns"; + reg = <0x1f000 0x1000>; + }; + }; + pd_lcd1: lcd1-power-domain@10023CA0 { compatible = "samsung,exynos4210-pd"; reg = <0x10023CA0 0x20>; diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index 9583563dd0ef..f621fd976815 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -20,7 +20,7 @@ compatible = "samsung,trats2", "samsung,exynos4412", "samsung,exynos4"; aliases { - i2c8 = &i2c_ak8975; + i2c9 = &i2c_ak8975; }; memory { @@ -80,7 +80,24 @@ enable-active-high; }; - /* More to come */ + cam_af_reg: voltage-regulator-3 { + compatible = "regulator-fixed"; + regulator-name = "CAM_AF"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + gpio = <&gpm0 4 0>; + enable-active-high; + }; + + cam_isp_core_reg: voltage-regulator-4 { + compatible = "regulator-fixed"; + regulator-name = "CAM_ISP_CORE_1.2V_EN"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + gpio = <&gpm0 3 0>; + enable-active-high; + regulator-always-on; + }; }; gpio-keys { @@ -140,6 +157,38 @@ }; }; + i2c_0: i2c@13860000 { + samsung,i2c-sda-delay = <100>; + samsung,i2c-slave-addr = <0x10>; + samsung,i2c-max-bus-freq = <400000>; + pinctrl-0 = <&i2c0_bus>; + pinctrl-names = "default"; + status = "okay"; + + s5c73m3@3c { + compatible = "samsung,s5c73m3"; + reg = <0x3c>; + standby-gpios = <&gpm0 1 1>; /* ISP_STANDBY */ + xshutdown-gpios = <&gpf1 3 1>; /* ISP_RESET */ + vdd-int-supply = <&buck9_reg>; + vddio-cis-supply = <&ldo9_reg>; + vdda-supply = <&ldo17_reg>; + vddio-host-supply = <&ldo18_reg>; + vdd-af-supply = <&cam_af_reg>; + vdd-reg-supply = <&cam_io_reg>; + clock-frequency = <24000000>; + /* CAM_A_CLKOUT */ + clocks = <&camera 0>; + clock-names = "cis_extclk"; + port { + s5c73m3_ep: endpoint { + remote-endpoint = <&csis0_ep>; + data-lanes = <1 2 3 4>; + }; + }; + }; + }; + i2c@138D0000 { samsung,i2c-sda-delay = <100>; samsung,i2c-slave-addr = <0x10>; @@ -586,8 +635,8 @@ status = "okay"; }; - camera { - pinctrl-0 = <&cam_port_b_clk_active>; + camera: camera { + pinctrl-0 = <&cam_port_a_clk_active &cam_port_b_clk_active>; pinctrl-names = "default"; status = "okay"; @@ -607,6 +656,23 @@ status = "okay"; }; + csis_0: csis@11880000 { + status = "okay"; + vddcore-supply = <&ldo8_reg>; + vddio-supply = <&ldo10_reg>; + clock-frequency = <176000000>; + + /* Camera C (3) MIPI CSI-2 (CSIS0) */ + port@3 { + reg = <3>; + csis0_ep: endpoint { + remote-endpoint = <&s5c73m3_ep>; + data-lanes = <1 2 3 4>; + samsung,csis-hs-settle = <12>; + }; + }; + }; + csis_1: csis@11890000 { vddcore-supply = <&ldo8_reg>; vddio-supply = <&ldo10_reg>; @@ -647,10 +713,11 @@ reg = <0x10>; svdda-supply = <&cam_io_reg>; svddio-supply = <&ldo19_reg>; + afvdd-supply = <&ldo19_reg>; clock-frequency = <24000000>; /* CAM_B_CLKOUT */ - clocks = <&clock_cam 1>; - clock-names = "mclk"; + clocks = <&camera 1>; + clock-names = "extclk"; samsung,camclk-out = <1>; gpios = <&gpm1 6 0>; diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index c4a9306f8529..70e3765b51ee 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -37,6 +37,24 @@ interrupts = <2 2>, <3 2>, <18 2>, <19 2>; }; + sysram@02020000 { + compatible = "mmio-sram"; + reg = <0x02020000 0x40000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x02020000 0x40000>; + + smp-sysram@0 { + compatible = "samsung,exynos4210-sysram"; + reg = <0x0 0x1000>; + }; + + smp-sysram@2f000 { + compatible = "samsung,exynos4210-sysram-ns"; + reg = <0x2f000 0x1000>; + }; + }; + pd_isp: isp-power-domain@10023CA0 { compatible = "samsung,exynos4210-pd"; reg = <0x10023CA0 0x20>; diff --git a/arch/arm/boot/dts/exynos5250-cros-common.dtsi b/arch/arm/boot/dts/exynos5250-cros-common.dtsi index 2c1560d52f1a..89ac90f59e2e 100644 --- a/arch/arm/boot/dts/exynos5250-cros-common.dtsi +++ b/arch/arm/boot/dts/exynos5250-cros-common.dtsi @@ -240,7 +240,7 @@ samsung,i2c-sda-delay = <100>; samsung,i2c-max-bus-freq = <378000>; - hdmiphy@38 { + hdmiphy: hdmiphy@38 { compatible = "samsung,exynos4212-hdmiphy"; reg = <0x38>; }; @@ -304,6 +304,10 @@ hdmi { hpd-gpio = <&gpx3 7 0>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_hpd_irq>; + phy = <&hdmiphy>; + ddc = <&i2c_2>; }; gpio-keys { diff --git a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi index 9a49e6804ae1..886cfca044ac 100644 --- a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi @@ -351,6 +351,34 @@ samsung,pin-drv = <0>; }; + pwm0_out: pwm0-out { + samsung,pins = "gpb2-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + pwm1_out: pwm1-out { + samsung,pins = "gpb2-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + pwm2_out: pwm2-out { + samsung,pins = "gpb2-2"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + pwm3_out: pwm3-out { + samsung,pins = "gpb2-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + i2c7_bus: i2c7-bus { samsung,pins = "gpb2-2", "gpb2-3"; samsung,pin-function = <3>; diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts index 1ce1088a00fb..079fdf9e3f18 100644 --- a/arch/arm/boot/dts/exynos5250-snow.dts +++ b/arch/arm/boot/dts/exynos5250-snow.dts @@ -25,6 +25,13 @@ }; pinctrl@11400000 { + ec_irq: ec-irq { + samsung,pins = "gpx1-6"; + samsung,pin-function = <0>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + sd3_clk: sd3-clk { samsung,pin-drv = <0>; }; @@ -37,6 +44,50 @@ sd3_bus4: sd3-bus-width4 { samsung,pin-drv = <0>; }; + + max98095_en: max98095-en { + samsung,pins = "gpx1-7"; + samsung,pin-function = <0>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + tps65090_irq: tps65090-irq { + samsung,pins = "gpx2-6"; + samsung,pin-function = <0>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + usb3_vbus_en: usb3-vbus-en { + samsung,pins = "gpx2-7"; + samsung,pin-function = <1>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + hdmi_hpd_irq: hdmi-hpd-irq { + samsung,pins = "gpx3-7"; + samsung,pin-function = <0>; + samsung,pin-pud = <1>; + samsung,pin-drv = <0>; + }; + }; + + pinctrl@13400000 { + arb_their_claim: arb-their-claim { + samsung,pins = "gpe0-4"; + samsung,pin-function = <0>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; + + arb_our_claim: arb-our-claim { + samsung,pins = "gpf0-3"; + samsung,pin-function = <1>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; }; gpio-keys { @@ -52,6 +103,12 @@ }; }; + vbat: vbat-fixed-regulator { + compatible = "regulator-fixed"; + regulator-name = "vbat-supply"; + regulator-boot-on; + }; + i2c-arbitrator { compatible = "i2c-arb-gpio-challenge"; #address-cells = <1>; @@ -65,6 +122,9 @@ wait-retry-us = <3000>; wait-free-us = <50000>; + pinctrl-names = "default"; + pinctrl-0 = <&arb_our_claim &arb_their_claim>; + /* Use ID 104 as a hint that we're on physical bus 4 */ i2c_104: i2c@0 { reg = <0>; @@ -82,6 +142,8 @@ reg = <0x1e>; interrupts = <6 0>; interrupt-parent = <&gpx1>; + pinctrl-names = "default"; + pinctrl-0 = <&ec_irq>; wakeup-source; keyboard-controller { @@ -173,6 +235,83 @@ 0x070c0069>; /* LEFT */ }; }; + + power-regulator { + compatible = "ti,tps65090"; + reg = <0x48>; + + /* + * Config irq to disable internal pulls + * even though we run in polling mode. + */ + pinctrl-names = "default"; + pinctrl-0 = <&tps65090_irq>; + + vsys1-supply = <&vbat>; + vsys2-supply = <&vbat>; + vsys3-supply = <&vbat>; + infet1-supply = <&vbat>; + infet2-supply = <&vbat>; + infet3-supply = <&vbat>; + infet4-supply = <&vbat>; + infet5-supply = <&vbat>; + infet6-supply = <&vbat>; + infet7-supply = <&vbat>; + vsys-l1-supply = <&vbat>; + vsys-l2-supply = <&vbat>; + + regulators { + dcdc1 { + ti,enable-ext-control; + }; + dcdc2 { + ti,enable-ext-control; + }; + dcdc3 { + ti,enable-ext-control; + }; + fet1 { + regulator-name = "vcd_led"; + ti,overcurrent-wait = <3>; + }; + tps65090_fet2: fet2 { + regulator-name = "video_mid"; + regulator-always-on; + ti,overcurrent-wait = <3>; + }; + fet3 { + regulator-name = "wwan_r"; + regulator-always-on; + ti,overcurrent-wait = <3>; + }; + fet4 { + regulator-name = "sdcard"; + ti,overcurrent-wait = <3>; + }; + fet5 { + regulator-name = "camout"; + regulator-always-on; + ti,overcurrent-wait = <3>; + }; + fet6 { + regulator-name = "lcd_vdd"; + ti,overcurrent-wait = <3>; + }; + tps65090_fet7: fet7 { + regulator-name = "video_mid_1a"; + regulator-always-on; + ti,overcurrent-wait = <3>; + }; + ldo1 { + }; + ldo2 { + }; + }; + + charger { + compatible = "ti,tps65090-charger"; + }; + }; }; }; @@ -196,6 +335,41 @@ }; }; + i2c@12CD0000 { + max98095: codec@11 { + compatible = "maxim,max98095"; + reg = <0x11>; + pinctrl-0 = <&max98095_en>; + pinctrl-names = "default"; + }; + }; + + i2s0: i2s@03830000 { + status = "okay"; + }; + + sound { + compatible = "google,snow-audio-max98095"; + + samsung,i2s-controller = <&i2s0>; + samsung,audio-codec = <&max98095>; + }; + + usb3_vbus_reg: regulator-usb3 { + compatible = "regulator-fixed"; + regulator-name = "P5.0V_USB3CON"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpx2 7 0>; + pinctrl-names = "default"; + pinctrl-0 = <&usb3_vbus_en>; + enable-active-high; + }; + + phy@12100000 { + vbus-supply = <&usb3_vbus_reg>; + }; + usb@12110000 { samsung,vbus-gpio = <&gpx1 1 0>; }; @@ -206,4 +380,54 @@ clock-frequency = <24000000>; }; }; + + hdmi { + hdmi-en-supply = <&tps65090_fet7>; + vdd-supply = <&ldo8_reg>; + vdd_osc-supply = <&ldo10_reg>; + vdd_pll-supply = <&ldo8_reg>; + }; + + backlight { + compatible = "pwm-backlight"; + pwms = <&pwm 0 1000000 0>; + brightness-levels = <0 100 500 1000 1500 2000 2500 2800>; + default-brightness-level = <7>; + pinctrl-0 = <&pwm0_out>; + pinctrl-names = "default"; + }; + + fimd@14400000 { + status = "okay"; + samsung,invert-vclk; + }; + + dp-controller@145B0000 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&dp_hpd>; + samsung,color-space = <0>; + samsung,dynamic-range = <0>; + samsung,ycbcr-coeff = <0>; + samsung,color-depth = <1>; + samsung,link-rate = <0x0a>; + samsung,lane-count = <2>; + samsung,hpd-gpio = <&gpx0 7 0>; + + display-timings { + native-mode = <&timing1>; + + timing1: timing@1 { + clock-frequency = <70589280>; + hactive = <1366>; + vactive = <768>; + hfront-porch = <40>; + hback-porch = <40>; + hsync-len = <32>; + vback-porch = <10>; + vfront-porch = <12>; + vsync-len = <6>; + }; + }; + }; }; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 37423314a028..68a3e6f254d9 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -72,6 +72,24 @@ }; }; + sysram@02020000 { + compatible = "mmio-sram"; + reg = <0x02020000 0x30000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x02020000 0x30000>; + + smp-sysram@0 { + compatible = "samsung,exynos4210-sysram"; + reg = <0x0 0x1000>; + }; + + smp-sysram@2f000 { + compatible = "samsung,exynos4210-sysram-ns"; + reg = <0x2f000 0x1000>; + }; + }; + pd_gsc: gsc-power-domain@10044000 { compatible = "samsung,exynos4210-pd"; reg = <0x10044000 0x20>; @@ -533,22 +551,18 @@ compatible = "synopsys,dwc3"; reg = <0x12000000 0x10000>; interrupts = <0 72 0>; - usb-phy = <&usb2_phy &usb3_phy>; + phys = <&usbdrd_phy 0>, <&usbdrd_phy 1>; + phy-names = "usb2-phy", "usb3-phy"; }; }; - usb3_phy: usbphy@12100000 { - compatible = "samsung,exynos5250-usb3phy"; + usbdrd_phy: phy@12100000 { + compatible = "samsung,exynos5250-usbdrd-phy"; reg = <0x12100000 0x100>; - clocks = <&clock CLK_FIN_PLL>, <&clock CLK_USB3>; - clock-names = "ext_xtal", "usbdrd30"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - usbphy-sys { - reg = <0x10040704 0x8>; - }; + clocks = <&clock CLK_USB3>, <&clock CLK_FIN_PLL>; + clock-names = "phy", "ref"; + samsung,pmu-syscon = <&pmu_system_controller>; + #phy-cells = <1>; }; usb@12110000 { diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts index 80a3bf4c5986..6ee8149fd5c4 100644 --- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts +++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts @@ -37,6 +37,11 @@ status = "okay"; }; + codec@11000000 { + samsung,mfc-r = <0x43000000 0x800000>; + samsung,mfc-l = <0x51000000 0x800000>; + }; + mmc@12200000 { status = "okay"; broken-cd; @@ -364,16 +369,4 @@ gpio-key,wakeup; }; }; - - amba { - mdma1: mdma@11C10000 { - /* - * MDMA1 can support both secure and non-secure - * AXI transactions. When this is enabled in the kernel - * for boards that run in secure mode, we are getting - * imprecise external aborts causing the kernel to oops. - */ - status = "disabled"; - }; - }; }; diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts new file mode 100644 index 000000000000..d4127b0ba83f --- /dev/null +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts @@ -0,0 +1,287 @@ +/* + * Google Peach Pit Rev 6+ board device tree source + * + * Copyright (c) 2014 Google, Inc + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/dts-v1/; +#include <dt-bindings/input/input.h> +#include <dt-bindings/gpio/gpio.h> +#include "exynos5420.dtsi" + +/ { + model = "Google Peach Pit Rev 6+"; + + compatible = "google,pit-rev16", + "google,pit-rev15", "google,pit-rev14", + "google,pit-rev13", "google,pit-rev12", + "google,pit-rev11", "google,pit-rev10", + "google,pit-rev9", "google,pit-rev8", + "google,pit-rev7", "google,pit-rev6", + "google,pit", "google,peach","samsung,exynos5420", + "samsung,exynos5"; + + memory { + reg = <0x20000000 0x80000000>; + }; + + fixed-rate-clocks { + oscclk { + compatible = "samsung,exynos5420-oscclk"; + clock-frequency = <24000000>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + pinctrl-names = "default"; + pinctrl-0 = <&power_key_irq>; + + power { + label = "Power"; + gpios = <&gpx1 2 GPIO_ACTIVE_LOW>; + linux,code = <KEY_POWER>; + gpio-key,wakeup; + }; + }; + + backlight { + compatible = "pwm-backlight"; + pwms = <&pwm 0 1000000 0>; + brightness-levels = <0 100 500 1000 1500 2000 2500 2800>; + default-brightness-level = <7>; + pinctrl-0 = <&pwm0_out>; + pinctrl-names = "default"; + }; + + sound { + compatible = "google,snow-audio-max98090"; + + samsung,i2s-controller = <&i2s0>; + samsung,audio-codec = <&max98090>; + }; + + usb300_vbus_reg: regulator-usb300 { + compatible = "regulator-fixed"; + regulator-name = "P5.0V_USB3CON0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gph0 0 0>; + pinctrl-names = "default"; + pinctrl-0 = <&usb300_vbus_en>; + enable-active-high; + }; + + usb301_vbus_reg: regulator-usb301 { + compatible = "regulator-fixed"; + regulator-name = "P5.0V_USB3CON1"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gph0 1 0>; + pinctrl-names = "default"; + pinctrl-0 = <&usb301_vbus_en>; + enable-active-high; + }; +}; + +&pinctrl_0 { + max98090_irq: max98090-irq { + samsung,pins = "gpx0-2"; + samsung,pin-function = <0>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + tpm_irq: tpm-irq { + samsung,pins = "gpx1-0"; + samsung,pin-function = <0>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + power_key_irq: power-key-irq { + samsung,pins = "gpx1-2"; + samsung,pin-function = <0>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + hdmi_hpd_irq: hdmi-hpd-irq { + samsung,pins = "gpx3-7"; + samsung,pin-function = <0>; + samsung,pin-pud = <1>; + samsung,pin-drv = <0>; + }; +}; + +&pinctrl_3 { + usb300_vbus_en: usb300-vbus-en { + samsung,pins = "gph0-0"; + samsung,pin-function = <1>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + usb301_vbus_en: usb301-vbus-en { + samsung,pins = "gph0-1"; + samsung,pin-function = <1>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + dp_hpd_gpio: dp_hpd_gpio { + samsung,pins = "gpx2-6"; + samsung,pin-function = <0>; + samsung,pin-pud = <3>; + samsung,pin-drv = <0>; + }; +}; + +&rtc { + status = "okay"; +}; + +&uart_3 { + status = "okay"; +}; + +&mmc_0 { + status = "okay"; + num-slots = <1>; + broken-cd; + caps2-mmc-hs200-1_8v; + supports-highspeed; + non-removable; + card-detect-delay = <200>; + clock-frequency = <400000000>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <0 4>; + samsung,dw-mshc-ddr-timing = <0 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; + + slot@0 { + reg = <0>; + bus-width = <8>; + }; +}; + +&mmc_2 { + status = "okay"; + num-slots = <1>; + supports-highspeed; + card-detect-delay = <200>; + clock-frequency = <400000000>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; + + slot@0 { + reg = <0>; + bus-width = <4>; + }; +}; + +&hsi2c_7 { + status = "okay"; + + max98090: codec@10 { + compatible = "maxim,max98090"; + reg = <0x10>; + interrupts = <2 0>; + interrupt-parent = <&gpx0>; + pinctrl-names = "default"; + pinctrl-0 = <&max98090_irq>; + }; +}; + +&hsi2c_9 { + status = "okay"; + clock-frequency = <400000>; + + tpm@20 { + compatible = "infineon,slb9645tt"; + reg = <0x20>; + + /* Unused irq; but still need to configure the pins */ + pinctrl-names = "default"; + pinctrl-0 = <&tpm_irq>; + }; +}; + +&i2c_2 { + status = "okay"; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <66000>; + samsung,i2c-slave-addr = <0x50>; +}; + +&hdmi { + status = "okay"; + hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_hpd_irq>; + ddc = <&i2c_2>; +}; + +&usbdrd3_0 { + vbus-supply = <&usb300_vbus_reg>; +}; + +&usbdrd3_1 { + vbus-supply = <&usb301_vbus_reg>; +}; + +/* + * Use longest HW watchdog in SoC (32 seconds) since the hardware + * watchdog provides no debugging information (compared to soft/hard + * lockup detectors) and so should be last resort. + */ +&watchdog { + timeout-sec = <32>; +}; + +&i2s0 { + status = "okay"; +}; + +&fimd { + status = "okay"; + samsung,invert-vclk; +}; + +&dp { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&dp_hpd_gpio>; + samsung,color-space = <0>; + samsung,dynamic-range = <0>; + samsung,ycbcr-coeff = <0>; + samsung,color-depth = <1>; + samsung,link-rate = <0x06>; + samsung,lane-count = <2>; + samsung,hpd-gpio = <&gpx2 6 0>; + + display-timings { + native-mode = <&timing1>; + + timing1: timing@1 { + clock-frequency = <70589280>; + hactive = <1366>; + vactive = <768>; + hfront-porch = <40>; + hback-porch = <40>; + hsync-len = <32>; + vback-porch = <10>; + vfront-porch = <12>; + vsync-len = <6>; + }; + }; +}; diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi index e62c8eb57438..ba686e40eac7 100644 --- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi @@ -624,6 +624,34 @@ samsung,pin-drv = <0>; }; + pwm0_out: pwm0-out { + samsung,pins = "gpb2-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + pwm1_out: pwm1-out { + samsung,pins = "gpb2-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + pwm2_out: pwm2-out { + samsung,pins = "gpb2-2"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + pwm3_out: pwm3-out { + samsung,pins = "gpb2-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + i2c7_hs_bus: i2c7-hs-bus { samsung,pins = "gpb2-2", "gpb2-3"; samsung,pin-function = <3>; diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts index 69104850eb5e..6052aa9c5659 100644 --- a/arch/arm/boot/dts/exynos5420-smdk5420.dts +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts @@ -68,6 +68,11 @@ status = "okay"; }; + codec@11000000 { + samsung,mfc-r = <0x43000000 0x800000>; + samsung,mfc-l = <0x51000000 0x800000>; + }; + mmc@12200000 { status = "okay"; broken-cd; @@ -140,6 +145,22 @@ }; }; + pinctrl@14000000 { + usb300_vbus_en: usb300-vbus-en { + samsung,pins = "gpg0-5"; + samsung,pin-function = <1>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + usb301_vbus_en: usb301-vbus-en { + samsung,pins = "gpg1-4"; + samsung,pin-function = <1>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + }; + hdmi@14530000 { status = "okay"; hpd-gpio = <&gpx3 7 0>; @@ -147,6 +168,36 @@ pinctrl-0 = <&hdmi_hpd_irq>; }; + usb300_vbus_reg: regulator-usb300 { + compatible = "regulator-fixed"; + regulator-name = "VBUS0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpg0 5 0>; + pinctrl-names = "default"; + pinctrl-0 = <&usb300_vbus_en>; + enable-active-high; + }; + + usb301_vbus_reg: regulator-usb301 { + compatible = "regulator-fixed"; + regulator-name = "VBUS1"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpg1 4 0>; + pinctrl-names = "default"; + pinctrl-0 = <&usb301_vbus_en>; + enable-active-high; + }; + + phy@12100000 { + vbus-supply = <&usb300_vbus_reg>; + }; + + phy@12500000 { + vbus-supply = <&usb301_vbus_reg>; + }; + i2c_2: i2c@12C80000 { samsung,i2c-sda-delay = <100>; samsung,i2c-max-bus-freq = <66000>; diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index c3a9a66c5767..9b6414a9e8a1 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -47,6 +47,8 @@ spi0 = &spi_0; spi1 = &spi_1; spi2 = &spi_2; + usbdrdphy0 = &usbdrd_phy0; + usbdrdphy1 = &usbdrd_phy1; }; cpus { @@ -110,6 +112,24 @@ }; }; + sysram@02020000 { + compatible = "mmio-sram"; + reg = <0x02020000 0x54000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x02020000 0x54000>; + + smp-sysram@0 { + compatible = "samsung,exynos4210-sysram"; + reg = <0x0 0x1000>; + }; + + smp-sysram@53000 { + compatible = "samsung,exynos4210-sysram-ns"; + reg = <0x53000 0x1000>; + }; + }; + clock: clock-controller@10010000 { compatible = "samsung,exynos5420-clock"; reg = <0x10010000 0x30000>; @@ -125,12 +145,13 @@ clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in"; }; - codec@11000000 { + mfc: codec@11000000 { compatible = "samsung,mfc-v7"; reg = <0x11000000 0x10000>; interrupts = <0 96 0>; clocks = <&clock CLK_MFC>; clock-names = "mfc"; + samsung,power-domain = <&mfc_pd>; }; mmc_0: mmc@12200000 { @@ -169,7 +190,7 @@ status = "disabled"; }; - mct@101C0000 { + mct: mct@101C0000 { compatible = "samsung,exynos4210-mct"; reg = <0x101C0000 0x800>; interrupt-controller; @@ -219,16 +240,6 @@ reg = <0x100440C0 0x20>; }; - mau_pd: power-domain@100440E0 { - compatible = "samsung,exynos4210-pd"; - reg = <0x100440E0 0x20>; - }; - - g2d_pd: power-domain@10044100 { - compatible = "samsung,exynos4210-pd"; - reg = <0x10044100 0x20>; - }; - msc_pd: power-domain@10044120 { compatible = "samsung,exynos4210-pd"; reg = <0x10044120 0x20>; @@ -270,7 +281,7 @@ interrupts = <0 47 0>; }; - rtc@101E0000 { + rtc: rtc@101E0000 { clocks = <&clock CLK_RTC>; clock-names = "rtc"; status = "disabled"; @@ -336,6 +347,13 @@ #dma-cells = <1>; #dma-channels = <8>; #dma-requests = <1>; + /* + * MDMA1 can support both secure and non-secure + * AXI transactions. When this is enabled in the kernel + * for boards that run in secure mode, we are getting + * imprecise external aborts causing the kernel to oops. + */ + status = "disabled"; }; }; @@ -430,22 +448,22 @@ status = "disabled"; }; - serial@12C00000 { + uart_0: serial@12C00000 { clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>; clock-names = "uart", "clk_uart_baud0"; }; - serial@12C10000 { + uart_1: serial@12C10000 { clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>; clock-names = "uart", "clk_uart_baud0"; }; - serial@12C20000 { + uart_2: serial@12C20000 { clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; clock-names = "uart", "clk_uart_baud0"; }; - serial@12C30000 { + uart_3: serial@12C30000 { clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>; clock-names = "uart", "clk_uart_baud0"; }; @@ -465,14 +483,14 @@ #phy-cells = <0>; }; - dp-controller@145B0000 { + dp: dp-controller@145B0000 { clocks = <&clock CLK_DP1>; clock-names = "dp"; phys = <&dp_phy>; phy-names = "dp"; }; - fimd@14400000 { + fimd: fimd@14400000 { samsung,power-domain = <&disp_pd>; clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>; clock-names = "sclk_fimd", "fimd"; @@ -632,8 +650,8 @@ status = "disabled"; }; - hdmi@14530000 { - compatible = "samsung,exynos4212-hdmi"; + hdmi: hdmi@14530000 { + compatible = "samsung,exynos5420-hdmi"; reg = <0x14530000 0x70000>; interrupts = <0 95 0>; clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>, @@ -641,10 +659,15 @@ <&clock CLK_MOUT_HDMI>; clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy", "mout_hdmi"; + phy = <&hdmiphy>; status = "disabled"; }; - mixer@14450000 { + hdmiphy: hdmiphy@145D0000 { + reg = <0x145D0000 0x20>; + }; + + mixer: mixer@14450000 { compatible = "samsung,exynos5420-mixer"; reg = <0x14450000 0x10000>; interrupts = <0 94 0>; @@ -715,7 +738,7 @@ clock-names = "tmu_apbif", "tmu_triminfo_apbif"; }; - watchdog@101D0000 { + watchdog: watchdog@101D0000 { compatible = "samsung,exynos5420-wdt"; reg = <0x101D0000 0x100>; interrupts = <0 42 0>; @@ -724,12 +747,63 @@ samsung,syscon-phandle = <&pmu_system_controller>; }; - sss@10830000 { + sss: sss@10830000 { compatible = "samsung,exynos4210-secss"; reg = <0x10830000 0x10000>; interrupts = <0 112 0>; clocks = <&clock 471>; clock-names = "secss"; - samsung,power-domain = <&g2d_pd>; + }; + + usbdrd3_0: usb@12000000 { + compatible = "samsung,exynos5250-dwusb3"; + clocks = <&clock CLK_USBD300>; + clock-names = "usbdrd30"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + dwc3 { + compatible = "snps,dwc3"; + reg = <0x12000000 0x10000>; + interrupts = <0 72 0>; + phys = <&usbdrd_phy0 0>, <&usbdrd_phy0 1>; + phy-names = "usb2-phy", "usb3-phy"; + }; + }; + + usbdrd_phy0: phy@12100000 { + compatible = "samsung,exynos5420-usbdrd-phy"; + reg = <0x12100000 0x100>; + clocks = <&clock CLK_USBD300>, <&clock CLK_SCLK_USBPHY300>; + clock-names = "phy", "ref"; + samsung,pmu-syscon = <&pmu_system_controller>; + #phy-cells = <1>; + }; + + usbdrd3_1: usb@12400000 { + compatible = "samsung,exynos5250-dwusb3"; + clocks = <&clock CLK_USBD301>; + clock-names = "usbdrd30"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + dwc3 { + compatible = "snps,dwc3"; + reg = <0x12400000 0x10000>; + interrupts = <0 73 0>; + phys = <&usbdrd_phy1 0>, <&usbdrd_phy1 1>; + phy-names = "usb2-phy", "usb3-phy"; + }; + }; + + usbdrd_phy1: phy@12500000 { + compatible = "samsung,exynos5420-usbdrd-phy"; + reg = <0x12500000 0x100>; + clocks = <&clock CLK_USBD301>, <&clock CLK_SCLK_USBPHY301>; + clock-names = "phy", "ref"; + samsung,pmu-syscon = <&pmu_system_controller>; + #phy-cells = <1>; }; }; diff --git a/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts b/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts index 62fb3da50bdb..ad12da38fc92 100644 --- a/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts +++ b/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts @@ -172,3 +172,16 @@ fsl,uart-has-rtscts; status = "okay"; }; + +&usbhost1 { + phy_type = "serial"; + dr_mode = "host"; + status = "okay"; +}; + +&usbotg { + phy_type = "utmi"; + dr_mode = "otg"; + external-vbus-divider; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx25-karo-tx25.dts b/arch/arm/boot/dts/imx25-karo-tx25.dts index f8db366c46ff..9b31faa96377 100644 --- a/arch/arm/boot/dts/imx25-karo-tx25.dts +++ b/arch/arm/boot/dts/imx25-karo-tx25.dts @@ -16,21 +16,98 @@ model = "Ka-Ro TX25"; compatible = "karo,imx25-tx25", "fsl,imx25"; + chosen { + stdout-path = &uart1; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + reg_fec_phy: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "fec-phy"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio4 9 0>; + enable-active-high; + }; + }; + memory { reg = <0x80000000 0x02000000 0x90000000 0x02000000>; }; }; +&iomuxc { + pinctrl_uart1: uart1grp { + fsl,pins = < + MX25_PAD_UART1_TXD__UART1_TXD 0x80000000 + MX25_PAD_UART1_RXD__UART1_RXD 0x80000000 + MX25_PAD_UART1_CTS__UART1_CTS 0x80000000 + MX25_PAD_UART1_RTS__UART1_RTS 0x80000000 + >; + }; + + pinctrl_fec: fecgrp { + fsl,pins = < + MX25_PAD_D11__GPIO_4_9 0x80000000 /* FEC PHY power on pin */ + MX25_PAD_D13__GPIO_4_7 0x80000000 /* FEC reset */ + MX25_PAD_FEC_MDC__FEC_MDC 0x80000000 + MX25_PAD_FEC_MDIO__FEC_MDIO 0x80000000 + MX25_PAD_FEC_TDATA0__FEC_TDATA0 0x80000000 + MX25_PAD_FEC_TDATA1__FEC_TDATA1 0x80000000 + MX25_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000 + MX25_PAD_FEC_RDATA0__FEC_RDATA0 0x80000000 + MX25_PAD_FEC_RDATA1__FEC_RDATA1 0x80000000 + MX25_PAD_FEC_RX_DV__FEC_RX_DV 0x80000000 + MX25_PAD_FEC_TX_CLK__FEC_TX_CLK 0x80000000 + >; + }; + + pinctrl_nfc: nfcgrp { + fsl,pins = < + MX25_PAD_NF_CE0__NF_CE0 0x80000000 + MX25_PAD_NFWE_B__NFWE_B 0x80000000 + MX25_PAD_NFRE_B__NFRE_B 0x80000000 + MX25_PAD_NFALE__NFALE 0x80000000 + MX25_PAD_NFCLE__NFCLE 0x80000000 + MX25_PAD_NFWP_B__NFWP_B 0x80000000 + MX25_PAD_NFRB__NFRB 0x80000000 + MX25_PAD_D7__D7 0x80000000 + MX25_PAD_D6__D6 0x80000000 + MX25_PAD_D5__D5 0x80000000 + MX25_PAD_D4__D4 0x80000000 + MX25_PAD_D3__D3 0x80000000 + MX25_PAD_D2__D2 0x80000000 + MX25_PAD_D1__D1 0x80000000 + MX25_PAD_D0__D0 0x80000000 + >; + }; +}; + &uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; status = "okay"; }; &fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec>; + phy-reset-gpios = <&gpio3 7 0>; phy-mode = "rmii"; + phy-supply = <®_fec_phy>; status = "okay"; }; &nfc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nfc>; nand-on-flash-bbt; + nand-ecc-mode = "hw"; + nand-bus-width = <8>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx25-pdk.dts b/arch/arm/boot/dts/imx25-pdk.dts index f607ce520eda..c608942b8a3b 100644 --- a/arch/arm/boot/dts/imx25-pdk.dts +++ b/arch/arm/boot/dts/imx25-pdk.dts @@ -10,6 +10,7 @@ */ /dts-v1/; +#include <dt-bindings/input/input.h> #include "imx25.dtsi" / { @@ -19,18 +20,232 @@ memory { reg = <0x80000000 0x4000000>; }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + reg_fec_3v3: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "fec-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio2 3 0>; + enable-active-high; + }; + + reg_2p5v: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "2P5V"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + }; + + reg_3p3v: regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_can_3v3: regulator@3 { + compatible = "regulator-fixed"; + reg = <3>; + regulator-name = "can-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio4 6 0>; + }; + }; + + sound { + compatible = "fsl,imx25-pdk-sgtl5000", + "fsl,imx-audio-sgtl5000"; + model = "imx25-pdk-sgtl5000"; + ssi-controller = <&ssi1>; + audio-codec = <&codec>; + audio-routing = + "MIC_IN", "Mic Jack", + "Mic Jack", "Mic Bias", + "Headphone Jack", "HP_OUT"; + mux-int-port = <1>; + mux-ext-port = <4>; + }; }; -&uart1 { +&audmux { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux>; + status = "okay"; +}; + +&can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1>; + xceiver-supply = <®_can_3v3>; + status = "okay"; +}; + +&esdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esdhc1>; + cd-gpios = <&gpio2 1 0>; + wp-gpios = <&gpio2 0 0>; status = "okay"; }; &fec { phy-mode = "rmii"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec>; + phy-supply = <®_fec_3v3>; + phy-reset-gpios = <&gpio4 8 0>; status = "okay"; }; +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; + + codec: sgtl5000@0a { + compatible = "fsl,sgtl5000"; + reg = <0x0a>; + clocks = <&clks 129>; + VDDA-supply = <®_2p5v>; + VDDIO-supply = <®_3p3v>; + }; +}; + +&iomuxc { + imx25-pdk { + pinctrl_audmux: audmuxgrp { + fsl,pins = < + MX25_PAD_RW__AUD4_TXFS 0xe0 + MX25_PAD_OE__AUD4_TXC 0xe0 + MX25_PAD_EB0__AUD4_TXD 0xe0 + MX25_PAD_EB1__AUD4_RXD 0xe0 + >; + }; + + pinctrl_can1: can1grp { + fsl,pins = < + MX25_PAD_GPIO_A__CAN1_TX 0x0 + MX25_PAD_GPIO_B__CAN1_RX 0x0 + MX25_PAD_D14__GPIO_4_6 0x80000000 + >; + }; + + pinctrl_esdhc1: esdhc1grp { + fsl,pins = < + MX25_PAD_SD1_CMD__SD1_CMD 0x80000000 + MX25_PAD_SD1_CLK__SD1_CLK 0x80000000 + MX25_PAD_SD1_DATA0__SD1_DATA0 0x80000000 + MX25_PAD_SD1_DATA1__SD1_DATA1 0x80000000 + MX25_PAD_SD1_DATA2__SD1_DATA2 0x80000000 + MX25_PAD_SD1_DATA3__SD1_DATA3 0x80000000 + MX25_PAD_A14__GPIO_2_0 0x80000000 + MX25_PAD_A15__GPIO_2_1 0x80000000 + >; + }; + + pinctrl_fec: fecgrp { + fsl,pins = < + MX25_PAD_FEC_MDC__FEC_MDC 0x80000000 + MX25_PAD_FEC_MDIO__FEC_MDIO 0x400001e0 + MX25_PAD_FEC_TDATA0__FEC_TDATA0 0x80000000 + MX25_PAD_FEC_TDATA1__FEC_TDATA1 0x80000000 + MX25_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000 + MX25_PAD_FEC_RDATA0__FEC_RDATA0 0x80000000 + MX25_PAD_FEC_RDATA1__FEC_RDATA1 0x80000000 + MX25_PAD_FEC_RX_DV__FEC_RX_DV 0x80000000 + MX25_PAD_FEC_TX_CLK__FEC_TX_CLK 0x1c0 + MX25_PAD_A17__GPIO_2_3 0x80000000 + MX25_PAD_D12__GPIO_4_8 0x80000000 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX25_PAD_I2C1_CLK__I2C1_CLK 0x80000000 + MX25_PAD_I2C1_DAT__I2C1_DAT 0x80000000 + >; + }; + + pinctrl_kpp: kppgrp { + fsl,pins = < + MX25_PAD_KPP_ROW0__KPP_ROW0 0x80000000 + MX25_PAD_KPP_ROW1__KPP_ROW1 0x80000000 + MX25_PAD_KPP_ROW2__KPP_ROW2 0x80000000 + MX25_PAD_KPP_ROW3__KPP_ROW3 0x80000000 + MX25_PAD_KPP_COL0__KPP_COL0 0x80000000 + MX25_PAD_KPP_COL1__KPP_COL1 0x80000000 + MX25_PAD_KPP_COL2__KPP_COL2 0x80000000 + MX25_PAD_KPP_COL3__KPP_COL3 0x80000000 + >; + }; + + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX25_PAD_UART1_RTS__UART1_RTS 0xe0 + MX25_PAD_UART1_CTS__UART1_CTS 0xe0 + MX25_PAD_UART1_TXD__UART1_TXD 0x80000000 + MX25_PAD_UART1_RXD__UART1_RXD 0xc0 + >; + }; + }; +}; + &nfc { nand-on-flash-bbt; status = "okay"; }; + +&kpp { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_kpp>; + linux,keymap = < + MATRIX_KEY(0x0, 0x0, KEY_UP) + MATRIX_KEY(0x0, 0x1, KEY_DOWN) + MATRIX_KEY(0x0, 0x2, KEY_VOLUMEDOWN) + MATRIX_KEY(0x0, 0x3, KEY_HOME) + MATRIX_KEY(0x1, 0x0, KEY_RIGHT) + MATRIX_KEY(0x1, 0x1, KEY_LEFT) + MATRIX_KEY(0x1, 0x2, KEY_ENTER) + MATRIX_KEY(0x1, 0x3, KEY_VOLUMEUP) + MATRIX_KEY(0x2, 0x0, KEY_F6) + MATRIX_KEY(0x2, 0x1, KEY_F8) + MATRIX_KEY(0x2, 0x2, KEY_F9) + MATRIX_KEY(0x2, 0x3, KEY_F10) + MATRIX_KEY(0x3, 0x0, KEY_F1) + MATRIX_KEY(0x3, 0x1, KEY_F2) + MATRIX_KEY(0x3, 0x2, KEY_F3) + MATRIX_KEY(0x3, 0x2, KEY_POWER) + >; + status = "okay"; +}; + +&ssi1 { + codec-handle = <&codec>; + fsl,mode = "i2s-slave"; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + fsl,uart-has-rtscts; + status = "okay"; +}; + +&usbhost1 { + phy_type = "serial"; + dr_mode = "host"; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi index 32f760e24898..bb74d9582b7e 100644 --- a/arch/arm/boot/dts/imx25.dtsi +++ b/arch/arm/boot/dts/imx25.dtsi @@ -14,6 +14,7 @@ / { aliases { + ethernet0 = &fec; gpio0 = &gpio1; gpio1 = &gpio2; gpio2 = &gpio3; @@ -21,6 +22,8 @@ i2c0 = &i2c1; i2c1 = &i2c2; i2c2 = &i2c3; + mmc0 = &esdhc1; + mmc1 = &esdhc2; serial0 = &uart1; serial1 = &uart2; serial2 = &uart3; @@ -56,6 +59,7 @@ osc { compatible = "fsl,imx-osc", "fixed-clock"; + #clock-cells = <0>; clock-frequency = <24000000>; }; }; @@ -164,9 +168,10 @@ status = "disabled"; }; - kpp@43fa8000 { + kpp: kpp@43fa8000 { #address-cells = <1>; #size-cells = <0>; + compatible = "fsl,imx25-kpp", "fsl,imx21-kpp"; reg = <0x43fa8000 0x4000>; clocks = <&clks 102>; clock-names = ""; @@ -481,23 +486,13 @@ clocks = <&clks 99>; }; - usbphy1: usbphy@1 { - compatible = "nop-usbphy"; - status = "disabled"; - }; - - usbphy2: usbphy@2 { - compatible = "nop-usbphy"; - status = "disabled"; - }; - usbotg: usb@53ff4000 { compatible = "fsl,imx25-usb", "fsl,imx27-usb"; reg = <0x53ff4000 0x0200>; interrupts = <37>; - clocks = <&clks 9>, <&clks 70>, <&clks 8>; - clock-names = "ipg", "ahb", "per"; + clocks = <&clks 70>; fsl,usbmisc = <&usbmisc 0>; + fsl,usbphy = <&usbphy0>; status = "disabled"; }; @@ -505,9 +500,9 @@ compatible = "fsl,imx25-usb", "fsl,imx27-usb"; reg = <0x53ff4400 0x0200>; interrupts = <35>; - clocks = <&clks 9>, <&clks 70>, <&clks 8>; - clock-names = "ipg", "ahb", "per"; + clocks = <&clks 70>; fsl,usbmisc = <&usbmisc 1>; + fsl,usbphy = <&usbphy1>; status = "disabled"; }; @@ -517,7 +512,6 @@ clocks = <&clks 9>, <&clks 70>, <&clks 8>; clock-names = "ipg", "ahb", "per"; reg = <0x53ff4600 0x00f>; - status = "disabled"; }; dryice@53ffc000 { @@ -529,6 +523,11 @@ }; }; + iram: sram@78000000 { + compatible = "mmio-sram"; + reg = <0x78000000 0x20000>; + }; + emi@80000000 { compatible = "fsl,emi-bus", "simple-bus"; #address-cells = <1>; @@ -549,4 +548,20 @@ }; }; }; + + usbphy { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + usbphy0: usb-phy@0 { + reg = <0>; + compatible = "usb-nop-xceiv"; + }; + + usbphy1: usb-phy@1 { + reg = <1>; + compatible = "usb-nop-xceiv"; + }; + }; }; diff --git a/arch/arm/boot/dts/imx27-apf27.dts b/arch/arm/boot/dts/imx27-apf27.dts index 09f57b39e3ef..73aae4f5e539 100644 --- a/arch/arm/boot/dts/imx27-apf27.dts +++ b/arch/arm/boot/dts/imx27-apf27.dts @@ -29,6 +29,7 @@ osc26m { compatible = "fsl,imx-osc26m", "fixed-clock"; + #clock-cells = <0>; clock-frequency = <0>; }; }; diff --git a/arch/arm/boot/dts/imx27-pdk.dts b/arch/arm/boot/dts/imx27-pdk.dts index 5ce89aa275df..4c317716b510 100644 --- a/arch/arm/boot/dts/imx27-pdk.dts +++ b/arch/arm/boot/dts/imx27-pdk.dts @@ -17,15 +17,181 @@ compatible = "fsl,imx27-pdk", "fsl,imx27"; memory { - reg = <0x0 0x0>; + reg = <0xa0000000 0x08000000>; }; + + usbphy { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + usbphy0: usbphy@0 { + compatible = "usb-nop-xceiv"; + reg = <0>; + clocks = <&clks 0>; + clock-names = "main_clk"; + }; + }; +}; + +&cspi2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_cspi2>; + fsl,spi-num-chipselects = <1>; + cs-gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>; + status = "okay"; + + pmic: mc13783@0 { + compatible = "fsl,mc13783"; + reg = <0>; + spi-cs-high; + spi-max-frequency = <1000000>; + interrupt-parent = <&gpio3>; + interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; + + regulators { + vgen_reg: vgen { + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + vmmc1_reg: vmmc1 { + regulator-min-microvolt = <1600000>; + regulator-max-microvolt = <3000000>; + }; + + gpo1_reg: gpo1 { + regulator-always-on; + regulator-boot-on; + }; + + gpo3_reg: gpo3 { + regulator-always-on; + regulator-boot-on; + }; + }; + }; +}; + +&fec { + phy-mode = "mii"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec>; + status = "okay"; +}; + +&kpp { + linux,keymap = < + MATRIX_KEY(0, 0, KEY_UP) + MATRIX_KEY(0, 1, KEY_DOWN) + MATRIX_KEY(1, 0, KEY_RIGHT) + MATRIX_KEY(1, 1, KEY_LEFT) + MATRIX_KEY(1, 2, KEY_ENTER) + MATRIX_KEY(2, 0, KEY_F6) + MATRIX_KEY(2, 1, KEY_F8) + MATRIX_KEY(2, 2, KEY_F9) + MATRIX_KEY(2, 3, KEY_F10) + >; + status = "okay"; +}; + +&nfc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nand>; + nand-ecc-mode = "hw"; + nand-on-flash-bbt; + status = "okay"; }; &uart1 { fsl,uart-has-rtscts; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; status = "okay"; }; -&fec { +&usbotg { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg>; + dr_mode = "otg"; + fsl,usbphy = <&usbphy0>; + phy_type = "ulpi"; status = "okay"; }; + +&iomuxc { + imx27-pdk { + pinctrl_cspi2: cspi2grp { + fsl,pins = < + MX27_PAD_CSPI2_MISO__CSPI2_MISO 0x0 + MX27_PAD_CSPI2_MOSI__CSPI2_MOSI 0x0 + MX27_PAD_CSPI2_SCLK__CSPI2_SCLK 0x0 + MX27_PAD_CSPI2_SS0__GPIO4_21 0x0 /* SPI2 CS0 */ + MX27_PAD_TOUT__GPIO3_14 0x0 /* PMIC IRQ */ + >; + }; + + pinctrl_fec: fecgrp { + fsl,pins = < + MX27_PAD_SD3_CMD__FEC_TXD0 0x0 + MX27_PAD_SD3_CLK__FEC_TXD1 0x0 + MX27_PAD_ATA_DATA0__FEC_TXD2 0x0 + MX27_PAD_ATA_DATA1__FEC_TXD3 0x0 + MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0 + MX27_PAD_ATA_DATA3__FEC_RXD1 0x0 + MX27_PAD_ATA_DATA4__FEC_RXD2 0x0 + MX27_PAD_ATA_DATA5__FEC_RXD3 0x0 + MX27_PAD_ATA_DATA6__FEC_MDIO 0x0 + MX27_PAD_ATA_DATA7__FEC_MDC 0x0 + MX27_PAD_ATA_DATA8__FEC_CRS 0x0 + MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0 + MX27_PAD_ATA_DATA10__FEC_RXD0 0x0 + MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0 + MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0 + MX27_PAD_ATA_DATA13__FEC_COL 0x0 + MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0 + MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0 + >; + }; + + pinctrl_nand: nandgrp { + fsl,pins = < + MX27_PAD_NFRB__NFRB 0x0 + MX27_PAD_NFCLE__NFCLE 0x0 + MX27_PAD_NFWP_B__NFWP_B 0x0 + MX27_PAD_NFCE_B__NFCE_B 0x0 + MX27_PAD_NFALE__NFALE 0x0 + MX27_PAD_NFRE_B__NFRE_B 0x0 + MX27_PAD_NFWE_B__NFWE_B 0x0 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX27_PAD_UART1_TXD__UART1_TXD 0x0 + MX27_PAD_UART1_RXD__UART1_RXD 0x0 + MX27_PAD_UART1_CTS__UART1_CTS 0x0 + MX27_PAD_UART1_RTS__UART1_RTS 0x0 + >; + }; + + pinctrl_usbotg: usbotggrp { + fsl,pins = < + MX27_PAD_USBOTG_NXT__USBOTG_NXT 0x0 + MX27_PAD_USBOTG_STP__USBOTG_STP 0x0 + MX27_PAD_USBOTG_DIR__USBOTG_DIR 0x0 + MX27_PAD_USBOTG_CLK__USBOTG_CLK 0x0 + MX27_PAD_USBOTG_DATA0__USBOTG_DATA0 0x0 + MX27_PAD_USBOTG_DATA1__USBOTG_DATA1 0x0 + MX27_PAD_USBOTG_DATA2__USBOTG_DATA2 0x0 + MX27_PAD_USBOTG_DATA3__USBOTG_DATA3 0x0 + MX27_PAD_USBOTG_DATA4__USBOTG_DATA4 0x0 + MX27_PAD_USBOTG_DATA5__USBOTG_DATA5 0x0 + MX27_PAD_USBOTG_DATA6__USBOTG_DATA6 0x0 + MX27_PAD_USBOTG_DATA7__USBOTG_DATA7 0x0 + >; + }; + }; +}; diff --git a/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts index 3c3964a99637..7c869fe3c30b 100644 --- a/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts +++ b/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts @@ -15,6 +15,10 @@ model = "Phytec pca100 rapid development kit"; compatible = "phytec,imx27-pca100-rdk", "phytec,imx27-pca100", "fsl,imx27"; + chosen { + stdout-path = &uart1; + }; + display: display { model = "Primeview-PD050VL1"; native-mode = <&timing0>; diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts index df3b2e731835..fe02bc7a24fd 100644 --- a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts +++ b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts @@ -12,14 +12,79 @@ / { model = "Phytec pcm970"; compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27"; + + chosen { + stdout-path = &uart1; + }; + + display0: LQ035Q7 { + model = "Sharp-LQ035Q7"; + native-mode = <&timing0>; + bits-per-pixel = <16>; + fsl,pcr = <0xf00080c0>; + + display-timings { + timing0: 240x320 { + clock-frequency = <5500000>; + hactive = <240>; + vactive = <320>; + hback-porch = <5>; + hsync-len = <7>; + hfront-porch = <16>; + vback-porch = <7>; + vsync-len = <1>; + vfront-porch = <9>; + pixelclk-active = <1>; + hsync-active = <1>; + vsync-active = <1>; + de-active = <0>; + }; + }; + }; + + regulators { + regulator@2 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_csien>; + reg = <2>; + regulator-name = "CSI_EN"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio2 24 GPIO_ACTIVE_LOW>; + regulator-always-on; + }; + }; + + usbphy { + usbphy2: usbphy@2 { + compatible = "usb-nop-xceiv"; + reg = <2>; + vcc-supply = <®_5v0>; + clocks = <&clks 0>; + clock-names = "main_clk"; + }; + }; }; &cspi1 { + pinctrl-0 = <&pinctrl_cspi1>, <&pinctrl_cspi1cs1>; fsl,spi-num-chipselects = <2>; cs-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>, <&gpio4 27 GPIO_ACTIVE_LOW>; }; +&fb { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_imxfb1>; + display = <&display0>; + lcd-supply = <®_5v0>; + fsl,dmacr = <0x00020010>; + fsl,lscr1 = <0x00120300>; + fsl,lpccr = <0x00a903ff>; + status = "okay"; +}; + &i2c1 { clock-frequency = <400000>; pinctrl-names = "default"; @@ -36,6 +101,50 @@ &iomuxc { imx27_phycore_rdk { + pinctrl_csien: csiengrp { + fsl,pins = < + MX27_PAD_USB_OC_B__GPIO2_24 0x0 + >; + }; + + pinctrl_cspi1cs1: cspi1cs1grp { + fsl,pins = < + MX27_PAD_CSPI1_SS1__GPIO4_27 0x0 + >; + }; + + pinctrl_imxfb1: imxfbgrp { + fsl,pins = < + MX27_PAD_LD0__LD0 0x0 + MX27_PAD_LD1__LD1 0x0 + MX27_PAD_LD2__LD2 0x0 + MX27_PAD_LD3__LD3 0x0 + MX27_PAD_LD4__LD4 0x0 + MX27_PAD_LD5__LD5 0x0 + MX27_PAD_LD6__LD6 0x0 + MX27_PAD_LD7__LD7 0x0 + MX27_PAD_LD8__LD8 0x0 + MX27_PAD_LD9__LD9 0x0 + MX27_PAD_LD10__LD10 0x0 + MX27_PAD_LD11__LD11 0x0 + MX27_PAD_LD12__LD12 0x0 + MX27_PAD_LD13__LD13 0x0 + MX27_PAD_LD14__LD14 0x0 + MX27_PAD_LD15__LD15 0x0 + MX27_PAD_LD16__LD16 0x0 + MX27_PAD_LD17__LD17 0x0 + MX27_PAD_CLS__CLS 0x0 + MX27_PAD_CONTRAST__CONTRAST 0x0 + MX27_PAD_LSCLK__LSCLK 0x0 + MX27_PAD_OE_ACD__OE_ACD 0x0 + MX27_PAD_PS__PS 0x0 + MX27_PAD_REV__REV 0x0 + MX27_PAD_SPL_SPR__SPL_SPR 0x0 + MX27_PAD_HSYNC__HSYNC 0x0 + MX27_PAD_VSYNC__VSYNC 0x0 + >; + }; + pinctrl_i2c1: i2c1grp { /* Add pullup to DATA line */ fsl,pins = < @@ -193,19 +302,16 @@ dr_mode = "host"; phy_type = "ulpi"; vbus-supply = <®_5v0>; + fsl,usbphy = <&usbphy2>; disable-over-current; status = "okay"; }; -&usbphy2 { - vcc-supply = <®_5v0>; -}; - &weim { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_weim>; - can@d4000000 { + can@4,0 { compatible = "nxp,sja1000"; reg = <4 0x00000000 0x00000100>; interrupt-parent = <&gpio5>; diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi b/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi index cefaa6994623..31e9f7049f73 100644 --- a/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi +++ b/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi @@ -41,6 +41,20 @@ regulator-max-microvolt = <5000000>; }; }; + + usbphy { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + usbphy0: usbphy@0 { + compatible = "usb-nop-xceiv"; + reg = <0>; + vcc-supply = <&sw3_reg>; + clocks = <&clks 0>; + clock-names = "main_clk"; + }; + }; }; &audmux { @@ -66,9 +80,9 @@ status = "okay"; pmic: mc13783@0 { - #address-cells = <1>; - #size-cells = <0>; compatible = "fsl,mc13783"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pmic>; reg = <0>; spi-cs-high; spi-max-frequency = <20000000>; @@ -166,7 +180,7 @@ &fec { phy-mode = "mii"; - phy-reset-gpios = <&gpio3 30 GPIO_ACTIVE_HIGH>; + phy-reset-gpios = <&gpio3 30 GPIO_ACTIVE_LOW>; phy-supply = <®_3v3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec1>; @@ -204,7 +218,6 @@ MX27_PAD_CSPI1_MOSI__CSPI1_MOSI 0x0 MX27_PAD_CSPI1_SCLK__CSPI1_SCLK 0x0 MX27_PAD_CSPI1_SS0__GPIO4_28 0x0 /* SPI1 CS0 */ - MX27_PAD_USB_PWR__GPIO2_23 0x0 /* PMIC IRQ */ >; }; @@ -251,6 +264,21 @@ >; }; + pinctrl_pmic: pmicgrp { + fsl,pins = < + MX27_PAD_USB_PWR__GPIO2_23 0x0 /* PMIC IRQ */ + >; + }; + + pinctrl_ssi1: ssi1grp { + fsl,pins = < + MX27_PAD_SSI1_FS__SSI1_FS 0x0 + MX27_PAD_SSI1_RXDAT__SSI1_RXDAT 0x0 + MX27_PAD_SSI1_TXDAT__SSI1_TXDAT 0x0 + MX27_PAD_SSI1_CLK__SSI1_CLK 0x0 + >; + }; + pinctrl_usbotg: usbotggrp { fsl,pins = < MX27_PAD_USBOTG_CLK__USBOTG_CLK 0x0 @@ -279,23 +307,28 @@ status = "okay"; }; +&ssi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ssi1>; + fsl,mode = "i2s-slave"; + status = "okay"; +}; + &usbotg { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbotg>; dr_mode = "otg"; phy_type = "ulpi"; + fsl,usbphy = <&usbphy0>; vbus-supply = <&sw3_reg>; + disable-over-current; status = "okay"; }; -&usbphy0 { - vcc-supply = <&sw3_reg>; -}; - &weim { status = "okay"; - nor: nor@c0000000 { + nor: nor@0,0 { compatible = "cfi-flash"; reg = <0 0x00000000 0x02000000>; bank-width = <2>; @@ -305,7 +338,7 @@ #size-cells = <1>; }; - sram: sram@c8000000 { + sram: sram@1,0 { compatible = "mtd-ram"; reg = <1 0x00000000 0x00800000>; bank-width = <2>; diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi index 6279e0b4f768..a75555c39533 100644 --- a/arch/arm/boot/dts/imx27.dtsi +++ b/arch/arm/boot/dts/imx27.dtsi @@ -11,11 +11,13 @@ #include "skeleton.dtsi" #include "imx27-pinfunc.h" +#include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> / { aliases { + ethernet0 = &fec; gpio0 = &gpio1; gpio1 = &gpio2; gpio2 = &gpio3; @@ -48,6 +50,7 @@ osc26m { compatible = "fsl,imx-osc26m", "fixed-clock"; + #clock-cells = <0>; clock-frequency = <26000000>; }; }; @@ -70,26 +73,6 @@ }; }; - usbphy { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - usbphy0: usbphy@0 { - compatible = "usb-nop-xceiv"; - reg = <0>; - clocks = <&clks 75>; - clock-names = "main_clk"; - }; - - usbphy2: usbphy@2 { - compatible = "usb-nop-xceiv"; - reg = <2>; - clocks = <&clks 75>; - clock-names = "main_clk"; - }; - }; - soc { #address-cells = <1>; #size-cells = <1>; @@ -463,9 +446,8 @@ compatible = "fsl,imx27-usb"; reg = <0x10024000 0x200>; interrupts = <56>; - clocks = <&clks 15>; + clocks = <&clks 75>; fsl,usbmisc = <&usbmisc 0>; - fsl,usbphy = <&usbphy0>; status = "disabled"; }; @@ -473,7 +455,7 @@ compatible = "fsl,imx27-usb"; reg = <0x10024200 0x200>; interrupts = <54>; - clocks = <&clks 15>; + clocks = <&clks 75>; fsl,usbmisc = <&usbmisc 1>; status = "disabled"; }; @@ -482,9 +464,8 @@ compatible = "fsl,imx27-usb"; reg = <0x10024400 0x200>; interrupts = <55>; - clocks = <&clks 15>; + clocks = <&clks 75>; fsl,usbmisc = <&usbmisc 2>; - fsl,usbphy = <&usbphy2>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/imx28-duckbill.dts b/arch/arm/boot/dts/imx28-duckbill.dts index 5f326c1c1850..ce1a7effba37 100644 --- a/arch/arm/boot/dts/imx28-duckbill.dts +++ b/arch/arm/boot/dts/imx28-duckbill.dts @@ -25,9 +25,9 @@ ssp0: ssp@80010000 { compatible = "fsl,imx28-mmc"; pinctrl-names = "default"; - pinctrl-0 = <&mmc0_8bit_pins_a + pinctrl-0 = <&mmc0_4bit_pins_a &mmc0_cd_cfg &mmc0_sck_cfg>; - bus-width = <8>; + bus-width = <4>; vmmc-supply = <®_3p3v>; status = "okay"; }; @@ -39,7 +39,7 @@ hog_pins_a: hog@0 { reg = <0>; fsl,pinmux-ids = < - MX28_PAD_ENET0_RX_CLK__GPIO_4_13 /* PHY Reset */ + MX28_PAD_SSP0_DATA7__GPIO_2_7 /* PHY Reset */ >; fsl,drive-strength = <MXS_DRIVE_4mA>; fsl,voltage = <MXS_VOLTAGE_HIGH>; @@ -82,7 +82,7 @@ pinctrl-names = "default"; pinctrl-0 = <&mac0_pins_a>; phy-supply = <®_3p3v>; - phy-reset-gpios = <&gpio4 13 0>; + phy-reset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>; phy-reset-duration = <100>; status = "okay"; }; @@ -110,12 +110,12 @@ status { label = "duckbill:green:status"; - gpios = <&gpio3 5 0>; + gpios = <&gpio3 5 GPIO_ACTIVE_HIGH>; }; failure { label = "duckbill:red:status"; - gpios = <&gpio3 4 0>; + gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>; }; }; }; diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi index 90a579532b8b..a95cc5358ff4 100644 --- a/arch/arm/boot/dts/imx28.dtsi +++ b/arch/arm/boot/dts/imx28.dtsi @@ -9,6 +9,7 @@ * http://www.gnu.org/copyleft/gpl.html */ +#include <dt-bindings/gpio/gpio.h> #include "skeleton.dtsi" #include "imx28-pinfunc.h" diff --git a/arch/arm/boot/dts/imx35-eukrea-cpuimx35.dtsi b/arch/arm/boot/dts/imx35-eukrea-cpuimx35.dtsi index 906ae937b013..9c2b715ab8bf 100644 --- a/arch/arm/boot/dts/imx35-eukrea-cpuimx35.dtsi +++ b/arch/arm/boot/dts/imx35-eukrea-cpuimx35.dtsi @@ -37,6 +37,17 @@ compatible = "nxp,pcf8563"; reg = <0x51>; }; + + tsc2007: tsc2007@48 { + compatible = "ti,tsc2007"; + gpios = <&gpio3 2 0>; + interrupt-parent = <&gpio3>; + interrupts = <0x2 0x8>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tsc2007_1>; + reg = <0x48>; + ti,x-plate-ohms = <180>; + }; }; &iomuxc { @@ -70,6 +81,10 @@ MX35_PAD_I2C1_DAT__I2C1_SDA 0x80000000 >; }; + + pinctrl_tsc2007_1: tsc2007grp-1 { + fsl,pins = <MX35_PAD_ATA_DA2__GPIO3_2 0x80000000>; + }; }; }; diff --git a/arch/arm/boot/dts/imx35-eukrea-mbimxsd35-baseboard.dts b/arch/arm/boot/dts/imx35-eukrea-mbimxsd35-baseboard.dts index 1bdec21f4533..f04ae91eea89 100644 --- a/arch/arm/boot/dts/imx35-eukrea-mbimxsd35-baseboard.dts +++ b/arch/arm/boot/dts/imx35-eukrea-mbimxsd35-baseboard.dts @@ -46,6 +46,14 @@ linux,default-trigger = "heartbeat"; }; }; + + sound { + compatible = "eukrea,asoc-tlv320"; + eukrea,model = "imx35-eukrea-tlv320aic23"; + ssi-controller = <&ssi1>; + fsl,mux-int-port = <1>; + fsl,mux-ext-port = <4>; + }; }; &audmux { @@ -124,6 +132,7 @@ }; &ssi1 { + codec-handle = <&tlv320aic23>; fsl,mode = "i2s-slave"; status = "okay"; }; @@ -141,3 +150,16 @@ fsl,uart-has-rtscts; status = "okay"; }; + +&usbhost1 { + phy_type = "serial"; + dr_mode = "host"; + status = "okay"; +}; + +&usbotg { + phy_type = "utmi"; + dr_mode = "otg"; + external-vbus-divider; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx35-pdk.dts b/arch/arm/boot/dts/imx35-pdk.dts new file mode 100644 index 000000000000..8d715523708f --- /dev/null +++ b/arch/arm/boot/dts/imx35-pdk.dts @@ -0,0 +1,68 @@ +/* + * Copyright 2013 Eukréa Electromatique <[email protected]> + * Copyright 2014 Freescale Semiconductor, Inc. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +#include "imx35.dtsi" + +/ { + model = "Freescale i.MX35 Product Development Kit"; + compatible = "fsl,imx35-pdk", "fsl,imx35"; + + memory { + reg = <0x80000000 0x8000000>, + <0x90000000 0x8000000>; + }; +}; + +&esdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esdhc1>; + status = "okay"; +}; + +&iomuxc { + imx35-pdk { + pinctrl_esdhc1: esdhc1grp { + fsl,pins = < + MX35_PAD_SD1_CMD__ESDHC1_CMD 0x80000000 + MX35_PAD_SD1_CLK__ESDHC1_CLK 0x80000000 + MX35_PAD_SD1_DATA0__ESDHC1_DAT0 0x80000000 + MX35_PAD_SD1_DATA1__ESDHC1_DAT1 0x80000000 + MX35_PAD_SD1_DATA2__ESDHC1_DAT2 0x80000000 + MX35_PAD_SD1_DATA3__ESDHC1_DAT3 0x80000000 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX35_PAD_TXD1__UART1_TXD_MUX 0x1c5 + MX35_PAD_RXD1__UART1_RXD_MUX 0x1c5 + MX35_PAD_CTS1__UART1_CTS 0x1c5 + MX35_PAD_RTS1__UART1_RTS 0x1c5 + >; + }; + }; +}; + +&nfc { + nand-bus-width = <16>; + nand-ecc-mode = "hw"; + nand-on-flash-bbt; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + fsl,uart-has-rtscts; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx35.dtsi b/arch/arm/boot/dts/imx35.dtsi index 88b218f8f810..4759abb49436 100644 --- a/arch/arm/boot/dts/imx35.dtsi +++ b/arch/arm/boot/dts/imx35.dtsi @@ -13,6 +13,7 @@ / { aliases { + ethernet0 = &fec; gpio0 = &gpio1; gpio1 = &gpio2; gpio2 = &gpio3; @@ -295,9 +296,9 @@ compatible = "fsl,imx35-usb", "fsl,imx27-usb"; reg = <0x53ff4000 0x0200>; interrupts = <37>; - clocks = <&clks 9>, <&clks 73>, <&clks 28>; - clock-names = "ipg", "ahb", "per"; + clocks = <&clks 73>; fsl,usbmisc = <&usbmisc 0>; + fsl,usbphy = <&usbphy0>; status = "disabled"; }; @@ -305,9 +306,9 @@ compatible = "fsl,imx35-usb", "fsl,imx27-usb"; reg = <0x53ff4400 0x0200>; interrupts = <35>; - clocks = <&clks 9>, <&clks 73>, <&clks 28>; - clock-names = "ipg", "ahb", "per"; + clocks = <&clks 73>; fsl,usbmisc = <&usbmisc 1>; + fsl,usbphy = <&usbphy1>; status = "disabled"; }; @@ -356,4 +357,20 @@ }; }; }; + + usbphy { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + usbphy0: usb-phy@0 { + reg = <0>; + compatible = "usb-nop-xceiv"; + }; + + usbphy1: usb-phy@1 { + reg = <1>; + compatible = "usb-nop-xceiv"; + }; + }; }; diff --git a/arch/arm/boot/dts/imx50.dtsi b/arch/arm/boot/dts/imx50.dtsi index 0c75fe3deb35..6a201cf54366 100644 --- a/arch/arm/boot/dts/imx50.dtsi +++ b/arch/arm/boot/dts/imx50.dtsi @@ -17,6 +17,7 @@ / { aliases { + ethernet0 = &fec; gpio0 = &gpio1; gpio1 = &gpio2; gpio2 = &gpio3; @@ -53,21 +54,25 @@ ckil { compatible = "fsl,imx-ckil", "fixed-clock"; + #clock-cells = <0>; clock-frequency = <32768>; }; ckih1 { compatible = "fsl,imx-ckih1", "fixed-clock"; + #clock-cells = <0>; clock-frequency = <22579200>; }; ckih2 { compatible = "fsl,imx-ckih2", "fixed-clock"; + #clock-cells = <0>; clock-frequency = <0>; }; osc { compatible = "fsl,imx-osc", "fixed-clock"; + #clock-cells = <0>; clock-frequency = <24000000>; }; }; diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts index 9e9deb244b76..6bc3243a80d3 100644 --- a/arch/arm/boot/dts/imx51-babbage.dts +++ b/arch/arm/boot/dts/imx51-babbage.dts @@ -17,10 +17,28 @@ model = "Freescale i.MX51 Babbage Board"; compatible = "fsl,imx51-babbage", "fsl,imx51"; + chosen { + stdout-path = &uart1; + }; + memory { reg = <0x90000000 0x20000000>; }; + clocks { + ckih1 { + clock-frequency = <22579200>; + }; + + clk_26M: codec_clock { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <26000000>; + gpios = <&gpio4 26 GPIO_ACTIVE_LOW>; + }; + }; + display0: display@di0 { compatible = "fsl,imx-parallel-display"; interface-pix-fmt = "rgb24"; @@ -82,11 +100,13 @@ gpio-keys { compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_keys>; power { label = "Power Button"; gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>; - linux,code = <116>; /* KEY_POWER */ + linux,code = <KEY_POWER>; gpio-key,wakeup; }; }; @@ -102,6 +122,36 @@ }; }; + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + reg_usbh1_vbus: regulator@0 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh1reg>; + reg = <0>; + regulator-name = "usbh1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio2 5 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_usbotg_vbus: regulator@1 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotgreg>; + reg = <1>; + regulator-name = "usbotg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + }; + sound { compatible = "fsl,imx51-babbage-sgtl5000", "fsl,imx-audio-sgtl5000"; @@ -116,41 +166,23 @@ mux-ext-port = <3>; }; - clocks { - ckih1 { - clock-frequency = <22579200>; - }; + usbphy { + #address-cells = <1>; + #size-cells = <0>; + compatible = "simple-bus"; - clk_26M: codec_clock { - compatible = "fixed-clock"; - reg=<0>; - #clock-cells = <0>; - clock-frequency = <26000000>; - gpios = <&gpio4 26 GPIO_ACTIVE_LOW>; + usbh1phy: usbh1phy@0 { + compatible = "usb-nop-xceiv"; + reg = <0>; + clocks = <&clks IMX5_CLK_DUMMY>; + clock-names = "main_clk"; }; }; }; -&esdhc1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_esdhc1>; - fsl,cd-controller; - fsl,wp-controller; - status = "okay"; -}; - -&esdhc2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_esdhc2>; - cd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; - wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; - status = "okay"; -}; - -&uart3 { +&audmux { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3>; - fsl,uart-has-rtscts; + pinctrl-0 = <&pinctrl_audmux>; status = "okay"; }; @@ -163,9 +195,9 @@ status = "okay"; pmic: mc13892@0 { - #address-cells = <1>; - #size-cells = <0>; compatible = "fsl,mc13892"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pmic>; spi-max-frequency = <6000000>; spi-cs-high; reg = <0>; @@ -280,6 +312,53 @@ }; }; +&esdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esdhc1>; + fsl,cd-controller; + fsl,wp-controller; + status = "okay"; +}; + +&esdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esdhc2>; + cd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; + wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec>; + phy-mode = "mii"; + phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; + phy-reset-duration = <1>; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + sgtl5000: codec@0a { + compatible = "fsl,sgtl5000"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_clkcodec>; + reg = <0x0a>; + clocks = <&clk_26M>; + VDDA-supply = <&vdig_reg>; + VDDIO-supply = <&vvideo_reg>; + }; +}; + &ipu_di0_disp0 { remote-endpoint = <&display0_in>; }; @@ -288,29 +367,74 @@ remote-endpoint = <&display1_in>; }; +&kpp { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_kpp>; + linux,keymap = < + MATRIX_KEY(0, 0, KEY_UP) + MATRIX_KEY(0, 1, KEY_DOWN) + MATRIX_KEY(0, 2, KEY_VOLUMEDOWN) + MATRIX_KEY(0, 3, KEY_HOME) + MATRIX_KEY(1, 0, KEY_RIGHT) + MATRIX_KEY(1, 1, KEY_LEFT) + MATRIX_KEY(1, 2, KEY_ENTER) + MATRIX_KEY(1, 3, KEY_VOLUMEUP) + MATRIX_KEY(2, 0, KEY_F6) + MATRIX_KEY(2, 1, KEY_F8) + MATRIX_KEY(2, 2, KEY_F9) + MATRIX_KEY(2, 3, KEY_F10) + MATRIX_KEY(3, 0, KEY_F1) + MATRIX_KEY(3, 1, KEY_F2) + MATRIX_KEY(3, 2, KEY_F3) + MATRIX_KEY(3, 3, KEY_POWER) + >; + status = "okay"; +}; + &ssi2 { fsl,mode = "i2s-slave"; status = "okay"; }; -&iomuxc { +&uart1 { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_hog>; + pinctrl-0 = <&pinctrl_uart1>; + fsl,uart-has-rtscts; + status = "okay"; +}; - imx51-babbage { - pinctrl_hog: hoggrp { - fsl,pins = < - MX51_PAD_GPIO1_0__SD1_CD 0x20d5 - MX51_PAD_GPIO1_1__SD1_WP 0x20d5 - MX51_PAD_GPIO1_5__GPIO1_5 0x100 - MX51_PAD_GPIO1_6__GPIO1_6 0x100 - MX51_PAD_EIM_A27__GPIO2_21 0x5 - MX51_PAD_CSPI1_SS0__GPIO4_24 0x85 - MX51_PAD_CSPI1_SS1__GPIO4_25 0x85 - MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000 - >; - }; +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + fsl,uart-has-rtscts; + status = "okay"; +}; + +&usbh1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh1>; + vbus-supply = <®_usbh1_vbus>; + fsl,usbphy = <&usbh1phy>; + phy_type = "ulpi"; + status = "okay"; +}; +&usbotg { + dr_mode = "otg"; + disable-over-current; + phy_type = "utmi_wide"; + vbus-supply = <®_usbotg_vbus>; + status = "okay"; +}; + +&iomuxc { + imx51-babbage { pinctrl_audmux: audmuxgrp { fsl,pins = < MX51_PAD_AUD3_BB_TXD__AUD3_TXD 0x80000000 @@ -320,11 +444,19 @@ >; }; + pinctrl_clkcodec: clkcodecgrp { + fsl,pins = < + MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000 + >; + }; + pinctrl_ecspi1: ecspi1grp { fsl,pins = < MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185 MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185 MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185 + MX51_PAD_CSPI1_SS0__GPIO4_24 0x85 /* CS0 */ + MX51_PAD_CSPI1_SS1__GPIO4_25 0x85 /* CS1 */ >; }; @@ -336,6 +468,8 @@ MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5 MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5 MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5 + MX51_PAD_GPIO1_0__SD1_CD 0x20d5 + MX51_PAD_GPIO1_1__SD1_WP 0x20d5 >; }; @@ -347,29 +481,38 @@ MX51_PAD_SD2_DATA1__SD2_DATA1 0x20d5 MX51_PAD_SD2_DATA2__SD2_DATA2 0x20d5 MX51_PAD_SD2_DATA3__SD2_DATA3 0x20d5 + MX51_PAD_GPIO1_5__GPIO1_5 0x100 /* WP */ + MX51_PAD_GPIO1_6__GPIO1_6 0x100 /* CD */ >; }; pinctrl_fec: fecgrp { fsl,pins = < - MX51_PAD_EIM_EB2__FEC_MDIO 0x80000000 - MX51_PAD_EIM_EB3__FEC_RDATA1 0x80000000 - MX51_PAD_EIM_CS2__FEC_RDATA2 0x80000000 - MX51_PAD_EIM_CS3__FEC_RDATA3 0x80000000 - MX51_PAD_EIM_CS4__FEC_RX_ER 0x80000000 - MX51_PAD_EIM_CS5__FEC_CRS 0x80000000 - MX51_PAD_NANDF_RB2__FEC_COL 0x80000000 - MX51_PAD_NANDF_RB3__FEC_RX_CLK 0x80000000 - MX51_PAD_NANDF_D9__FEC_RDATA0 0x80000000 - MX51_PAD_NANDF_D8__FEC_TDATA0 0x80000000 - MX51_PAD_NANDF_CS2__FEC_TX_ER 0x80000000 - MX51_PAD_NANDF_CS3__FEC_MDC 0x80000000 - MX51_PAD_NANDF_CS4__FEC_TDATA1 0x80000000 - MX51_PAD_NANDF_CS5__FEC_TDATA2 0x80000000 - MX51_PAD_NANDF_CS6__FEC_TDATA3 0x80000000 - MX51_PAD_NANDF_CS7__FEC_TX_EN 0x80000000 - MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK 0x80000000 - MX51_PAD_EIM_A20__GPIO2_14 0x85 /* Reset */ + MX51_PAD_EIM_EB2__FEC_MDIO 0x000001f5 + MX51_PAD_EIM_EB3__FEC_RDATA1 0x00000085 + MX51_PAD_EIM_CS2__FEC_RDATA2 0x00000085 + MX51_PAD_EIM_CS3__FEC_RDATA3 0x00000085 + MX51_PAD_EIM_CS4__FEC_RX_ER 0x00000180 + MX51_PAD_EIM_CS5__FEC_CRS 0x00000180 + MX51_PAD_NANDF_RB2__FEC_COL 0x00000180 + MX51_PAD_NANDF_RB3__FEC_RX_CLK 0x00000180 + MX51_PAD_NANDF_D9__FEC_RDATA0 0x00002180 + MX51_PAD_NANDF_D8__FEC_TDATA0 0x00002004 + MX51_PAD_NANDF_CS2__FEC_TX_ER 0x00002004 + MX51_PAD_NANDF_CS3__FEC_MDC 0x00002004 + MX51_PAD_NANDF_CS4__FEC_TDATA1 0x00002004 + MX51_PAD_NANDF_CS5__FEC_TDATA2 0x00002004 + MX51_PAD_NANDF_CS6__FEC_TDATA3 0x00002004 + MX51_PAD_NANDF_CS7__FEC_TX_EN 0x00002004 + MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK 0x00002180 + MX51_PAD_NANDF_D11__FEC_RX_DV 0x000020a4 + MX51_PAD_EIM_A20__GPIO2_14 0x00000085 /* Phy Reset */ + >; + }; + + pinctrl_gpio_keys: gpiokeysgrp { + fsl,pins = < + MX51_PAD_EIM_A27__GPIO2_21 0x5 >; }; @@ -379,6 +522,13 @@ >; }; + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX51_PAD_EIM_D19__I2C1_SCL 0x400001ed + MX51_PAD_EIM_D16__I2C1_SDA 0x400001ed + >; + }; + pinctrl_i2c2: i2c2grp { fsl,pins = < MX51_PAD_KEY_COL4__I2C2_SCL 0x400001ed @@ -455,6 +605,12 @@ >; }; + pinctrl_pmic: pmicgrp { + fsl,pins = < + MX51_PAD_GPIO1_8__GPIO1_8 0xe5 /* IRQ */ + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX51_PAD_UART1_RXD__UART1_RXD 0x1c5 @@ -479,71 +635,33 @@ MX51_PAD_EIM_D24__UART3_CTS 0x1c5 >; }; - }; -}; -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - fsl,uart-has-rtscts; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - status = "okay"; -}; + pinctrl_usbh1: usbh1grp { + fsl,pins = < + MX51_PAD_USBH1_CLK__USBH1_CLK 0x80000000 + MX51_PAD_USBH1_DIR__USBH1_DIR 0x80000000 + MX51_PAD_USBH1_NXT__USBH1_NXT 0x80000000 + MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x80000000 + MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x80000000 + MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x80000000 + MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x80000000 + MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x80000000 + MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x80000000 + MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x80000000 + MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x80000000 + >; + }; -&i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2>; - status = "okay"; + pinctrl_usbh1reg: usbh1reggrp { + fsl,pins = < + MX51_PAD_EIM_D21__GPIO2_5 0x85 + >; + }; - sgtl5000: codec@0a { - compatible = "fsl,sgtl5000"; - reg = <0x0a>; - clocks = <&clk_26M>; - VDDA-supply = <&vdig_reg>; - VDDIO-supply = <&vvideo_reg>; + pinctrl_usbotgreg: usbotgreggrp { + fsl,pins = < + MX51_PAD_GPIO1_7__GPIO1_7 0x85 + >; + }; }; }; - -&audmux { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_audmux>; - status = "okay"; -}; - -&fec { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_fec>; - phy-mode = "mii"; - phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; - phy-reset-duration = <1>; - status = "okay"; -}; - -&kpp { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_kpp>; - linux,keymap = < - MATRIX_KEY(0, 0, KEY_UP) - MATRIX_KEY(0, 1, KEY_DOWN) - MATRIX_KEY(0, 2, KEY_VOLUMEDOWN) - MATRIX_KEY(0, 3, KEY_HOME) - MATRIX_KEY(1, 0, KEY_RIGHT) - MATRIX_KEY(1, 1, KEY_LEFT) - MATRIX_KEY(1, 2, KEY_ENTER) - MATRIX_KEY(1, 3, KEY_VOLUMEUP) - MATRIX_KEY(2, 0, KEY_F6) - MATRIX_KEY(2, 1, KEY_F8) - MATRIX_KEY(2, 2, KEY_F9) - MATRIX_KEY(2, 3, KEY_F10) - MATRIX_KEY(3, 0, KEY_F1) - MATRIX_KEY(3, 1, KEY_F2) - MATRIX_KEY(3, 2, KEY_F3) - MATRIX_KEY(3, 3, KEY_POWER) - >; - status = "okay"; -}; diff --git a/arch/arm/boot/dts/imx51-digi-connectcore-jsk.dts b/arch/arm/boot/dts/imx51-digi-connectcore-jsk.dts new file mode 100644 index 000000000000..1db517d3d497 --- /dev/null +++ b/arch/arm/boot/dts/imx51-digi-connectcore-jsk.dts @@ -0,0 +1,108 @@ +/* + * Copyright (C) 2014 Alexander Shiyan <[email protected]> + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include "imx51-digi-connectcore-som.dtsi" + +/ { + model = "Digi ConnectCore CC(W)-MX51 JSK"; + compatible = "digi,connectcore-ccxmx51-jsk", + "digi,connectcore-ccxmx51-som", "fsl,imx51"; + + chosen { + linux,stdout-path = &uart1; + }; +}; + +&owire { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_owire>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + status = "okay"; +}; + +&usbotg { + dr_mode = "otg"; + status = "okay"; +}; + +&usbh1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh1>; + dr_mode = "host"; + phy_type = "ulpi"; + disable-over-current; + status = "okay"; +}; + +&iomuxc { + imx51-digi-connectcore-jsk { + pinctrl_owire: owiregrp { + fsl,pins = < + MX51_PAD_OWIRE_LINE__OWIRE_LINE 0x40000000 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX51_PAD_UART1_RXD__UART1_RXD 0x1c5 + MX51_PAD_UART1_TXD__UART1_TXD 0x1c5 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX51_PAD_UART2_RXD__UART2_RXD 0x1c5 + MX51_PAD_UART2_TXD__UART2_TXD 0x1c5 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX51_PAD_UART3_RXD__UART3_RXD 0x1c5 + MX51_PAD_UART3_TXD__UART3_TXD 0x1c5 + >; + }; + + pinctrl_usbh1: usbh1grp { + fsl,pins = < + MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x1e5 + MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x1e5 + MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x1e5 + MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x1e5 + MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x1e5 + MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x1e5 + MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x1e5 + MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x1e5 + MX51_PAD_USBH1_CLK__USBH1_CLK 0x1e5 + MX51_PAD_USBH1_DIR__USBH1_DIR 0x1e5 + MX51_PAD_USBH1_NXT__USBH1_NXT 0x1e5 + MX51_PAD_USBH1_STP__USBH1_STP 0x1e5 + >; + }; + }; +}; diff --git a/arch/arm/boot/dts/imx51-digi-connectcore-som.dtsi b/arch/arm/boot/dts/imx51-digi-connectcore-som.dtsi new file mode 100644 index 000000000000..321662f53e33 --- /dev/null +++ b/arch/arm/boot/dts/imx51-digi-connectcore-som.dtsi @@ -0,0 +1,377 @@ +/* + * Copyright (C) 2014 Alexander Shiyan <[email protected]> + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +#include "imx51.dtsi" + +/ { + model = "Digi ConnectCore CC(W)-MX51"; + compatible = "digi,connectcore-ccxmx51-som", "fsl,imx51"; + + memory { + reg = <0x90000000 0x08000000>; + }; +}; + +&ecspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + fsl,spi-num-chipselects = <1>; + cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>; + status = "okay"; + + pmic: mc13892@0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mc13892>; + compatible = "fsl,mc13892"; + spi-max-frequency = <16000000>; + spi-cs-high; + reg = <0>; + interrupt-parent = <&gpio1>; + interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + fsl,mc13xxx-uses-rtc; + + regulators { + sw1_reg: sw1 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1100000>; + regulator-boot-on; + regulator-always-on; + }; + + sw2_reg: sw2 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + regulator-boot-on; + regulator-always-on; + }; + + sw3_reg: sw3 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-boot-on; + regulator-always-on; + }; + + swbst_reg: swbst { }; + + viohi_reg: viohi { + regulator-always-on; + }; + + vpll_reg: vpll { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + vdig_reg: vdig { + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <1250000>; + regulator-always-on; + }; + + vsd_reg: vsd { + regulator-min-microvolt = <3150000>; + regulator-max-microvolt = <3150000>; + regulator-always-on; + }; + + vusb2_reg: vusb2 { + regulator-min-microvolt = <2600000>; + regulator-max-microvolt = <2600000>; + regulator-always-on; + }; + + vvideo_reg: vvideo { + regulator-min-microvolt = <2775000>; + regulator-max-microvolt = <2775000>; + regulator-always-on; + }; + + vaudio_reg: vaudio { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + }; + + vcam_reg: vcam { + regulator-min-microvolt = <2750000>; + regulator-max-microvolt = <2750000>; + regulator-always-on; + }; + + vgen1_reg: vgen1 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + vgen2_reg: vgen2 { + regulator-min-microvolt = <3150000>; + regulator-max-microvolt = <3150000>; + regulator-always-on; + }; + + vgen3_reg: vgen3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + vusb_reg: vusb { + regulator-always-on; + }; + + gpo1_reg: gpo1 { }; + + gpo2_reg: gpo2 { }; + + gpo3_reg: gpo3 { }; + + gpo4_reg: gpo4 { }; + + pwgt2spi_reg: pwgt2spi { + regulator-always-on; + }; + + vcoincell_reg: vcoincell { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + }; + }; + }; +}; + +&esdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esdhc2>; + cap-sdio-irq; + enable-sdio-wakeup; + keep-power-in-suspend; + max-frequency = <50000000>; + no-1-8-v; + non-removable; + vmmc-supply = <&gpo4_reg>; + status = "okay"; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec>; + phy-mode = "mii"; + phy-supply = <&gpo3_reg>; + /* Pins shared with LCD2, keep status disabled */ +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + clock-frequency = <400000>; + status = "okay"; + + mma7455l@1d { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mma7455l>; + compatible = "fsl,mma7455l"; + reg = <0x1d>; + interrupt-parent = <&gpio1>; + interrupts = <7 IRQ_TYPE_LEVEL_HIGH>, <6 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&nfc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nfc>; + nand-bus-width = <8>; + nand-ecc-mode = "hw"; + nand-on-flash-bbt; + status = "okay"; +}; + +&usbotg { + phy_type = "utmi_wide"; + disable-over-current; + /* Device role is not known, keep status disabled */ +}; + +&weim { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_weim>; + status = "okay"; + + lan9221: lan9221@5,0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lan9221>; + compatible = "smsc,lan9221", "smsc,lan9115"; + reg = <5 0x00000000 0x1000>; + fsl,weim-cs-timing = < + 0x00420081 0x00000000 + 0x32260000 0x00000000 + 0x72080f00 0x00000000 + >; + clocks = <&clks IMX5_CLK_DUMMY>; + interrupt-parent = <&gpio1>; + interrupts = <9 IRQ_TYPE_LEVEL_LOW>; + phy-mode = "mii"; + reg-io-width = <2>; + smsc,irq-push-pull; + vdd33a-supply = <&gpo2_reg>; + vddvario-supply = <&gpo2_reg>; + }; +}; + +&iomuxc { + imx51-digi-connectcore-som { + pinctrl_ecspi1: ecspi1grp { + fsl,pins = < + MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185 + MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185 + MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185 + MX51_PAD_CSPI1_SS0__GPIO4_24 0x85 /* CS0 */ + >; + }; + + pinctrl_esdhc2: esdhc2grp { + fsl,pins = < + MX51_PAD_SD2_CMD__SD2_CMD 0x400020d5 + MX51_PAD_SD2_CLK__SD2_CLK 0x20d5 + MX51_PAD_SD2_DATA0__SD2_DATA0 0x20d5 + MX51_PAD_SD2_DATA1__SD2_DATA1 0x20d5 + MX51_PAD_SD2_DATA2__SD2_DATA2 0x20d5 + MX51_PAD_SD2_DATA3__SD2_DATA3 0x20d5 + >; + }; + + pinctrl_fec: fecgrp { + fsl,pins = < + MX51_PAD_DI_GP3__FEC_TX_ER 0x80000000 + MX51_PAD_DI2_PIN4__FEC_CRS 0x80000000 + MX51_PAD_DI2_PIN2__FEC_MDC 0x80000000 + MX51_PAD_DI2_PIN3__FEC_MDIO 0x80000000 + MX51_PAD_DI2_DISP_CLK__FEC_RDATA1 0x80000000 + MX51_PAD_DI_GP4__FEC_RDATA2 0x80000000 + MX51_PAD_DISP2_DAT0__FEC_RDATA3 0x80000000 + MX51_PAD_DISP2_DAT1__FEC_RX_ER 0x80000000 + MX51_PAD_DISP2_DAT6__FEC_TDATA1 0x80000000 + MX51_PAD_DISP2_DAT7__FEC_TDATA2 0x80000000 + MX51_PAD_DISP2_DAT8__FEC_TDATA3 0x80000000 + MX51_PAD_DISP2_DAT9__FEC_TX_EN 0x80000000 + MX51_PAD_DISP2_DAT10__FEC_COL 0x80000000 + MX51_PAD_DISP2_DAT11__FEC_RX_CLK 0x80000000 + MX51_PAD_DISP2_DAT12__FEC_RX_DV 0x80000000 + MX51_PAD_DISP2_DAT13__FEC_TX_CLK 0x80000000 + MX51_PAD_DISP2_DAT14__FEC_RDATA0 0x80000000 + MX51_PAD_DISP2_DAT15__FEC_TDATA0 0x80000000 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX51_PAD_GPIO1_2__I2C2_SCL 0x400001ed + MX51_PAD_GPIO1_3__I2C2_SDA 0x400001ed + >; + }; + + pinctrl_nfc: nfcgrp { + fsl,pins = < + MX51_PAD_NANDF_D0__NANDF_D0 0x80000000 + MX51_PAD_NANDF_D1__NANDF_D1 0x80000000 + MX51_PAD_NANDF_D2__NANDF_D2 0x80000000 + MX51_PAD_NANDF_D3__NANDF_D3 0x80000000 + MX51_PAD_NANDF_D4__NANDF_D4 0x80000000 + MX51_PAD_NANDF_D5__NANDF_D5 0x80000000 + MX51_PAD_NANDF_D6__NANDF_D6 0x80000000 + MX51_PAD_NANDF_D7__NANDF_D7 0x80000000 + MX51_PAD_NANDF_ALE__NANDF_ALE 0x80000000 + MX51_PAD_NANDF_CLE__NANDF_CLE 0x80000000 + MX51_PAD_NANDF_RE_B__NANDF_RE_B 0x80000000 + MX51_PAD_NANDF_WE_B__NANDF_WE_B 0x80000000 + MX51_PAD_NANDF_WP_B__NANDF_WP_B 0x80000000 + MX51_PAD_NANDF_CS0__NANDF_CS0 0x80000000 + MX51_PAD_NANDF_RB0__NANDF_RB0 0x80000000 + >; + }; + + pinctrl_lan9221: lan9221grp { + fsl,pins = < + MX51_PAD_GPIO1_9__GPIO1_9 0xe5 /* IRQ */ + >; + }; + + pinctrl_mc13892: mc13892grp { + fsl,pins = < + MX51_PAD_GPIO1_5__GPIO1_5 0xe5 /* IRQ */ + >; + }; + + pinctrl_mma7455l: mma7455lgrp { + fsl,pins = < + MX51_PAD_GPIO1_7__GPIO1_7 0xe5 /* IRQ1 */ + MX51_PAD_GPIO1_6__GPIO1_6 0xe5 /* IRQ2 */ + >; + }; + + pinctrl_weim: weimgrp { + fsl,pins = < + MX51_PAD_EIM_DA0__EIM_DA0 0x80000000 + MX51_PAD_EIM_DA1__EIM_DA1 0x80000000 + MX51_PAD_EIM_DA2__EIM_DA2 0x80000000 + MX51_PAD_EIM_DA3__EIM_DA3 0x80000000 + MX51_PAD_EIM_DA4__EIM_DA4 0x80000000 + MX51_PAD_EIM_DA5__EIM_DA5 0x80000000 + MX51_PAD_EIM_DA6__EIM_DA6 0x80000000 + MX51_PAD_EIM_DA7__EIM_DA7 0x80000000 + MX51_PAD_EIM_DA8__EIM_DA8 0x80000000 + MX51_PAD_EIM_DA9__EIM_DA9 0x80000000 + MX51_PAD_EIM_DA10__EIM_DA10 0x80000000 + MX51_PAD_EIM_DA11__EIM_DA11 0x80000000 + MX51_PAD_EIM_DA12__EIM_DA12 0x80000000 + MX51_PAD_EIM_DA13__EIM_DA13 0x80000000 + MX51_PAD_EIM_DA14__EIM_DA14 0x80000000 + MX51_PAD_EIM_DA15__EIM_DA15 0x80000000 + MX51_PAD_EIM_A16__EIM_A16 0x80000000 + MX51_PAD_EIM_A17__EIM_A17 0x80000000 + MX51_PAD_EIM_A18__EIM_A18 0x80000000 + MX51_PAD_EIM_A19__EIM_A19 0x80000000 + MX51_PAD_EIM_A20__EIM_A20 0x80000000 + MX51_PAD_EIM_A21__EIM_A21 0x80000000 + MX51_PAD_EIM_A22__EIM_A22 0x80000000 + MX51_PAD_EIM_A23__EIM_A23 0x80000000 + MX51_PAD_EIM_A24__EIM_A24 0x80000000 + MX51_PAD_EIM_A25__EIM_A25 0x80000000 + MX51_PAD_EIM_A26__EIM_A26 0x80000000 + MX51_PAD_EIM_A27__EIM_A27 0x80000000 + MX51_PAD_EIM_D16__EIM_D16 0x80000000 + MX51_PAD_EIM_D17__EIM_D17 0x80000000 + MX51_PAD_EIM_D18__EIM_D18 0x80000000 + MX51_PAD_EIM_D19__EIM_D19 0x80000000 + MX51_PAD_EIM_D20__EIM_D20 0x80000000 + MX51_PAD_EIM_D21__EIM_D21 0x80000000 + MX51_PAD_EIM_D22__EIM_D22 0x80000000 + MX51_PAD_EIM_D23__EIM_D23 0x80000000 + MX51_PAD_EIM_D24__EIM_D24 0x80000000 + MX51_PAD_EIM_D25__EIM_D25 0x80000000 + MX51_PAD_EIM_D26__EIM_D26 0x80000000 + MX51_PAD_EIM_D27__EIM_D27 0x80000000 + MX51_PAD_EIM_D28__EIM_D28 0x80000000 + MX51_PAD_EIM_D29__EIM_D29 0x80000000 + MX51_PAD_EIM_D30__EIM_D30 0x80000000 + MX51_PAD_EIM_D31__EIM_D31 0x80000000 + MX51_PAD_EIM_OE__EIM_OE 0x80000000 + MX51_PAD_EIM_DTACK__EIM_DTACK 0x80000000 + MX51_PAD_EIM_LBA__EIM_LBA 0x80000000 + MX51_PAD_EIM_CS5__EIM_CS5 0x80000000 /* CS5 */ + >; + }; + }; +}; diff --git a/arch/arm/boot/dts/imx51-eukrea-cpuimx51.dtsi b/arch/arm/boot/dts/imx51-eukrea-cpuimx51.dtsi index 9b3acf6e4282..63164266af83 100644 --- a/arch/arm/boot/dts/imx51-eukrea-cpuimx51.dtsi +++ b/arch/arm/boot/dts/imx51-eukrea-cpuimx51.dtsi @@ -42,6 +42,17 @@ compatible = "nxp,pcf8563"; reg = <0x51>; }; + + tsc2007: tsc2007@49 { + compatible = "ti,tsc2007"; + gpios = <&gpio4 0 1>; + interrupt-parent = <&gpio4>; + interrupts = <0x0 0x8>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tsc2007_1>; + reg = <0x49>; + ti,x-plate-ohms = <180>; + }; }; &iomuxc { diff --git a/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts b/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts index 5cec4f322096..75e66c9c6144 100644 --- a/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts +++ b/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts @@ -24,6 +24,14 @@ model = "Eukrea CPUIMX51"; compatible = "eukrea,mbimxsd51","eukrea,cpuimx51", "fsl,imx51"; + clocks { + clk24M: can_clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + }; + }; + gpio_keys { compatible = "gpio-keys"; pinctrl-names = "default"; @@ -50,6 +58,23 @@ }; }; + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + reg_can: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "CAN_RST"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>; + startup-delay-us = <20000>; + enable-active-high; + }; + }; + sound { compatible = "eukrea,asoc-tlv320"; eukrea,model = "imx51-eukrea-tlv320aic23"; @@ -57,6 +82,20 @@ fsl,mux-int-port = <2>; fsl,mux-ext-port = <3>; }; + + usbphy { + #address-cells = <1>; + #size-cells = <0>; + compatible = "simple-bus"; + + usbh1phy: usbh1phy@0 { + compatible = "usb-nop-xceiv"; + reg = <0>; + clocks = <&clks IMX5_CLK_USB_PHY_GATE>; + clock-names = "main_clk"; + clock-frequency = <19200000>; + }; + }; }; &audmux { @@ -72,6 +111,26 @@ status = "okay"; }; +&ecspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + fsl,spi-num-chipselects = <1>; + cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; + status = "okay"; + + can0: can@0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can>; + compatible = "microchip,mcp2515"; + reg = <0>; + clocks = <&clk24M>; + spi-max-frequency = <10000000>; + interrupt-parent = <&gpio1>; + interrupts = <1 IRQ_TYPE_EDGE_FALLING>; + vdd-supply = <®_can>; + }; +}; + &i2c1 { tlv320aic23: codec@1a { compatible = "ti,tlv320aic23"; @@ -90,6 +149,23 @@ >; }; + + pinctrl_can: cangrp { + fsl,pins = < + MX51_PAD_CSI2_PIXCLK__GPIO4_15 0x80000000 /* nReset */ + MX51_PAD_GPIO1_1__GPIO1_1 0x80000000 /* IRQ */ + >; + }; + + pinctrl_ecspi1: ecspi1grp { + fsl,pins = < + MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185 + MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185 + MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185 + MX51_PAD_CSPI1_SS0__GPIO4_24 0x80000000 /* CS0 */ + >; + }; + pinctrl_esdhc1: esdhc1grp { fsl,pins = < MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5 @@ -151,6 +227,29 @@ MX51_PAD_CSI1_D9__GPIO3_13 0x1f5 >; }; + + pinctrl_usbh1: usbh1grp { + fsl,pins = < + MX51_PAD_USBH1_CLK__USBH1_CLK 0x1e5 + MX51_PAD_USBH1_DIR__USBH1_DIR 0x1e5 + MX51_PAD_USBH1_NXT__USBH1_NXT 0x1e5 + MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x1e5 + MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x1e5 + MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x1e5 + MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x1e5 + MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x1e5 + MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x1e5 + MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x1e5 + MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x1e5 + MX51_PAD_USBH1_STP__USBH1_STP 0x1e5 + >; + }; + + pinctrl_usbh1_vbus: usbh1-vbusgrp { + fsl,pins = < + MX51_PAD_EIM_CS3__GPIO2_28 0x1f5 + >; + }; }; }; @@ -173,3 +272,24 @@ fsl,uart-has-rtscts; status = "okay"; }; + +&usbh1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh1>; + fsl,usbphy = <&usbh1phy>; + dr_mode = "host"; + phy_type = "ulpi"; + status = "okay"; +}; + +&usbotg { + dr_mode = "otg"; + phy_type = "utmi_wide"; + status = "okay"; +}; + +&usbphy0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh1_vbus>; + reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; +}; diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi index 5f8216d08f6b..bebbf3ba0d5e 100644 --- a/arch/arm/boot/dts/imx51.dtsi +++ b/arch/arm/boot/dts/imx51.dtsi @@ -19,6 +19,7 @@ / { aliases { + ethernet0 = &fec; gpio0 = &gpio1; gpio1 = &gpio2; gpio2 = &gpio3; @@ -50,21 +51,25 @@ ckil { compatible = "fsl,imx-ckil", "fixed-clock"; + #clock-cells = <0>; clock-frequency = <32768>; }; ckih1 { compatible = "fsl,imx-ckih1", "fixed-clock"; + #clock-cells = <0>; clock-frequency = <0>; }; ckih2 { compatible = "fsl,imx-ckih2", "fixed-clock"; + #clock-cells = <0>; clock-frequency = <0>; }; osc { compatible = "fsl,imx-osc", "fixed-clock"; + #clock-cells = <0>; clock-frequency = <24000000>; }; }; @@ -533,6 +538,8 @@ }; nfc: nand@83fdb000 { + #address-cells = <1>; + #size-cells = <1>; compatible = "fsl,imx51-nand"; reg = <0x83fdb000 0x1000 0xcfff0000 0x10000>; interrupts = <8>; diff --git a/arch/arm/boot/dts/imx53-m53evk.dts b/arch/arm/boot/dts/imx53-m53evk.dts index f6d3ac3e5587..d5d146a8b149 100644 --- a/arch/arm/boot/dts/imx53-m53evk.dts +++ b/arch/arm/boot/dts/imx53-m53evk.dts @@ -17,7 +17,8 @@ compatible = "denx,imx53-m53evk", "fsl,imx53"; memory { - reg = <0x70000000 0x20000000>; + reg = <0x70000000 0x20000000>, + <0xb0000000 0x20000000>; }; soc { @@ -193,17 +194,17 @@ irq-trigger = <0x1>; stmpe_touchscreen { - compatible = "stmpe,ts"; + compatible = "st,stmpe-ts"; reg = <0>; - ts,sample-time = <4>; - ts,mod-12b = <1>; - ts,ref-sel = <0>; - ts,adc-freq = <1>; - ts,ave-ctrl = <3>; - ts,touch-det-delay = <3>; - ts,settling = <4>; - ts,fraction-z = <7>; - ts,i-drive = <1>; + st,sample-time = <4>; + st,mod-12b = <1>; + st,ref-sel = <0>; + st,adc-freq = <1>; + st,ave-ctrl = <3>; + st,touch-det-delay = <3>; + st,settling = <4>; + st,fraction-z = <7>; + st,i-drive = <1>; }; }; diff --git a/arch/arm/boot/dts/imx53-mba53.dts b/arch/arm/boot/dts/imx53-mba53.dts index 7c8c12969892..3f2400b8560b 100644 --- a/arch/arm/boot/dts/imx53-mba53.dts +++ b/arch/arm/boot/dts/imx53-mba53.dts @@ -17,6 +17,10 @@ model = "TQ MBa53 starter kit"; compatible = "tq,mba53", "tq,tqma53", "fsl,imx53"; + chosen { + stdout-path = &uart2; + }; + backlight { compatible = "pwm-backlight"; pwms = <&pwm2 0 50000>; diff --git a/arch/arm/boot/dts/imx53-qsb-common.dtsi b/arch/arm/boot/dts/imx53-qsb-common.dtsi index 3f825a6813da..fd8c60dde7de 100644 --- a/arch/arm/boot/dts/imx53-qsb-common.dtsi +++ b/arch/arm/boot/dts/imx53-qsb-common.dtsi @@ -13,8 +13,13 @@ #include "imx53.dtsi" / { + chosen { + stdout-path = &uart1; + }; + memory { - reg = <0x70000000 0x40000000>; + reg = <0x70000000 0x20000000>, + <0xb0000000 0x20000000>; }; display0: display@di0 { @@ -271,6 +276,14 @@ >; }; + pinctrl_vga_sync: vgasync-grp { + fsl,pins = < + /* VGA_HSYNC, VSYNC with max drive strength */ + MX53_PAD_EIM_OE__IPU_DI1_PIN7 0xe6 + MX53_PAD_EIM_RW__IPU_DI1_PIN8 0xe6 + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1e4 @@ -280,6 +293,15 @@ }; }; +&tve { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_vga_sync>; + fsl,tve-mode = "vga"; + fsl,hsync-pin = <4>; + fsl,vsync-pin = <6>; + status = "okay"; +}; + &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; diff --git a/arch/arm/boot/dts/imx53-tx53-x03x.dts b/arch/arm/boot/dts/imx53-tx53-x03x.dts index 0217dde3b36b..3b73e81dc3f0 100644 --- a/arch/arm/boot/dts/imx53-tx53-x03x.dts +++ b/arch/arm/boot/dts/imx53-tx53-x03x.dts @@ -25,12 +25,17 @@ soc { display: display@di0 { compatible = "fsl,imx-parallel-display"; - crtcs = <&ipu 0>; interface-pix-fmt = "rgb24"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_rgb24_vga1>; status = "okay"; + port { + display0_in: endpoint { + remote-endpoint = <&ipu_di0_disp0>; + }; + }; + display-timings { VGA { clock-frequency = <25200000>; @@ -293,6 +298,10 @@ }; }; +&ipu_di0_disp0 { + remote-endpoint = <&display0_in>; +}; + &kpp { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_kpp>; diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index b57ab57740f6..375e66fad578 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi @@ -18,6 +18,7 @@ / { aliases { + ethernet0 = &fec; gpio0 = &gpio1; gpio1 = &gpio2; gpio2 = &gpio3; @@ -70,21 +71,25 @@ ckil { compatible = "fsl,imx-ckil", "fixed-clock"; + #clock-cells = <0>; clock-frequency = <32768>; }; ckih1 { compatible = "fsl,imx-ckih1", "fixed-clock"; + #clock-cells = <0>; clock-frequency = <22579200>; }; ckih2 { compatible = "fsl,imx-ckih2", "fixed-clock"; + #clock-cells = <0>; clock-frequency = <0>; }; osc { compatible = "fsl,imx-osc", "fixed-clock"; + #clock-cells = <0>; clock-frequency = <24000000>; }; }; @@ -430,7 +435,7 @@ port { lvds1_in: endpoint { - remote-endpoint = <&ipu_di0_lvds0>; + remote-endpoint = <&ipu_di1_lvds1>; }; }; }; @@ -722,8 +727,8 @@ clocks = <&clks IMX5_CLK_VPU_GATE>, <&clks IMX5_CLK_VPU_GATE>; clock-names = "per", "ahb"; + resets = <&src 1>; iram = <&ocram>; - status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/imx6dl-hummingboard.dts b/arch/arm/boot/dts/imx6dl-hummingboard.dts index 5bfae54fb780..5373a5f2782b 100644 --- a/arch/arm/boot/dts/imx6dl-hummingboard.dts +++ b/arch/arm/boot/dts/imx6dl-hummingboard.dts @@ -11,6 +11,10 @@ model = "SolidRun HummingBoard DL/Solo"; compatible = "solidrun,hummingboard", "fsl,imx6dl"; + chosen { + stdout-path = &uart1; + }; + ir_recv: ir-receiver { compatible = "gpio-ir-receiver"; gpios = <&gpio1 2 1>; @@ -67,6 +71,13 @@ status = "okay"; }; +&hdmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hummingboard_hdmi>; + ddc-i2c-bus = <&i2c2>; + status = "okay"; +}; + &i2c1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hummingboard_i2c1>; @@ -82,6 +93,13 @@ */ }; +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hummingboard_i2c2>; + status = "okay"; +}; + &iomuxc { hummingboard { pinctrl_hummingboard_flexcan1: hummingboard-flexcan1 { @@ -97,6 +115,12 @@ >; }; + pinctrl_hummingboard_hdmi: hummingboard-hdmi { + fsl,pins = < + MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 + >; + }; + pinctrl_hummingboard_i2c1: hummingboard-i2c1 { fsl,pins = < MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 @@ -104,6 +128,13 @@ >; }; + pinctrl_hummingboard_i2c2: hummingboard-i2c2 { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + pinctrl_hummingboard_spdif: hummingboard-spdif { fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>; }; diff --git a/arch/arm/boot/dts/imx6dl-phytec-pbab01.dts b/arch/arm/boot/dts/imx6dl-phytec-pbab01.dts new file mode 100644 index 000000000000..08e97801494e --- /dev/null +++ b/arch/arm/boot/dts/imx6dl-phytec-pbab01.dts @@ -0,0 +1,19 @@ +/* + * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +#include "imx6dl-phytec-pfla02.dtsi" +#include "imx6qdl-phytec-pbab01.dtsi" + +/ { + model = "Phytec phyFLEX-i.MX6 DualLite/Solo Carrier-Board"; + compatible = "phytec,imx6dl-pbab01", "phytec,imx6dl-pfla02", "fsl,imx6dl"; +}; diff --git a/arch/arm/boot/dts/imx6dl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6dl-phytec-pfla02.dtsi new file mode 100644 index 000000000000..964bc2ad3c5d --- /dev/null +++ b/arch/arm/boot/dts/imx6dl-phytec-pfla02.dtsi @@ -0,0 +1,22 @@ +/* + * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include "imx6dl.dtsi" +#include "imx6qdl-phytec-pfla02.dtsi" + +/ { + model = "Phytec phyFLEX-i.MX6 DualLite/Solo"; + compatible = "phytec,imx6dl-pfla02", "fsl,imx6dl"; + + memory { + reg = <0x10000000 0x20000000>; + }; +}; diff --git a/arch/arm/boot/dts/imx6dl-riotboard.dts b/arch/arm/boot/dts/imx6dl-riotboard.dts new file mode 100644 index 000000000000..909fafc0b650 --- /dev/null +++ b/arch/arm/boot/dts/imx6dl-riotboard.dts @@ -0,0 +1,539 @@ +/* + * Copyright 2014 Iain Paton <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +/dts-v1/; +#include "imx6dl.dtsi" +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "RIoTboard i.MX6S"; + compatible = "riot,imx6s-riotboard", "fsl,imx6dl"; + + memory { + reg = <0x10000000 0x40000000>; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + reg_2p5v: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "2P5V"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + }; + + reg_3p3v: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_usb_otg_vbus: regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 22 0>; + enable-active-high; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_led>; + + led0: user1 { + label = "user1"; + gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; + default-state = "on"; + linux,default-trigger = "heartbeat"; + }; + + led1: user2 { + label = "user2"; + gpios = <&gpio3 28 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + }; + + sound { + compatible = "fsl,imx-audio-sgtl5000"; + model = "imx6-riotboard-sgtl5000"; + ssi-controller = <&ssi1>; + audio-codec = <&codec>; + audio-routing = + "MIC_IN", "Mic Jack", + "Mic Jack", "Mic Bias", + "Headphone Jack", "HP_OUT"; + mux-int-port = <1>; + mux-ext-port = <3>; + }; +}; + +&audmux { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux>; + status = "okay"; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "rgmii"; + phy-reset-gpios = <&gpio3 31 0>; + interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, + <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; + status = "okay"; +}; + +&hdmi { + ddc-i2c-bus = <&i2c2>; + status = "okay"; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; + + codec: sgtl5000@0a { + compatible = "fsl,sgtl5000"; + reg = <0x0a>; + clocks = <&clks 201>; + VDDA-supply = <®_2p5v>; + VDDIO-supply = <®_3p3v>; + }; + + pmic: pf0100@08 { + compatible = "fsl,pfuze100"; + reg = <0x08>; + interrupt-parent = <&gpio5>; + interrupts = <16 8>; + + regulators { + reg_vddcore: sw1ab { /* VDDARM_IN */ + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-always-on; + }; + + reg_vddsoc: sw1c { /* VDDSOC_IN */ + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-always-on; + }; + + reg_gen_3v3: sw2 { /* VDDHIGH_IN */ + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_ddr_1v5a: sw3a { /* NVCC_DRAM, NVCC_RGMII */ + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-always-on; + }; + + reg_ddr_1v5b: sw3b { /* NVCC_DRAM, NVCC_RGMII */ + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-always-on; + }; + + reg_ddr_vtt: sw4 { /* MIPI conn */ + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-always-on; + }; + + reg_5v_600mA: swbst { /* not used */ + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5150000>; + }; + + reg_snvs_3v: vsnvs { /* VDD_SNVS_IN */ + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + }; + + vref_reg: vrefddr { /* VREF_DDR */ + regulator-boot-on; + regulator-always-on; + }; + + reg_vgen1_1v5: vgen1 { /* not used */ + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + reg_vgen2_1v2_eth: vgen2 { /* pcie ? */ + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + regulator-always-on; + }; + + reg_vgen3_2v8: vgen3 { /* not used */ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + reg_vgen4_1v8: vgen4 { /* NVCC_SD3 */ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_vgen5_2v5_sgtl: vgen5 { /* Pwr LED & 5V0_delayed enable */ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_vgen6_3v3: vgen6 { /* #V#_DELAYED enable, MIPI */ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; + }; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; +}; + +&i2c4 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4>; + clocks = <&clks 116>; + status = "okay"; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1>; + status = "okay"; +}; + +&pwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm2>; + status = "okay"; +}; + +&pwm3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm3>; + status = "okay"; +}; + +&pwm4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm4>; + status = "okay"; +}; + +&ssi1 { + fsl,mode = "i2s-slave"; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + status = "okay"; +}; + +&uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart5>; + status = "okay"; +}; + +&usbh1 { + dr_mode = "host"; + disable-over-current; + status = "okay"; +}; + +&usbotg { + vbus-supply = <®_usb_otg_vbus>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg>; + disable-over-current; + dr_mode = "otg"; + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + cd-gpios = <&gpio1 4 0>; + wp-gpios = <&gpio1 2 0>; + vmmc-supply = <®_3p3v>; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + cd-gpios = <&gpio7 0 0>; + wp-gpios = <&gpio7 1 0>; + vmmc-supply = <®_3p3v>; + status = "okay"; +}; + +&usdhc4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc4>; + vmmc-supply = <®_3p3v>; + non-removable; + status = "okay"; +}; + +&iomuxc { + pinctrl-names = "default"; + + imx6-riotboard { + pinctrl_audmux: audmuxgrp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x8000000 + MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x8000000 + MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x8000000 + MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x8000000 + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* CAM_MCLK */ + >; + }; + + pinctrl_ecspi1: ecspi1grp { + fsl,pins = < + MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 + MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 + MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 + MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x000b1 /* CS0 */ + >; + }; + + pinctrl_ecspi2: ecspi2grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x000b1 /* CS1 */ + MX6QDL_PAD_DISP0_DAT16__ECSPI2_MOSI 0x100b1 + MX6QDL_PAD_DISP0_DAT17__ECSPI2_MISO 0x100b1 + MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x000b1 /* CS0 */ + MX6QDL_PAD_DISP0_DAT19__ECSPI2_SCLK 0x100b1 + >; + }; + + pinctrl_ecspi3: ecspi3grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 + MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 + MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 + MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x000b1 /* CS0 */ + MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25 0x000b1 /* CS1 */ + >; + }; + + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x80000000 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1 /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */ + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 /* AR8035 pin strapping: IO voltage: pull up */ + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x130b0 /* AR8035 pin strapping: PHYADDR#0: pull down */ + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x130b0 /* AR8035 pin strapping: PHYADDR#1: pull down */ + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 /* AR8035 pin strapping: MODE#1: pull up */ + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 /* AR8035 pin strapping: MODE#3: pull up */ + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0 /* AR8035 pin strapping: MODE#0: pull down */ + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0xc0000000 /* GPIO16 -> AR8035 25MHz */ + MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x130b0 /* RGMII_nRST */ + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* AR8035 interrupt */ + MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 + MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c4: i2c4grp { + fsl,pins = < + MX6QDL_PAD_GPIO_7__I2C4_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_8__I2C4_SDA 0x4001b8b1 + >; + }; + + pinctrl_led: ledgrp { + fsl,pins = < + MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000 /* user led0 */ + MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x80000000 /* user led1 */ + >; + }; + + pinctrl_pwm1: pwm1grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm2: pwm2grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm3: pwm3grp { + fsl,pins = < + MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm4: pwm4grp { + fsl,pins = < + MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart4: uart4grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart5: uart5grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_usbotg: usbotggrp { + fsl,pins = < + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* MX6QDL_PAD_EIM_D22__USB_OTG_PWR */ + MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x80000000 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000 /* SD2 CD */ + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* SD2 WP */ + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 /* SD3 CD */ + MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x80000000 /* SD3 WP */ + >; + }; + + pinctrl_usdhc4: usdhc4grp { + fsl,pins = < + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 + MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x80000000 /* SD4 RST (eMMC) */ + >; + }; + }; +}; diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi index 5c5f574330f9..0a9c49d69d41 100644 --- a/arch/arm/boot/dts/imx6dl.dtsi +++ b/arch/arm/boot/dts/imx6dl.dtsi @@ -84,9 +84,10 @@ i2c4: i2c@021f8000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx1-i2c"; + compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; reg = <0x021f8000 0x4000>; interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks 116>; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts index a63bbb3d46bb..e0302636aff5 100644 --- a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts +++ b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts @@ -18,8 +18,15 @@ model = "Data Modul eDM-QMX6 Board"; compatible = "dmo,imx6q-edmqmx6", "fsl,imx6q"; + chosen { + stdout-path = &uart2; + }; + aliases { - gpio7 = &stmpe_gpio; + gpio7 = &stmpe_gpio1; + gpio8 = &stmpe_gpio2; + stmpe-i2c0 = &stmpe1; + stmpe-i2c1 = &stmpe2; }; memory { @@ -40,13 +47,15 @@ regulator-always-on; }; - reg_usb_otg_vbus: regulator@1 { + reg_usb_otg_switch: regulator@1 { compatible = "regulator-fixed"; reg = <1>; - regulator-name = "usb_otg_vbus"; + regulator-name = "usb_otg_switch"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; gpio = <&gpio7 12 0>; + regulator-boot-on; + regulator-always-on; }; reg_usb_host1: regulator@2 { @@ -65,27 +74,41 @@ led-blue { label = "blue"; - gpios = <&stmpe_gpio 8 GPIO_ACTIVE_HIGH>; + gpios = <&stmpe_gpio1 8 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; led-green { label = "green"; - gpios = <&stmpe_gpio 9 GPIO_ACTIVE_HIGH>; + gpios = <&stmpe_gpio1 9 GPIO_ACTIVE_HIGH>; }; led-pink { label = "pink"; - gpios = <&stmpe_gpio 10 GPIO_ACTIVE_HIGH>; + gpios = <&stmpe_gpio1 10 GPIO_ACTIVE_HIGH>; }; led-red { label = "red"; - gpios = <&stmpe_gpio 11 GPIO_ACTIVE_HIGH>; + gpios = <&stmpe_gpio1 11 GPIO_ACTIVE_HIGH>; }; }; }; +&ecspi5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi5>; + fsl,spi-num-chipselects = <1>; + cs-gpios = <&gpio1 12 0>; + status = "okay"; + + flash: m25p80@0 { + compatible = "m25p80"; + spi-max-frequency = <40000000>; + reg = <0>; + }; +}; + &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; @@ -99,7 +122,9 @@ clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2 - &pinctrl_stmpe>; + &pinctrl_stmpe1 + &pinctrl_stmpe2 + &pinctrl_pfuze>; status = "okay"; pmic: pfuze100@08 { @@ -205,13 +230,29 @@ }; }; - stmpe: stmpe1601@40 { + stmpe1: stmpe1601@40 { compatible = "st,stmpe1601"; reg = <0x40>; interrupts = <30 0>; interrupt-parent = <&gpio3>; + vcc-supply = <&sw2_reg>; + vio-supply = <&sw2_reg>; + + stmpe_gpio1: stmpe_gpio { + #gpio-cells = <2>; + compatible = "st,stmpe-gpio"; + }; + }; + + stmpe2: stmpe1601@44 { + compatible = "st,stmpe1601"; + reg = <0x44>; + interrupts = <2 0>; + interrupt-parent = <&gpio5>; + vcc-supply = <&sw2_reg>; + vio-supply = <&sw2_reg>; - stmpe_gpio: stmpe_gpio { + stmpe_gpio2: stmpe_gpio { #gpio-cells = <2>; compatible = "st,stmpe-gpio"; }; @@ -245,6 +286,15 @@ >; }; + pinctrl_ecspi5: ecspi5rp-1 { + fsl,pins = < + MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO 0x80000000 + MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI 0x80000000 + MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK 0x80000000 + MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x80000000 + >; + }; + pinctrl_enet: enetgrp { fsl,pins = < MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 @@ -273,10 +323,20 @@ >; }; - pinctrl_stmpe: stmpegrp { + pinctrl_pfuze: pfuze100grp1 { + fsl,pins = < + MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000 + >; + }; + + pinctrl_stmpe1: stmpe1grp { fsl,pins = <MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x80000000>; }; + pinctrl_stmpe2: stmpe2grp { + fsl,pins = <MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000>; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 @@ -293,7 +353,7 @@ pinctrl_usbotg: usbotggrp { fsl,pins = < - MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 >; }; @@ -344,11 +404,11 @@ &usbh1 { vbus-supply = <®_usb_host1>; disable-over-current; + dr_mode = "host"; status = "okay"; }; &usbotg { - vbus-supply = <®_usb_otg_vbus>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbotg>; disable-over-current; diff --git a/arch/arm/boot/dts/imx6q-gk802.dts b/arch/arm/boot/dts/imx6q-gk802.dts index 4a9b4dc9afc0..703539cf36d3 100644 --- a/arch/arm/boot/dts/imx6q-gk802.dts +++ b/arch/arm/boot/dts/imx6q-gk802.dts @@ -14,7 +14,7 @@ compatible = "zealz,imx6q-gk802", "fsl,imx6q"; chosen { - linux,stdout-path = &uart4; + stdout-path = &uart4; }; memory { @@ -48,6 +48,11 @@ }; }; +&hdmi { + ddc-i2c-bus = <&i2c3>; + status = "okay"; +}; + /* Internal I2C */ &i2c2 { pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/imx6q-gw5400-a.dts b/arch/arm/boot/dts/imx6q-gw5400-a.dts index 902f98310481..3689eaa58826 100644 --- a/arch/arm/boot/dts/imx6q-gw5400-a.dts +++ b/arch/arm/boot/dts/imx6q-gw5400-a.dts @@ -157,6 +157,11 @@ status = "okay"; }; +&hdmi { + ddc-i2c-bus = <&i2c3>; + status = "okay"; +}; + &i2c1 { clock-frequency = <100000>; pinctrl-names = "default"; @@ -487,9 +492,6 @@ &ldb { status = "okay"; - lvds-channel@0 { - crtcs = <&ipu1 0>, <&ipu1 1>, <&ipu2 0>, <&ipu2 1>; - }; }; &pcie { diff --git a/arch/arm/boot/dts/imx6q-phytec-pbab01.dts b/arch/arm/boot/dts/imx6q-phytec-pbab01.dts index 5607c331fca8..c139ac0ebe15 100644 --- a/arch/arm/boot/dts/imx6q-phytec-pbab01.dts +++ b/arch/arm/boot/dts/imx6q-phytec-pbab01.dts @@ -11,40 +11,17 @@ /dts-v1/; #include "imx6q-phytec-pfla02.dtsi" +#include "imx6qdl-phytec-pbab01.dtsi" / { model = "Phytec phyFLEX-i.MX6 Quad Carrier-Board"; compatible = "phytec,imx6q-pbab01", "phytec,imx6q-pfla02", "fsl,imx6q"; -}; - -&fec { - status = "okay"; -}; -&gpmi { - status = "okay"; + chosen { + stdout-path = &uart4; + }; }; &sata { - status = "okay"; -}; - -&uart4 { - status = "okay"; -}; - -&usbh1 { - status = "okay"; -}; - -&usbotg { - status = "okay"; -}; - -&usdhc2 { - status = "okay"; -}; - -&usdhc3 { - status = "okay"; + status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi index 324f1550976b..cd20d0a948de 100644 --- a/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi +++ b/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi @@ -10,316 +10,13 @@ */ #include "imx6q.dtsi" +#include "imx6qdl-phytec-pfla02.dtsi" / { - model = "Phytec phyFLEX-i.MX6 Ouad"; + model = "Phytec phyFLEX-i.MX6 Quad"; compatible = "phytec,imx6q-pfla02", "fsl,imx6q"; memory { reg = <0x10000000 0x80000000>; }; - - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_usb_otg_vbus: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "usb_otg_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio4 15 0>; - }; - - reg_usb_h1_vbus: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "usb_h1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio1 0 0>; - }; - }; -}; - -&ecspi3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ecspi3>; - status = "okay"; - fsl,spi-num-chipselects = <1>; - cs-gpios = <&gpio4 24 0>; - - flash@0 { - compatible = "m25p80"; - spi-max-frequency = <20000000>; - reg = <0>; - }; -}; - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; - status = "okay"; - - eeprom@50 { - compatible = "atmel,24c32"; - reg = <0x50>; - }; - - pmic@58 { - compatible = "dialog,da9063"; - reg = <0x58>; - interrupt-parent = <&gpio4>; - interrupts = <17 0x8>; /* active-low GPIO4_17 */ - - regulators { - vddcore_reg: bcore1 { - regulator-min-microvolt = <730000>; - regulator-max-microvolt = <1380000>; - regulator-always-on; - }; - - vddsoc_reg: bcore2 { - regulator-min-microvolt = <730000>; - regulator-max-microvolt = <1380000>; - regulator-always-on; - }; - - vdd_ddr3_reg: bpro { - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - }; - - vdd_3v3_reg: bperi { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vdd_buckmem_reg: bmem { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vdd_eth_reg: bio { - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-always-on; - }; - - vdd_eth_io_reg: ldo4 { - regulator-min-microvolt = <2500000>; - regulator-max-microvolt = <2500000>; - regulator-always-on; - }; - - vdd_mx6_snvs_reg: ldo5 { - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-always-on; - }; - - vdd_3v3_pmic_io_reg: ldo6 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vdd_sd0_reg: ldo9 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - vdd_sd1_reg: ldo10 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - vdd_mx6_high_reg: ldo11 { - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-always-on; - }; - }; - }; -}; - -&iomuxc { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_hog>; - - imx6q-phytec-pfla02 { - pinctrl_hog: hoggrp { - fsl,pins = < - MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 - MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */ - MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x80000000 /* PMIC interrupt */ - >; - }; - - pinctrl_ecspi3: ecspi3grp { - fsl,pins = < - MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 - MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 - MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 - >; - }; - - pinctrl_enet: enetgrp { - fsl,pins = < - MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 - MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 - MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 - MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 - MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 - MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 - MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 - MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 - MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 - MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 - MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 - MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 - MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 - MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 - MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 - MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 - >; - }; - - pinctrl_gpmi_nand: gpminandgrp { - fsl,pins = < - MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 - MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 - MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 - MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 - MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 - MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 - MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 - MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 - MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 - MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 - MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 - MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 - MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 - MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 - MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 - MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 - MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 - >; - }; - - pinctrl_i2c1: i2c1grp { - fsl,pins = < - MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 - MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 - >; - }; - - pinctrl_uart4: uart4grp { - fsl,pins = < - MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 - MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 - >; - }; - - pinctrl_usbh1: usbh1grp { - fsl,pins = < - MX6QDL_PAD_GPIO_0__USB_H1_PWR 0x80000000 - >; - }; - - pinctrl_usbotg: usbotggrp { - fsl,pins = < - MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 - MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0 - MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 - >; - }; - - pinctrl_usdhc2: usdhc2grp { - fsl,pins = < - MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 - MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 - MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 - MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 - MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 - MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 - >; - }; - - pinctrl_usdhc3: usdhc3grp { - fsl,pins = < - MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 - MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 - MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 - MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 - MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 - MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 - >; - }; - - pinctrl_usdhc3_cdwp: usdhc3cdwp { - fsl,pins = < - MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 - MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 - >; - }; - }; -}; - -&fec { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet>; - phy-mode = "rgmii"; - phy-reset-gpios = <&gpio3 23 0>; - status = "disabled"; -}; - -&gpmi { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpmi_nand>; - nand-on-flash-bbt; - status = "disabled"; -}; - -&uart4 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart4>; - status = "disabled"; -}; - -&usbh1 { - vbus-supply = <®_usb_h1_vbus>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbh1>; - status = "disabled"; -}; - -&usbotg { - vbus-supply = <®_usb_otg_vbus>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbotg>; - disable-over-current; - status = "disabled"; -}; - -&usdhc2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc2>; - cd-gpios = <&gpio1 4 0>; - wp-gpios = <&gpio1 2 0>; - status = "disabled"; -}; - -&usdhc3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc3 - &pinctrl_usdhc3_cdwp>; - cd-gpios = <&gpio1 27 0>; - wp-gpios = <&gpio1 29 0>; - status = "disabled"; }; diff --git a/arch/arm/boot/dts/imx6q-udoo.dts b/arch/arm/boot/dts/imx6q-udoo.dts index ed397d149ab6..6c561060bf5c 100644 --- a/arch/arm/boot/dts/imx6q-udoo.dts +++ b/arch/arm/boot/dts/imx6q-udoo.dts @@ -16,6 +16,10 @@ model = "Udoo i.MX6 Quad Board"; compatible = "udoo,imx6q-udoo", "fsl,imx6q"; + chosen { + stdout-path = &uart2; + }; + memory { reg = <0x10000000 0x40000000>; }; @@ -28,6 +32,18 @@ status = "okay"; }; +&hdmi { + ddc-i2c-bus = <&i2c2>; + status = "okay"; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; +}; + &iomuxc { imx6q-udoo { pinctrl_enet: enetgrp { @@ -51,6 +67,13 @@ >; }; + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + pinctrl_uart2: uart2grp { fsl,pins = < MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 diff --git a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi index c2a24888a276..25da82a03110 100644 --- a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi +++ b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi @@ -55,6 +55,20 @@ }; }; +&hdmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_cubox_i_hdmi>; + ddc-i2c-bus = <&i2c2>; + status = "okay"; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_cubox_i_i2c2>; + status = "okay"; +}; + &i2c3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_cubox_i_i2c3>; @@ -69,6 +83,19 @@ &iomuxc { cubox_i { + pinctrl_cubox_i_hdmi: cubox-i-hdmi { + fsl,pins = < + MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 + >; + }; + + pinctrl_cubox_i_i2c2: cubox-i-i2c2 { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + pinctrl_cubox_i_i2c3: cubox-i-i2c3 { fsl,pins = < MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1 diff --git a/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi b/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi index 25cf035dd36e..2c253d6d20bd 100644 --- a/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi +++ b/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi @@ -22,7 +22,7 @@ }; chosen { - linux,stdout-path = &uart1; + stdout-path = &uart1; }; }; diff --git a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi index 98a422153ce7..31665adcbf39 100644 --- a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi +++ b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi @@ -101,6 +101,11 @@ status = "okay"; }; +&hdmi { + ddc-i2c-bus = <&i2c3>; + status = "okay"; +}; + &i2c1 { clock-frequency = <100000>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi index 8e99c9a9bc76..367af3ec9435 100644 --- a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi +++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi @@ -27,6 +27,13 @@ bootargs = "console=ttymxc1,115200"; }; + backlight { + compatible = "pwm-backlight"; + pwms = <&pwm4 0 5000000>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <7>; + }; + leds { compatible = "gpio-leds"; @@ -148,6 +155,11 @@ status = "okay"; }; +&hdmi { + ddc-i2c-bus = <&i2c3>; + status = "okay"; +}; + &i2c1 { clock-frequency = <100000>; pinctrl-names = "default"; @@ -394,6 +406,12 @@ >; }; + pinctrl_pwm4: pwm4grp { + fsl,pins = < + MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 @@ -436,8 +454,26 @@ &ldb { status = "okay"; + lvds-channel@0 { - crtcs = <&ipu1 0>, <&ipu1 1>; + fsl,data-mapping = "spwg"; + fsl,data-width = <18>; + status = "okay"; + + display-timings { + native-mode = <&timing0>; + timing0: hsd100pxn1 { + clock-frequency = <65000000>; + hactive = <1024>; + vactive = <768>; + hback-porch = <220>; + hfront-porch = <40>; + vback-porch = <21>; + vfront-porch = <7>; + hsync-len = <60>; + vsync-len = <10>; + }; + }; }; }; @@ -446,6 +482,12 @@ status = "okay"; }; +&pwm4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm4>; + status = "okay"; +}; + &ssi1 { fsl,mode = "i2s-slave"; status = "okay"; diff --git a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi index c8e5ae06deaf..c91b5a6c769b 100644 --- a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi +++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi @@ -30,6 +30,13 @@ bootargs = "console=ttymxc1,115200"; }; + backlight { + compatible = "pwm-backlight"; + pwms = <&pwm4 0 5000000>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <7>; + }; + leds { compatible = "gpio-leds"; @@ -157,6 +164,11 @@ status = "okay"; }; +&hdmi { + ddc-i2c-bus = <&i2c3>; + status = "okay"; +}; + &i2c1 { clock-frequency = <100000>; pinctrl-names = "default"; @@ -434,6 +446,12 @@ >; }; + pinctrl_pwm4: pwm4grp { + fsl,pins = < + MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 @@ -508,6 +526,12 @@ }; }; +&pwm4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm4>; + status = "okay"; +}; + &ssi1 { fsl,mode = "i2s-slave"; status = "okay"; diff --git a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi index 2795dfc8c926..698d3063b295 100644 --- a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi +++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi @@ -30,6 +30,13 @@ bootargs = "console=ttymxc1,115200"; }; + backlight { + compatible = "pwm-backlight"; + pwms = <&pwm4 0 5000000>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <7>; + }; + leds { compatible = "gpio-leds"; @@ -147,6 +154,11 @@ status = "okay"; }; +&hdmi { + ddc-i2c-bus = <&i2c3>; + status = "okay"; +}; + &i2c1 { clock-frequency = <100000>; pinctrl-names = "default"; @@ -456,6 +468,12 @@ >; }; + pinctrl_pwm4: pwm4grp { + fsl,pins = < + MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 @@ -530,6 +548,12 @@ }; }; +&pwm4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm4>; + status = "okay"; +}; + &ssi1 { fsl,mode = "i2s-slave"; status = "okay"; diff --git a/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi b/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi index a3cb2fff8f61..d16066608e21 100644 --- a/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi +++ b/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi @@ -26,25 +26,25 @@ /* GPIO16 -> AR8035 25MHz */ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0xc0000000 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x80000000 - MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 - MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 - MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 - MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 - MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1 /* AR8035 pin strapping: IO voltage: pull up */ - MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 /* AR8035 pin strapping: PHYADDR#0: pull down */ - MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x130b0 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x13030 /* AR8035 pin strapping: PHYADDR#1: pull down */ - MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x130b0 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x13030 /* AR8035 pin strapping: MODE#1: pull up */ - MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 /* AR8035 pin strapping: MODE#3: pull up */ - MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 /* AR8035 pin strapping: MODE#0: pull down */ - MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x13030 /* * As the RMII pins are also connected to RGMII diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi index 99be301b5232..4c4b17596c8b 100644 --- a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi +++ b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi @@ -14,6 +14,10 @@ #include <dt-bindings/input/input.h> / { + chosen { + stdout-path = &uart2; + }; + memory { reg = <0x10000000 0x40000000>; }; diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi new file mode 100644 index 000000000000..584721264121 --- /dev/null +++ b/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi @@ -0,0 +1,102 @@ +/* + * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/ { + chosen { + linux,stdout-path = &uart4; + }; +}; + +&fec { + status = "okay"; +}; + +&gpmi { + status = "okay"; +}; + +&hdmi { + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + clock-frequency = <100000>; + status = "okay"; + + tlv320@18 { + compatible = "ti,tlv320aic3x"; + reg = <0x18>; + }; + + stmpe@41 { + compatible = "st,stmpe811"; + reg = <0x41>; + }; + + rtc@51 { + compatible = "nxp,rtc8564"; + reg = <0x51>; + }; + + adc@64 { + compatible = "maxim,max1037"; + reg = <0x64>; + }; +}; + +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + clock-frequency = <100000>; + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; + +&uart4 { + status = "okay"; +}; + +&usbh1 { + status = "okay"; +}; + +&usbotg { + status = "okay"; +}; + +&usdhc2 { + status = "okay"; +}; + +&usdhc3 { + status = "okay"; +}; + +&iomuxc { + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1 + >; + }; +}; diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi new file mode 100644 index 000000000000..faa3494a69d4 --- /dev/null +++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi @@ -0,0 +1,356 @@ +/* + * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "Phytec phyFLEX-i.MX6 Ouad"; + compatible = "phytec,imx6q-pfla02", "fsl,imx6q"; + + memory { + reg = <0x10000000 0x80000000>; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + reg_usb_otg_vbus: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio4 15 0>; + }; + + reg_usb_h1_vbus: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "usb_h1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 0 0>; + }; + }; + + gpio_leds: leds { + compatible = "gpio-leds"; + + green { + label = "phyflex:green"; + gpios = <&gpio1 30 0>; + }; + + red { + label = "phyflex:red"; + gpios = <&gpio2 31 0>; + }; + }; +}; + +&ecspi3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi3>; + status = "okay"; + fsl,spi-num-chipselects = <1>; + cs-gpios = <&gpio4 24 0>; + + flash@0 { + compatible = "m25p80"; + spi-max-frequency = <20000000>; + reg = <0>; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; + + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + + pmic@58 { + compatible = "dialog,da9063"; + reg = <0x58>; + interrupt-parent = <&gpio4>; + interrupts = <17 0x8>; /* active-low GPIO4_17 */ + + regulators { + vddcore_reg: bcore1 { + regulator-min-microvolt = <730000>; + regulator-max-microvolt = <1380000>; + regulator-always-on; + }; + + vddsoc_reg: bcore2 { + regulator-min-microvolt = <730000>; + regulator-max-microvolt = <1380000>; + regulator-always-on; + }; + + vdd_ddr3_reg: bpro { + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + }; + + vdd_3v3_reg: bperi { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vdd_buckmem_reg: bmem { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vdd_eth_reg: bio { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + vdd_eth_io_reg: ldo4 { + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-always-on; + }; + + vdd_mx6_snvs_reg: ldo5 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + }; + + vdd_3v3_pmic_io_reg: ldo6 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vdd_sd0_reg: ldo9 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vdd_sd1_reg: ldo10 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vdd_mx6_high_reg: ldo11 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + }; + }; + }; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + imx6q-phytec-pfla02 { + pinctrl_hog: hoggrp { + fsl,pins = < + MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 + MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */ + MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x80000000 /* PMIC interrupt */ + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* Green LED */ + MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x80000000 /* Red LED */ + >; + }; + + pinctrl_ecspi3: ecspi3grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 + MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 + MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 + >; + }; + + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 + >; + }; + + pinctrl_gpmi_nand: gpminandgrp { + fsl,pins = < + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 + MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D30__UART3_RTS_B 0x1b0b1 + MX6QDL_PAD_EIM_D31__UART3_CTS_B 0x1b0b1 + >; + }; + + pinctrl_uart4: uart4grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_usbh1: usbh1grp { + fsl,pins = < + MX6QDL_PAD_GPIO_0__USB_H1_PWR 0x80000000 + >; + }; + + pinctrl_usbotg: usbotggrp { + fsl,pins = < + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 + MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + >; + }; + + pinctrl_usdhc3_cdwp: usdhc3cdwp { + fsl,pins = < + MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 + MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 + >; + }; + }; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "rgmii"; + phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; + status = "disabled"; +}; + +&gpmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand>; + nand-on-flash-bbt; + status = "disabled"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + status = "disabled"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + status = "disabled"; +}; + +&usbh1 { + vbus-supply = <®_usb_h1_vbus>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh1>; + status = "disabled"; +}; + +&usbotg { + vbus-supply = <®_usb_otg_vbus>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg>; + disable-over-current; + status = "disabled"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + cd-gpios = <&gpio1 4 0>; + wp-gpios = <&gpio1 2 0>; + status = "disabled"; +}; + +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3 + &pinctrl_usdhc3_cdwp>; + cd-gpios = <&gpio1 27 0>; + wp-gpios = <&gpio1 29 0>; + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi index 3bec128c7971..6df6127bf835 100644 --- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi @@ -13,6 +13,10 @@ #include <dt-bindings/input/input.h> / { + chosen { + stdout-path = &uart2; + }; + memory { reg = <0x10000000 0x40000000>; }; diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi index 0d816d3be4b6..40ea36534643 100644 --- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi @@ -14,6 +14,10 @@ #include <dt-bindings/input/input.h> / { + chosen { + stdout-path = &uart1; + }; + memory { reg = <0x10000000 0x40000000>; }; @@ -105,6 +109,17 @@ default-brightness-level = <7>; status = "okay"; }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_leds>; + + red { + gpios = <&gpio1 2 0>; + default-state = "on"; + }; + }; }; &audmux { @@ -137,6 +152,11 @@ status = "okay"; }; +&hdmi { + ddc-i2c-bus = <&i2c2>; + status = "okay"; +}; + &i2c1 { clock-frequency = <100000>; pinctrl-names = "default"; @@ -373,6 +393,12 @@ >; }; + pinctrl_pcie: pciegrp { + fsl,pins = < + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 + >; + }; + pinctrl_pwm1: pwm1grp { fsl,pins = < MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 @@ -421,6 +447,29 @@ MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 >; }; + + pinctrl_usdhc4: usdhc4grp { + fsl,pins = < + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 + >; + }; + }; + + gpio_leds { + pinctrl_gpio_leds: gpioledsgrp { + fsl,pins = < + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 + >; + }; }; }; @@ -449,6 +498,13 @@ }; }; +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie>; + reset-gpio = <&gpio7 12 0>; + status = "okay"; +}; + &pwm1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; @@ -496,3 +552,12 @@ wp-gpios = <&gpio2 1 0>; status = "okay"; }; + +&usdhc4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc4>; + bus-width = <8>; + non-removable; + no-1-8-v; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi index bdfdf89d405f..5c6f10c43f65 100644 --- a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi +++ b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi @@ -62,6 +62,18 @@ status = "okay"; }; +&hdmi { + ddc-i2c-bus = <&i2c1>; + status = "okay"; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +}; + &i2c2 { clock-frequency = <100000>; pinctrl-names = "default"; @@ -127,6 +139,13 @@ >; }; + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 + >; + }; + pinctrl_i2c2: i2c2grp { fsl,pins = < MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index 55cb926fa3f7..ce0599134a69 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -10,10 +10,13 @@ * http://www.gnu.org/copyleft/gpl.html */ +#include <dt-bindings/interrupt-controller/arm-gic.h> + #include "skeleton.dtsi" / { aliases { + ethernet0 = &fec; can0 = &can1; can1 = &can2; gpio0 = &gpio1; @@ -46,8 +49,6 @@ intc: interrupt-controller@00a01000 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; - #address-cells = <1>; - #size-cells = <1>; interrupt-controller; reg = <0x00a01000 0x1000>, <0x00a00100 0x100>; @@ -59,16 +60,19 @@ ckil { compatible = "fsl,imx-ckil", "fixed-clock"; + #clock-cells = <0>; clock-frequency = <32768>; }; ckih1 { compatible = "fsl,imx-ckih1", "fixed-clock"; + #clock-cells = <0>; clock-frequency = <0>; }; osc { compatible = "fsl,imx-osc", "fixed-clock"; + #clock-cells = <0>; clock-frequency = <24000000>; }; }; @@ -137,9 +141,16 @@ 0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */ 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */ num-lanes = <1>; - interrupts = <0 123 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>; - clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi"; + interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "msi"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks 144>, <&clks 206>, <&clks 189>; + clock-names = "pcie", "pcie_bus", "pcie_phy"; status = "disabled"; }; diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts index 864d8dfb51ca..a8d9a93fab85 100644 --- a/arch/arm/boot/dts/imx6sl-evk.dts +++ b/arch/arm/boot/dts/imx6sl-evk.dts @@ -282,6 +282,7 @@ MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 0x100b1 MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x100b1 MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x100b1 + MX6SL_PAD_ECSPI1_SS0__GPIO4_IO11 0x80000000 >; }; diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index 3cb4941afeef..2d4e5285f3f3 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi @@ -14,6 +14,7 @@ / { aliases { + ethernet0 = &fec; gpio0 = &gpio1; gpio1 = &gpio2; gpio2 = &gpio3; @@ -68,8 +69,6 @@ intc: interrupt-controller@00a01000 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; - #address-cells = <1>; - #size-cells = <1>; interrupt-controller; reg = <0x00a01000 0x1000>, <0x00a00100 0x100>; @@ -81,11 +80,13 @@ ckil { compatible = "fixed-clock"; + #clock-cells = <0>; clock-frequency = <32768>; }; osc { compatible = "fixed-clock"; + #clock-cells = <0>; clock-frequency = <24000000>; }; }; diff --git a/arch/arm/boot/dts/k2e-evm.dts b/arch/arm/boot/dts/k2e-evm.dts index 74b3b63e94cf..c568f067604d 100644 --- a/arch/arm/boot/dts/k2e-evm.dts +++ b/arch/arm/boot/dts/k2e-evm.dts @@ -58,3 +58,84 @@ &usb1 { status = "okay"; }; + +&i2c0 { + dtt@50 { + compatible = "at,24c1024"; + reg = <0x50>; + }; +}; + +&aemif { + cs0 { + #address-cells = <2>; + #size-cells = <1>; + clock-ranges; + ranges; + + ti,cs-chipselect = <0>; + /* all timings in nanoseconds */ + ti,cs-min-turnaround-ns = <12>; + ti,cs-read-hold-ns = <6>; + ti,cs-read-strobe-ns = <23>; + ti,cs-read-setup-ns = <9>; + ti,cs-write-hold-ns = <8>; + ti,cs-write-strobe-ns = <23>; + ti,cs-write-setup-ns = <8>; + + nand@0,0 { + compatible = "ti,keystone-nand","ti,davinci-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0 0 0x4000000 + 1 0 0x0000100>; + + ti,davinci-chipselect = <0>; + ti,davinci-mask-ale = <0x2000>; + ti,davinci-mask-cle = <0x4000>; + ti,davinci-mask-chipsel = <0>; + nand-ecc-mode = "hw"; + ti,davinci-ecc-bits = <4>; + nand-on-flash-bbt; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x100000>; + read-only; + }; + + partition@100000 { + label = "params"; + reg = <0x100000 0x80000>; + read-only; + }; + + partition@180000 { + label = "ubifs"; + reg = <0x180000 0x1FE80000>; + }; + }; + }; +}; + +&spi0 { + nor_flash: n25q128a11@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "Micron,n25q128a11"; + spi-max-frequency = <54000000>; + m25p,fast-read; + reg = <0>; + + partition@0 { + label = "u-boot-spl"; + reg = <0x0 0x80000>; + read-only; + }; + + partition@1 { + label = "misc"; + reg = <0x80000 0xf80000>; + }; + }; +}; diff --git a/arch/arm/boot/dts/k2hk-evm.dts b/arch/arm/boot/dts/k2hk-evm.dts index c93d06f9f2a8..1f90cbf27fd7 100644 --- a/arch/arm/boot/dts/k2hk-evm.dts +++ b/arch/arm/boot/dts/k2hk-evm.dts @@ -138,3 +138,32 @@ }; }; }; + +&i2c0 { + dtt@50 { + compatible = "at,24c1024"; + reg = <0x50>; + }; +}; + +&spi0 { + nor_flash: n25q128a11@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "Micron,n25q128a11"; + spi-max-frequency = <54000000>; + m25p,fast-read; + reg = <0>; + + partition@0 { + label = "u-boot-spl"; + reg = <0x0 0x80000>; + read-only; + }; + + partition@1 { + label = "misc"; + reg = <0x80000 0xf80000>; + }; + }; +}; diff --git a/arch/arm/boot/dts/k2l-evm.dts b/arch/arm/boot/dts/k2l-evm.dts index 50a70132ac9e..fec43128a2e0 100644 --- a/arch/arm/boot/dts/k2l-evm.dts +++ b/arch/arm/boot/dts/k2l-evm.dts @@ -35,3 +35,84 @@ &usb { status = "okay"; }; + +&i2c0 { + dtt@50 { + compatible = "at,24c1024"; + reg = <0x50>; + }; +}; + +&aemif { + cs0 { + #address-cells = <2>; + #size-cells = <1>; + clock-ranges; + ranges; + + ti,cs-chipselect = <0>; + /* all timings in nanoseconds */ + ti,cs-min-turnaround-ns = <12>; + ti,cs-read-hold-ns = <6>; + ti,cs-read-strobe-ns = <23>; + ti,cs-read-setup-ns = <9>; + ti,cs-write-hold-ns = <8>; + ti,cs-write-strobe-ns = <23>; + ti,cs-write-setup-ns = <8>; + + nand@0,0 { + compatible = "ti,keystone-nand","ti,davinci-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0 0 0x4000000 + 1 0 0x0000100>; + + ti,davinci-chipselect = <0>; + ti,davinci-mask-ale = <0x2000>; + ti,davinci-mask-cle = <0x4000>; + ti,davinci-mask-chipsel = <0>; + nand-ecc-mode = "hw"; + ti,davinci-ecc-bits = <4>; + nand-on-flash-bbt; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x100000>; + read-only; + }; + + partition@100000 { + label = "params"; + reg = <0x100000 0x80000>; + read-only; + }; + + partition@180000 { + label = "ubifs"; + reg = <0x180000 0x7FE80000>; + }; + }; + }; +}; + +&spi0 { + nor_flash: n25q128a11@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "Micron,n25q128a11"; + spi-max-frequency = <54000000>; + m25p,fast-read; + reg = <0>; + + partition@0 { + label = "u-boot-spl"; + reg = <0x0 0x80000>; + read-only; + }; + + partition@1 { + label = "misc"; + reg = <0x80000 0xf80000>; + }; + }; +}; diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi index 90823eb90c1b..d9f99e7deb83 100644 --- a/arch/arm/boot/dts/keystone.dtsi +++ b/arch/arm/boot/dts/keystone.dtsi @@ -28,8 +28,6 @@ gic: interrupt-controller { compatible = "arm,cortex-a15-gic"; #interrupt-cells = <3>; - #size-cells = <0>; - #address-cells = <1>; interrupt-controller; reg = <0x0 0x02561000 0x0 0x1000>, <0x0 0x02562000 0x0 0x2000>, @@ -66,6 +64,7 @@ compatible = "ti,keystone","simple-bus"; interrupt-parent = <&gic>; ranges = <0x0 0x0 0x0 0xc0000000>; + dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>; rstctrl: reset-controller { compatible = "ti,keystone-reset"; @@ -102,11 +101,6 @@ interrupts = <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>; #address-cells = <1>; #size-cells = <0>; - - dtt@50 { - compatible = "at,24c1024"; - reg = <0x50>; - }; }; i2c1: i2c@2530400 { @@ -115,6 +109,8 @@ clock-frequency = <100000>; clocks = <&clki2c>; interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; }; i2c2: i2c@2530800 { @@ -123,6 +119,8 @@ clock-frequency = <100000>; clocks = <&clki2c>; interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; }; spi0: spi@21000400 { @@ -132,6 +130,8 @@ ti,davinci-spi-intr-line = <0>; interrupts = <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>; clocks = <&clkspi>; + #address-cells = <1>; + #size-cells = <0>; }; spi1: spi@21000600 { @@ -141,6 +141,8 @@ ti,davinci-spi-intr-line = <0>; interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>; clocks = <&clkspi>; + #address-cells = <1>; + #size-cells = <0>; }; spi2: spi@21000800 { @@ -150,6 +152,8 @@ ti,davinci-spi-intr-line = <0>; interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>; clocks = <&clkspi>; + #address-cells = <1>; + #size-cells = <0>; }; usb_phy: usb_phy@2620738 { @@ -169,6 +173,8 @@ clock-names = "usb"; interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>; ranges; + dma-coherent; + dma-ranges; status = "disabled"; dwc3@2690000 { diff --git a/arch/arm/boot/dts/kirkwood-6192.dtsi b/arch/arm/boot/dts/kirkwood-6192.dtsi index 3916937d6818..dd81508b919b 100644 --- a/arch/arm/boot/dts/kirkwood-6192.dtsi +++ b/arch/arm/boot/dts/kirkwood-6192.dtsi @@ -1,6 +1,6 @@ / { mbus { - pcie-controller { + pciec: pcie-controller { compatible = "marvell,kirkwood-pcie"; status = "disabled"; device_type = "pci"; @@ -15,7 +15,7 @@ 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>; - pcie@1,0 { + pcie0: pcie@1,0 { device_type = "pci"; assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>; reg = <0x0800 0 0 0 0>; @@ -35,16 +35,9 @@ }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { compatible = "marvell,88f6192-pinctrl"; - reg = <0x10000 0x20>; - pmx_nand: pmx-nand { - marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", - "mpp4", "mpp5", "mpp18", - "mpp19"; - marvell,function = "nand"; - }; pmx_sata0: pmx-sata0 { marvell,pins = "mpp5", "mpp21", "mpp23"; marvell,function = "sata0"; @@ -53,22 +46,6 @@ marvell,pins = "mpp4", "mpp20", "mpp22"; marvell,function = "sata1"; }; - pmx_spi: pmx-spi { - marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3"; - marvell,function = "spi"; - }; - pmx_twsi0: pmx-twsi0 { - marvell,pins = "mpp8", "mpp9"; - marvell,function = "twsi0"; - }; - pmx_uart0: pmx-uart0 { - marvell,pins = "mpp10", "mpp11"; - marvell,function = "uart0"; - }; - pmx_uart1: pmx-uart1 { - marvell,pins = "mpp13", "mpp14"; - marvell,function = "uart1"; - }; pmx_sdio: pmx-sdio { marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15", "mpp16", "mpp17"; @@ -76,14 +53,14 @@ }; }; - rtc@10300 { + rtc: rtc@10300 { compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc"; reg = <0x10300 0x20>; interrupts = <53>; clocks = <&gate_clk 7>; }; - sata@80000 { + sata: sata@80000 { compatible = "marvell,orion-sata"; reg = <0x80000 0x5000>; interrupts = <21>; @@ -92,7 +69,7 @@ status = "disabled"; }; - mvsdio@90000 { + sdio: mvsdio@90000 { compatible = "marvell,orion-sdio"; reg = <0x90000 0x200>; interrupts = <28>; diff --git a/arch/arm/boot/dts/kirkwood-6281.dtsi b/arch/arm/boot/dts/kirkwood-6281.dtsi index 416d96e1302f..7dc7d6782e83 100644 --- a/arch/arm/boot/dts/kirkwood-6281.dtsi +++ b/arch/arm/boot/dts/kirkwood-6281.dtsi @@ -1,6 +1,6 @@ / { mbus { - pcie-controller { + pciec: pcie-controller { compatible = "marvell,kirkwood-pcie"; status = "disabled"; device_type = "pci"; @@ -15,7 +15,7 @@ 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>; - pcie@1,0 { + pcie0: pcie@1,0 { device_type = "pci"; assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>; reg = <0x0800 0 0 0 0>; @@ -35,16 +35,9 @@ }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { compatible = "marvell,88f6281-pinctrl"; - reg = <0x10000 0x20>; - pmx_nand: pmx-nand { - marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", - "mpp4", "mpp5", "mpp18", - "mpp19"; - marvell,function = "nand"; - }; pmx_sata0: pmx-sata0 { marvell,pins = "mpp5", "mpp21", "mpp23"; marvell,function = "sata0"; @@ -53,22 +46,6 @@ marvell,pins = "mpp4", "mpp20", "mpp22"; marvell,function = "sata1"; }; - pmx_spi: pmx-spi { - marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3"; - marvell,function = "spi"; - }; - pmx_twsi0: pmx-twsi0 { - marvell,pins = "mpp8", "mpp9"; - marvell,function = "twsi0"; - }; - pmx_uart0: pmx-uart0 { - marvell,pins = "mpp10", "mpp11"; - marvell,function = "uart0"; - }; - pmx_uart1: pmx-uart1 { - marvell,pins = "mpp13", "mpp14"; - marvell,function = "uart1"; - }; pmx_sdio: pmx-sdio { marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15", "mpp16", "mpp17"; @@ -76,14 +53,14 @@ }; }; - rtc@10300 { + rtc: rtc@10300 { compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc"; reg = <0x10300 0x20>; interrupts = <53>; clocks = <&gate_clk 7>; }; - sata@80000 { + sata: sata@80000 { compatible = "marvell,orion-sata"; reg = <0x80000 0x5000>; interrupts = <21>; @@ -94,7 +71,7 @@ status = "disabled"; }; - mvsdio@90000 { + sdio: mvsdio@90000 { compatible = "marvell,orion-sdio"; reg = <0x90000 0x200>; interrupts = <28>; diff --git a/arch/arm/boot/dts/kirkwood-6282.dtsi b/arch/arm/boot/dts/kirkwood-6282.dtsi index 2902e0d7971d..4680eec990f0 100644 --- a/arch/arm/boot/dts/kirkwood-6282.dtsi +++ b/arch/arm/boot/dts/kirkwood-6282.dtsi @@ -1,6 +1,6 @@ / { mbus { - pcie-controller { + pciec: pcie-controller { compatible = "marvell,kirkwood-pcie"; status = "disabled"; device_type = "pci"; @@ -19,7 +19,7 @@ 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 1.0 MEM */ 0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 1.0 IO */>; - pcie@1,0 { + pcie0: pcie@1,0 { device_type = "pci"; assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>; reg = <0x0800 0 0 0 0>; @@ -36,7 +36,7 @@ status = "disabled"; }; - pcie@2,0 { + pcie1: pcie@2,0 { device_type = "pci"; assigned-addresses = <0x82001000 0 0x00044000 0 0x2000>; reg = <0x1000 0 0 0 0>; @@ -56,15 +56,8 @@ }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { compatible = "marvell,88f6282-pinctrl"; - reg = <0x10000 0x20>; - - pmx_nand: pmx-nand { - marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", - "mpp4", "mpp5", "mpp18", "mpp19"; - marvell,function = "nand"; - }; pmx_sata0: pmx-sata0 { marvell,pins = "mpp5", "mpp21", "mpp23"; @@ -74,29 +67,16 @@ marvell,pins = "mpp4", "mpp20", "mpp22"; marvell,function = "sata1"; }; - pmx_spi: pmx-spi { - marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3"; - marvell,function = "spi"; - }; - pmx_twsi0: pmx-twsi0 { - marvell,pins = "mpp8", "mpp9"; - marvell,function = "twsi0"; - }; + /* + * Default I2C1 pinctrl setting on mpp36/mpp37, + * overwrite marvell,pins on board level if required. + */ pmx_twsi1: pmx-twsi1 { marvell,pins = "mpp36", "mpp37"; marvell,function = "twsi1"; }; - pmx_uart0: pmx-uart0 { - marvell,pins = "mpp10", "mpp11"; - marvell,function = "uart0"; - }; - - pmx_uart1: pmx-uart1 { - marvell,pins = "mpp13", "mpp14"; - marvell,function = "uart1"; - }; pmx_sdio: pmx-sdio { marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15", "mpp16", "mpp17"; @@ -104,20 +84,20 @@ }; }; - thermal@10078 { + thermal: thermal@10078 { compatible = "marvell,kirkwood-thermal"; reg = <0x10078 0x4>; status = "okay"; }; - rtc@10300 { + rtc: rtc@10300 { compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc"; reg = <0x10300 0x20>; interrupts = <53>; clocks = <&gate_clk 7>; }; - i2c@11100 { + i2c1: i2c@11100 { compatible = "marvell,mv64xxx-i2c"; reg = <0x11100 0x20>; #address-cells = <1>; @@ -125,10 +105,12 @@ interrupts = <32>; clock-frequency = <100000>; clocks = <&gate_clk 7>; + pinctrl-0 = <&pmx_twsi1>; + pinctrl-names = "default"; status = "disabled"; }; - sata@80000 { + sata: sata@80000 { compatible = "marvell,orion-sata"; reg = <0x80000 0x5000>; interrupts = <21>; @@ -139,7 +121,7 @@ status = "disabled"; }; - mvsdio@90000 { + sdio: mvsdio@90000 { compatible = "marvell,orion-sdio"; reg = <0x90000 0x200>; interrupts = <28>; diff --git a/arch/arm/boot/dts/kirkwood-98dx4122.dtsi b/arch/arm/boot/dts/kirkwood-98dx4122.dtsi index 3271e4c8ea07..2e8e412b9db0 100644 --- a/arch/arm/boot/dts/kirkwood-98dx4122.dtsi +++ b/arch/arm/boot/dts/kirkwood-98dx4122.dtsi @@ -1,31 +1,8 @@ / { ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { compatible = "marvell,98dx4122-pinctrl"; - reg = <0x10000 0x20>; - pmx_nand: pmx-nand { - marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", - "mpp4", "mpp5", "mpp18", - "mpp19"; - marvell,function = "nand"; - }; - pmx_spi: pmx-spi { - marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3"; - marvell,function = "spi"; - }; - pmx_twsi0: pmx-twsi0 { - marvell,pins = "mpp8", "mpp9"; - marvell,function = "twsi0"; - }; - pmx_uart0: pmx-uart0 { - marvell,pins = "mpp10", "mpp11"; - marvell,function = "uart0"; - }; - pmx_uart1: pmx-uart1 { - marvell,pins = "mpp13", "mpp14"; - marvell,function = "uart1"; - }; }; }; }; diff --git a/arch/arm/boot/dts/kirkwood-b3.dts b/arch/arm/boot/dts/kirkwood-b3.dts index 40791053106b..c9247f8672ae 100644 --- a/arch/arm/boot/dts/kirkwood-b3.dts +++ b/arch/arm/boot/dts/kirkwood-b3.dts @@ -30,6 +30,7 @@ chosen { bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; }; mbus { @@ -44,7 +45,7 @@ }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pmx_button_power: pmx-button-power { marvell,pins = "mpp39"; marvell,function = "gpio"; @@ -69,13 +70,11 @@ spi@10600 { status = "okay"; - pinctrl-0 = <&pmx_spi>; - pinctrl-names = "default"; m25p16@0 { #address-cells = <1>; #size-cells = <1>; - compatible = "m25p16"; + compatible = "st,m25p16"; reg = <0>; spi-max-frequency = <40000000>; mode = <0>; @@ -113,8 +112,6 @@ * UART0_TX = Testpoint 66 * See the Excito Wiki for more details. */ - pinctrl-0 = <&pmx_uart0>; - pinctrl-names = "default"; status = "okay"; }; diff --git a/arch/arm/boot/dts/kirkwood-cloudbox.dts b/arch/arm/boot/dts/kirkwood-cloudbox.dts index 0e06fd3cee4d..ab6ab4933e6b 100644 --- a/arch/arm/boot/dts/kirkwood-cloudbox.dts +++ b/arch/arm/boot/dts/kirkwood-cloudbox.dts @@ -14,10 +14,11 @@ chosen { bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pmx_cloudbox_sata0: pmx-cloudbox-sata0 { marvell,pins = "mpp15"; marvell,function = "sata0"; @@ -25,9 +26,6 @@ }; serial@12000 { - pinctrl-0 = <&pmx_uart0>; - pinctrl-names = "default"; - clock-frequency = <166666667>; status = "okay"; }; @@ -39,14 +37,12 @@ }; spi@10600 { - pinctrl-0 = <&pmx_spi>; - pinctrl-names = "default"; status = "okay"; flash@0 { #address-cells = <1>; #size-cells = <1>; - compatible = "mx25l4005a"; + compatible = "mxicy,mx25l4005a"; reg = <0>; spi-max-frequency = <20000000>; mode = <0>; diff --git a/arch/arm/boot/dts/kirkwood-db.dtsi b/arch/arm/boot/dts/kirkwood-db.dtsi index 02d1225ef99f..812df691ae3d 100644 --- a/arch/arm/boot/dts/kirkwood-db.dtsi +++ b/arch/arm/boot/dts/kirkwood-db.dtsi @@ -22,10 +22,11 @@ chosen { bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; }; ocp@f1000000 { - pinctrl@10000 { + pin-controller@10000 { pmx_sdio_gpios: pmx-sdio-gpios { marvell,pins = "mpp37", "mpp38"; marvell,function = "gpio"; @@ -33,10 +34,7 @@ }; serial@12000 { - pinctrl-0 = <&pmx_uart0>; - pinctrl-names = "default"; - clock-frequency = <200000000>; - status = "ok"; + status = "okay"; }; sata@80000 { @@ -59,8 +57,6 @@ }; &nand { - pinctrl-0 = <&pmx_nand>; - pinctrl-names = "default"; chip-delay = <25>; status = "okay"; diff --git a/arch/arm/boot/dts/kirkwood-dns320.dts b/arch/arm/boot/dts/kirkwood-dns320.dts index bf7fe8ab88f4..d85ef0a91b50 100644 --- a/arch/arm/boot/dts/kirkwood-dns320.dts +++ b/arch/arm/boot/dts/kirkwood-dns320.dts @@ -13,6 +13,7 @@ chosen { bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; }; gpio-leds { @@ -51,8 +52,6 @@ }; serial@12100 { - pinctrl-0 = <&pmx_uart1>; - pinctrl-names = "default"; status = "okay"; }; }; diff --git a/arch/arm/boot/dts/kirkwood-dns325.dts b/arch/arm/boot/dts/kirkwood-dns325.dts index cb9978c652f2..5e586ed04c58 100644 --- a/arch/arm/boot/dts/kirkwood-dns325.dts +++ b/arch/arm/boot/dts/kirkwood-dns325.dts @@ -13,6 +13,7 @@ chosen { bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; }; gpio-leds { diff --git a/arch/arm/boot/dts/kirkwood-dnskw.dtsi b/arch/arm/boot/dts/kirkwood-dnskw.dtsi index d5aa9564a287..113dcf056dcf 100644 --- a/arch/arm/boot/dts/kirkwood-dnskw.dtsi +++ b/arch/arm/boot/dts/kirkwood-dnskw.dtsi @@ -50,7 +50,7 @@ }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pinctrl-0 = <&pmx_power_back_on &pmx_present_sata0 &pmx_present_sata1 &pmx_fan_tacho @@ -183,8 +183,6 @@ }; &nand { - pinctrl-0 = <&pmx_nand>; - pinctrl-names = "default"; status = "okay"; chip-delay = <35>; diff --git a/arch/arm/boot/dts/kirkwood-dockstar.dts b/arch/arm/boot/dts/kirkwood-dockstar.dts index f31312ebd0d6..849736349511 100644 --- a/arch/arm/boot/dts/kirkwood-dockstar.dts +++ b/arch/arm/boot/dts/kirkwood-dockstar.dts @@ -14,10 +14,11 @@ chosen { bootargs = "console=ttyS0,115200n8 earlyprintk root=/dev/sda1 rootdelay=10"; + stdout-path = &uart0; }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pmx_usb_power_enable: pmx-usb-power-enable { marvell,pins = "mpp29"; marvell,function = "gpio"; diff --git a/arch/arm/boot/dts/kirkwood-dreamplug.dts b/arch/arm/boot/dts/kirkwood-dreamplug.dts index ef3463e0ae19..6467c7924195 100644 --- a/arch/arm/boot/dts/kirkwood-dreamplug.dts +++ b/arch/arm/boot/dts/kirkwood-dreamplug.dts @@ -14,10 +14,11 @@ chosen { bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pmx_led_bluetooth: pmx-led-bluetooth { marvell,pins = "mpp47"; marvell,function = "gpio"; @@ -37,13 +38,11 @@ spi@10600 { status = "okay"; - pinctrl-0 = <&pmx_spi>; - pinctrl-names = "default"; m25p40@0 { #address-cells = <1>; #size-cells = <1>; - compatible = "mx25l1606e"; + compatible = "mxicy,mx25l1606e"; reg = <0>; spi-max-frequency = <50000000>; mode = <0>; diff --git a/arch/arm/boot/dts/kirkwood-ds109.dts b/arch/arm/boot/dts/kirkwood-ds109.dts index 772092c94ca3..d4bcc1c7f6b3 100644 --- a/arch/arm/boot/dts/kirkwood-ds109.dts +++ b/arch/arm/boot/dts/kirkwood-ds109.dts @@ -25,6 +25,7 @@ chosen { bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; }; gpio-fan-150-32-35 { diff --git a/arch/arm/boot/dts/kirkwood-ds110jv10.dts b/arch/arm/boot/dts/kirkwood-ds110jv10.dts index aabafbe0da4c..95bf83b91b4a 100644 --- a/arch/arm/boot/dts/kirkwood-ds110jv10.dts +++ b/arch/arm/boot/dts/kirkwood-ds110jv10.dts @@ -25,6 +25,7 @@ chosen { bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; }; gpio-fan-150-32-35 { diff --git a/arch/arm/boot/dts/kirkwood-ds111.dts b/arch/arm/boot/dts/kirkwood-ds111.dts index 16ec7fbab573..61f47fbe44d0 100644 --- a/arch/arm/boot/dts/kirkwood-ds111.dts +++ b/arch/arm/boot/dts/kirkwood-ds111.dts @@ -24,6 +24,7 @@ chosen { bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; }; gpio-fan-100-15-35-1 { diff --git a/arch/arm/boot/dts/kirkwood-ds112.dts b/arch/arm/boot/dts/kirkwood-ds112.dts index cff1b2388765..bf4143c6cb8f 100644 --- a/arch/arm/boot/dts/kirkwood-ds112.dts +++ b/arch/arm/boot/dts/kirkwood-ds112.dts @@ -24,6 +24,7 @@ chosen { bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; }; gpio-fan-100-15-35-1 { diff --git a/arch/arm/boot/dts/kirkwood-ds209.dts b/arch/arm/boot/dts/kirkwood-ds209.dts index 330411993d38..6d25093a9ac4 100644 --- a/arch/arm/boot/dts/kirkwood-ds209.dts +++ b/arch/arm/boot/dts/kirkwood-ds209.dts @@ -24,6 +24,7 @@ chosen { bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; }; gpio-fan-150-32-35 { diff --git a/arch/arm/boot/dts/kirkwood-ds210.dts b/arch/arm/boot/dts/kirkwood-ds210.dts index 6052eaa37d4f..2f1933efcac1 100644 --- a/arch/arm/boot/dts/kirkwood-ds210.dts +++ b/arch/arm/boot/dts/kirkwood-ds210.dts @@ -26,6 +26,7 @@ chosen { bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; }; gpio-fan-150-32-35 { diff --git a/arch/arm/boot/dts/kirkwood-ds212.dts b/arch/arm/boot/dts/kirkwood-ds212.dts index 7f76cd30e84e..99afd462f956 100644 --- a/arch/arm/boot/dts/kirkwood-ds212.dts +++ b/arch/arm/boot/dts/kirkwood-ds212.dts @@ -27,6 +27,7 @@ chosen { bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; }; gpio-fan-100-15-35-1 { diff --git a/arch/arm/boot/dts/kirkwood-ds212j.dts b/arch/arm/boot/dts/kirkwood-ds212j.dts index 1f83a00f1f74..f5c4213fc67c 100644 --- a/arch/arm/boot/dts/kirkwood-ds212j.dts +++ b/arch/arm/boot/dts/kirkwood-ds212j.dts @@ -25,6 +25,7 @@ chosen { bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; }; gpio-fan-100-32-35 { diff --git a/arch/arm/boot/dts/kirkwood-ds409.dts b/arch/arm/boot/dts/kirkwood-ds409.dts index 0a573add44a2..e80a962ebba0 100644 --- a/arch/arm/boot/dts/kirkwood-ds409.dts +++ b/arch/arm/boot/dts/kirkwood-ds409.dts @@ -24,6 +24,7 @@ chosen { bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; }; gpio-fan-150-15-18 { diff --git a/arch/arm/boot/dts/kirkwood-ds409slim.dts b/arch/arm/boot/dts/kirkwood-ds409slim.dts index 1848a6245fd3..cae5af4b88b5 100644 --- a/arch/arm/boot/dts/kirkwood-ds409slim.dts +++ b/arch/arm/boot/dts/kirkwood-ds409slim.dts @@ -24,6 +24,7 @@ chosen { bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; }; gpio-fan-150-32-35 { diff --git a/arch/arm/boot/dts/kirkwood-ds411.dts b/arch/arm/boot/dts/kirkwood-ds411.dts index a1737b4311c6..623cd4a37d71 100644 --- a/arch/arm/boot/dts/kirkwood-ds411.dts +++ b/arch/arm/boot/dts/kirkwood-ds411.dts @@ -24,6 +24,7 @@ chosen { bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; }; gpio-fan-100-15-35-1 { diff --git a/arch/arm/boot/dts/kirkwood-ds411j.dts b/arch/arm/boot/dts/kirkwood-ds411j.dts index 0cde914eceae..3348e330f074 100644 --- a/arch/arm/boot/dts/kirkwood-ds411j.dts +++ b/arch/arm/boot/dts/kirkwood-ds411j.dts @@ -24,6 +24,7 @@ chosen { bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; }; gpio-fan-150-15-18 { diff --git a/arch/arm/boot/dts/kirkwood-ds411slim.dts b/arch/arm/boot/dts/kirkwood-ds411slim.dts index aef0cadc2c78..a0a1fad8b4de 100644 --- a/arch/arm/boot/dts/kirkwood-ds411slim.dts +++ b/arch/arm/boot/dts/kirkwood-ds411slim.dts @@ -24,6 +24,7 @@ chosen { bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; }; gpio-fan-100-15-35-1 { diff --git a/arch/arm/boot/dts/kirkwood-goflexnet.dts b/arch/arm/boot/dts/kirkwood-goflexnet.dts index eb9329420107..aa60a0b049a7 100644 --- a/arch/arm/boot/dts/kirkwood-goflexnet.dts +++ b/arch/arm/boot/dts/kirkwood-goflexnet.dts @@ -14,10 +14,11 @@ chosen { bootargs = "console=ttyS0,115200n8 earlyprintk root=/dev/sda1 rootdelay=10"; + stdout-path = &uart0; }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pmx_usb_power_enable: pmx-usb-power-enable { marvell,pins = "mpp29"; marvell,function = "gpio"; diff --git a/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts b/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts index 2d51fce74a5a..c5a1fc75c7a3 100644 --- a/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts +++ b/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts @@ -14,10 +14,11 @@ chosen { bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pmx_led_health_r: pmx-led-health-r { marvell,pins = "mpp46"; marvell,function = "gpio"; @@ -36,7 +37,6 @@ }; }; serial@12000 { - clock-frequency = <200000000>; status = "ok"; }; @@ -101,13 +101,19 @@ status = "okay"; ethphy0: ethernet-phy@0 { - compatible = "marvell,88e1121"; + /* Marvell 88E1121R */ + compatible = "ethernet-phy-id0141.0cb0", + "ethernet-phy-ieee802.3-c22"; reg = <0>; + phy-connection-type = "rgmii-id"; }; ethphy1: ethernet-phy@1 { - compatible = "marvell,88e1121"; + /* Marvell 88E1121R */ + compatible = "ethernet-phy-id0141.0cb0", + "ethernet-phy-ieee802.3-c22"; reg = <1>; + phy-connection-type = "rgmii-id"; }; }; diff --git a/arch/arm/boot/dts/kirkwood-ib62x0.dts b/arch/arm/boot/dts/kirkwood-ib62x0.dts index a1add3f215e3..bfa5edde179c 100644 --- a/arch/arm/boot/dts/kirkwood-ib62x0.dts +++ b/arch/arm/boot/dts/kirkwood-ib62x0.dts @@ -14,10 +14,11 @@ chosen { bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pmx_led_os_red: pmx-led-os-red { marvell,pins = "mpp22"; marvell,function = "gpio"; @@ -104,8 +105,6 @@ &nand { status = "okay"; - pinctrl-0 = <&pmx_nand>; - pinctrl-names = "default"; partition@0 { label = "u-boot"; diff --git a/arch/arm/boot/dts/kirkwood-iconnect.dts b/arch/arm/boot/dts/kirkwood-iconnect.dts index 8d8c80e3656d..38e31d15a62d 100644 --- a/arch/arm/boot/dts/kirkwood-iconnect.dts +++ b/arch/arm/boot/dts/kirkwood-iconnect.dts @@ -14,6 +14,7 @@ chosen { bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; linux,initrd-start = <0x4500040>; linux,initrd-end = <0x4800000>; }; @@ -29,7 +30,7 @@ }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pmx_button_reset: pmx-button-reset { marvell,pins = "mpp12"; marvell,function = "gpio"; diff --git a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts index 59e7a5adeedb..05291f3990d0 100644 --- a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts +++ b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts @@ -14,10 +14,11 @@ chosen { bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pinctrl-0 = < &pmx_led_sata_brt_ctrl_1 &pmx_led_sata_brt_ctrl_2 &pmx_led_backup_brt_ctrl_1 diff --git a/arch/arm/boot/dts/kirkwood-km_kirkwood.dts b/arch/arm/boot/dts/kirkwood-km_kirkwood.dts index 04a1e44541b3..61139bf30985 100644 --- a/arch/arm/boot/dts/kirkwood-km_kirkwood.dts +++ b/arch/arm/boot/dts/kirkwood-km_kirkwood.dts @@ -14,10 +14,11 @@ chosen { bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pinctrl-0 = < &pmx_i2c_gpio_sda &pmx_i2c_gpio_scl >; pinctrl-names = "default"; @@ -45,9 +46,7 @@ }; &nand { - pinctrl-0 = <&pmx_nand>; - pinctrl-names = "default"; - status = "ok"; + status = "okay"; chip-delay = <25>; }; diff --git a/arch/arm/boot/dts/kirkwood-laplug.dts b/arch/arm/boot/dts/kirkwood-laplug.dts index c9e82eff9bf2..24425660e973 100644 --- a/arch/arm/boot/dts/kirkwood-laplug.dts +++ b/arch/arm/boot/dts/kirkwood-laplug.dts @@ -24,6 +24,7 @@ chosen { bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; }; mbus { @@ -37,24 +38,20 @@ ocp@f1000000 { serial@12000 { - pinctrl-0 = <&pmx_uart0>; - pinctrl-names = "default"; status = "okay"; }; i2c@11000 { - pinctrl-0 = <&pmx_twsi0>; - pinctrl-names = "default"; status = "okay"; eeprom@50 { - compatible = "at,24c04"; + compatible = "atmel,24c04"; pagesize = <16>; reg = <0x50>; }; }; - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pmx_usb_power_enable: pmx-usb-power-enable { marvell,pins = "mpp14"; marvell,function = "gpio"; @@ -139,7 +136,6 @@ &nand { /* Total size : 512MB */ status = "okay"; - pinctrl-0 = <&pmx_nand>; partition@0 { label = "u-boot"; diff --git a/arch/arm/boot/dts/kirkwood-lsxl.dtsi b/arch/arm/boot/dts/kirkwood-lsxl.dtsi index 1656653d339b..53484474df1f 100644 --- a/arch/arm/boot/dts/kirkwood-lsxl.dtsi +++ b/arch/arm/boot/dts/kirkwood-lsxl.dtsi @@ -4,10 +4,11 @@ / { chosen { bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pmx_power_hdd: pmx-power-hdd { marvell,pins = "mpp10"; marvell,function = "gpo"; diff --git a/arch/arm/boot/dts/kirkwood-mplcec4.dts b/arch/arm/boot/dts/kirkwood-mplcec4.dts index 73722c067501..f3a991837515 100644 --- a/arch/arm/boot/dts/kirkwood-mplcec4.dts +++ b/arch/arm/boot/dts/kirkwood-mplcec4.dts @@ -12,9 +12,10 @@ reg = <0x00000000 0x20000000>; }; - chosen { - bootargs = "console=ttyS0,115200n8 earlyprintk"; - }; + chosen { + bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; + }; mbus { pcie-controller { @@ -27,7 +28,7 @@ }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pmx_led_health: pmx-led-health { marvell,pins = "mpp7"; marvell,function = "gpo"; @@ -89,11 +90,9 @@ }; - serial@12000 { - status = "ok"; - pinctrl-0 = <&pmx_uart0>; - pinctrl-names = "default"; - }; + serial@12000 { + status = "okay"; + }; rtc@10300 { status = "disabled"; @@ -163,8 +162,6 @@ }; &nand { - pinctrl-0 = <&pmx_nand>; - pinctrl-names = "default"; status = "okay"; partition@0 { diff --git a/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts b/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts index 2cb0dc529165..49f9295c7bac 100644 --- a/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts +++ b/arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts @@ -28,10 +28,11 @@ chosen { bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; }; ocp@f1000000 { - pinctrl@10000 { + pin-controller@10000 { pmx_usb_led: pmx-usb-led { marvell,pins = "mpp12"; marvell,function = "gpo"; @@ -49,14 +50,12 @@ }; spi@10600 { - pinctrl-0 = <&pmx_spi>; - pinctrl-names = "default"; status = "okay"; flash@0 { #address-cells = <1>; #size-cells = <1>; - compatible = "mx25l12805d"; + compatible = "mxicy,mx25l12805d"; reg = <0>; spi-max-frequency = <50000000>; mode = <0>; @@ -64,10 +63,7 @@ }; serial@12000 { - pinctrl-0 = <&pmx_uart0>; - pinctrl-names = "default"; - clock-frequency = <200000000>; - status = "ok"; + status = "okay"; }; ehci@50000 { diff --git a/arch/arm/boot/dts/kirkwood-netgear_readynas_duo_v2.dts b/arch/arm/boot/dts/kirkwood-netgear_readynas_duo_v2.dts index 4838478019cc..fd733c63bc27 100644 --- a/arch/arm/boot/dts/kirkwood-netgear_readynas_duo_v2.dts +++ b/arch/arm/boot/dts/kirkwood-netgear_readynas_duo_v2.dts @@ -25,6 +25,7 @@ chosen { bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; }; mbus { @@ -38,7 +39,7 @@ }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pmx_button_power: pmx-button-power { marvell,pins = "mpp47"; marvell,function = "gpio"; @@ -112,8 +113,6 @@ }; serial@12000 { - pinctrl-0 = <&pmx_uart0>; - pinctrl-names = "default"; status = "okay"; }; diff --git a/arch/arm/boot/dts/kirkwood-netgear_readynas_nv+_v2.dts b/arch/arm/boot/dts/kirkwood-netgear_readynas_nv+_v2.dts index 7c8a0d9d8d1f..b514d643fb6c 100644 --- a/arch/arm/boot/dts/kirkwood-netgear_readynas_nv+_v2.dts +++ b/arch/arm/boot/dts/kirkwood-netgear_readynas_nv+_v2.dts @@ -25,6 +25,7 @@ chosen { bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; }; mbus { @@ -40,7 +41,7 @@ }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pmx_button_power: pmx-button-power { marvell,pins = "mpp47"; marvell,function = "gpio"; @@ -119,8 +120,6 @@ }; serial@12000 { - pinctrl-0 = <&pmx_uart0>; - pinctrl-names = "default"; status = "okay"; }; diff --git a/arch/arm/boot/dts/kirkwood-ns2-common.dtsi b/arch/arm/boot/dts/kirkwood-ns2-common.dtsi index 743152f31a81..fe6c0246db1a 100644 --- a/arch/arm/boot/dts/kirkwood-ns2-common.dtsi +++ b/arch/arm/boot/dts/kirkwood-ns2-common.dtsi @@ -4,10 +4,11 @@ / { chosen { bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pmx_ns2_sata0: pmx-ns2-sata0 { marvell,pins = "mpp21"; marvell,function = "sata0"; @@ -19,20 +20,16 @@ }; serial@12000 { - pinctrl-0 = <&pmx_uart0>; - pinctrl-names = "default"; status = "okay"; }; spi@10600 { - pinctrl-0 = <&pmx_spi>; - pinctrl-names = "default"; status = "okay"; flash@0 { #address-cells = <1>; #size-cells = <1>; - compatible = "mx25l4005a"; + compatible = "mxicy,mx25l4005a"; reg = <0>; spi-max-frequency = <20000000>; mode = <0>; @@ -45,12 +42,10 @@ }; i2c@11000 { - pinctrl-0 = <&pmx_twsi0>; - pinctrl-names = "default"; status = "okay"; eeprom@50 { - compatible = "at,24c04"; + compatible = "atmel,24c04"; pagesize = <16>; reg = <0x50>; }; diff --git a/arch/arm/boot/dts/kirkwood-nsa310.dts b/arch/arm/boot/dts/kirkwood-nsa310.dts index 03fa24cf3344..6139df0f376c 100644 --- a/arch/arm/boot/dts/kirkwood-nsa310.dts +++ b/arch/arm/boot/dts/kirkwood-nsa310.dts @@ -1,6 +1,6 @@ /dts-v1/; -#include "kirkwood-nsa310-common.dtsi" +#include "kirkwood-nsa3x0-common.dtsi" / { compatible = "zyxel,nsa310", "marvell,kirkwood-88f6281", "marvell,kirkwood"; @@ -12,6 +12,7 @@ chosen { bootargs = "console=ttyS0,115200"; + stdout-path = &uart0; }; mbus { @@ -25,7 +26,7 @@ }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pinctrl-0 = <&pmx_unknown>; pinctrl-names = "default"; @@ -59,26 +60,6 @@ marvell,function = "gpio"; }; - pmx_btn_reset: pmx-btn-reset { - marvell,pins = "mpp36"; - marvell,function = "gpio"; - }; - - pmx_btn_copy: pmx-btn-copy { - marvell,pins = "mpp37"; - marvell,function = "gpio"; - }; - - pmx_led_copy_green: pmx-led-copy-green { - marvell,pins = "mpp39"; - marvell,function = "gpio"; - }; - - pmx_led_copy_red: pmx-led-copy-red { - marvell,pins = "mpp40"; - marvell,function = "gpio"; - }; - pmx_led_hdd_green: pmx-led-hdd-green { marvell,pins = "mpp41"; marvell,function = "gpio"; @@ -94,46 +75,18 @@ marvell,function = "gpio"; }; - pmx_btn_power: pmx-btn-power { - marvell,pins = "mpp46"; - marvell,function = "gpio"; - }; }; i2c@11000 { status = "okay"; adt7476: adt7476a@2e { - compatible = "adt7476"; + compatible = "adi,adt7476"; reg = <0x2e>; }; }; }; - gpio_keys { - compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-0 = <&pmx_btn_reset &pmx_btn_copy &pmx_btn_power>; - pinctrl-names = "default"; - - button@1 { - label = "Power Button"; - linux,code = <KEY_POWER>; - gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; - }; - button@2 { - label = "Copy Button"; - linux,code = <KEY_COPY>; - gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; - }; - button@3 { - label = "Reset Button"; - linux,code = <KEY_RESTART>; - gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; - }; - }; - gpio-leds { compatible = "gpio-leds"; pinctrl-0 = <&pmx_led_esata_green &pmx_led_esata_red diff --git a/arch/arm/boot/dts/kirkwood-nsa310a.dts b/arch/arm/boot/dts/kirkwood-nsa310a.dts index a5e779452867..3d2b3d494c19 100644 --- a/arch/arm/boot/dts/kirkwood-nsa310a.dts +++ b/arch/arm/boot/dts/kirkwood-nsa310a.dts @@ -1,6 +1,6 @@ /dts-v1/; -#include "kirkwood-nsa310-common.dtsi" +#include "kirkwood-nsa3x0-common.dtsi" /* * There are at least two different NSA310 designs. This variant does @@ -17,10 +17,11 @@ chosen { bootargs = "console=ttyS0,115200"; + stdout-path = &uart0; }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pinctrl-names = "default"; pmx_led_esata_green: pmx-led-esata-green { @@ -38,11 +39,6 @@ marvell,function = "gpio"; }; - pmx_usb_power_off: pmx-usb-power-off { - marvell,pins = "mpp21"; - marvell,function = "gpio"; - }; - pmx_led_sys_green: pmx-led-sys-green { marvell,pins = "mpp28"; marvell,function = "gpio"; @@ -53,26 +49,6 @@ marvell,function = "gpio"; }; - pmx_btn_reset: pmx-btn-reset { - marvell,pins = "mpp36"; - marvell,function = "gpio"; - }; - - pmx_btn_copy: pmx-btn-copy { - marvell,pins = "mpp37"; - marvell,function = "gpio"; - }; - - pmx_led_copy_green: pmx-led-copy-green { - marvell,pins = "mpp39"; - marvell,function = "gpio"; - }; - - pmx_led_copy_red: pmx-led-copy-red { - marvell,pins = "mpp40"; - marvell,function = "gpio"; - }; - pmx_led_hdd_green: pmx-led-hdd-green { marvell,pins = "mpp41"; marvell,function = "gpio"; @@ -83,45 +59,18 @@ marvell,function = "gpio"; }; - pmx_btn_power: pmx-btn-power { - marvell,pins = "mpp46"; - marvell,function = "gpio"; - }; - }; i2c@11000 { status = "okay"; lm85: lm85@2e { - compatible = "lm85"; + compatible = "national,lm85"; reg = <0x2e>; }; }; }; - gpio_keys { - compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; - - button@1 { - label = "Power Button"; - linux,code = <KEY_POWER>; - gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; - }; - button@2 { - label = "Copy Button"; - linux,code = <KEY_COPY>; - gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; - }; - button@3 { - label = "Reset Button"; - linux,code = <KEY_RESTART>; - gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; - }; - }; - gpio-leds { compatible = "gpio-leds"; diff --git a/arch/arm/boot/dts/kirkwood-nsa320.dts b/arch/arm/boot/dts/kirkwood-nsa320.dts new file mode 100644 index 000000000000..24f686d1044d --- /dev/null +++ b/arch/arm/boot/dts/kirkwood-nsa320.dts @@ -0,0 +1,215 @@ +/* Device tree file for the Zyxel NSA 320 NAS box. + * + * Copyright (c) 2014, Adam Baker <[email protected]> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + * Based upon the board setup file created by Peter Schildmann */ + +/dts-v1/; + +#include "kirkwood-nsa3x0-common.dtsi" + +/ { + model = "Zyxel NSA320"; + compatible = "zyxel,nsa320", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x20000000>; + }; + + chosen { + bootargs = "console=ttyS0,115200"; + stdout-path = &uart0; + }; + + mbus { + pcie-controller { + status = "okay"; + + pcie@1,0 { + status = "okay"; + }; + }; + }; + + ocp@f1000000 { + pinctrl: pin-controller@10000 { + pinctrl-names = "default"; + + /* SATA Activity and Present pins are not connected */ + pmx_sata0: pmx-sata0 { + marvell,pins ; + marvell,function = "sata0"; + }; + + pmx_sata1: pmx-sata1 { + marvell,pins ; + marvell,function = "sata1"; + }; + + pmx_led_hdd2_green: pmx-led-hdd2-green { + marvell,pins = "mpp12"; + marvell,function = "gpio"; + }; + + pmx_led_hdd2_red: pmx-led-hdd2-red { + marvell,pins = "mpp13"; + marvell,function = "gpio"; + }; + + pmx_mcu_data: pmx-mcu-data { + marvell,pins = "mpp14"; + marvell,function = "gpio"; + }; + + pmx_led_usb_green: pmx-led-usb-green { + marvell,pins = "mpp15"; + marvell,function = "gpio"; + }; + + pmx_mcu_clk: pmx-mcu-clk { + marvell,pins = "mpp16"; + marvell,function = "gpio"; + }; + + pmx_mcu_act: pmx-mcu-act { + marvell,pins = "mpp17"; + marvell,function = "gpio"; + }; + + pmx_led_sys_green: pmx-led-sys-green { + marvell,pins = "mpp28"; + marvell,function = "gpio"; + }; + + pmx_led_sys_orange: pmx-led-sys-orange { + marvell,pins = "mpp29"; + marvell,function = "gpio"; + }; + + pmx_led_hdd1_green: pmx-led-hdd1-green { + marvell,pins = "mpp41"; + marvell,function = "gpio"; + }; + + pmx_led_hdd1_red: pmx-led-hdd1-red { + marvell,pins = "mpp42"; + marvell,function = "gpio"; + }; + + pmx_htp: pmx-htp { + marvell,pins = "mpp43"; + marvell,function = "gpio"; + }; + + /* Buzzer needs to be switched at around 1kHz so is + not compatible with the gpio-beeper driver. */ + pmx_buzzer: pmx-buzzer { + marvell,pins = "mpp44"; + marvell,function = "gpio"; + }; + + pmx_vid_b1: pmx-vid-b1 { + marvell,pins = "mpp45"; + marvell,function = "gpio"; + }; + + pmx_power_resume_data: pmx-power-resume-data { + marvell,pins = "mpp47"; + marvell,function = "gpio"; + }; + + pmx_power_resume_clk: pmx-power-resume-clk { + marvell,pins = "mpp49"; + marvell,function = "gpio"; + }; + }; + + i2c@11000 { + status = "okay"; + + pcf8563: pcf8563@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + }; + }; + }; + + regulators { + usb0_power: regulator@1 { + enable-active-high; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + pinctrl-0 = <&pmx_led_hdd2_green &pmx_led_hdd2_red + &pmx_led_usb_green + &pmx_led_sys_green &pmx_led_sys_orange + &pmx_led_copy_green &pmx_led_copy_red + &pmx_led_hdd1_green &pmx_led_hdd1_red>; + pinctrl-names = "default"; + + green-sys { + label = "nsa320:green:sys"; + gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>; + }; + orange-sys { + label = "nsa320:orange:sys"; + gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>; + }; + green-hdd1 { + label = "nsa320:green:hdd1"; + gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; + }; + red-hdd1 { + label = "nsa320:red:hdd1"; + gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; + }; + green-hdd2 { + label = "nsa320:green:hdd2"; + gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; + }; + red-hdd2 { + label = "nsa320:red:hdd2"; + gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; + }; + green-usb { + label = "nsa320:green:usb"; + gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; + }; + green-copy { + label = "nsa320:green:copy"; + gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; + }; + red-copy { + label = "nsa320:red:copy"; + gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; + }; + }; + + /* The following pins are currently not assigned to a driver, + some of them should be configured as inputs. + pinctrl-0 = <&pmx_mcu_data &pmx_mcu_clk &pmx_mcu_act + &pmx_htp &pmx_vid_b1 + &pmx_power_resume_data &pmx_power_resume_clk>; */ +}; + +&mdio { + status = "okay"; + ethphy0: ethernet-phy@1 { + reg = <1>; + }; +}; + +ð0 { + status = "okay"; + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; diff --git a/arch/arm/boot/dts/kirkwood-nsa310-common.dtsi b/arch/arm/boot/dts/kirkwood-nsa3x0-common.dtsi index aa78c2d11fe7..9cb083b72404 100644 --- a/arch/arm/boot/dts/kirkwood-nsa310-common.dtsi +++ b/arch/arm/boot/dts/kirkwood-nsa3x0-common.dtsi @@ -5,17 +5,42 @@ model = "ZyXEL NSA310"; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { - pmx_usb_power_off: pmx-usb-power-off { + pmx_usb_power: pmx-usb-power { marvell,pins = "mpp21"; marvell,function = "gpio"; }; + pmx_pwr_off: pmx-pwr-off { marvell,pins = "mpp48"; marvell,function = "gpio"; }; + pmx_btn_reset: pmx-btn-reset { + marvell,pins = "mpp36"; + marvell,function = "gpio"; + }; + + pmx_btn_copy: pmx-btn-copy { + marvell,pins = "mpp37"; + marvell,function = "gpio"; + }; + + pmx_btn_power: pmx-btn-power { + marvell,pins = "mpp46"; + marvell,function = "gpio"; + }; + + pmx_led_copy_green: pmx-led-copy-green { + marvell,pins = "mpp39"; + marvell,function = "gpio"; + }; + + pmx_led_copy_red: pmx-led-copy-red { + marvell,pins = "mpp40"; + marvell,function = "gpio"; + }; }; serial@12000 { @@ -43,17 +68,42 @@ gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>; }; + gpio_keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_btn_reset &pmx_btn_copy &pmx_btn_power>; + pinctrl-names = "default"; + + button@1 { + label = "Power Button"; + linux,code = <KEY_POWER>; + gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; + }; + button@2 { + label = "Copy Button"; + linux,code = <KEY_COPY>; + gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; + }; + button@3 { + label = "Reset Button"; + linux,code = <KEY_RESTART>; + gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + }; + }; + + regulators { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <0>; - pinctrl-0 = <&pmx_usb_power_off>; + pinctrl-0 = <&pmx_usb_power>; pinctrl-names = "default"; - usb0_power_off: regulator@1 { + usb0_power: regulator@1 { compatible = "regulator-fixed"; reg = <1>; - regulator-name = "USB Power Off"; + regulator-name = "USB Power"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-always-on; diff --git a/arch/arm/boot/dts/kirkwood-openblocks_a6.dts b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts index b88da9392c32..fb9dc227255d 100644 --- a/arch/arm/boot/dts/kirkwood-openblocks_a6.dts +++ b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts @@ -14,19 +14,16 @@ chosen { bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; }; ocp@f1000000 { serial@12000 { - status = "ok"; - pinctrl-0 = <&pmx_uart0>; - pinctrl-names = "default"; + status = "okay"; }; serial@12100 { - status = "ok"; - pinctrl-0 = <&pmx_uart1>; - pinctrl-names = "default"; + status = "okay"; }; sata@80000 { @@ -36,16 +33,14 @@ i2c@11100 { status = "okay"; - pinctrl-0 = <&pmx_twsi1>; - pinctrl-names = "default"; s35390a: s35390a@30 { - compatible = "s35390a"; + compatible = "sii,s35390a"; reg = <0x30>; }; }; - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pinctrl-0 = <&pmx_dip_switches &pmx_gpio_header>; pinctrl-names = "default"; @@ -133,8 +128,6 @@ &nand { chip-delay = <25>; status = "okay"; - pinctrl-0 = <&pmx_nand>; - pinctrl-names = "default"; partition@0 { label = "uboot"; diff --git a/arch/arm/boot/dts/kirkwood-openblocks_a7.dts b/arch/arm/boot/dts/kirkwood-openblocks_a7.dts index b2f7cae06839..d5e3bc518968 100644 --- a/arch/arm/boot/dts/kirkwood-openblocks_a7.dts +++ b/arch/arm/boot/dts/kirkwood-openblocks_a7.dts @@ -26,19 +26,16 @@ chosen { bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; }; ocp@f1000000 { serial@12000 { - status = "ok"; - pinctrl-0 = <&pmx_uart0>; - pinctrl-names = "default"; + status = "okay"; }; serial@12100 { - status = "ok"; - pinctrl-0 = <&pmx_uart1>; - pinctrl-names = "default"; + status = "okay"; }; sata@80000 { @@ -48,16 +45,14 @@ i2c@11100 { status = "okay"; - pinctrl-0 = <&pmx_twsi1>; - pinctrl-names = "default"; s24c02: s24c02@50 { - compatible = "24c02"; + compatible = "atmel,24c02"; reg = <0x50>; }; }; - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pinctrl-0 = <&pmx_dip_switches &pmx_gpio_header>; pinctrl-names = "default"; @@ -109,13 +104,6 @@ marvell,pins = "mpp41", "mpp42", "mpp43"; marvell,function = "gpio"; }; - - pmx_ge1: pmx-ge1 { - marvell,pins = "mpp20", "mpp21", "mpp22", "mpp23", - "mpp24", "mpp25", "mpp26", "mpp27", - "mpp30", "mpp31", "mpp32", "mpp33"; - marvell,function = "ge1"; - }; }; }; @@ -158,8 +146,6 @@ &nand { chip-delay = <25>; status = "okay"; - pinctrl-0 = <&pmx_nand>; - pinctrl-names = "default"; partition@0 { label = "uboot"; @@ -213,8 +199,6 @@ ð1 { status = "okay"; - pinctrl-0 = <&pmx_ge1>; - pinctrl-names = "default"; ethernet1-port@0 { phy-handle = <ðphy1>; }; diff --git a/arch/arm/boot/dts/kirkwood-rd88f6192.dts b/arch/arm/boot/dts/kirkwood-rd88f6192.dts index e9dd85049297..35a29dee8dd8 100644 --- a/arch/arm/boot/dts/kirkwood-rd88f6192.dts +++ b/arch/arm/boot/dts/kirkwood-rd88f6192.dts @@ -26,6 +26,7 @@ chosen { bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; }; mbus { @@ -39,7 +40,7 @@ }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pinctrl-0 = <&pmx_usb_power>; pinctrl-names = "default"; @@ -56,8 +57,6 @@ spi@10600 { status = "okay"; - pinctrl-0 = <&pmx_spi>; - pinctrl-names = "default"; m25p128@0 { #address-cells = <1>; diff --git a/arch/arm/boot/dts/kirkwood-rd88f6281.dtsi b/arch/arm/boot/dts/kirkwood-rd88f6281.dtsi index d6368c39102e..26cf0e0ccefd 100644 --- a/arch/arm/boot/dts/kirkwood-rd88f6281.dtsi +++ b/arch/arm/boot/dts/kirkwood-rd88f6281.dtsi @@ -22,6 +22,7 @@ chosen { bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; }; mbus { @@ -35,7 +36,7 @@ }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pinctrl-0 = <&pmx_sdio_cd>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/kirkwood-rs212.dts b/arch/arm/boot/dts/kirkwood-rs212.dts index 93ec3d00c6ab..3b19f1fd4cac 100644 --- a/arch/arm/boot/dts/kirkwood-rs212.dts +++ b/arch/arm/boot/dts/kirkwood-rs212.dts @@ -24,6 +24,7 @@ chosen { bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; }; gpio-fan-100-15-35-3 { diff --git a/arch/arm/boot/dts/kirkwood-rs409.dts b/arch/arm/boot/dts/kirkwood-rs409.dts index 311df4e5aa28..921ca49e85a4 100644 --- a/arch/arm/boot/dts/kirkwood-rs409.dts +++ b/arch/arm/boot/dts/kirkwood-rs409.dts @@ -24,6 +24,7 @@ chosen { bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; }; gpio-fan-150-15-18 { diff --git a/arch/arm/boot/dts/kirkwood-rs411.dts b/arch/arm/boot/dts/kirkwood-rs411.dts index f90da850bb31..02852b0c809f 100644 --- a/arch/arm/boot/dts/kirkwood-rs411.dts +++ b/arch/arm/boot/dts/kirkwood-rs411.dts @@ -24,6 +24,7 @@ chosen { bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; }; gpio-fan-100-15-35-3 { diff --git a/arch/arm/boot/dts/kirkwood-sheevaplug-common.dtsi b/arch/arm/boot/dts/kirkwood-sheevaplug-common.dtsi index 1ff848d570a9..7196c7f3e109 100644 --- a/arch/arm/boot/dts/kirkwood-sheevaplug-common.dtsi +++ b/arch/arm/boot/dts/kirkwood-sheevaplug-common.dtsi @@ -17,10 +17,11 @@ chosen { bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pmx_usb_power_enable: pmx-usb-power-enable { marvell,pins = "mpp29"; @@ -44,8 +45,6 @@ }; }; serial@12000 { - pinctrl-0 = <&pmx_uart0>; - pinctrl-names = "default"; status = "okay"; }; }; @@ -72,8 +71,6 @@ }; &nand { - pinctrl-0 = <&pmx_nand>; - pinctrl-names = "default"; status = "okay"; partition@0 { diff --git a/arch/arm/boot/dts/kirkwood-synology.dtsi b/arch/arm/boot/dts/kirkwood-synology.dtsi index 4227c974729d..811e0971fc58 100644 --- a/arch/arm/boot/dts/kirkwood-synology.dtsi +++ b/arch/arm/boot/dts/kirkwood-synology.dtsi @@ -25,7 +25,7 @@ }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pmx_alarmled_12: pmx-alarmled-12 { marvell,pins = "mpp12"; marvell,function = "gpio"; @@ -213,8 +213,6 @@ spi@10600 { status = "okay"; - pinctrl-0 = <&pmx_spi>; - pinctrl-names = "default"; m25p80@0 { #address-cells = <1>; @@ -259,8 +257,6 @@ i2c@11000 { status = "okay"; clock-frequency = <400000>; - pinctrl-0 = <&pmx_twsi0>; - pinctrl-names = "default"; rs5c372: rs5c372@32 { status = "disabled"; @@ -277,14 +273,10 @@ serial@12000 { status = "okay"; - pinctrl-0 = <&pmx_uart0>; - pinctrl-names = "default"; }; serial@12100 { status = "okay"; - pinctrl-0 = <&pmx_uart1>; - pinctrl-names = "default"; }; poweroff@12100 { diff --git a/arch/arm/boot/dts/kirkwood-t5325.dts b/arch/arm/boot/dts/kirkwood-t5325.dts index 7d1c7677a18f..610ec0f95858 100644 --- a/arch/arm/boot/dts/kirkwood-t5325.dts +++ b/arch/arm/boot/dts/kirkwood-t5325.dts @@ -27,6 +27,7 @@ chosen { bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; }; mbus { @@ -40,7 +41,7 @@ }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pinctrl-0 = <&pmx_i2s &pmx_sysrst>; pinctrl-names = "default"; @@ -64,10 +65,6 @@ marvell,function = "gpio"; }; - /* - * Redefined from kirkwood-6281.dtsi, because - * we don't use SPI CS on MPP0, but on MPP7. - */ pmx_spi: pmx-spi { marvell,pins = "mpp1", "mpp2", "mpp3", "mpp7"; marvell,function = "spi"; @@ -86,8 +83,6 @@ }; spi@10600 { - pinctrl-0 = <&pmx_spi>; - pinctrl-names = "default"; status = "okay"; flash@0 { @@ -131,6 +126,9 @@ alc5621: alc5621@1a { compatible = "realtek,alc5621"; reg = <0x1a>; + #sound-dai-cells = <0>; + add-ctrl = <0x3700>; + jack-det-ctrl = <0x4810>; }; }; @@ -189,6 +187,31 @@ gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; }; + sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,routing = + "Headphone Jack", "HPL", + "Headphone Jack", "HPR", + "Speaker", "SPKOUT", + "Speaker", "SPKOUTN", + "MIC1", "Mic Jack", + "MIC2", "Mic Jack"; + simple-audio-card,widgets = + "Headphone", "Headphone Jack", + "Speaker", "Speaker", + "Microphone", "Mic Jack"; + + simple-audio-card,mclk-fs = <256>; + + simple-audio-card,cpu { + sound-dai = <&audio>; + }; + + simple-audio-card,codec { + sound-dai = <&alc5621>; + }; + }; }; &mdio { diff --git a/arch/arm/boot/dts/kirkwood-topkick.dts b/arch/arm/boot/dts/kirkwood-topkick.dts index 5fc817c2cb87..f5c8c0dd41dc 100644 --- a/arch/arm/boot/dts/kirkwood-topkick.dts +++ b/arch/arm/boot/dts/kirkwood-topkick.dts @@ -14,10 +14,11 @@ chosen { bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { /* * Switch positions * @@ -85,9 +86,7 @@ }; serial@12000 { - status = "ok"; - pinctrl-0 = <&pmx_uart0>; - pinctrl-names = "default"; + status = "okay"; }; sata@80000 { @@ -96,9 +95,7 @@ }; i2c@11000 { - status = "ok"; - pinctrl-0 = <&pmx_twsi0>; - pinctrl-names = "default"; + status = "okay"; }; mvsdio@90000 { @@ -175,8 +172,6 @@ &nand { status = "okay"; - pinctrl-0 = <&pmx_nand>; - pinctrl-names = "default"; partition@0 { label = "u-boot"; diff --git a/arch/arm/boot/dts/kirkwood-ts219-6281.dts b/arch/arm/boot/dts/kirkwood-ts219-6281.dts index c17ae45e19be..9767d73f3857 100644 --- a/arch/arm/boot/dts/kirkwood-ts219-6281.dts +++ b/arch/arm/boot/dts/kirkwood-ts219-6281.dts @@ -6,7 +6,7 @@ / { ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pinctrl-0 = <&pmx_ram_size &pmx_board_id>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/kirkwood-ts219-6282.dts b/arch/arm/boot/dts/kirkwood-ts219-6282.dts index 0713d072758a..bfc1a32d4e42 100644 --- a/arch/arm/boot/dts/kirkwood-ts219-6282.dts +++ b/arch/arm/boot/dts/kirkwood-ts219-6282.dts @@ -16,7 +16,7 @@ }; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pinctrl-0 = <&pmx_ram_size &pmx_board_id>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/kirkwood-ts219.dtsi b/arch/arm/boot/dts/kirkwood-ts219.dtsi index 911f3a8cee23..df7f15276575 100644 --- a/arch/arm/boot/dts/kirkwood-ts219.dtsi +++ b/arch/arm/boot/dts/kirkwood-ts219.dtsi @@ -9,6 +9,7 @@ chosen { bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; }; mbus { @@ -25,8 +26,6 @@ i2c@11000 { status = "okay"; clock-frequency = <400000>; - pinctrl-0 = <&pmx_twsi0>; - pinctrl-names = "default"; s35390a: s35390a@30 { compatible = "s35390a"; @@ -34,16 +33,10 @@ }; }; serial@12000 { - clock-frequency = <200000000>; status = "okay"; - pinctrl-0 = <&pmx_uart0>; - pinctrl-names = "default"; }; serial@12100 { - clock-frequency = <200000000>; status = "okay"; - pinctrl-0 = <&pmx_uart1>; - pinctrl-names = "default"; }; poweroff@12100 { compatible = "qnap,power-off"; @@ -52,8 +45,6 @@ }; spi@10600 { status = "okay"; - pinctrl-0 = <&pmx_spi>; - pinctrl-names = "default"; m25p128@0 { #address-cells = <1>; diff --git a/arch/arm/boot/dts/kirkwood-ts419.dtsi b/arch/arm/boot/dts/kirkwood-ts419.dtsi index 1a9c624c7a92..30ab93bfb1e4 100644 --- a/arch/arm/boot/dts/kirkwood-ts419.dtsi +++ b/arch/arm/boot/dts/kirkwood-ts419.dtsi @@ -14,7 +14,7 @@ compatible = "qnap,ts419", "marvell,kirkwood"; ocp@f1000000 { - pinctrl: pinctrl@10000 { + pinctrl: pin-controller@10000 { pinctrl-names = "default"; pmx_USB_copy_button: pmx-USB-copy-button { diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi index 90384587c278..afc640cd80c5 100644 --- a/arch/arm/boot/dts/kirkwood.dtsi +++ b/arch/arm/boot/dts/kirkwood.dtsi @@ -40,7 +40,7 @@ pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */ pcie-io-aperture = <0xf2000000 0x100000>; /* 1 MiB I/O space */ - crypto@0301 { + cesa: crypto@0301 { compatible = "marvell,orion-crypto"; reg = <MBUS_ID(0xf0, 0x01) 0x30000 0x10000>, <MBUS_ID(0x03, 0x01) 0 0x800>; @@ -61,6 +61,8 @@ chip-delay = <25>; /* set partition map and/or chip-delay in board dts */ clocks = <&gate_clk 7>; + pinctrl-0 = <&pmx_nand>; + pinctrl-names = "default"; status = "disabled"; }; }; @@ -71,13 +73,59 @@ #address-cells = <1>; #size-cells = <1>; + pinctrl: pin-controller@10000 { + /* set compatible property in SoC file */ + reg = <0x10000 0x20>; + + pmx_ge1: pmx-ge1 { + marvell,pins = "mpp20", "mpp21", "mpp22", "mpp23", + "mpp24", "mpp25", "mpp26", "mpp27", + "mpp30", "mpp31", "mpp32", "mpp33"; + marvell,function = "ge1"; + }; + + pmx_nand: pmx-nand { + marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", + "mpp4", "mpp5", "mpp18", "mpp19"; + marvell,function = "nand"; + }; + + /* + * Default SPI0 pinctrl setting with CSn on mpp0, + * overwrite marvell,pins on board level if required. + */ + pmx_spi: pmx-spi { + marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3"; + marvell,function = "spi"; + }; + + pmx_twsi0: pmx-twsi0 { + marvell,pins = "mpp8", "mpp9"; + marvell,function = "twsi0"; + }; + + /* + * Default UART pinctrl setting without RTS/CTS, + * overwrite marvell,pins on board level if required. + */ + pmx_uart0: pmx-uart0 { + marvell,pins = "mpp10", "mpp11"; + marvell,function = "uart0"; + }; + + pmx_uart1: pmx-uart1 { + marvell,pins = "mpp13", "mpp14"; + marvell,function = "uart1"; + }; + }; + core_clk: core-clocks@10030 { compatible = "marvell,kirkwood-core-clock"; reg = <0x10030 0x4>; #clock-cells = <1>; }; - spi@10600 { + spi0: spi@10600 { compatible = "marvell,orion-spi"; #address-cells = <1>; #size-cells = <0>; @@ -85,6 +133,8 @@ interrupts = <23>; reg = <0x10600 0x28>; clocks = <&gate_clk 7>; + pinctrl-0 = <&pmx_spi>; + pinctrl-names = "default"; status = "disabled"; }; @@ -120,24 +170,30 @@ interrupts = <29>; clock-frequency = <100000>; clocks = <&gate_clk 7>; + pinctrl-0 = <&pmx_twsi0>; + pinctrl-names = "default"; status = "disabled"; }; - serial@12000 { + uart0: serial@12000 { compatible = "ns16550a"; reg = <0x12000 0x100>; reg-shift = <2>; interrupts = <33>; clocks = <&gate_clk 7>; + pinctrl-0 = <&pmx_uart0>; + pinctrl-names = "default"; status = "disabled"; }; - serial@12100 { + uart1: serial@12100 { compatible = "ns16550a"; reg = <0x12100 0x100>; reg-shift = <2>; interrupts = <34>; clocks = <&gate_clk 7>; + pinctrl-0 = <&pmx_uart1>; + pinctrl-names = "default"; status = "disabled"; }; @@ -146,7 +202,7 @@ reg = <0x20000 0x80>, <0x1500 0x20>; }; - system-controller@20000 { + sysc: system-controller@20000 { compatible = "marvell,orion-system-controller"; reg = <0x20000 0x120>; }; @@ -196,7 +252,7 @@ status = "okay"; }; - ehci@50000 { + usb0: ehci@50000 { compatible = "marvell,orion-ehci"; reg = <0x50000 0x1000>; interrupts = <19>; @@ -204,7 +260,7 @@ status = "okay"; }; - xor@60800 { + dma0: xor@60800 { compatible = "marvell,orion-xor"; reg = <0x60800 0x100 0x60A00 0x100>; @@ -224,7 +280,7 @@ }; }; - xor@60900 { + dma1: xor@60900 { compatible = "marvell,orion-xor"; reg = <0x60900 0x100 0x60B00 0x100>; @@ -282,6 +338,8 @@ reg = <0x76000 0x4000>; clocks = <&gate_clk 19>; marvell,tx-checksum-limit = <1600>; + pinctrl-0 = <&pmx_ge1>; + pinctrl-names = "default"; status = "disabled"; ethernet1-port@0 { @@ -314,6 +372,7 @@ audio0: audio-controller@a0000 { compatible = "marvell,kirkwood-audio"; + #sound-dai-cells = <0>; reg = <0xa0000 0x2210>; interrupts = <24>; clocks = <&gate_clk 9>; diff --git a/arch/arm/boot/dts/omap3-beagle-xm-ab.dts b/arch/arm/boot/dts/omap3-beagle-xm-ab.dts new file mode 100644 index 000000000000..7ac3bcf59d59 --- /dev/null +++ b/arch/arm/boot/dts/omap3-beagle-xm-ab.dts @@ -0,0 +1,16 @@ +/* + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "omap3-beagle-xm.dts" + +/ { + /* HS USB Port 2 Power enable was inverted with the xM C */ + hsusb2_power: hsusb2_power_reg { + enable-active-high; + }; +}; diff --git a/arch/arm/boot/dts/omap3-devkit8000.dts b/arch/arm/boot/dts/omap3-devkit8000.dts index bf5a515a3247..da402f0fdab4 100644 --- a/arch/arm/boot/dts/omap3-devkit8000.dts +++ b/arch/arm/boot/dts/omap3-devkit8000.dts @@ -112,7 +112,6 @@ reg = <0 0 0>; /* CS0, offset 0 */ nand-bus-width = <16>; - gpmc,device-nand; gpmc,sync-clk-ps = <0>; gpmc,cs-on-ns = <0>; gpmc,cs-rd-off-ns = <44>; diff --git a/arch/arm/boot/dts/omap3-lilly-a83x.dtsi b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi index 6369d9f43ca2..cc1dce6978f5 100644 --- a/arch/arm/boot/dts/omap3-lilly-a83x.dtsi +++ b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi @@ -368,7 +368,6 @@ /* no elm on omap3 */ gpmc,mux-add-data = <0>; - gpmc,device-nand; gpmc,device-width = <2>; gpmc,wait-pin = <0>; gpmc,wait-monitoring-ns = <0>; diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index 5e5790f631eb..acb9019dc437 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -74,7 +74,7 @@ /* * XXX: Use a flat representation of the OMAP3 interconnect. * The real OMAP interconnect network is quite complex. - * Since that will not bring real advantage to represent that in DT for + * Since it will not bring real advantage to represent that in DT for * the moment, just use a fake OCP bus entry to represent the whole bus * hierarchy. */ diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 27fcac874742..649b5cd38b40 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -72,7 +72,7 @@ }; /* - * The soc node represents the soc top level view. It is uses for IPs + * The soc node represents the soc top level view. It is used for IPs * that are not memory mapped in the MPU view or for the MPU itself. */ soc { @@ -96,7 +96,7 @@ /* * XXX: Use a flat representation of the OMAP4 interconnect. * The real OMAP interconnect network is quite complex. - * Since that will not bring real advantage to represent that in DT for + * Since it will not bring real advantage to represent that in DT for * the moment, just use a fake OCP bus entry to represent the whole bus * hierarchy. */ diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 6f3de22fb266..f8c9855ce587 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -93,7 +93,7 @@ }; /* - * The soc node represents the soc top level view. It is uses for IPs + * The soc node represents the soc top level view. It is used for IPs * that are not memory mapped in the MPU view or for the MPU itself. */ soc { @@ -107,7 +107,7 @@ /* * XXX: Use a flat representation of the OMAP3 interconnect. * The real OMAP interconnect network is quite complex. - * Since that will not bring real advantage to represent that in DT for + * Since it will not bring real advantage to represent that in DT for * the moment, just use a fake OCP bus entry to represent the whole bus * hierarchy. */ @@ -813,6 +813,12 @@ <0x4a084c00 0x40>; reg-names = "phy_rx", "phy_tx", "pll_ctrl"; ctrl-module = <&omap_control_usb3phy>; + clocks = <&usb_phy_cm_clk32k>, + <&sys_clkin>, + <&usb_otg_ss_refclk960m>; + clock-names = "wkupclk", + "sysclk", + "refclk"; #phy-cells = <0>; }; }; diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts index 13ac3e222495..92320c4a7668 100644 --- a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts @@ -3,4 +3,17 @@ / { model = "Qualcomm APQ8074 Dragonboard"; compatible = "qcom,apq8074-dragonboard", "qcom,apq8074"; + + soc: soc { + sdhci@f9824900 { + bus-width = <8>; + non-removable; + status = "ok"; + }; + + sdhci@f98a4900 { + cd-gpios = <&msmgpio 62 0x1>; + bus-width = <4>; + }; + }; }; diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index f68723918b3f..c530a33a10a0 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -192,11 +192,62 @@ clock-names = "core", "iface"; }; + sdhci@f9824900 { + compatible = "qcom,sdhci-msm-v4"; + reg = <0xf9824900 0x11c>, <0xf9824000 0x800>; + reg-names = "hc_mem", "core_mem"; + interrupts = <0 123 0>, <0 138 0>; + interrupt-names = "hc_irq", "pwr_irq"; + clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + + sdhci@f98a4900 { + compatible = "qcom,sdhci-msm-v4"; + reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>; + reg-names = "hc_mem", "core_mem"; + interrupts = <0 125 0>, <0 221 0>; + interrupt-names = "hc_irq", "pwr_irq"; + clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + rng@f9bff000 { compatible = "qcom,prng"; reg = <0xf9bff000 0x200>; clocks = <&gcc GCC_PRNG_AHB_CLK>; clock-names = "core"; }; + + msmgpio: pinctrl@fd510000 { + compatible = "qcom,msm8974-pinctrl"; + reg = <0xfd510000 0x4000>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <0 208 0>; + + spi8_default: spi8_default { + mosi { + pins = "gpio45"; + function = "blsp_spi8"; + }; + miso { + pins = "gpio46"; + function = "blsp_spi8"; + }; + cs { + pins = "gpio47"; + function = "blsp_spi8"; + }; + clk { + pins = "gpio48"; + function = "blsp_spi8"; + }; + }; + }; }; }; diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi index 62d0211bd192..82c5ac825386 100644 --- a/arch/arm/boot/dts/r8a73a4.dtsi +++ b/arch/arm/boot/dts/r8a73a4.dtsi @@ -55,7 +55,6 @@ #interrupt-cells = <2>; interrupt-controller; reg = <0 0xe61c0000 0 0x200>; - interrupt-parent = <&gic>; interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>, <0 1 IRQ_TYPE_LEVEL_HIGH>, <0 2 IRQ_TYPE_LEVEL_HIGH>, @@ -95,7 +94,6 @@ #interrupt-cells = <2>; interrupt-controller; reg = <0 0xe61c0200 0 0x200>; - interrupt-parent = <&gic>; interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>, <0 33 IRQ_TYPE_LEVEL_HIGH>, <0 34 IRQ_TYPE_LEVEL_HIGH>, @@ -136,7 +134,6 @@ dma0: dma-controller@e6700020 { compatible = "renesas,shdma-r8a73a4"; reg = <0 0xe6700020 0 0x89e0>; - interrupt-parent = <&gic>; interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH 0 200 IRQ_TYPE_LEVEL_HIGH 0 201 IRQ_TYPE_LEVEL_HIGH @@ -171,7 +168,6 @@ compatible = "renesas,rcar-thermal"; reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>, <0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>; - interrupt-parent = <&gic>; interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>; }; @@ -180,7 +176,6 @@ #size-cells = <0>; compatible = "renesas,rmobile-iic"; reg = <0 0xe6500000 0 0x428>; - interrupt-parent = <&gic>; interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -190,7 +185,6 @@ #size-cells = <0>; compatible = "renesas,rmobile-iic"; reg = <0 0xe6510000 0 0x428>; - interrupt-parent = <&gic>; interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -200,7 +194,6 @@ #size-cells = <0>; compatible = "renesas,rmobile-iic"; reg = <0 0xe6520000 0 0x428>; - interrupt-parent = <&gic>; interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -210,7 +203,6 @@ #size-cells = <0>; compatible = "renesas,rmobile-iic"; reg = <0 0xe6530000 0 0x428>; - interrupt-parent = <&gic>; interrupts = <0 177 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -220,7 +212,6 @@ #size-cells = <0>; compatible = "renesas,rmobile-iic"; reg = <0 0xe6540000 0 0x428>; - interrupt-parent = <&gic>; interrupts = <0 178 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -230,7 +221,6 @@ #size-cells = <0>; compatible = "renesas,rmobile-iic"; reg = <0 0xe60b0000 0 0x428>; - interrupt-parent = <&gic>; interrupts = <0 179 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -240,7 +230,6 @@ #size-cells = <0>; compatible = "renesas,rmobile-iic"; reg = <0 0xe6550000 0 0x428>; - interrupt-parent = <&gic>; interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -250,7 +239,6 @@ #size-cells = <0>; compatible = "renesas,rmobile-iic"; reg = <0 0xe6560000 0 0x428>; - interrupt-parent = <&gic>; interrupts = <0 185 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -260,7 +248,6 @@ #size-cells = <0>; compatible = "renesas,rmobile-iic"; reg = <0 0xe6570000 0 0x428>; - interrupt-parent = <&gic>; interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -268,7 +255,6 @@ mmcif0: mmc@ee200000 { compatible = "renesas,sh-mmcif"; reg = <0 0xee200000 0 0x80>; - interrupt-parent = <&gic>; interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>; reg-io-width = <4>; status = "disabled"; @@ -277,7 +263,6 @@ mmcif1: mmc@ee220000 { compatible = "renesas,sh-mmcif"; reg = <0 0xee220000 0 0x80>; - interrupt-parent = <&gic>; interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>; reg-io-width = <4>; status = "disabled"; @@ -309,7 +294,6 @@ sdhi0: sd@ee100000 { compatible = "renesas,sdhi-r8a73a4"; reg = <0 0xee100000 0 0x100>; - interrupt-parent = <&gic>; interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>; cap-sd-highspeed; status = "disabled"; @@ -318,7 +302,6 @@ sdhi1: sd@ee120000 { compatible = "renesas,sdhi-r8a73a4"; reg = <0 0xee120000 0 0x100>; - interrupt-parent = <&gic>; interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>; cap-sd-highspeed; status = "disabled"; @@ -327,7 +310,6 @@ sdhi2: sd@ee140000 { compatible = "renesas,sdhi-r8a73a4"; reg = <0 0xee140000 0 0x100>; - interrupt-parent = <&gic>; interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>; cap-sd-highspeed; status = "disabled"; diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts index 95a849bf921f..486007d7ffe4 100644 --- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts +++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts @@ -11,6 +11,7 @@ /dts-v1/; #include "r8a7740.dtsi" #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/pwm/pwm.h> @@ -77,26 +78,26 @@ power-key { gpios = <&pfc 99 GPIO_ACTIVE_LOW>; - linux,code = <116>; + linux,code = <KEY_POWER>; label = "SW3"; gpio-key,wakeup; }; back-key { gpios = <&pfc 100 GPIO_ACTIVE_LOW>; - linux,code = <158>; + linux,code = <KEY_BACK>; label = "SW4"; }; menu-key { gpios = <&pfc 97 GPIO_ACTIVE_LOW>; - linux,code = <139>; + linux,code = <KEY_MENU>; label = "SW5"; }; home-key { gpios = <&pfc 98 GPIO_ACTIVE_LOW>; - linux,code = <102>; + linux,code = <KEY_HOME>; label = "SW6"; }; }; @@ -117,6 +118,16 @@ }; }; + i2c2: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "i2c-gpio"; + gpios = <&pfc 208 GPIO_ACTIVE_HIGH /* sda */ + &pfc 91 GPIO_ACTIVE_HIGH /* scl */ + >; + i2c-gpio,delay-us = <5>; + }; + backlight { compatible = "pwm-backlight"; pwms = <&tpu 2 33333 PWM_POLARITY_INVERTED>; @@ -147,6 +158,18 @@ }; }; +ðer { + pinctrl-0 = <ðer_pins>; + pinctrl-names = "default"; + + phy-handle = <&phy0>; + status = "ok"; + + phy0: ethernet-phy@0 { + reg = <0>; + }; +}; + &i2c0 { status = "okay"; touchscreen@55 { @@ -166,10 +189,23 @@ }; }; +&i2c2 { + status = "okay"; + rtc@30 { + compatible = "sii,s35390a"; + reg = <0x30>; + }; +}; + &pfc { pinctrl-0 = <&scifa1_pins>; pinctrl-names = "default"; + ether_pins: ether { + renesas,groups = "gether_mii", "gether_int"; + renesas,function = "gether"; + }; + scifa1_pins: serial1 { renesas,groups = "scifa1_data"; renesas,function = "scifa1"; diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi index 8280884bfa59..636251b2afb3 100644 --- a/arch/arm/boot/dts/r8a7740.dtsi +++ b/arch/arm/boot/dts/r8a7740.dtsi @@ -14,6 +14,7 @@ / { compatible = "renesas,r8a7740"; + interrupt-parent = <&gic>; cpus { #address-cells = <1>; @@ -28,7 +29,6 @@ gic: interrupt-controller@c2800000 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; - #address-cells = <1>; interrupt-controller; reg = <0xc2800000 0x1000>, <0xc2000000 0x1000>; @@ -49,7 +49,6 @@ <0xe6900020 1>, <0xe6900040 1>, <0xe6900060 1>; - interrupt-parent = <&gic>; interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH 0 149 IRQ_TYPE_LEVEL_HIGH 0 149 IRQ_TYPE_LEVEL_HIGH @@ -70,7 +69,6 @@ <0xe6900024 1>, <0xe6900044 1>, <0xe6900064 1>; - interrupt-parent = <&gic>; interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH 0 149 IRQ_TYPE_LEVEL_HIGH 0 149 IRQ_TYPE_LEVEL_HIGH @@ -91,7 +89,6 @@ <0xe6900028 1>, <0xe6900048 1>, <0xe6900068 1>; - interrupt-parent = <&gic>; interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH 0 149 IRQ_TYPE_LEVEL_HIGH 0 149 IRQ_TYPE_LEVEL_HIGH @@ -112,7 +109,6 @@ <0xe690002c 1>, <0xe690004c 1>, <0xe690006c 1>; - interrupt-parent = <&gic>; interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH 0 149 IRQ_TYPE_LEVEL_HIGH 0 149 IRQ_TYPE_LEVEL_HIGH @@ -123,12 +119,23 @@ 0 149 IRQ_TYPE_LEVEL_HIGH>; }; + ether: ethernet@e9a00000 { + compatible = "renesas,gether-r8a7740"; + reg = <0xe9a00000 0x800>, + <0xe9a01800 0x800>; + interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>; + /* clocks = <&mstp3_clks R8A7740_CLK_GETHER>; */ + phy-mode = "mii"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + i2c0: i2c@fff20000 { #address-cells = <1>; #size-cells = <0>; - compatible = "renesas,rmobile-iic"; + compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic"; reg = <0xfff20000 0x425>; - interrupt-parent = <&gic>; interrupts = <0 201 IRQ_TYPE_LEVEL_HIGH 0 202 IRQ_TYPE_LEVEL_HIGH 0 203 IRQ_TYPE_LEVEL_HIGH @@ -139,9 +146,8 @@ i2c1: i2c@e6c20000 { #address-cells = <1>; #size-cells = <0>; - compatible = "renesas,rmobile-iic"; + compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic"; reg = <0xe6c20000 0x425>; - interrupt-parent = <&gic>; interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH 0 71 IRQ_TYPE_LEVEL_HIGH 0 72 IRQ_TYPE_LEVEL_HIGH @@ -174,9 +180,8 @@ }; mmcif0: mmc@e6bd0000 { - compatible = "renesas,sh-mmcif"; + compatible = "renesas,mmcif-r8a7740", "renesas,sh-mmcif"; reg = <0xe6bd0000 0x100>; - interrupt-parent = <&gic>; interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH 0 57 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; @@ -185,7 +190,6 @@ sdhi0: sd@e6850000 { compatible = "renesas,sdhi-r8a7740"; reg = <0xe6850000 0x100>; - interrupt-parent = <&gic>; interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH 0 118 IRQ_TYPE_LEVEL_HIGH 0 119 IRQ_TYPE_LEVEL_HIGH>; @@ -197,7 +201,6 @@ sdhi1: sd@e6860000 { compatible = "renesas,sdhi-r8a7740"; reg = <0xe6860000 0x100>; - interrupt-parent = <&gic>; interrupts = <0 121 IRQ_TYPE_LEVEL_HIGH 0 122 IRQ_TYPE_LEVEL_HIGH 0 123 IRQ_TYPE_LEVEL_HIGH>; @@ -209,7 +212,6 @@ sdhi2: sd@e6870000 { compatible = "renesas,sdhi-r8a7740"; reg = <0xe6870000 0x100>; - interrupt-parent = <&gic>; interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH 0 126 IRQ_TYPE_LEVEL_HIGH 0 127 IRQ_TYPE_LEVEL_HIGH>; @@ -220,9 +222,8 @@ sh_fsi2: sound@fe1f0000 { #sound-dai-cells = <1>; - compatible = "renesas,sh_fsi2"; + compatible = "renesas,fsi2-r8a7740", "renesas,sh_fsi2"; reg = <0xfe1f0000 0x400>; - interrupt-parent = <&gic>; interrupts = <0 9 0x4>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts index 06cda19dac6a..f76f6ec01e19 100644 --- a/arch/arm/boot/dts/r8a7778-bockw-reference.dts +++ b/arch/arm/boot/dts/r8a7778-bockw-reference.dts @@ -109,4 +109,18 @@ pinctrl-0 = <&hspi0_pins>; pinctrl-names = "default"; status = "okay"; + + flash: flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spansion,s25fl008k"; + reg = <0>; + spi-max-frequency = <104000000>; + m25p,fast-read; + + partition@0 { + label = "data(spi)"; + reg = <0x00000000 0x00100000>; + }; + }; }; diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi index 85c5b3b99f5e..3af0a2187493 100644 --- a/arch/arm/boot/dts/r8a7778.dtsi +++ b/arch/arm/boot/dts/r8a7778.dtsi @@ -20,6 +20,7 @@ / { compatible = "renesas,r8a7778"; + interrupt-parent = <&gic>; cpus { cpu@0 { @@ -52,7 +53,6 @@ <0xfe780024 4>, <0xfe780044 4>, <0xfe780064 4>; - interrupt-parent = <&gic>; interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH 0 28 IRQ_TYPE_LEVEL_HIGH 0 29 IRQ_TYPE_LEVEL_HIGH @@ -63,7 +63,6 @@ gpio0: gpio@ffc40000 { compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar"; reg = <0xffc40000 0x2c>; - interrupt-parent = <&gic>; interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; @@ -75,7 +74,6 @@ gpio1: gpio@ffc41000 { compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar"; reg = <0xffc41000 0x2c>; - interrupt-parent = <&gic>; interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; @@ -87,7 +85,6 @@ gpio2: gpio@ffc42000 { compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar"; reg = <0xffc42000 0x2c>; - interrupt-parent = <&gic>; interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; @@ -99,7 +96,6 @@ gpio3: gpio@ffc43000 { compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar"; reg = <0xffc43000 0x2c>; - interrupt-parent = <&gic>; interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; @@ -111,7 +107,6 @@ gpio4: gpio@ffc44000 { compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar"; reg = <0xffc44000 0x2c>; - interrupt-parent = <&gic>; interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; @@ -130,7 +125,6 @@ #size-cells = <0>; compatible = "renesas,i2c-r8a7778"; reg = <0xffc70000 0x1000>; - interrupt-parent = <&gic>; interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -140,7 +134,6 @@ #size-cells = <0>; compatible = "renesas,i2c-r8a7778"; reg = <0xffc71000 0x1000>; - interrupt-parent = <&gic>; interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -150,7 +143,6 @@ #size-cells = <0>; compatible = "renesas,i2c-r8a7778"; reg = <0xffc72000 0x1000>; - interrupt-parent = <&gic>; interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -160,7 +152,6 @@ #size-cells = <0>; compatible = "renesas,i2c-r8a7778"; reg = <0xffc73000 0x1000>; - interrupt-parent = <&gic>; interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -168,7 +159,6 @@ mmcif: mmc@ffe4e000 { compatible = "renesas,sh-mmcif"; reg = <0xffe4e000 0x100>; - interrupt-parent = <&gic>; interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -176,7 +166,6 @@ sdhi0: sd@ffe4c000 { compatible = "renesas,sdhi-r8a7778"; reg = <0xffe4c000 0x100>; - interrupt-parent = <&gic>; interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>; cap-sd-highspeed; cap-sdio-irq; @@ -186,7 +175,6 @@ sdhi1: sd@ffe4d000 { compatible = "renesas,sdhi-r8a7778"; reg = <0xffe4d000 0x100>; - interrupt-parent = <&gic>; interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>; cap-sd-highspeed; cap-sdio-irq; @@ -196,7 +184,6 @@ sdhi2: sd@ffe4f000 { compatible = "renesas,sdhi-r8a7778"; reg = <0xffe4f000 0x100>; - interrupt-parent = <&gic>; interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; cap-sd-highspeed; cap-sdio-irq; @@ -204,26 +191,29 @@ }; hspi0: spi@fffc7000 { - compatible = "renesas,hspi"; + compatible = "renesas,hspi-r8a7778", "renesas,hspi"; reg = <0xfffc7000 0x18>; - interrupt-controller = <&gic>; interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; status = "disabled"; }; hspi1: spi@fffc8000 { - compatible = "renesas,hspi"; + compatible = "renesas,hspi-r8a7778", "renesas,hspi"; reg = <0xfffc8000 0x18>; - interrupt-controller = <&gic>; interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; status = "disabled"; }; hspi2: spi@fffc6000 { - compatible = "renesas,hspi"; + compatible = "renesas,hspi-r8a7778", "renesas,hspi"; reg = <0xfffc6000 0x18>; - interrupt-controller = <&gic>; interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts index 76f5eef7d1cc..b27c6373ff4d 100644 --- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts +++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts @@ -45,6 +45,7 @@ phy-mode = "mii"; interrupt-parent = <&irqpin0>; interrupts = <1 IRQ_TYPE_EDGE_FALLING>; + smsc,irq-push-pull; reg-io-width = <4>; vddvario-supply = <&fixedregulator3v3>; vdd33a-supply = <&fixedregulator3v3>; diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index d0561d4c7c46..b517c8e6b420 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -15,6 +15,7 @@ / { compatible = "renesas,r8a7779"; + interrupt-parent = <&gic>; cpus { #address-cells = <1>; @@ -59,7 +60,6 @@ gpio0: gpio@ffc40000 { compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar"; reg = <0xffc40000 0x2c>; - interrupt-parent = <&gic>; interrupts = <0 141 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; @@ -71,7 +71,6 @@ gpio1: gpio@ffc41000 { compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar"; reg = <0xffc41000 0x2c>; - interrupt-parent = <&gic>; interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; @@ -83,7 +82,6 @@ gpio2: gpio@ffc42000 { compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar"; reg = <0xffc42000 0x2c>; - interrupt-parent = <&gic>; interrupts = <0 143 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; @@ -95,7 +93,6 @@ gpio3: gpio@ffc43000 { compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar"; reg = <0xffc43000 0x2c>; - interrupt-parent = <&gic>; interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; @@ -107,7 +104,6 @@ gpio4: gpio@ffc44000 { compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar"; reg = <0xffc44000 0x2c>; - interrupt-parent = <&gic>; interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; @@ -119,7 +115,6 @@ gpio5: gpio@ffc45000 { compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar"; reg = <0xffc45000 0x2c>; - interrupt-parent = <&gic>; interrupts = <0 146 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; @@ -131,7 +126,6 @@ gpio6: gpio@ffc46000 { compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar"; reg = <0xffc46000 0x2c>; - interrupt-parent = <&gic>; interrupts = <0 147 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; @@ -150,7 +144,6 @@ <0xfe780024 4>, <0xfe780044 4>, <0xfe780064 4>; - interrupt-parent = <&gic>; interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH 0 28 IRQ_TYPE_LEVEL_HIGH 0 29 IRQ_TYPE_LEVEL_HIGH @@ -163,7 +156,6 @@ #size-cells = <0>; compatible = "renesas,i2c-r8a7779"; reg = <0xffc70000 0x1000>; - interrupt-parent = <&gic>; interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -173,7 +165,6 @@ #size-cells = <0>; compatible = "renesas,i2c-r8a7779"; reg = <0xffc71000 0x1000>; - interrupt-parent = <&gic>; interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -183,7 +174,6 @@ #size-cells = <0>; compatible = "renesas,i2c-r8a7779"; reg = <0xffc72000 0x1000>; - interrupt-parent = <&gic>; interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -193,7 +183,6 @@ #size-cells = <0>; compatible = "renesas,i2c-r8a7779"; reg = <0xffc73000 0x1000>; - interrupt-parent = <&gic>; interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -211,14 +200,12 @@ sata: sata@fc600000 { compatible = "renesas,rcar-sata"; reg = <0xfc600000 0x2000>; - interrupt-parent = <&gic>; interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>; }; sdhi0: sd@ffe4c000 { compatible = "renesas,sdhi-r8a7779"; reg = <0xffe4c000 0x100>; - interrupt-parent = <&gic>; interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>; cap-sd-highspeed; cap-sdio-irq; @@ -228,7 +215,6 @@ sdhi1: sd@ffe4d000 { compatible = "renesas,sdhi-r8a7779"; reg = <0xffe4d000 0x100>; - interrupt-parent = <&gic>; interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>; cap-sd-highspeed; cap-sdio-irq; @@ -238,7 +224,6 @@ sdhi2: sd@ffe4e000 { compatible = "renesas,sdhi-r8a7779"; reg = <0xffe4e000 0x100>; - interrupt-parent = <&gic>; interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; cap-sd-highspeed; cap-sdio-irq; @@ -248,7 +233,6 @@ sdhi3: sd@ffe4f000 { compatible = "renesas,sdhi-r8a7779"; reg = <0xffe4f000 0x100>; - interrupt-parent = <&gic>; interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>; cap-sd-highspeed; cap-sdio-irq; @@ -256,26 +240,29 @@ }; hspi0: spi@fffc7000 { - compatible = "renesas,hspi"; + compatible = "renesas,hspi-r8a7779", "renesas,hspi"; reg = <0xfffc7000 0x18>; - interrupt-controller = <&gic>; interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; status = "disabled"; }; hspi1: spi@fffc8000 { - compatible = "renesas,hspi"; + compatible = "renesas,hspi-r8a7779", "renesas,hspi"; reg = <0xfffc8000 0x18>; - interrupt-controller = <&gic>; interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; status = "disabled"; }; hspi2: spi@fffc6000 { - compatible = "renesas,hspi"; + compatible = "renesas,hspi-r8a7779", "renesas,hspi"; reg = <0xfffc6000 0x18>; - interrupt-controller = <&gic>; interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts index 6e99eb2df076..86d676f62942 100644 --- a/arch/arm/boot/dts/r8a7790-lager.dts +++ b/arch/arm/boot/dts/r8a7790-lager.dts @@ -12,6 +12,7 @@ /dts-v1/; #include "r8a7790.dtsi" #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> / { model = "Lager"; @@ -36,6 +37,39 @@ #size-cells = <1>; }; + gpio_keys { + compatible = "gpio-keys"; + + button@1 { + linux,code = <KEY_1>; + label = "SW2-1"; + gpio-key,wakeup; + debounce-interval = <20>; + gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; + }; + button@2 { + linux,code = <KEY_2>; + label = "SW2-2"; + gpio-key,wakeup; + debounce-interval = <20>; + gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; + }; + button@3 { + linux,code = <KEY_3>; + label = "SW2-3"; + gpio-key,wakeup; + debounce-interval = <20>; + gpios = <&gpio1 26 GPIO_ACTIVE_LOW>; + }; + button@4 { + linux,code = <KEY_4>; + label = "SW2-4"; + gpio-key,wakeup; + debounce-interval = <20>; + gpios = <&gpio1 28 GPIO_ACTIVE_LOW>; + }; + }; + leds { compatible = "gpio-leds"; led6 { @@ -141,12 +175,12 @@ }; sdhi0_pins: sd0 { - renesas,gpios = "sdhi0_data4", "sdhi0_ctrl"; + renesas,groups = "sdhi0_data4", "sdhi0_ctrl"; renesas,function = "sdhi0"; }; sdhi2_pins: sd2 { - renesas,gpios = "sdhi2_data4", "sdhi2_ctrl"; + renesas,groups = "sdhi2_data4", "sdhi2_ctrl"; renesas,function = "sdhi2"; }; @@ -155,10 +189,16 @@ renesas,function = "mmc1"; }; - qspi_pins: spi { + qspi_pins: spi0 { renesas,groups = "qspi_ctrl", "qspi_data4"; renesas,function = "qspi"; }; + + msiof1_pins: spi2 { + renesas,groups = "msiof1_clk", "msiof1_sync", "msiof1_rx", + "msiof1_tx"; + renesas,function = "msiof1"; + }; }; ðer { @@ -173,6 +213,7 @@ reg = <1>; interrupt-parent = <&irqc0>; interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + micrel,led-mode = <1>; }; }; @@ -190,7 +231,7 @@ status = "okay"; }; -&spi { +&qspi { pinctrl-0 = <&qspi_pins>; pinctrl-names = "default"; @@ -202,6 +243,8 @@ compatible = "spansion,s25fl512s"; reg = <0>; spi-max-frequency = <30000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; m25p,fast-read; partition@0 { @@ -221,6 +264,22 @@ }; }; +&msiof1 { + pinctrl-0 = <&msiof1_pins>; + pinctrl-names = "default"; + + status = "okay"; + + pmic: pmic@0 { + compatible = "renesas,r2a11302ft"; + reg = <0>; + spi-max-frequency = <6000000>; + spi-cpol; + spi-cpha; + }; + +}; + &sdhi0 { pinctrl-0 = <&sdhi0_pins>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 618e5b537eaf..e6130d6ff28e 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -24,6 +24,15 @@ i2c1 = &i2c1; i2c2 = &i2c2; i2c3 = &i2c3; + i2c4 = &iic0; + i2c5 = &iic1; + i2c6 = &iic2; + i2c7 = &iic3; + spi0 = &qspi; + spi1 = &msiof0; + spi2 = &msiof1; + spi3 = &msiof2; + spi4 = &msiof3; }; cpus { @@ -108,6 +117,7 @@ gpio-ranges = <&pfc 0 0 32>; #interrupt-cells = <2>; interrupt-controller; + clocks = <&mstp9_clks R8A7790_CLK_GPIO0>; }; gpio1: gpio@e6051000 { @@ -119,6 +129,7 @@ gpio-ranges = <&pfc 0 32 32>; #interrupt-cells = <2>; interrupt-controller; + clocks = <&mstp9_clks R8A7790_CLK_GPIO1>; }; gpio2: gpio@e6052000 { @@ -130,6 +141,7 @@ gpio-ranges = <&pfc 0 64 32>; #interrupt-cells = <2>; interrupt-controller; + clocks = <&mstp9_clks R8A7790_CLK_GPIO2>; }; gpio3: gpio@e6053000 { @@ -141,6 +153,7 @@ gpio-ranges = <&pfc 0 96 32>; #interrupt-cells = <2>; interrupt-controller; + clocks = <&mstp9_clks R8A7790_CLK_GPIO3>; }; gpio4: gpio@e6054000 { @@ -152,6 +165,7 @@ gpio-ranges = <&pfc 0 128 32>; #interrupt-cells = <2>; interrupt-controller; + clocks = <&mstp9_clks R8A7790_CLK_GPIO4>; }; gpio5: gpio@e6055000 { @@ -163,6 +177,7 @@ gpio-ranges = <&pfc 0 160 32>; #interrupt-cells = <2>; interrupt-controller; + clocks = <&mstp9_clks R8A7790_CLK_GPIO5>; }; thermal@e61f0000 { @@ -231,6 +246,46 @@ status = "disabled"; }; + iic0: i2c@e6500000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic"; + reg = <0 0xe6500000 0 0x425>; + interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7790_CLK_IIC0>; + status = "disabled"; + }; + + iic1: i2c@e6510000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic"; + reg = <0 0xe6510000 0 0x425>; + interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7790_CLK_IIC1>; + status = "disabled"; + }; + + iic2: i2c@e6520000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic"; + reg = <0 0xe6520000 0 0x425>; + interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7790_CLK_IIC2>; + status = "disabled"; + }; + + iic3: i2c@e60b0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic"; + reg = <0 0xe60b0000 0 0x425>; + interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>; + status = "disabled"; + }; + mmcif0: mmcif@ee200000 { compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif"; reg = <0 0xee200000 0 0x80>; @@ -697,18 +752,19 @@ mstp3_clks: mstp3_clks@e615013c { compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; - clocks = <&cp_clk>, <&mmc1_clk>, <&sd3_clk>, <&sd2_clk>, - <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, - <&mmc0_clk>, <&rclk_clk>; + clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>, + <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>, + <&hp_clk>, <&hp_clk>, <&rclk_clk>; #clock-cells = <1>; renesas,clock-indices = < - R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3 - R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 - R8A7790_CLK_MMCIF0 R8A7790_CLK_CMT1 + R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3 + R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0 + R8A7790_CLK_IIC0 R8A7790_CLK_IIC1 R8A7790_CLK_CMT1 >; clock-output-names = - "tpu0", "mmcif1", "sdhi3", "sdhi2", - "sdhi1", "sdhi0", "mmcif0", "cmt1"; + "iic2", "tpu0", "mmcif1", "sdhi3", + "sdhi2", "sdhi1", "sdhi0", "mmcif0", + "iic0", "iic1", "cmt1"; }; mstp5_clks: mstp5_clks@e6150144 { compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; @@ -752,20 +808,25 @@ mstp9_clks: mstp9_clks@e6150994 { compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; - clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, - <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>; + clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, + <&cp_clk>, <&cp_clk>, <&cp_clk>, + <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, <&cp_clk>, + <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>; #clock-cells = <1>; renesas,clock-indices = < - R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD - R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1 - R8A7790_CLK_I2C0 + R8A7790_CLK_GPIO5 R8A7790_CLK_GPIO4 R8A7790_CLK_GPIO3 + R8A7790_CLK_GPIO2 R8A7790_CLK_GPIO1 R8A7790_CLK_GPIO0 + R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD R8A7790_CLK_IICDVFS + R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1 R8A7790_CLK_I2C0 >; clock-output-names = - "rcan1", "rcan0", "qspi_mod", "i2c3", "i2c2", "i2c1", "i2c0"; + "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0", + "rcan1", "rcan0", "qspi_mod", "iic3", + "i2c3", "i2c2", "i2c1", "i2c0"; }; }; - spi: spi@e6b10000 { + qspi: spi@e6b10000 { compatible = "renesas,qspi-r8a7790", "renesas,qspi"; reg = <0 0xe6b10000 0 0x2c>; interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>; @@ -775,4 +836,44 @@ #size-cells = <0>; status = "disabled"; }; + + msiof0: spi@e6e20000 { + compatible = "renesas,msiof-r8a7790"; + reg = <0 0xe6e20000 0 0x0064>; + interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + msiof1: spi@e6e10000 { + compatible = "renesas,msiof-r8a7790"; + reg = <0 0xe6e10000 0 0x0064>; + interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + msiof2: spi@e6e00000 { + compatible = "renesas,msiof-r8a7790"; + reg = <0 0xe6e00000 0 0x0064>; + interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + msiof3: spi@e6c90000 { + compatible = "renesas,msiof-r8a7790"; + reg = <0 0xe6c90000 0 0x0064>; + interrupts = <0 159 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; diff --git a/arch/arm/boot/dts/r8a7791-henninger.dts b/arch/arm/boot/dts/r8a7791-henninger.dts new file mode 100644 index 000000000000..cc6d992e8db2 --- /dev/null +++ b/arch/arm/boot/dts/r8a7791-henninger.dts @@ -0,0 +1,219 @@ +/* + * Device Tree Source for the Henninger board + * + * Copyright (C) 2014 Renesas Solutions Corp. + * Copyright (C) 2014 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/dts-v1/; +#include "r8a7791.dtsi" +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "Henninger"; + compatible = "renesas,henninger", "renesas,r8a7791"; + + aliases { + serial0 = &scif0; + }; + + chosen { + bootargs = "console=ttySC0,38400 ignore_loglevel rw root=/dev/nfs ip=dhcp"; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0 0x40000000 0 0x40000000>; + }; + + memory@200000000 { + device_type = "memory"; + reg = <2 0x00000000 0 0x40000000>; + }; + + vcc_sdhi0: regulator@0 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI0 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vccq_sdhi0: regulator@1 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI0 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; + + vcc_sdhi2: regulator@2 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI2 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vccq_sdhi2: regulator@3 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI2 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; +}; + +&extal_clk { + clock-frequency = <20000000>; +}; + +&pfc { + scif0_pins: serial0 { + renesas,groups = "scif0_data_d"; + renesas,function = "scif0"; + }; + + ether_pins: ether { + renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; + renesas,function = "eth"; + }; + + phy1_pins: phy1 { + renesas,groups = "intc_irq0"; + renesas,function = "intc"; + }; + + sdhi0_pins: sd0 { + renesas,groups = "sdhi0_data4", "sdhi0_ctrl"; + renesas,function = "sdhi0"; + }; + + sdhi2_pins: sd2 { + renesas,groups = "sdhi2_data4", "sdhi2_ctrl"; + renesas,function = "sdhi2"; + }; + + qspi_pins: spi0 { + renesas,groups = "qspi_ctrl", "qspi_data4"; + renesas,function = "qspi"; + }; + + msiof0_pins: spi1 { + renesas,groups = "msiof0_clk", "msiof0_sync", "msiof0_rx", + "msiof0_tx"; + renesas,function = "msiof0"; + }; +}; + +&scif0 { + pinctrl-0 = <&scif0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +ðer { + pinctrl-0 = <ðer_pins &phy1_pins>; + pinctrl-names = "default"; + + phy-handle = <&phy1>; + renesas,ether-link-active-low; + status = "ok"; + + phy1: ethernet-phy@1 { + reg = <1>; + interrupt-parent = <&irqc0>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + micrel,led-mode = <1>; + }; +}; + +&sata0 { + status = "okay"; +}; + +&sdhi0 { + pinctrl-0 = <&sdhi0_pins>; + pinctrl-names = "default"; + + vmmc-supply = <&vcc_sdhi0>; + vqmmc-supply = <&vccq_sdhi0>; + cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&sdhi2 { + pinctrl-0 = <&sdhi2_pins>; + pinctrl-names = "default"; + + vmmc-supply = <&vcc_sdhi2>; + vqmmc-supply = <&vccq_sdhi2>; + cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&qspi { + pinctrl-0 = <&qspi_pins>; + pinctrl-names = "default"; + + status = "okay"; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spansion,s25fl512s"; + reg = <0>; + spi-max-frequency = <30000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + m25p,fast-read; + + partition@0 { + label = "loader_prg"; + reg = <0x00000000 0x00040000>; + read-only; + }; + partition@40000 { + label = "user_prg"; + reg = <0x00040000 0x00400000>; + read-only; + }; + partition@440000 { + label = "flash_fs"; + reg = <0x00440000 0x03bc0000>; + }; + }; +}; + +&msiof0 { + pinctrl-0 = <&msiof0_pins>; + pinctrl-names = "default"; + + status = "okay"; + + pmic@0 { + compatible = "renesas,r2a11302ft"; + reg = <0>; + spi-max-frequency = <6000000>; + spi-cpol; + spi-cpha; + }; +}; diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts index bdd73e6657b2..0d69813def85 100644 --- a/arch/arm/boot/dts/r8a7791-koelsch.dts +++ b/arch/arm/boot/dts/r8a7791-koelsch.dts @@ -13,6 +13,7 @@ /dts-v1/; #include "r8a7791.dtsi" #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> / { model = "Koelsch"; @@ -40,51 +41,79 @@ gpio-keys { compatible = "gpio-keys"; + key-1 { + gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; + linux,code = <KEY_1>; + label = "SW2-1"; + gpio-key,wakeup; + debounce-interval = <20>; + }; + key-2 { + gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; + linux,code = <KEY_2>; + label = "SW2-2"; + gpio-key,wakeup; + debounce-interval = <20>; + }; + key-3 { + gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; + linux,code = <KEY_3>; + label = "SW2-3"; + gpio-key,wakeup; + debounce-interval = <20>; + }; + key-4 { + gpios = <&gpio5 3 GPIO_ACTIVE_LOW>; + linux,code = <KEY_4>; + label = "SW2-4"; + gpio-key,wakeup; + debounce-interval = <20>; + }; key-a { gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; - linux,code = <30>; + linux,code = <KEY_A>; label = "SW30"; gpio-key,wakeup; debounce-interval = <20>; }; key-b { gpios = <&gpio7 1 GPIO_ACTIVE_LOW>; - linux,code = <48>; + linux,code = <KEY_B>; label = "SW31"; gpio-key,wakeup; debounce-interval = <20>; }; key-c { gpios = <&gpio7 2 GPIO_ACTIVE_LOW>; - linux,code = <46>; + linux,code = <KEY_C>; label = "SW32"; gpio-key,wakeup; debounce-interval = <20>; }; key-d { gpios = <&gpio7 3 GPIO_ACTIVE_LOW>; - linux,code = <32>; + linux,code = <KEY_D>; label = "SW33"; gpio-key,wakeup; debounce-interval = <20>; }; key-e { gpios = <&gpio7 4 GPIO_ACTIVE_LOW>; - linux,code = <18>; + linux,code = <KEY_E>; label = "SW34"; gpio-key,wakeup; debounce-interval = <20>; }; key-f { gpios = <&gpio7 5 GPIO_ACTIVE_LOW>; - linux,code = <33>; + linux,code = <KEY_F>; label = "SW35"; gpio-key,wakeup; debounce-interval = <20>; }; key-g { gpios = <&gpio7 6 GPIO_ACTIVE_LOW>; - linux,code = <34>; + linux,code = <KEY_G>; label = "SW36"; gpio-key,wakeup; debounce-interval = <20>; @@ -195,11 +224,16 @@ }; }; +&i2c6 { + status = "okay"; + clock-frequency = <100000>; +}; + &pfc { pinctrl-0 = <&du_pins &scif0_pins &scif1_pins>; pinctrl-names = "default"; - i2c2_pins: i2c { + i2c2_pins: i2c2 { renesas,groups = "i2c2"; renesas,function = "i2c2"; }; @@ -230,24 +264,30 @@ }; sdhi0_pins: sd0 { - renesas,gpios = "sdhi0_data4", "sdhi0_ctrl"; + renesas,groups = "sdhi0_data4", "sdhi0_ctrl"; renesas,function = "sdhi0"; }; sdhi1_pins: sd1 { - renesas,gpios = "sdhi1_data4", "sdhi1_ctrl"; + renesas,groups = "sdhi1_data4", "sdhi1_ctrl"; renesas,function = "sdhi1"; }; sdhi2_pins: sd2 { - renesas,gpios = "sdhi2_data4", "sdhi2_ctrl"; + renesas,groups = "sdhi2_data4", "sdhi2_ctrl"; renesas,function = "sdhi2"; }; - qspi_pins: spi { + qspi_pins: spi0 { renesas,groups = "qspi_ctrl", "qspi_data4"; renesas,function = "qspi"; }; + + msiof0_pins: spi1 { + renesas,groups = "msiof0_clk", "msiof0_sync", "msiof0_rx", + "msiof0_tx"; + renesas,function = "msiof0"; + }; }; ðer { @@ -262,6 +302,7 @@ reg = <1>; interrupt-parent = <&irqc0>; interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + micrel,led-mode = <1>; }; }; @@ -301,7 +342,7 @@ status = "okay"; }; -&spi { +&qspi { pinctrl-0 = <&qspi_pins>; pinctrl-names = "default"; @@ -313,6 +354,8 @@ compatible = "spansion,s25fl512s"; reg = <0>; spi-max-frequency = <30000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; m25p,fast-read; partition@0 { @@ -331,3 +374,18 @@ }; }; }; + +&msiof0 { + pinctrl-0 = <&msiof0_pins>; + pinctrl-names = "default"; + + status = "okay"; + + pmic: pmic@0 { + compatible = "renesas,r2a11302ft"; + reg = <0>; + spi-max-frequency = <6000000>; + spi-cpol; + spi-cpha; + }; +}; diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 46181708e59c..5eea08fb3722 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -27,6 +27,13 @@ i2c3 = &i2c3; i2c4 = &i2c4; i2c5 = &i2c5; + i2c6 = &i2c6; + i2c7 = &i2c7; + i2c8 = &i2c8; + spi0 = &qspi; + spi1 = &msiof0; + spi2 = &msiof1; + spi3 = &msiof2; }; cpus { @@ -37,14 +44,14 @@ device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0>; - clock-frequency = <1300000000>; + clock-frequency = <1500000000>; }; cpu1: cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <1>; - clock-frequency = <1300000000>; + clock-frequency = <1500000000>; }; }; @@ -69,6 +76,7 @@ gpio-ranges = <&pfc 0 0 32>; #interrupt-cells = <2>; interrupt-controller; + clocks = <&mstp9_clks R8A7791_CLK_GPIO0>; }; gpio1: gpio@e6051000 { @@ -80,6 +88,7 @@ gpio-ranges = <&pfc 0 32 32>; #interrupt-cells = <2>; interrupt-controller; + clocks = <&mstp9_clks R8A7791_CLK_GPIO1>; }; gpio2: gpio@e6052000 { @@ -91,6 +100,7 @@ gpio-ranges = <&pfc 0 64 32>; #interrupt-cells = <2>; interrupt-controller; + clocks = <&mstp9_clks R8A7791_CLK_GPIO2>; }; gpio3: gpio@e6053000 { @@ -102,6 +112,7 @@ gpio-ranges = <&pfc 0 96 32>; #interrupt-cells = <2>; interrupt-controller; + clocks = <&mstp9_clks R8A7791_CLK_GPIO3>; }; gpio4: gpio@e6054000 { @@ -113,6 +124,7 @@ gpio-ranges = <&pfc 0 128 32>; #interrupt-cells = <2>; interrupt-controller; + clocks = <&mstp9_clks R8A7791_CLK_GPIO4>; }; gpio5: gpio@e6055000 { @@ -124,6 +136,7 @@ gpio-ranges = <&pfc 0 160 32>; #interrupt-cells = <2>; interrupt-controller; + clocks = <&mstp9_clks R8A7791_CLK_GPIO5>; }; gpio6: gpio@e6055400 { @@ -135,6 +148,7 @@ gpio-ranges = <&pfc 0 192 32>; #interrupt-cells = <2>; interrupt-controller; + clocks = <&mstp9_clks R8A7791_CLK_GPIO6>; }; gpio7: gpio@e6055800 { @@ -146,6 +160,7 @@ gpio-ranges = <&pfc 0 224 26>; #interrupt-cells = <2>; interrupt-controller; + clocks = <&mstp9_clks R8A7791_CLK_GPIO7>; }; thermal@e61f0000 { @@ -180,6 +195,7 @@ <0 17 IRQ_TYPE_LEVEL_HIGH>; }; + /* The memory map in the User's Manual maps the cores to bus numbers */ i2c0: i2c@e6508000 { #address-cells = <1>; #size-cells = <0>; @@ -231,6 +247,7 @@ }; i2c5: i2c@e6528000 { + /* doesn't need pinmux */ #address-cells = <1>; #size-cells = <0>; compatible = "renesas,i2c-r8a7791"; @@ -240,6 +257,37 @@ status = "disabled"; }; + i2c6: i2c@e60b0000 { + /* doesn't need pinmux */ + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic"; + reg = <0 0xe60b0000 0 0x425>; + interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp9_clks R8A7791_CLK_IICDVFS>; + status = "disabled"; + }; + + i2c7: i2c@e6500000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic"; + reg = <0 0xe6500000 0 0x425>; + interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7791_CLK_IIC0>; + status = "disabled"; + }; + + i2c8: i2c@e6510000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic"; + reg = <0 0xe6510000 0 0x425>; + interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp3_clks R8A7791_CLK_IIC1>; + status = "disabled"; + }; + pfc: pfc@e6060000 { compatible = "renesas,pfc-r8a7791"; reg = <0 0xe6060000 0 0x250>; @@ -249,7 +297,6 @@ sdhi0: sd@ee100000 { compatible = "renesas,sdhi-r8a7791"; reg = <0 0xee100000 0 0x200>; - interrupt-parent = <&gic>; interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp3_clks R8A7791_CLK_SDHI0>; status = "disabled"; @@ -258,7 +305,6 @@ sdhi1: sd@ee140000 { compatible = "renesas,sdhi-r8a7791"; reg = <0 0xee140000 0 0x100>; - interrupt-parent = <&gic>; interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp3_clks R8A7791_CLK_SDHI1>; status = "disabled"; @@ -267,7 +313,6 @@ sdhi2: sd@ee160000 { compatible = "renesas,sdhi-r8a7791"; reg = <0 0xee160000 0 0x100>; - interrupt-parent = <&gic>; interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp3_clks R8A7791_CLK_SDHI2>; status = "disabled"; @@ -712,15 +757,16 @@ mstp3_clks: mstp3_clks@e615013c { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; - clocks = <&cp_clk>, <&sd2_clk>, <&sd1_clk>, - <&cpg_clocks R8A7791_CLK_SD0>, <&mmc0_clk>, <&rclk_clk>; + clocks = <&cp_clk>, <&sd2_clk>, <&sd1_clk>, <&cpg_clocks R8A7791_CLK_SD0>, + <&mmc0_clk>, <&hp_clk>, <&hp_clk>, <&rclk_clk>; #clock-cells = <1>; renesas,clock-indices = < - R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1 - R8A7791_CLK_SDHI0 R8A7791_CLK_MMCIF0 R8A7791_CLK_CMT1 + R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1 R8A7791_CLK_SDHI0 + R8A7791_CLK_MMCIF0 R8A7791_CLK_IIC0 R8A7791_CLK_IIC1 R8A7791_CLK_CMT1 >; clock-output-names = - "tpu0", "sdhi2", "sdhi1", "sdhi0", "mmcif0", "cmt1"; + "tpu0", "sdhi2", "sdhi1", "sdhi0", + "mmcif0", "i2c7", "i2c8", "cmt1"; }; mstp5_clks: mstp5_clks@e6150144 { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; @@ -733,19 +779,19 @@ mstp7_clks: mstp7_clks@e615014c { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>; - clocks = <&mp_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>, + clocks = <&mp_clk>, <&mp_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>; #clock-cells = <1>; renesas,clock-indices = < - R8A7791_CLK_HSUSB R8A7791_CLK_HSCIF2 R8A7791_CLK_SCIF5 + R8A7791_CLK_EHCI R8A7791_CLK_HSUSB R8A7791_CLK_HSCIF2 R8A7791_CLK_SCIF5 R8A7791_CLK_SCIF4 R8A7791_CLK_HSCIF1 R8A7791_CLK_HSCIF0 R8A7791_CLK_SCIF3 R8A7791_CLK_SCIF2 R8A7791_CLK_SCIF1 R8A7791_CLK_SCIF0 R8A7791_CLK_DU1 R8A7791_CLK_DU0 R8A7791_CLK_LVDS0 >; clock-output-names = - "hsusb", "hscif2", "scif5", "scif4", "hscif1", "hscif0", + "ehci", "hsusb", "hscif2", "scif5", "scif4", "hscif1", "hscif0", "scif3", "scif2", "scif1", "scif0", "du1", "du0", "lvds0"; }; mstp8_clks: mstp8_clks@e6150990 { @@ -764,18 +810,23 @@ mstp9_clks: mstp9_clks@e6150994 { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; - clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, - <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, - <&p_clk>; + clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, + <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, + <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, <&hp_clk>, + <&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>, + <&hp_clk>, <&hp_clk>; #clock-cells = <1>; renesas,clock-indices = < - R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD - R8A7791_CLK_I2C5 R8A7791_CLK_I2C4 R8A7791_CLK_I2C3 - R8A7791_CLK_I2C2 R8A7791_CLK_I2C1 R8A7791_CLK_I2C0 + R8A7791_CLK_GPIO7 R8A7791_CLK_GPIO6 R8A7791_CLK_GPIO5 R8A7791_CLK_GPIO4 + R8A7791_CLK_GPIO3 R8A7791_CLK_GPIO2 R8A7791_CLK_GPIO1 R8A7791_CLK_GPIO0 + R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD R8A7791_CLK_I2C5 + R8A7791_CLK_IICDVFS R8A7791_CLK_I2C4 R8A7791_CLK_I2C3 R8A7791_CLK_I2C2 + R8A7791_CLK_I2C1 R8A7791_CLK_I2C0 >; clock-output-names = - "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c4", "i2c3", - "i2c2", "i2c1", "i2c0"; + "gpio7", "gpio6", "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0", + "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c6", "i2c4", "i2c3", "i2c2", + "i2c1", "i2c0"; }; mstp11_clks: mstp11_clks@e615099c { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; @@ -789,7 +840,7 @@ }; }; - spi: spi@e6b10000 { + qspi: spi@e6b10000 { compatible = "renesas,qspi-r8a7791", "renesas,qspi"; reg = <0 0xe6b10000 0 0x2c>; interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>; @@ -799,4 +850,34 @@ #size-cells = <0>; status = "disabled"; }; + + msiof0: spi@e6e20000 { + compatible = "renesas,msiof-r8a7791"; + reg = <0 0xe6e20000 0 0x0064>; + interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + msiof1: spi@e6e10000 { + compatible = "renesas,msiof-r8a7791"; + reg = <0 0xe6e10000 0 0x0064>; + interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + msiof2: spi@e6e00000 { + compatible = "renesas,msiof-r8a7791"; + reg = <0 0xe6e00000 0 0x0064>; + interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; diff --git a/arch/arm/boot/dts/rk3066a-bqcurie2.dts b/arch/arm/boot/dts/rk3066a-bqcurie2.dts index 035df4053c21..afb327322a4a 100644 --- a/arch/arm/boot/dts/rk3066a-bqcurie2.dts +++ b/arch/arm/boot/dts/rk3066a-bqcurie2.dts @@ -18,6 +18,7 @@ / { model = "bq Curie 2"; + compatible = "mundoreader,bq-curie2", "rockchip,rk3066a"; memory { reg = <0x60000000 0x40000000>; diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index 4d4dfbb59f4b..048c5de00551 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -79,7 +79,7 @@ pinctrl@20008000 { compatible = "rockchip,rk3066a-pinctrl"; - reg = <0x20008000 0x150>; + rockchip,grf = <&grf>; #address-cells = <1>; #size-cells = <1>; ranges; diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts index 3ba1968a70ab..a5eee55079cb 100644 --- a/arch/arm/boot/dts/rk3188-radxarock.dts +++ b/arch/arm/boot/dts/rk3188-radxarock.dts @@ -17,6 +17,7 @@ / { model = "Radxa Rock"; + compatible = "radxa,rock", "rockchip,rk3188"; memory { reg = <0x60000000 0x80000000>; diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index bb36596ea205..a494fb0cff64 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -75,17 +75,16 @@ pinctrl@20008000 { compatible = "rockchip,rk3188-pinctrl"; - reg = <0x20008000 0xa0>, - <0x20008164 0x1a0>; - reg-names = "base", "pull"; + rockchip,grf = <&grf>; + rockchip,pmu = <&pmu>; + #address-cells = <1>; #size-cells = <1>; ranges; gpio0: gpio0@0x2000a000 { compatible = "rockchip,rk3188-gpio-bank0"; - reg = <0x2000a000 0x100>, - <0x20004064 0x8>; + reg = <0x2000a000 0x100>; interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_gates8 9>; @@ -149,7 +148,7 @@ uart0 { uart0_xfer: uart0-xfer { - rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_none>, + rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_up>, <RK_GPIO1 1 RK_FUNC_1 &pcfg_pull_none>; }; @@ -164,7 +163,7 @@ uart1 { uart1_xfer: uart1-xfer { - rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_none>, + rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_up>, <RK_GPIO1 5 RK_FUNC_1 &pcfg_pull_none>; }; @@ -179,7 +178,7 @@ uart2 { uart2_xfer: uart2-xfer { - rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_none>, + rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_up>, <RK_GPIO1 9 RK_FUNC_1 &pcfg_pull_none>; }; /* no rts / cts for uart2 */ @@ -187,7 +186,7 @@ uart3 { uart3_xfer: uart3-xfer { - rockchip,pins = <RK_GPIO1 10 RK_FUNC_1 &pcfg_pull_none>, + rockchip,pins = <RK_GPIO1 10 RK_FUNC_1 &pcfg_pull_up>, <RK_GPIO1 11 RK_FUNC_1 &pcfg_pull_none>; }; diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index 26e5a968d49d..2adf1cc9e85d 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -31,11 +31,16 @@ reg = <0x1013c000 0x100>; }; - pmu@20004000 { - compatible = "rockchip,rk3066-pmu"; + pmu: pmu@20004000 { + compatible = "rockchip,rk3066-pmu", "syscon"; reg = <0x20004000 0x100>; }; + grf: grf@20008000 { + compatible = "syscon"; + reg = <0x20008000 0x200>; + }; + gic: interrupt-controller@1013d000 { compatible = "arm,cortex-a9-gic"; interrupt-controller; diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi index eabcfdbb403a..e0b15a6e8897 100644 --- a/arch/arm/boot/dts/sama5d3.dtsi +++ b/arch/arm/boot/dts/sama5d3.dtsi @@ -13,7 +13,7 @@ #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/clk/at91.h> +#include <dt-bindings/clock/at91.h> / { model = "Atmel SAMA5D3 family SoC"; @@ -58,6 +58,18 @@ reg = <0x20000000 0x8000000>; }; + slow_xtal: slow_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + main_xtal: main_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + clocks { adc_op_clk: adc_op_clk{ compatible = "fixed-clock"; @@ -113,6 +125,9 @@ compatible = "atmel,at91sam9g45-ssc"; reg = <0xf0008000 0x4000>; interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>; + dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(13)>, + <&dma0 2 AT91_DMA_CFG_PER_ID(14)>; + dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; clocks = <&ssc0_clk>; @@ -231,6 +246,9 @@ compatible = "atmel,at91sam9g45-ssc"; reg = <0xf800c000 0x4000>; interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>; + dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(3)>, + <&dma1 2 AT91_DMA_CFG_PER_ID(4)>; + dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; clocks = <&ssc1_clk>; @@ -577,6 +595,84 @@ }; }; + pwm0 { + pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 { + atmel,pins = + <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D4 and LCDDAT20 */ + }; + pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 { + atmel,pins = + <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX0 */ + }; + pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 { + atmel,pins = + <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D5 and LCDDAT21 */ + }; + pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 { + atmel,pins = + <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX1 */ + }; + + pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 { + atmel,pins = + <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D6 and LCDDAT22 */ + }; + pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 { + atmel,pins = + <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX0 */ + }; + pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 { + atmel,pins = + <AT91_PIOB 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with G125CKO and RTS1 */ + }; + pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 { + atmel,pins = + <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D7 and LCDDAT23 */ + }; + pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 { + atmel,pins = + <AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX1 */ + }; + pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 { + atmel,pins = + <AT91_PIOE 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with IRQ */ + }; + + pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 { + atmel,pins = + <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXCK */ + }; + pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 { + atmel,pins = + <AT91_PIOD 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA4 and TIOA0 */ + }; + pinctrl_pwm0_pwml2_0: pwm0_pwml2-0 { + atmel,pins = + <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXEN */ + }; + pinctrl_pwm0_pwml2_1: pwm0_pwml2-1 { + atmel,pins = + <AT91_PIOD 6 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA5 and TIOB0 */ + }; + + pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 { + atmel,pins = + <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXDV */ + }; + pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 { + atmel,pins = + <AT91_PIOD 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA6 and TCLK0 */ + }; + pinctrl_pwm0_pwml3_0: pwm0_pwml3-0 { + atmel,pins = + <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXER */ + }; + pinctrl_pwm0_pwml3_1: pwm0_pwml3-1 { + atmel,pins = + <AT91_PIOD 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA7 */ + }; + }; + spi0 { pinctrl_spi0: spi0-0 { atmel,pins = @@ -749,18 +845,29 @@ #size-cells = <0>; #interrupt-cells = <1>; - clk32k: slck { - compatible = "fixed-clock"; + main_rc_osc: main_rc_osc { + compatible = "atmel,at91sam9x5-clk-main-rc-osc"; #clock-cells = <0>; - clock-frequency = <32768>; + interrupt-parent = <&pmc>; + interrupts = <AT91_PMC_MOSCRCS>; + clock-frequency = <12000000>; + clock-accuracy = <50000000>; }; - main: mainck { - compatible = "atmel,at91rm9200-clk-main"; + main_osc: main_osc { + compatible = "atmel,at91rm9200-clk-main-osc"; #clock-cells = <0>; interrupt-parent = <&pmc>; interrupts = <AT91_PMC_MOSCS>; - clocks = <&clk32k>; + clocks = <&main_xtal>; + }; + + main: mainck { + compatible = "atmel,at91sam9x5-clk-main"; + #clock-cells = <0>; + interrupt-parent = <&pmc>; + interrupts = <AT91_PMC_MOSCSELS>; + clocks = <&main_rc_osc &main_osc>; }; plla: pllack { @@ -1089,6 +1196,32 @@ status = "disabled"; }; + sckc@fffffe50 { + compatible = "atmel,at91sam9x5-sckc"; + reg = <0xfffffe50 0x4>; + + slow_rc_osc: slow_rc_osc { + compatible = "atmel,at91sam9x5-clk-slow-rc-osc"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-accuracy = <50000000>; + atmel,startup-time-usec = <75>; + }; + + slow_osc: slow_osc { + compatible = "atmel,at91sam9x5-clk-slow-osc"; + #clock-cells = <0>; + clocks = <&slow_xtal>; + atmel,startup-time-usec = <1200000>; + }; + + clk32k: slowck { + compatible = "atmel,at91sam9x5-clk-slow"; + #clock-cells = <0>; + clocks = <&slow_rc_osc &slow_osc>; + }; + }; + rtc@fffffeb0 { compatible = "atmel,at91rm9200-rtc"; reg = <0xfffffeb0 0x30>; diff --git a/arch/arm/boot/dts/sama5d3_mci2.dtsi b/arch/arm/boot/dts/sama5d3_mci2.dtsi index b029fe7ef17a..1b02208ea6ff 100644 --- a/arch/arm/boot/dts/sama5d3_mci2.dtsi +++ b/arch/arm/boot/dts/sama5d3_mci2.dtsi @@ -9,7 +9,7 @@ #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/clk/at91.h> +#include <dt-bindings/clock/at91.h> / { ahb { diff --git a/arch/arm/boot/dts/sama5d3_tcb1.dtsi b/arch/arm/boot/dts/sama5d3_tcb1.dtsi index 382b04431f66..02848453ca0c 100644 --- a/arch/arm/boot/dts/sama5d3_tcb1.dtsi +++ b/arch/arm/boot/dts/sama5d3_tcb1.dtsi @@ -9,7 +9,7 @@ #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/clk/at91.h> +#include <dt-bindings/clock/at91.h> / { aliases { diff --git a/arch/arm/boot/dts/sama5d3_uart.dtsi b/arch/arm/boot/dts/sama5d3_uart.dtsi index a9fa75e41652..7a8d4c6115f7 100644 --- a/arch/arm/boot/dts/sama5d3_uart.dtsi +++ b/arch/arm/boot/dts/sama5d3_uart.dtsi @@ -9,7 +9,7 @@ #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/clk/at91.h> +#include <dt-bindings/clock/at91.h> / { aliases { diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi index f55ed072c8e6..b0b1331c1974 100644 --- a/arch/arm/boot/dts/sama5d3xcm.dtsi +++ b/arch/arm/boot/dts/sama5d3xcm.dtsi @@ -18,6 +18,14 @@ reg = <0x20000000 0x20000000>; }; + slow_xtal { + clock-frequency = <32768>; + }; + + main_xtal { + clock-frequency = <12000000>; + }; + ahb { apb { spi0: spi@f0004000 { diff --git a/arch/arm/boot/dts/sama5d3xmb.dtsi b/arch/arm/boot/dts/sama5d3xmb.dtsi index dba739b6ef36..306eef0f97ef 100644 --- a/arch/arm/boot/dts/sama5d3xmb.dtsi +++ b/arch/arm/boot/dts/sama5d3xmb.dtsi @@ -32,6 +32,10 @@ }; }; + ssc0: ssc@f0008000 { + atmel,clk-from-rk-pin; + }; + /* * i2c0 conflicts with ISI: * disable it to allow the use of ISI @@ -156,7 +160,7 @@ }; sound { - compatible = "atmel,sama5d3ek-wm8904"; + compatible = "atmel,asoc-wm8904"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pck0_as_audio_mck>; @@ -166,9 +170,12 @@ "Headphone Jack", "HPOUTR", "IN2L", "Line In Jack", "IN2R", "Line In Jack", + "MICBIAS", "IN1L", "IN1L", "Mic"; atmel,ssc-controller = <&ssc0>; atmel,audio-codec = <&wm8904>; + + status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts index eb8886b535e4..a99171c8a782 100644 --- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts +++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts @@ -14,6 +14,7 @@ /dts-v1/; #include "sh73a0.dtsi" #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/irq.h> / { @@ -112,43 +113,43 @@ back-key { gpios = <&pcf8575 8 GPIO_ACTIVE_LOW>; - linux,code = <158>; + linux,code = <KEY_BACK>; label = "SW3"; }; right-key { gpios = <&pcf8575 9 GPIO_ACTIVE_LOW>; - linux,code = <106>; + linux,code = <KEY_RIGHT>; label = "SW2-R"; }; left-key { gpios = <&pcf8575 10 GPIO_ACTIVE_LOW>; - linux,code = <105>; + linux,code = <KEY_LEFT>; label = "SW2-L"; }; enter-key { gpios = <&pcf8575 11 GPIO_ACTIVE_LOW>; - linux,code = <28>; + linux,code = <KEY_ENTER>; label = "SW2-P"; }; up-key { gpios = <&pcf8575 12 GPIO_ACTIVE_LOW>; - linux,code = <103>; + linux,code = <KEY_UP>; label = "SW2-U"; }; down-key { gpios = <&pcf8575 13 GPIO_ACTIVE_LOW>; - linux,code = <108>; + linux,code = <KEY_DOWN>; label = "SW2-D"; }; home-key { gpios = <&pcf8575 14 GPIO_ACTIVE_LOW>; - linux,code = <102>; + linux,code = <KEY_HOME>; label = "SW1"; }; }; diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi index b7bd3b9a6753..5ecf552e1c00 100644 --- a/arch/arm/boot/dts/sh73a0.dtsi +++ b/arch/arm/boot/dts/sh73a0.dtsi @@ -34,7 +34,6 @@ gic: interrupt-controller@f0001000 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; - #address-cells = <1>; interrupt-controller; reg = <0xf0001000 0x1000>, <0xf0000100 0x100>; diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index 56fc214e6d2c..280966b92e5e 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -15,7 +15,8 @@ * along with this program. If not, see <http://www.gnu.org/licenses/>. */ -/include/ "skeleton.dtsi" +#include "skeleton.dtsi" +#include <dt-bindings/reset/altr,rst-mgr.h> / { #address-cells = <1>; @@ -75,7 +76,14 @@ pdma: pdma@ffe01000 { compatible = "arm,pl330", "arm,primecell"; reg = <0xffe01000 0x1000>; - interrupts = <0 180 4>; + interrupts = <0 104 4>, + <0 105 4>, + <0 106 4>, + <0 107 4>, + <0 108 4>, + <0 109 4>, + <0 110 4>, + <0 111 4>; #dma-cells = <1>; #dma-channels = <8>; #dma-requests = <32>; @@ -84,6 +92,22 @@ }; }; + can0: can@ffc00000 { + compatible = "bosch,d_can"; + reg = <0xffc00000 0x1000>; + interrupts = <0 131 4>, <0 132 4>, <0 133 4>, <0 134 4>; + clocks = <&can0_clk>; + status = "disabled"; + }; + + can1: can@ffc01000 { + compatible = "bosch,d_can"; + reg = <0xffc01000 0x1000>; + interrupts = <0 135 4>, <0 136 4>, <0 137 4>, <0 138 4>; + clocks = <&can1_clk>; + status = "disabled"; + }; + clkmgr@ffd04000 { compatible = "altr,clk-mgr"; reg = <0xffd04000 0x1000>; @@ -124,7 +148,7 @@ #clock-cells = <0>; compatible = "altr,socfpga-perip-clk"; clocks = <&main_pll>; - fixed-divider = <2>; + div-reg = <0xe0 0 9>; reg = <0x48>; }; @@ -132,7 +156,7 @@ #clock-cells = <0>; compatible = "altr,socfpga-perip-clk"; clocks = <&main_pll>; - fixed-divider = <4>; + div-reg = <0xe4 0 9>; reg = <0x4C>; }; @@ -140,7 +164,7 @@ #clock-cells = <0>; compatible = "altr,socfpga-perip-clk"; clocks = <&main_pll>; - fixed-divider = <4>; + div-reg = <0xe8 0 9>; reg = <0x50>; }; @@ -460,6 +484,8 @@ mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */ clocks = <&emac0_clk>; clock-names = "stmmaceth"; + resets = <&rst EMAC0_RESET>; + reset-names = "stmmaceth"; status = "disabled"; }; @@ -472,6 +498,48 @@ mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */ clocks = <&emac1_clk>; clock-names = "stmmaceth"; + resets = <&rst EMAC1_RESET>; + reset-names = "stmmaceth"; + status = "disabled"; + }; + + i2c0: i2c@ffc04000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,designware-i2c"; + reg = <0xffc04000 0x1000>; + clocks = <&l4_sp_clk>; + interrupts = <0 158 0x4>; + status = "disabled"; + }; + + i2c1: i2c@ffc05000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,designware-i2c"; + reg = <0xffc05000 0x1000>; + clocks = <&l4_sp_clk>; + interrupts = <0 159 0x4>; + status = "disabled"; + }; + + i2c2: i2c@ffc06000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,designware-i2c"; + reg = <0xffc06000 0x1000>; + clocks = <&l4_sp_clk>; + interrupts = <0 160 0x4>; + status = "disabled"; + }; + + i2c3: i2c@ffc07000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,designware-i2c"; + reg = <0xffc07000 0x1000>; + clocks = <&l4_sp_clk>; + interrupts = <0 161 0x4>; status = "disabled"; }; @@ -508,24 +576,32 @@ compatible = "snps,dw-apb-timer"; interrupts = <0 167 4>; reg = <0xffc08000 0x1000>; + clocks = <&l4_sp_clk>; + clock-names = "timer"; }; timer1: timer1@ffc09000 { compatible = "snps,dw-apb-timer"; interrupts = <0 168 4>; reg = <0xffc09000 0x1000>; + clocks = <&l4_sp_clk>; + clock-names = "timer"; }; timer2: timer2@ffd00000 { compatible = "snps,dw-apb-timer"; interrupts = <0 169 4>; reg = <0xffd00000 0x1000>; + clocks = <&osc1>; + clock-names = "timer"; }; timer3: timer3@ffd01000 { compatible = "snps,dw-apb-timer"; interrupts = <0 170 4>; reg = <0xffd01000 0x1000>; + clocks = <&osc1>; + clock-names = "timer"; }; uart0: serial0@ffc02000 { @@ -534,6 +610,7 @@ interrupts = <0 162 4>; reg-shift = <2>; reg-io-width = <4>; + clocks = <&l4_sp_clk>; }; uart1: serial1@ffc03000 { @@ -542,13 +619,42 @@ interrupts = <0 163 4>; reg-shift = <2>; reg-io-width = <4>; + clocks = <&l4_sp_clk>; }; - rstmgr@ffd05000 { + rst: rstmgr@ffd05000 { compatible = "altr,rst-mgr"; reg = <0xffd05000 0x1000>; }; + usbphy0: usbphy@0 { + #phy-cells = <0>; + compatible = "usb-nop-xceiv"; + status = "okay"; + }; + + usb0: usb@ffb00000 { + compatible = "snps,dwc2"; + reg = <0xffb00000 0xffff>; + interrupts = <0 125 4>; + clocks = <&usb_mp_clk>; + clock-names = "otg"; + phys = <&usbphy0>; + phy-names = "usb2-phy"; + status = "disabled"; + }; + + usb1: usb@ffb40000 { + compatible = "snps,dwc2"; + reg = <0xffb40000 0xffff>; + interrupts = <0 128 4>; + clocks = <&usb_mp_clk>; + clock-names = "otg"; + phys = <&usbphy0>; + phy-names = "usb2-phy"; + status = "disabled"; + }; + sysmgr: sysmgr@ffd08000 { compatible = "altr,sys-mgr", "syscon"; reg = <0xffd08000 0x4000>; diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi b/arch/arm/boot/dts/socfpga_arria5.dtsi index 6c87b7070ca7..12d1c2ccaf5b 100644 --- a/arch/arm/boot/dts/socfpga_arria5.dtsi +++ b/arch/arm/boot/dts/socfpga_arria5.dtsi @@ -15,7 +15,7 @@ */ /dts-v1/; -/include/ "socfpga.dtsi" +#include "socfpga.dtsi" / { soc { @@ -38,32 +38,8 @@ }; }; - serial0@ffc02000 { - clock-frequency = <100000000>; - }; - - serial1@ffc03000 { - clock-frequency = <100000000>; - }; - sysmgr@ffd08000 { cpu1-start-addr = <0xffd080c4>; }; - - timer0@ffc08000 { - clock-frequency = <100000000>; - }; - - timer1@ffc09000 { - clock-frequency = <100000000>; - }; - - timer2@ffd00000 { - clock-frequency = <25000000>; - }; - - timer3@ffd01000 { - clock-frequency = <25000000>; - }; }; }; diff --git a/arch/arm/boot/dts/socfpga_arria5_socdk.dts b/arch/arm/boot/dts/socfpga_arria5_socdk.dts index a87ee1c07661..d532d171e391 100644 --- a/arch/arm/boot/dts/socfpga_arria5_socdk.dts +++ b/arch/arm/boot/dts/socfpga_arria5_socdk.dts @@ -15,7 +15,7 @@ * along with this program. If not, see <http://www.gnu.org/licenses/>. */ -/include/ "socfpga_arria5.dtsi" +#include "socfpga_arria5.dtsi" / { model = "Altera SOCFPGA Arria V SoC Development Kit"; @@ -59,3 +59,22 @@ rxdv-skew-ps = <0>; rxc-skew-ps = <2000>; }; + +&i2c0 { + status = "okay"; + + eeprom@51 { + compatible = "atmel,24c32"; + reg = <0x51>; + pagesize = <32>; + }; + + rtc@68 { + compatible = "dallas,ds1339"; + reg = <0x68>; + }; +}; + +&usb1 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi b/arch/arm/boot/dts/socfpga_cyclone5.dtsi index ca41b0ebf461..bf511828729f 100644 --- a/arch/arm/boot/dts/socfpga_cyclone5.dtsi +++ b/arch/arm/boot/dts/socfpga_cyclone5.dtsi @@ -16,7 +16,7 @@ */ /dts-v1/; -/include/ "socfpga.dtsi" +#include "socfpga.dtsi" / { soc { @@ -45,30 +45,6 @@ status = "okay"; }; - timer0@ffc08000 { - clock-frequency = <100000000>; - }; - - timer1@ffc09000 { - clock-frequency = <100000000>; - }; - - timer2@ffd00000 { - clock-frequency = <25000000>; - }; - - timer3@ffd01000 { - clock-frequency = <25000000>; - }; - - serial0@ffc02000 { - clock-frequency = <100000000>; - }; - - serial1@ffc03000 { - clock-frequency = <100000000>; - }; - sysmgr@ffd08000 { cpu1-start-addr = <0xffd080c4>; }; diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts index ae16d975196d..45de1514af0a 100644 --- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts +++ b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts @@ -15,7 +15,7 @@ * along with this program. If not, see <http://www.gnu.org/licenses/>. */ -/include/ "socfpga_cyclone5.dtsi" +#include "socfpga_cyclone5.dtsi" / { model = "Altera SOCFPGA Cyclone V SoC Development Kit"; @@ -52,3 +52,22 @@ rxdv-skew-ps = <0>; rxc-skew-ps = <2000>; }; + +&i2c0 { + status = "okay"; + + eeprom@51 { + compatible = "atmel,24c32"; + reg = <0x51>; + pagesize = <32>; + }; + + rtc@68 { + compatible = "dallas,ds1339"; + reg = <0x68>; + }; +}; + +&usb1 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts index b79e2a2bf175..d26f155f5fd9 100644 --- a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts +++ b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts @@ -15,7 +15,7 @@ * along with this program. If not, see <http://www.gnu.org/licenses/>. */ -/include/ "socfpga_cyclone5.dtsi" +#include "socfpga_cyclone5.dtsi" / { model = "Terasic SoCkit"; @@ -52,3 +52,7 @@ rxdv-skew-ps = <0>; rxc-skew-ps = <2000>; }; + +&usb1 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts b/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts new file mode 100644 index 000000000000..a1814b457450 --- /dev/null +++ b/arch/arm/boot/dts/socfpga_cyclone5_socrates.dts @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2014 Steffen Trumtrar <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include "socfpga_cyclone5.dtsi" + +/ { + model = "EBV SOCrates"; + compatible = "ebv,socrates", "altr,socfpga-cyclone5", "altr,socfpga"; + + chosen { + bootargs = "console=ttyS0,115200"; + }; + + memory { + name = "memory"; + device_type = "memory"; + reg = <0x0 0x40000000>; /* 1GB */ + }; +}; + +&gmac1 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + rtc: rtc@68 { + compatible = "stm,m41t82"; + reg = <0x68>; + }; +}; + +&mmc { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts index 87d6f759a9c1..09792b411110 100644 --- a/arch/arm/boot/dts/socfpga_vt.dts +++ b/arch/arm/boot/dts/socfpga_vt.dts @@ -16,7 +16,7 @@ */ /dts-v1/; -/include/ "socfpga.dtsi" +#include "socfpga.dtsi" / { model = "Altera SOCFPGA VT"; diff --git a/arch/arm/boot/dts/stih407-b2120.dts b/arch/arm/boot/dts/stih407-b2120.dts new file mode 100644 index 000000000000..fe69f92e5f82 --- /dev/null +++ b/arch/arm/boot/dts/stih407-b2120.dts @@ -0,0 +1,78 @@ +/* + * Copyright (C) 2014 STMicroelectronics (R&D) Limited. + * Author: Giuseppe Cavallaro <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/dts-v1/; +#include "stih407.dtsi" +/ { + model = "STiH407 B2120"; + compatible = "st,stih407-b2120", "st,stih407"; + + chosen { + bootargs = "console=ttyAS0,115200"; + linux,stdout-path = &sbc_serial0; + }; + + memory { + device_type = "memory"; + reg = <0x40000000 0x80000000>; + }; + + aliases { + ttyAS0 = &sbc_serial0; + }; + + soc { + sbc_serial0: serial@9530000 { + status = "okay"; + }; + + leds { + compatible = "gpio-leds"; + red { + #gpio-cells = <2>; + label = "Front Panel LED"; + gpios = <&pio4 1 0>; + linux,default-trigger = "heartbeat"; + }; + green { + #gpio-cells = <2>; + gpios = <&pio1 3 0>; + default-state = "off"; + }; + }; + + i2c@9842000 { + status = "okay"; + }; + + i2c@9843000 { + status = "okay"; + }; + + i2c@9844000 { + status = "okay"; + }; + + i2c@9845000 { + status = "okay"; + }; + + i2c@9540000 { + status = "okay"; + }; + + /* SSC11 to HDMI */ + i2c@9541000 { + status = "okay"; + /* HDMI V1.3a supports Standard mode only */ + clock-frequency = <100000>; + st,i2c-min-scl-pulse-width-us = <0>; + st,i2c-min-sda-pulse-width-us = <5>; + }; + }; +}; diff --git a/arch/arm/boot/dts/stih407-clock.dtsi b/arch/arm/boot/dts/stih407-clock.dtsi new file mode 100644 index 000000000000..800f46f009f3 --- /dev/null +++ b/arch/arm/boot/dts/stih407-clock.dtsi @@ -0,0 +1,39 @@ +/* + * Copyright (C) 2014 STMicroelectronics R&D Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/ { + clocks { + /* + * Fixed 30MHz oscillator inputs to SoC + */ + clk_sysin: clk-sysin { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <30000000>; + }; + + /* + * ARM Peripheral clock for timers + */ + arm_periph_clk: arm-periph-clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <600000000>; + }; + + /* + * Bootloader initialized system infrastructure clock for + * serial devices. + */ + clk_ext2f_a9: clockgen-c0@13 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <200000000>; + clock-output-names = "clk-s-icn-reg-0"; + }; + }; +}; diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi new file mode 100644 index 000000000000..402844cb3152 --- /dev/null +++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi @@ -0,0 +1,615 @@ +/* + * Copyright (C) 2014 STMicroelectronics Limited. + * Author: Giuseppe Cavallaro <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * publishhed by the Free Software Foundation. + */ +#include "st-pincfg.h" +#include <dt-bindings/interrupt-controller/arm-gic.h> +/ { + + aliases { + /* 0-5: PIO_SBC */ + gpio0 = &pio0; + gpio1 = &pio1; + gpio2 = &pio2; + gpio3 = &pio3; + gpio4 = &pio4; + gpio5 = &pio5; + /* 10-19: PIO_FRONT0 */ + gpio6 = &pio10; + gpio7 = &pio11; + gpio8 = &pio12; + gpio9 = &pio13; + gpio10 = &pio14; + gpio11 = &pio15; + gpio12 = &pio16; + gpio13 = &pio17; + gpio14 = &pio18; + gpio15 = &pio19; + /* 20: PIO_FRONT1 */ + gpio16 = &pio20; + /* 30-35: PIO_REAR */ + gpio17 = &pio30; + gpio18 = &pio31; + gpio19 = &pio32; + gpio20 = &pio33; + gpio21 = &pio34; + gpio22 = &pio35; + /* 40-42: PIO_FLASH */ + gpio23 = &pio40; + gpio24 = &pio41; + gpio25 = &pio42; + }; + + soc { + pin-controller-sbc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,stih407-sbc-pinctrl"; + st,syscfg = <&syscfg_sbc>; + reg = <0x0961f080 0x4>; + reg-names = "irqmux"; + interrupts = <GIC_SPI 188 IRQ_TYPE_NONE>; + interrupts-names = "irqmux"; + ranges = <0 0x09610000 0x6000>; + + pio0: gpio@09610000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x0 0x100>; + st,bank-name = "PIO0"; + }; + pio1: gpio@09611000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x1000 0x100>; + st,bank-name = "PIO1"; + }; + pio2: gpio@09612000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x2000 0x100>; + st,bank-name = "PIO2"; + }; + pio3: gpio@09613000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x3000 0x100>; + st,bank-name = "PIO3"; + }; + pio4: gpio@09614000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x4000 0x100>; + st,bank-name = "PIO4"; + }; + + pio5: gpio@09615000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x5000 0x100>; + st,bank-name = "PIO5"; + }; + + rc { + pinctrl_ir: ir0 { + st,pins { + ir = <&pio4 0 ALT2 IN>; + }; + }; + }; + + /* SBC_ASC0 - UART10 */ + sbc_serial0 { + pinctrl_sbc_serial0: sbc_serial0-0 { + st,pins { + tx = <&pio3 4 ALT1 OUT>; + rx = <&pio3 5 ALT1 IN>; + }; + }; + }; + /* SBC_ASC1 - UART11 */ + sbc_serial1 { + pinctrl_sbc_serial1: sbc_serial1-0 { + st,pins { + tx = <&pio2 6 ALT3 OUT>; + rx = <&pio2 7 ALT3 IN>; + }; + }; + }; + + i2c10 { + pinctrl_i2c10_default: i2c10-default { + st,pins { + sda = <&pio4 6 ALT1 BIDIR>; + scl = <&pio4 5 ALT1 BIDIR>; + }; + }; + }; + + i2c11 { + pinctrl_i2c11_default: i2c11-default { + st,pins { + sda = <&pio5 1 ALT1 BIDIR>; + scl = <&pio5 0 ALT1 BIDIR>; + }; + }; + }; + + keyscan { + pinctrl_keyscan: keyscan { + st,pins { + keyin0 = <&pio4 0 ALT6 IN>; + keyin1 = <&pio4 5 ALT4 IN>; + keyin2 = <&pio0 4 ALT2 IN>; + keyin3 = <&pio2 6 ALT2 IN>; + + keyout0 = <&pio4 6 ALT4 OUT>; + keyout1 = <&pio1 7 ALT2 OUT>; + keyout2 = <&pio0 6 ALT2 OUT>; + keyout3 = <&pio2 7 ALT2 OUT>; + }; + }; + }; + + gmac1 { + /* + * Almost all the boards based on STiH407 SoC have an embedded + * switch where the mdio/mdc have been used for managing the SMI + * iface via I2C. For this reason these lines can be allocated + * by using dedicated configuration (in case of there will be a + * standard PHY transceiver on-board). + */ + pinctrl_rgmii1: rgmii1-0 { + st,pins { + + txd0 = <&pio0 0 ALT1 OUT DE_IO 0 CLK_A>; + txd1 = <&pio0 1 ALT1 OUT DE_IO 0 CLK_A>; + txd2 = <&pio0 2 ALT1 OUT DE_IO 0 CLK_A>; + txd3 = <&pio0 3 ALT1 OUT DE_IO 0 CLK_A>; + txen = <&pio0 5 ALT1 OUT DE_IO 0 CLK_A>; + txclk = <&pio0 6 ALT1 IN NICLK 0 CLK_A>; + rxd0 = <&pio1 4 ALT1 IN DE_IO 0 CLK_A>; + rxd1 = <&pio1 5 ALT1 IN DE_IO 0 CLK_A>; + rxd2 = <&pio1 6 ALT1 IN DE_IO 0 CLK_A>; + rxd3 = <&pio1 7 ALT1 IN DE_IO 0 CLK_A>; + rxdv = <&pio2 0 ALT1 IN DE_IO 0 CLK_A>; + rxclk = <&pio2 2 ALT1 IN NICLK 500 CLK_A>; + clk125 = <&pio3 7 ALT4 IN NICLK 0 CLK_A>; + phyclk = <&pio2 3 ALT4 OUT NICLK 1750 CLK_B>; + }; + }; + + pinctrl_rgmii1_mdio: rgmii1-mdio { + st,pins { + mdio = <&pio1 0 ALT1 OUT BYPASS 0>; + mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>; + mdint = <&pio1 3 ALT1 IN BYPASS 0>; + }; + }; + + pinctrl_mii1: mii1 { + st,pins { + txd0 = <&pio0 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>; + txd1 = <&pio0 1 ALT1 OUT SE_NICLK_IO 0 CLK_A>; + txd2 = <&pio0 2 ALT1 OUT SE_NICLK_IO 0 CLK_A>; + txd3 = <&pio0 3 ALT1 OUT SE_NICLK_IO 0 CLK_A>; + txer = <&pio0 4 ALT1 OUT SE_NICLK_IO 0 CLK_A>; + txen = <&pio0 5 ALT1 OUT SE_NICLK_IO 0 CLK_A>; + txclk = <&pio0 6 ALT1 IN NICLK 0 CLK_A>; + col = <&pio0 7 ALT1 IN BYPASS 1000>; + + mdio = <&pio1 0 ALT1 OUT BYPASS 1500>; + mdc = <&pio1 1 ALT1 OUT NICLK 0 CLK_A>; + crs = <&pio1 2 ALT1 IN BYPASS 1000>; + mdint = <&pio1 3 ALT1 IN BYPASS 0>; + rxd0 = <&pio1 4 ALT1 IN SE_NICLK_IO 0 CLK_A>; + rxd1 = <&pio1 5 ALT1 IN SE_NICLK_IO 0 CLK_A>; + rxd2 = <&pio1 6 ALT1 IN SE_NICLK_IO 0 CLK_A>; + rxd3 = <&pio1 7 ALT1 IN SE_NICLK_IO 0 CLK_A>; + + rxdv = <&pio2 0 ALT1 IN SE_NICLK_IO 0 CLK_A>; + rx_er = <&pio2 1 ALT1 IN SE_NICLK_IO 0 CLK_A>; + rxclk = <&pio2 2 ALT1 IN NICLK 0 CLK_A>; + phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>; + }; + }; + }; + + pwm1 { + pinctrl_pwm1_chan0_default: pwm1-0-default { + st,pins { + pwm-out = <&pio3 0 ALT1 OUT>; + }; + }; + pinctrl_pwm1_chan1_default: pwm1-1-default { + st,pins { + pwm-out = <&pio4 4 ALT1 OUT>; + }; + }; + pinctrl_pwm1_chan2_default: pwm1-2-default { + st,pins { + pwm-out = <&pio4 6 ALT3 OUT>; + }; + }; + pinctrl_pwm1_chan3_default: pwm1-3-default { + st,pins { + pwm-out = <&pio4 7 ALT3 OUT>; + }; + }; + }; + }; + + pin-controller-front0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,stih407-front-pinctrl"; + st,syscfg = <&syscfg_front>; + reg = <0x0920f080 0x4>; + reg-names = "irqmux"; + interrupts = <GIC_SPI 189 IRQ_TYPE_NONE>; + interrupts-names = "irqmux"; + ranges = <0 0x09200000 0x10000>; + + pio10: pio@09200000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x0 0x100>; + st,bank-name = "PIO10"; + }; + pio11: pio@09201000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x1000 0x100>; + st,bank-name = "PIO11"; + }; + pio12: pio@09202000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x2000 0x100>; + st,bank-name = "PIO12"; + }; + pio13: pio@09203000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x3000 0x100>; + st,bank-name = "PIO13"; + }; + pio14: pio@09204000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x4000 0x100>; + st,bank-name = "PIO14"; + }; + pio15: pio@09205000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x5000 0x100>; + st,bank-name = "PIO15"; + }; + pio16: pio@09206000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x6000 0x100>; + st,bank-name = "PIO16"; + }; + pio17: pio@09207000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x7000 0x100>; + st,bank-name = "PIO17"; + }; + pio18: pio@09208000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x8000 0x100>; + st,bank-name = "PIO18"; + }; + pio19: pio@09209000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x9000 0x100>; + st,bank-name = "PIO19"; + }; + + /* Comms */ + serial0 { + pinctrl_serial0: serial0-0 { + st,pins { + tx = <&pio17 0 ALT1 OUT>; + rx = <&pio17 1 ALT1 IN>; + }; + }; + }; + + serial1 { + pinctrl_serial1: serial1-0 { + st,pins { + tx = <&pio16 0 ALT1 OUT>; + rx = <&pio16 1 ALT1 IN>; + }; + }; + }; + + serial2 { + pinctrl_serial2: serial2-0 { + st,pins { + tx = <&pio15 0 ALT1 OUT>; + rx = <&pio15 1 ALT1 IN>; + }; + }; + }; + + mmc1 { + pinctrl_sd1: sd1-0 { + st,pins { + sd_clk = <&pio19 3 ALT5 BIDIR NICLK 0 CLK_B>; + sd_cmd = <&pio19 2 ALT5 BIDIR_PU BYPASS 0>; + sd_dat0 = <&pio19 4 ALT5 BIDIR_PU BYPASS 0>; + sd_dat1 = <&pio19 5 ALT5 BIDIR_PU BYPASS 0>; + sd_dat2 = <&pio19 6 ALT5 BIDIR_PU BYPASS 0>; + sd_dat3 = <&pio19 7 ALT5 BIDIR_PU BYPASS 0>; + sd_led = <&pio16 6 ALT6 OUT>; + sd_pwren = <&pio16 7 ALT6 OUT>; + sd_cd = <&pio19 0 ALT6 IN>; + sd_wp = <&pio19 1 ALT6 IN>; + }; + }; + }; + + + i2c0 { + pinctrl_i2c0_default: i2c0-default { + st,pins { + sda = <&pio10 6 ALT2 BIDIR>; + scl = <&pio10 5 ALT2 BIDIR>; + }; + }; + }; + + i2c1 { + pinctrl_i2c1_default: i2c1-default { + st,pins { + sda = <&pio11 1 ALT2 BIDIR>; + scl = <&pio11 0 ALT2 BIDIR>; + }; + }; + }; + + i2c2 { + pinctrl_i2c2_default: i2c2-default { + st,pins { + sda = <&pio15 6 ALT2 BIDIR>; + scl = <&pio15 5 ALT2 BIDIR>; + }; + }; + }; + + i2c3 { + pinctrl_i2c3_default: i2c3-default { + st,pins { + sda = <&pio18 6 ALT1 BIDIR>; + scl = <&pio18 5 ALT1 BIDIR>; + }; + }; + }; + + spi0 { + pinctrl_spi0_default: spi0-default { + st,pins { + mtsr = <&pio12 6 ALT2 BIDIR>; + mrst = <&pio12 7 ALT2 BIDIR>; + scl = <&pio12 5 ALT2 BIDIR>; + }; + }; + }; + }; + + pin-controller-front1 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,stih407-front-pinctrl"; + st,syscfg = <&syscfg_front>; + reg = <0x0921f080 0x4>; + reg-names = "irqmux"; + interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>; + interrupts-names = "irqmux"; + ranges = <0 0x09210000 0x10000>; + + pio20: pio@09210000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x0 0x100>; + st,bank-name = "PIO20"; + }; + }; + + pin-controller-rear { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,stih407-rear-pinctrl"; + st,syscfg = <&syscfg_rear>; + reg = <0x0922f080 0x4>; + reg-names = "irqmux"; + interrupts = <GIC_SPI 191 IRQ_TYPE_NONE>; + interrupts-names = "irqmux"; + ranges = <0 0x09220000 0x6000>; + + pio30: gpio@09220000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x0 0x100>; + st,bank-name = "PIO30"; + }; + pio31: gpio@09221000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x1000 0x100>; + st,bank-name = "PIO31"; + }; + pio32: gpio@09222000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x2000 0x100>; + st,bank-name = "PIO32"; + }; + pio33: gpio@09223000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x3000 0x100>; + st,bank-name = "PIO33"; + }; + pio34: gpio@09224000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x4000 0x100>; + st,bank-name = "PIO34"; + }; + pio35: gpio@09225000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x5000 0x100>; + st,bank-name = "PIO35"; + }; + + i2c4 { + pinctrl_i2c4_default: i2c4-default { + st,pins { + sda = <&pio30 1 ALT1 BIDIR>; + scl = <&pio30 0 ALT1 BIDIR>; + }; + }; + }; + + i2c5 { + pinctrl_i2c5_default: i2c5-default { + st,pins { + sda = <&pio34 4 ALT1 BIDIR>; + scl = <&pio34 3 ALT1 BIDIR>; + }; + }; + }; + + usb3 { + pinctrl_usb3: usb3-2 { + st,pins { + usb-oc-detect = <&pio35 4 ALT1 IN>; + usb-pwr-enable = <&pio35 5 ALT1 OUT>; + usb-vbus-valid = <&pio35 6 ALT1 IN>; + }; + }; + }; + + pwm0 { + pinctrl_pwm0_chan0_default: pwm0-0-default { + st,pins { + pwm-out = <&pio31 1 ALT1 OUT>; + }; + }; + }; + }; + + pin-controller-flash { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,stih407-flash-pinctrl"; + st,syscfg = <&syscfg_flash>; + reg = <0x0923f080 0x4>; + reg-names = "irqmux"; + interrupts = <GIC_SPI 192 IRQ_TYPE_NONE>; + interrupts-names = "irqmux"; + ranges = <0 0x09230000 0x3000>; + + pio40: gpio@09230000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0 0x100>; + st,bank-name = "PIO40"; + }; + pio41: gpio@09231000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x1000 0x100>; + st,bank-name = "PIO41"; + }; + pio42: gpio@09232000 { + gpio-controller; + #gpio-cells = <1>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x2000 0x100>; + st,bank-name = "PIO42"; + }; + + mmc0 { + pinctrl_mmc0: mmc0-0 { + st,pins { + emmc_clk = <&pio40 6 ALT1 BIDIR>; + emmc_cmd = <&pio40 7 ALT1 BIDIR_PU>; + emmc_d0 = <&pio41 0 ALT1 BIDIR_PU>; + emmc_d1 = <&pio41 1 ALT1 BIDIR_PU>; + emmc_d2 = <&pio41 2 ALT1 BIDIR_PU>; + emmc_d3 = <&pio41 3 ALT1 BIDIR_PU>; + emmc_d4 = <&pio41 4 ALT1 BIDIR_PU>; + emmc_d5 = <&pio41 5 ALT1 BIDIR_PU>; + emmc_d6 = <&pio41 6 ALT1 BIDIR_PU>; + emmc_d7 = <&pio41 7 ALT1 BIDIR_PU>; + }; + }; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/stih407.dtsi b/arch/arm/boot/dts/stih407.dtsi new file mode 100644 index 000000000000..4f9024f19866 --- /dev/null +++ b/arch/arm/boot/dts/stih407.dtsi @@ -0,0 +1,263 @@ +/* + * Copyright (C) 2014 STMicroelectronics Limited. + * Author: Giuseppe Cavallaro <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * publishhed by the Free Software Foundation. + */ +#include "stih407-clock.dtsi" +#include "stih407-pinctrl.dtsi" +/ { + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0>; + }; + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <1>; + }; + }; + + intc: interrupt-controller@08761000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x08761000 0x1000>, <0x08760100 0x100>; + }; + + scu@08760000 { + compatible = "arm,cortex-a9-scu"; + reg = <0x08760000 0x1000>; + }; + + timer@08760200 { + interrupt-parent = <&intc>; + compatible = "arm,cortex-a9-global-timer"; + reg = <0x08760200 0x100>; + interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&arm_periph_clk>; + }; + + l2: cache-controller { + compatible = "arm,pl310-cache"; + reg = <0x08762000 0x1000>; + arm,data-latency = <3 3 3>; + arm,tag-latency = <2 2 2>; + cache-unified; + cache-level = <2>; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + ranges; + compatible = "simple-bus"; + + syscfg_sbc: sbc-syscfg@9620000 { + compatible = "st,stih407-sbc-syscfg", "syscon"; + reg = <0x9620000 0x1000>; + }; + + syscfg_front: front-syscfg@9280000 { + compatible = "st,stih407-front-syscfg", "syscon"; + reg = <0x9280000 0x1000>; + }; + + syscfg_rear: rear-syscfg@9290000 { + compatible = "st,stih407-rear-syscfg", "syscon"; + reg = <0x9290000 0x1000>; + }; + + syscfg_flash: flash-syscfg@92a0000 { + compatible = "st,stih407-flash-syscfg", "syscon"; + reg = <0x92a0000 0x1000>; + }; + + syscfg_sbc_reg: fvdp-lite-syscfg@9600000 { + compatible = "st,stih407-sbc-reg-syscfg", "syscon"; + reg = <0x9600000 0x1000>; + }; + + syscfg_core: core-syscfg@92b0000 { + compatible = "st,stih407-core-syscfg", "syscon"; + reg = <0x92b0000 0x1000>; + }; + + syscfg_lpm: lpm-syscfg@94b5100 { + compatible = "st,stih407-lpm-syscfg", "syscon"; + reg = <0x94b5100 0x1000>; + }; + + serial@9830000 { + compatible = "st,asc"; + reg = <0x9830000 0x2c>; + interrupts = <GIC_SPI 122 IRQ_TYPE_NONE>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_serial0>; + clocks = <&clk_ext2f_a9>; + + status = "disabled"; + }; + + serial@9831000 { + compatible = "st,asc"; + reg = <0x9831000 0x2c>; + interrupts = <GIC_SPI 123 IRQ_TYPE_NONE>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_serial1>; + clocks = <&clk_ext2f_a9>; + + status = "disabled"; + }; + + serial@9832000 { + compatible = "st,asc"; + reg = <0x9832000 0x2c>; + interrupts = <GIC_SPI 124 IRQ_TYPE_NONE>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_serial2>; + clocks = <&clk_ext2f_a9>; + + status = "disabled"; + }; + + /* SBC_ASC0 - UART10 */ + sbc_serial0: serial@9530000 { + compatible = "st,asc"; + reg = <0x9530000 0x2c>; + interrupts = <GIC_SPI 138 IRQ_TYPE_NONE>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sbc_serial0>; + clocks = <&clk_sysin>; + + status = "disabled"; + }; + + serial@9531000 { + compatible = "st,asc"; + reg = <0x9531000 0x2c>; + interrupts = <GIC_SPI 139 IRQ_TYPE_NONE>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sbc_serial1>; + clocks = <&clk_sysin>; + + status = "disabled"; + }; + + i2c@9840000 { + compatible = "st,comms-ssc4-i2c"; + interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; + reg = <0x9840000 0x110>; + clocks = <&clk_ext2f_a9>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0_default>; + + status = "disabled"; + }; + + i2c@9841000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0x9841000 0x110>; + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk_ext2f_a9>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1_default>; + + status = "disabled"; + }; + + i2c@9842000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0x9842000 0x110>; + interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk_ext2f_a9>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2_default>; + + status = "disabled"; + }; + + i2c@9843000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0x9843000 0x110>; + interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk_ext2f_a9>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3_default>; + + status = "disabled"; + }; + + i2c@9844000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0x9844000 0x110>; + interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk_ext2f_a9>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4_default>; + + status = "disabled"; + }; + + i2c@9845000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0x9845000 0x110>; + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk_ext2f_a9>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c5_default>; + + status = "disabled"; + }; + + + /* SSCs on SBC */ + i2c@9540000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0x9540000 0x110>; + interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk_sysin>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c10_default>; + + status = "disabled"; + }; + + i2c@9541000 { + compatible = "st,comms-ssc4-i2c"; + reg = <0x9541000 0x110>; + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk_sysin>; + clock-names = "ssc"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c11_default>; + + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/boot/dts/stih415-b2000.dts b/arch/arm/boot/dts/stih415-b2000.dts index d4af53160435..bdfbd3765db2 100644 --- a/arch/arm/boot/dts/stih415-b2000.dts +++ b/arch/arm/boot/dts/stih415-b2000.dts @@ -11,5 +11,5 @@ #include "stih41x-b2000.dtsi" / { model = "STiH415 B2000 Board"; - compatible = "st,stih415", "st,stih415-b2000"; + compatible = "st,stih415-b2000", "st,stih415"; }; diff --git a/arch/arm/boot/dts/stih415-b2020.dts b/arch/arm/boot/dts/stih415-b2020.dts index 442b019e9a3a..71903a87bd31 100644 --- a/arch/arm/boot/dts/stih415-b2020.dts +++ b/arch/arm/boot/dts/stih415-b2020.dts @@ -11,5 +11,5 @@ #include "stih41x-b2020.dtsi" / { model = "STiH415 B2020 Board"; - compatible = "st,stih415", "st,stih415-b2020"; + compatible = "st,stih415-b2020", "st,stih415"; }; diff --git a/arch/arm/boot/dts/stih415-clock.dtsi b/arch/arm/boot/dts/stih415-clock.dtsi index d047dbc28d61..3ee34514bc4b 100644 --- a/arch/arm/boot/dts/stih415-clock.dtsi +++ b/arch/arm/boot/dts/stih415-clock.dtsi @@ -5,48 +5,529 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ + +#include <dt-bindings/clock/stih415-clks.h> + / { clocks { + #address-cells = <1>; + #size-cells = <1>; + ranges; + /* * Fixed 30MHz oscillator input to SoC */ - CLK_SYSIN: CLK_SYSIN { + clk_sysin: clk-sysin { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <30000000>; }; /* - * ARM Peripheral clock for timers + * ClockGenAs on SASG1 */ - arm_periph_clk: arm_periph_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <500000000>; + clockgen-a@fee62000 { + reg = <0xfee62000 0xb48>; + + clk_s_a0_pll: clk-s-a0-pll { + #clock-cells = <1>; + compatible = "st,clkgena-plls-c65"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-s-a0-pll0-hs", + "clk-s-a0-pll0-ls", + "clk-s-a0-pll1"; + }; + + clk_s_a0_osc_prediv: clk-s-a0-osc-prediv { + #clock-cells = <0>; + compatible = "st,clkgena-prediv-c65", + "st,clkgena-prediv"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-s-a0-osc-prediv"; + }; + + clk_s_a0_hs: clk-s-a0-hs { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c65-hs", + "st,clkgena-divmux"; + + clocks = <&clk_s_a0_osc_prediv>, + <&clk_s_a0_pll 0>, /* PLL0 HS */ + <&clk_s_a0_pll 2>; /* PLL1 */ + + clock-output-names = "clk-s-fdma-0", + "clk-s-fdma-1", + ""; /* clk-s-jit-sense */ + /* Fourth output unused */ + }; + + clk_s_a0_ls: clk-s-a0-ls { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c65-ls", + "st,clkgena-divmux"; + + clocks = <&clk_s_a0_osc_prediv>, + <&clk_s_a0_pll 1>, /* PLL0 LS */ + <&clk_s_a0_pll 2>; /* PLL1 */ + + clock-output-names = "clk-s-icn-reg-0", + "clk-s-icn-if-0", + "clk-s-icn-reg-lp-0", + "clk-s-emiss", + "clk-s-eth1-phy", + "clk-s-mii-ref-out"; + /* Remaining outputs unused */ + }; + }; + + clockgen-a@fee81000 { + reg = <0xfee81000 0xb48>; + + clk_s_a1_pll: clk-s-a1-pll { + #clock-cells = <1>; + compatible = "st,clkgena-plls-c65"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-s-a1-pll0-hs", + "clk-s-a1-pll0-ls", + "clk-s-a1-pll1"; + }; + + clk_s_a1_osc_prediv: clk-s-a1-osc-prediv { + #clock-cells = <0>; + compatible = "st,clkgena-prediv-c65", + "st,clkgena-prediv"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-s-a1-osc-prediv"; + }; + + clk_s_a1_hs: clk-s-a1-hs { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c65-hs", + "st,clkgena-divmux"; + + clocks = <&clk_s_a1_osc_prediv>, + <&clk_s_a1_pll 0>, /* PLL0 HS */ + <&clk_s_a1_pll 2>; /* PLL1 */ + + clock-output-names = "", /* Reserved */ + "", /* Reserved */ + "clk-s-stac-phy", + "clk-s-vtac-tx-phy"; + }; + + clk_s_a1_ls: clk-s-a1-ls { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c65-ls", + "st,clkgena-divmux"; + + clocks = <&clk_s_a1_osc_prediv>, + <&clk_s_a1_pll 1>, /* PLL0 LS */ + <&clk_s_a1_pll 2>; /* PLL1 */ + + clock-output-names = "clk-s-icn-if-2", + "clk-s-card-mmc", + "clk-s-icn-if-1", + "clk-s-gmac0-phy", + "clk-s-nand-ctrl", + "", /* Reserved */ + "clk-s-mii0-ref-out", + ""; /* clk-s-stac-sys */ + /* Remaining outputs unused */ + }; }; /* - * Bootloader initialized system infrastructure clock for - * serial devices. + * ClockGenAs on MPE41 */ - CLKS_ICN_REG_0: CLKS_ICN_REG_0 { + clockgen-a@fde12000 { + reg = <0xfde12000 0xb50>; + + clk_m_a0_pll0: clk-m-a0-pll0 { + #clock-cells = <1>; + compatible = "st,plls-c32-a1x-0", "st,clkgen-plls-c32"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-m-a0-pll0-phi0", + "clk-m-a0-pll0-phi1", + "clk-m-a0-pll0-phi2", + "clk-m-a0-pll0-phi3"; + }; + + clk_m_a0_pll1: clk-m-a0-pll1 { + #clock-cells = <1>; + compatible = "st,plls-c32-a1x-1", "st,clkgen-plls-c32"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-m-a0-pll1-phi0", + "clk-m-a0-pll1-phi1", + "clk-m-a0-pll1-phi2", + "clk-m-a0-pll1-phi3"; + }; + + clk_m_a0_osc_prediv: clk-m-a0-osc-prediv { + #clock-cells = <0>; + compatible = "st,clkgena-prediv-c32", + "st,clkgena-prediv"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-m-a0-osc-prediv"; + }; + + clk_m_a0_div0: clk-m-a0-div0 { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c32-odf0", + "st,clkgena-divmux"; + + clocks = <&clk_m_a0_osc_prediv>, + <&clk_m_a0_pll0 0>, /* PLL0 PHI0 */ + <&clk_m_a0_pll1 0>; /* PLL1 PHI0 */ + + clock-output-names = "clk-m-apb-pm", /* Unused */ + "", /* Unused */ + "", /* Unused */ + "", /* Unused */ + "clk-m-pp-dmu-0", + "clk-m-pp-dmu-1", + "clk-m-icm-disp", + ""; /* Unused */ + }; + + clk_m_a0_div1: clk-m-a0-div1 { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c32-odf1", + "st,clkgena-divmux"; + + clocks = <&clk_m_a0_osc_prediv>, + <&clk_m_a0_pll0 1>, /* PLL0 PHI1 */ + <&clk_m_a0_pll1 1>; /* PLL1 PHI1 */ + + clock-output-names = "", /* Unused */ + "", /* Unused */ + "clk-m-a9-ext2f", + "clk-m-st40rt", + "clk-m-st231-dmu-0", + "clk-m-st231-dmu-1", + "clk-m-st231-aud", + "clk-m-st231-gp-0"; + }; + + clk_m_a0_div2: clk-m-a0-div2 { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c32-odf2", + "st,clkgena-divmux"; + + clocks = <&clk_m_a0_osc_prediv>, + <&clk_m_a0_pll0 2>, /* PLL0 PHI2 */ + <&clk_m_a0_pll1 2>; /* PLL1 PHI2 */ + + clock-output-names = "clk-m-st231-gp-1", + "clk-m-icn-cpu", + "clk-m-icn-stac", + "clk-m-icn-dmu-0", + "clk-m-icn-dmu-1", + "", /* Unused */ + "", /* Unused */ + ""; /* Unused */ + }; + + clk_m_a0_div3: clk-m-a0-div3 { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c32-odf3", + "st,clkgena-divmux"; + + clocks = <&clk_m_a0_osc_prediv>, + <&clk_m_a0_pll0 3>, /* PLL0 PHI3 */ + <&clk_m_a0_pll1 3>; /* PLL1 PHI3 */ + + clock-output-names = "", /* Unused */ + "", /* Unused */ + "", /* Unused */ + "", /* Unused */ + "", /* Unused */ + "", /* Unused */ + "clk-m-icn-eram", + "clk-m-a9-trace"; + }; + }; + + clockgen-a@fd6db000 { + reg = <0xfd6db000 0xb50>; + + clk_m_a1_pll0: clk-m-a1-pll0 { + #clock-cells = <1>; + compatible = "st,plls-c32-a1x-0", "st,clkgen-plls-c32"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-m-a1-pll0-phi0", + "clk-m-a1-pll0-phi1", + "clk-m-a1-pll0-phi2", + "clk-m-a1-pll0-phi3"; + }; + + clk_m_a1_pll1: clk-m-a1-pll1 { + #clock-cells = <1>; + compatible = "st,plls-c32-a1x-1", "st,clkgen-plls-c32"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-m-a1-pll1-phi0", + "clk-m-a1-pll1-phi1", + "clk-m-a1-pll1-phi2", + "clk-m-a1-pll1-phi3"; + }; + + clk_m_a1_osc_prediv: clk-m-a1-osc-prediv { + #clock-cells = <0>; + compatible = "st,clkgena-prediv-c32", + "st,clkgena-prediv"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-m-a1-osc-prediv"; + }; + + clk_m_a1_div0: clk-m-a1-div0 { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c32-odf0", + "st,clkgena-divmux"; + + clocks = <&clk_m_a1_osc_prediv>, + <&clk_m_a1_pll0 0>, /* PLL0 PHI0 */ + <&clk_m_a1_pll1 0>; /* PLL1 PHI0 */ + + clock-output-names = "clk-m-fdma-12", + "clk-m-fdma-10", + "clk-m-fdma-11", + "clk-m-hva-lmi", + "clk-m-proc-sc", + "clk-m-tp", + "clk-m-icn-gpu", + "clk-m-icn-vdp-0"; + }; + + clk_m_a1_div1: clk-m-a1-div1 { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c32-odf1", + "st,clkgena-divmux"; + + clocks = <&clk_m_a1_osc_prediv>, + <&clk_m_a1_pll0 1>, /* PLL0 PHI1 */ + <&clk_m_a1_pll1 1>; /* PLL1 PHI1 */ + + clock-output-names = "clk-m-icn-vdp-1", + "clk-m-icn-vdp-2", + "clk-m-icn-vdp-3", + "clk-m-prv-t1-bus", + "clk-m-icn-vdp-4", + "clk-m-icn-reg-10", + "", /* Unused */ + ""; /* clk-m-icn-st231 */ + }; + + clk_m_a1_div2: clk-m-a1-div2 { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c32-odf2", + "st,clkgena-divmux"; + + clocks = <&clk_m_a1_osc_prediv>, + <&clk_m_a1_pll0 2>, /* PLL0 PHI2 */ + <&clk_m_a1_pll1 2>; /* PLL1 PHI2 */ + + clock-output-names = "clk-m-fvdp-proc-alt", + "", /* Unused */ + "", /* Unused */ + "", /* Unused */ + "", /* Unused */ + "", /* Unused */ + "", /* Unused */ + ""; /* Unused */ + }; + + clk_m_a1_div3: clk-m-a1-div3 { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c32-odf3", + "st,clkgena-divmux"; + + clocks = <&clk_m_a1_osc_prediv>, + <&clk_m_a1_pll0 3>, /* PLL0 PHI3 */ + <&clk_m_a1_pll1 3>; /* PLL1 PHI3 */ + + clock-output-names = "", /* Unused */ + "", /* Unused */ + "", /* Unused */ + "", /* Unused */ + "", /* Unused */ + "", /* Unused */ + "", /* Unused */ + ""; /* Unused */ + }; + }; + + clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2 { #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <100000000>; + compatible = "fixed-factor-clock"; + clocks = <&clk_m_a0_div1 2>; + clock-div = <2>; + clock-mult = <1>; }; - CLKS_GMAC0_PHY: clockgenA1@7 { + clockgen-a@fd345000 { + reg = <0xfd345000 0xb50>; + + clk_m_a2_pll0: clk-m-a2-pll0 { + #clock-cells = <1>; + compatible = "st,plls-c32-a1x-0", "st,clkgen-plls-c32"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-m-a2-pll0-phi0", + "clk-m-a2-pll0-phi1", + "clk-m-a2-pll0-phi2", + "clk-m-a2-pll0-phi3"; + }; + + clk_m_a2_pll1: clk-m-a2-pll1 { + #clock-cells = <1>; + compatible = "st,plls-c32-a1x-1", "st,clkgen-plls-c32"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-m-a2-pll1-phi0", + "clk-m-a2-pll1-phi1", + "clk-m-a2-pll1-phi2", + "clk-m-a2-pll1-phi3"; + }; + + clk_m_a2_osc_prediv: clk-m-a2-osc-prediv { + #clock-cells = <0>; + compatible = "st,clkgena-prediv-c32", + "st,clkgena-prediv"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-m-a2-osc-prediv"; + }; + + clk_m_a2_div0: clk-m-a2-div0 { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c32-odf0", + "st,clkgena-divmux"; + + clocks = <&clk_m_a2_osc_prediv>, + <&clk_m_a2_pll0 0>, /* PLL0 PHI0 */ + <&clk_m_a2_pll1 0>; /* PLL1 PHI0 */ + + clock-output-names = "clk-m-vtac-main-phy", + "clk-m-vtac-aux-phy", + "clk-m-stac-phy", + "clk-m-stac-sys", + "", /* clk-m-mpestac-pg */ + "", /* clk-m-mpestac-wc */ + "", /* clk-m-mpevtacaux-pg*/ + ""; /* clk-m-mpevtacmain-pg*/ + }; + + clk_m_a2_div1: clk-m-a2-div1 { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c32-odf1", + "st,clkgena-divmux"; + + clocks = <&clk_m_a2_osc_prediv>, + <&clk_m_a2_pll0 1>, /* PLL0 PHI1 */ + <&clk_m_a2_pll1 1>; /* PLL1 PHI1 */ + + clock-output-names = "", /* clk-m-mpevtacrx0-wc */ + "", /* clk-m-mpevtacrx1-wc */ + "clk-m-compo-main", + "clk-m-compo-aux", + "clk-m-bdisp-0", + "clk-m-bdisp-1", + "clk-m-icn-bdisp-0", + "clk-m-icn-bdisp-1"; + }; + + clk_m_a2_div2: clk-m-a2-div2 { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c32-odf2", + "st,clkgena-divmux"; + + clocks = <&clk_m_a2_osc_prediv>, + <&clk_m_a2_pll0 2>, /* PLL0 PHI2 */ + <&clk_m_a2_pll1 2>; /* PLL1 PHI2 */ + + clock-output-names = "", /* clk-m-icn-hqvdp0 */ + "", /* clk-m-icn-hqvdp1 */ + "clk-m-icn-compo", + "", /* clk-m-icn-vdpaux */ + "clk-m-icn-ts", + "clk-m-icn-reg-lp-10", + "clk-m-dcephy-impctrl", + ""; /* Unused */ + }; + + clk_m_a2_div3: clk-m-a2-div3 { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c32-odf3", + "st,clkgena-divmux"; + + clocks = <&clk_m_a2_osc_prediv>, + <&clk_m_a2_pll0 3>, /* PLL0 PHI3 */ + <&clk_m_a2_pll1 3>; /* PLL1 PHI3 */ + + clock-output-names = ""; /* Unused */ + /* Remaining outputs unused */ + }; + }; + + /* + * A9 PLL + */ + clockgen-a9@fdde00d8 { + reg = <0xfdde00d8 0x70>; + + clockgen_a9_pll: clockgen-a9-pll { + #clock-cells = <1>; + compatible = "st,stih415-plls-c32-a9", "st,clkgen-plls-c32"; + + clocks = <&clk_sysin>; + clock-output-names = "clockgen-a9-pll-odf"; + }; + }; + + /* + * ARM CPU related clocks + */ + clk_m_a9: clk-m-a9@fdde00d8 { #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <25000000>; - clock-output-names = "CLKS_GMAC0_PHY"; + compatible = "st,stih415-clkgen-a9-mux", "st,clkgen-mux"; + reg = <0xfdde00d8 0x4>; + clocks = <&clockgen_a9_pll 0>, + <&clockgen_a9_pll 0>, + <&clk_m_a0_div1 2>, + <&clk_m_a9_ext2f_div2>; }; - CLKS_ETH1_PHY: clockgenA0@7 { + /* + * ARM Peripheral clock for timers + */ + arm_periph_clk: clk-m-a9-periphs { #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <25000000>; - clock-output-names = "CLKS_ETH1_PHY"; + compatible = "fixed-factor-clock"; + clocks = <&clk_m_a9>; + clock-div = <2>; + clock-mult = <1>; }; }; }; diff --git a/arch/arm/boot/dts/stih415-pinctrl.dtsi b/arch/arm/boot/dts/stih415-pinctrl.dtsi index f09fb10a3791..8509a037ae21 100644 --- a/arch/arm/boot/dts/stih415-pinctrl.dtsi +++ b/arch/arm/boot/dts/stih415-pinctrl.dtsi @@ -49,7 +49,7 @@ reg = <0xfe61f080 0x4>; reg-names = "irqmux"; interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>; - interrupts-names = "irqmux"; + interrupt-names = "irqmux"; ranges = <0 0xfe610000 0x5000>; PIO0: gpio@fe610000 { @@ -102,6 +102,22 @@ }; }; + keyscan { + pinctrl_keyscan: keyscan { + st,pins { + keyin0 = <&PIO0 2 ALT2 IN>; + keyin1 = <&PIO0 3 ALT2 IN>; + keyin2 = <&PIO0 4 ALT2 IN>; + keyin3 = <&PIO2 6 ALT2 IN>; + + keyout0 = <&PIO1 6 ALT2 OUT>; + keyout1 = <&PIO1 7 ALT2 OUT>; + keyout2 = <&PIO0 6 ALT2 OUT>; + keyout3 = <&PIO2 7 ALT2 OUT>; + }; + }; + }; + sbc_i2c0 { pinctrl_sbc_i2c0_default: sbc_i2c0-default { st,pins { @@ -187,7 +203,7 @@ reg = <0xfee0f080 0x4>; reg-names = "irqmux"; interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>; - interrupts-names = "irqmux"; + interrupt-names = "irqmux"; ranges = <0 0xfee00000 0x8000>; PIO5: gpio@fee00000 { @@ -282,7 +298,7 @@ reg = <0xfe82f080 0x4>; reg-names = "irqmux"; interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>; - interrupts-names = "irqmux"; + interrupt-names = "irqmux"; ranges = <0 0xfe820000 0x8000>; PIO13: gpio@fe820000 { @@ -423,7 +439,7 @@ reg = <0xfd6bf080 0x4>; reg-names = "irqmux"; interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; - interrupts-names = "irqmux"; + interrupt-names = "irqmux"; ranges = <0 0xfd6b0000 0x3000>; PIO100: gpio@fd6b0000 { @@ -460,7 +476,7 @@ reg = <0xfd33f080 0x4>; reg-names = "irqmux"; interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; - interrupts-names = "irqmux"; + interrupt-names = "irqmux"; ranges = <0 0xfd330000 0x5000>; PIO103: gpio@fd330000 { diff --git a/arch/arm/boot/dts/stih415.dtsi b/arch/arm/boot/dts/stih415.dtsi index d89064c20c8a..d6f254f302fe 100644 --- a/arch/arm/boot/dts/stih415.dtsi +++ b/arch/arm/boot/dts/stih415.dtsi @@ -82,7 +82,7 @@ interrupts = <0 197 0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_serial2>; - clocks = <&CLKS_ICN_REG_0>; + clocks = <&clk_s_a0_ls CLK_ICN_REG>; }; /* SBC comms block ASCs in SASG1 */ @@ -91,7 +91,7 @@ status = "disabled"; reg = <0xfe531000 0x2c>; interrupts = <0 210 0>; - clocks = <&CLK_SYSIN>; + clocks = <&clk_sysin>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sbc_serial1>; }; @@ -100,7 +100,7 @@ compatible = "st,comms-ssc4-i2c"; reg = <0xfed40000 0x110>; interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&CLKS_ICN_REG_0>; + clocks = <&clk_s_a0_ls CLK_ICN_REG>; clock-names = "ssc"; clock-frequency = <400000>; pinctrl-names = "default"; @@ -113,7 +113,7 @@ compatible = "st,comms-ssc4-i2c"; reg = <0xfed41000 0x110>; interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&CLKS_ICN_REG_0>; + clocks = <&clk_s_a0_ls CLK_ICN_REG>; clock-names = "ssc"; clock-frequency = <400000>; pinctrl-names = "default"; @@ -126,7 +126,7 @@ compatible = "st,comms-ssc4-i2c"; reg = <0xfe540000 0x110>; interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&CLK_SYSIN>; + clocks = <&clk_sysin>; clock-names = "ssc"; clock-frequency = <400000>; pinctrl-names = "default"; @@ -139,7 +139,7 @@ compatible = "st,comms-ssc4-i2c"; reg = <0xfe541000 0x110>; interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&CLK_SYSIN>; + clocks = <&clk_sysin>; clock-names = "ssc"; clock-frequency = <400000>; pinctrl-names = "default"; @@ -170,7 +170,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mii0>; clock-names = "stmmaceth"; - clocks = <&CLKS_GMAC0_PHY>; + clocks = <&clk_s_a1_ls CLK_GMAC0_PHY>; }; ethernet1: dwmac@fef08000 { @@ -193,18 +193,30 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mii1>; clock-names = "stmmaceth"; - clocks = <&CLKS_ETH1_PHY>; + clocks = <&clk_s_a0_ls CLK_ETH1_PHY>; }; rc: rc@fe518000 { compatible = "st,comms-irb"; reg = <0xfe518000 0x234>; interrupts = <0 203 0>; - clocks = <&CLK_SYSIN>; + clocks = <&clk_sysin>; rx-mode = "infrared"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ir>; resets = <&softreset STIH415_IRB_SOFTRESET>; }; + + keyscan: keyscan@fe4b0000 { + compatible = "st,sti-keyscan"; + status = "disabled"; + reg = <0xfe4b0000 0x2000>; + interrupts = <GIC_SPI 212 IRQ_TYPE_NONE>; + clocks = <&clk_sysin>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_keyscan>; + resets = <&powerdown STIH415_KEYSCAN_POWERDOWN>, + <&softreset STIH415_KEYSCAN_SOFTRESET>; + }; }; }; diff --git a/arch/arm/boot/dts/stih416-b2000.dts b/arch/arm/boot/dts/stih416-b2000.dts index a5eb6eee10bf..488e80a5d69d 100644 --- a/arch/arm/boot/dts/stih416-b2000.dts +++ b/arch/arm/boot/dts/stih416-b2000.dts @@ -9,8 +9,7 @@ /dts-v1/; #include "stih416.dtsi" #include "stih41x-b2000.dtsi" - / { - compatible = "st,stih416", "st,stih416-b2000"; model = "STiH416 B2000"; + compatible = "st,stih416-b2000", "st,stih416"; }; diff --git a/arch/arm/boot/dts/stih416-b2020-revE.dts b/arch/arm/boot/dts/stih416-b2020-revE.dts new file mode 100644 index 000000000000..ba0fa2caaf18 --- /dev/null +++ b/arch/arm/boot/dts/stih416-b2020-revE.dts @@ -0,0 +1,35 @@ +/* + * Copyright (C) 2014 STMicroelectronics (R&D) Limited. + * Author: Lee Jones <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * publishhed by the Free Software Foundation. + */ +/dts-v1/; +#include "stih416.dtsi" +#include "stih41x-b2020.dtsi" +/ { + model = "STiH416 B2020 REV-E"; + compatible = "st,stih416-b2020", "st,stih416"; + + soc { + leds { + compatible = "gpio-leds"; + red { + #gpio-cells = <1>; + label = "Front Panel LED"; + gpios = <&PIO4 1>; + linux,default-trigger = "heartbeat"; + }; + green { + gpios = <&PIO1 3>; + default-state = "off"; + }; + }; + + ethernet1: dwmac@fef08000 { + snps,reset-gpio = <&PIO0 7>; + }; + }; +}; diff --git a/arch/arm/boot/dts/stih416-b2020.dts b/arch/arm/boot/dts/stih416-b2020.dts index 276f28da573a..4e2df66b99ea 100644 --- a/arch/arm/boot/dts/stih416-b2020.dts +++ b/arch/arm/boot/dts/stih416-b2020.dts @@ -11,6 +11,5 @@ #include "stih41x-b2020.dtsi" / { model = "STiH416 B2020"; - compatible = "st,stih416", "st,stih416-b2020"; - + compatible = "st,stih416-b2020", "st,stih416"; }; diff --git a/arch/arm/boot/dts/stih416-clock.dtsi b/arch/arm/boot/dts/stih416-clock.dtsi index a6942c75cbbb..5b4fb838cddb 100644 --- a/arch/arm/boot/dts/stih416-clock.dtsi +++ b/arch/arm/boot/dts/stih416-clock.dtsi @@ -6,50 +6,751 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ + +#include <dt-bindings/clock/stih416-clks.h> + / { clocks { + #address-cells = <1>; + #size-cells = <1>; + ranges; + /* * Fixed 30MHz oscillator inputs to SoC */ - CLK_SYSIN: CLK_SYSIN { + clk_sysin: clk-sysin { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <30000000>; - clock-output-names = "CLK_SYSIN"; + }; + + /* + * ClockGenAs on SASG2 + */ + clockgen-a@fee62000 { + reg = <0xfee62000 0xb48>; + + clk_s_a0_pll: clk-s-a0-pll { + #clock-cells = <1>; + compatible = "st,clkgena-plls-c65"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-s-a0-pll0-hs", + "clk-s-a0-pll0-ls", + "clk-s-a0-pll1"; + }; + + clk_s_a0_osc_prediv: clk-s-a0-osc-prediv { + #clock-cells = <0>; + compatible = "st,clkgena-prediv-c65", + "st,clkgena-prediv"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-s-a0-osc-prediv"; + }; + + clk_s_a0_hs: clk-s-a0-hs { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c65-hs", + "st,clkgena-divmux"; + + clocks = <&clk_s_a0_osc_prediv>, + <&clk_s_a0_pll 0>, /* PLL0 HS */ + <&clk_s_a0_pll 2>; /* PLL1 */ + + clock-output-names = "clk-s-fdma-0", + "clk-s-fdma-1", + ""; /* clk-s-jit-sense */ + /* Fourth output unused */ + }; + + clk_s_a0_ls: clk-s-a0-ls { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c65-ls", + "st,clkgena-divmux"; + + clocks = <&clk_s_a0_osc_prediv>, + <&clk_s_a0_pll 1>, /* PLL0 LS */ + <&clk_s_a0_pll 2>; /* PLL1 */ + + clock-output-names = "clk-s-icn-reg-0", + "clk-s-icn-if-0", + "clk-s-icn-reg-lp-0", + "clk-s-emiss", + "clk-s-eth1-phy", + "clk-s-mii-ref-out"; + /* Remaining outputs unused */ + }; + }; + + clockgen-a@fee81000 { + reg = <0xfee81000 0xb48>; + + clk_s_a1_pll: clk-s-a1-pll { + #clock-cells = <1>; + compatible = "st,clkgena-plls-c65"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-s-a1-pll0-hs", + "clk-s-a1-pll0-ls", + "clk-s-a1-pll1"; + }; + + clk_s_a1_osc_prediv: clk-s-a1-osc-prediv { + #clock-cells = <0>; + compatible = "st,clkgena-prediv-c65", + "st,clkgena-prediv"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-s-a1-osc-prediv"; + }; + + clk_s_a1_hs: clk-s-a1-hs { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c65-hs", + "st,clkgena-divmux"; + + clocks = <&clk_s_a1_osc_prediv>, + <&clk_s_a1_pll 0>, /* PLL0 HS */ + <&clk_s_a1_pll 2>; /* PLL1 */ + + clock-output-names = "", /* Reserved */ + "", /* Reserved */ + "clk-s-stac-phy", + "clk-s-vtac-tx-phy"; + }; + + clk_s_a1_ls: clk-s-a1-ls { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c65-ls", + "st,clkgena-divmux"; + + clocks = <&clk_s_a1_osc_prediv>, + <&clk_s_a1_pll 1>, /* PLL0 LS */ + <&clk_s_a1_pll 2>; /* PLL1 */ + + clock-output-names = "clk-s-icn-if-2", + "clk-s-card-mmc-0", + "clk-s-icn-if-1", + "clk-s-gmac0-phy", + "clk-s-nand-ctrl", + "", /* Reserved */ + "clk-s-mii0-ref-out", + "clk-s-stac-sys", + "clk-s-card-mmc-1"; + /* Remaining outputs unused */ + }; + }; + + /* + * ClockGenAs on MPE42 + */ + clockgen-a@fde12000 { + reg = <0xfde12000 0xb50>; + + clk_m_a0_pll0: clk-m-a0-pll0 { + #clock-cells = <1>; + compatible = "st,plls-c32-a1x-0", "st,clkgen-plls-c32"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-m-a0-pll0-phi0", + "clk-m-a0-pll0-phi1", + "clk-m-a0-pll0-phi2", + "clk-m-a0-pll0-phi3"; + }; + + clk_m_a0_pll1: clk-m-a0-pll1 { + #clock-cells = <1>; + compatible = "st,plls-c32-a1x-1", "st,clkgen-plls-c32"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-m-a0-pll1-phi0", + "clk-m-a0-pll1-phi1", + "clk-m-a0-pll1-phi2", + "clk-m-a0-pll1-phi3"; + }; + + clk_m_a0_osc_prediv: clk-m-a0-osc-prediv { + #clock-cells = <0>; + compatible = "st,clkgena-prediv-c32", + "st,clkgena-prediv"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-m-a0-osc-prediv"; + }; + + clk_m_a0_div0: clk-m-a0-div0 { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c32-odf0", + "st,clkgena-divmux"; + + clocks = <&clk_m_a0_osc_prediv>, + <&clk_m_a0_pll0 0>, /* PLL0 PHI0 */ + <&clk_m_a0_pll1 0>; /* PLL1 PHI0 */ + + clock-output-names = "", /* Unused */ + "", /* Unused */ + "clk-m-fdma-12", + "", /* Unused */ + "clk-m-pp-dmu-0", + "clk-m-pp-dmu-1", + "clk-m-icm-lmi", + "clk-m-vid-dmu-0"; + }; + + clk_m_a0_div1: clk-m-a0-div1 { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c32-odf1", + "st,clkgena-divmux"; + + clocks = <&clk_m_a0_osc_prediv>, + <&clk_m_a0_pll0 1>, /* PLL0 PHI1 */ + <&clk_m_a0_pll1 1>; /* PLL1 PHI1 */ + + clock-output-names = "clk-m-vid-dmu-1", + "", /* Unused */ + "clk-m-a9-ext2f", + "clk-m-st40rt", + "clk-m-st231-dmu-0", + "clk-m-st231-dmu-1", + "clk-m-st231-aud", + "clk-m-st231-gp-0"; + }; + + clk_m_a0_div2: clk-m-a0-div2 { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c32-odf2", + "st,clkgena-divmux"; + + clocks = <&clk_m_a0_osc_prediv>, + <&clk_m_a0_pll0 2>, /* PLL0 PHI2 */ + <&clk_m_a0_pll1 2>; /* PLL1 PHI2 */ + + clock-output-names = "clk-m-st231-gp-1", + "clk-m-icn-cpu", + "clk-m-icn-stac", + "clk-m-tx-icn-dmu-0", + "clk-m-tx-icn-dmu-1", + "clk-m-tx-icn-ts", + "clk-m-icn-vdp-0", + "clk-m-icn-vdp-1"; + }; + + clk_m_a0_div3: clk-m-a0-div3 { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c32-odf3", + "st,clkgena-divmux"; + + clocks = <&clk_m_a0_osc_prediv>, + <&clk_m_a0_pll0 3>, /* PLL0 PHI3 */ + <&clk_m_a0_pll1 3>; /* PLL1 PHI3 */ + + clock-output-names = "", /* Unused */ + "", /* Unused */ + "", /* Unused */ + "", /* Unused */ + "clk-m-icn-vp8", + "", /* Unused */ + "clk-m-icn-reg-11", + "clk-m-a9-trace"; + }; + }; + + clockgen-a@fd6db000 { + reg = <0xfd6db000 0xb50>; + + clk_m_a1_pll0: clk-m-a1-pll0 { + #clock-cells = <1>; + compatible = "st,plls-c32-a1x-0", "st,clkgen-plls-c32"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-m-a1-pll0-phi0", + "clk-m-a1-pll0-phi1", + "clk-m-a1-pll0-phi2", + "clk-m-a1-pll0-phi3"; + }; + + clk_m_a1_pll1: clk-m-a1-pll1 { + #clock-cells = <1>; + compatible = "st,plls-c32-a1x-1", "st,clkgen-plls-c32"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-m-a1-pll1-phi0", + "clk-m-a1-pll1-phi1", + "clk-m-a1-pll1-phi2", + "clk-m-a1-pll1-phi3"; + }; + + clk_m_a1_osc_prediv: clk-m-a1-osc-prediv { + #clock-cells = <0>; + compatible = "st,clkgena-prediv-c32", + "st,clkgena-prediv"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-m-a1-osc-prediv"; + }; + + clk_m_a1_div0: clk-m-a1-div0 { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c32-odf0", + "st,clkgena-divmux"; + + clocks = <&clk_m_a1_osc_prediv>, + <&clk_m_a1_pll0 0>, /* PLL0 PHI0 */ + <&clk_m_a1_pll1 0>; /* PLL1 PHI0 */ + + clock-output-names = "", /* Unused */ + "clk-m-fdma-10", + "clk-m-fdma-11", + "clk-m-hva-alt", + "clk-m-proc-sc", + "clk-m-tp", + "clk-m-rx-icn-dmu-0", + "clk-m-rx-icn-dmu-1"; + }; + + clk_m_a1_div1: clk-m-a1-div1 { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c32-odf1", + "st,clkgena-divmux"; + + clocks = <&clk_m_a1_osc_prediv>, + <&clk_m_a1_pll0 1>, /* PLL0 PHI1 */ + <&clk_m_a1_pll1 1>; /* PLL1 PHI1 */ + + clock-output-names = "clk-m-rx-icn-ts", + "clk-m-rx-icn-vdp-0", + "", /* Unused */ + "clk-m-prv-t1-bus", + "clk-m-icn-reg-12", + "clk-m-icn-reg-10", + "", /* Unused */ + "clk-m-icn-st231"; + }; + + clk_m_a1_div2: clk-m-a1-div2 { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c32-odf2", + "st,clkgena-divmux"; + + clocks = <&clk_m_a1_osc_prediv>, + <&clk_m_a1_pll0 2>, /* PLL0 PHI2 */ + <&clk_m_a1_pll1 2>; /* PLL1 PHI2 */ + + clock-output-names = "clk-m-fvdp-proc-alt", + "clk-m-icn-reg-13", + "clk-m-tx-icn-gpu", + "clk-m-rx-icn-gpu", + "", /* Unused */ + "", /* Unused */ + "", /* clk-m-apb-pm-12 */ + ""; /* Unused */ + }; + + clk_m_a1_div3: clk-m-a1-div3 { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c32-odf3", + "st,clkgena-divmux"; + + clocks = <&clk_m_a1_osc_prediv>, + <&clk_m_a1_pll0 3>, /* PLL0 PHI3 */ + <&clk_m_a1_pll1 3>; /* PLL1 PHI3 */ + + clock-output-names = "", /* Unused */ + "", /* Unused */ + "", /* Unused */ + "", /* Unused */ + "", /* Unused */ + "", /* Unused */ + "", /* Unused */ + ""; /* clk-m-gpu-alt */ + }; + }; + + clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2 { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&clk_m_a0_div1 2>; + clock-div = <2>; + clock-mult = <1>; + }; + + clockgen-a@fd345000 { + reg = <0xfd345000 0xb50>; + + clk_m_a2_pll0: clk-m-a2-pll0 { + #clock-cells = <1>; + compatible = "st,plls-c32-a1x-0", "st,clkgen-plls-c32"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-m-a2-pll0-phi0", + "clk-m-a2-pll0-phi1", + "clk-m-a2-pll0-phi2", + "clk-m-a2-pll0-phi3"; + }; + + clk_m_a2_pll1: clk-m-a2-pll1 { + #clock-cells = <1>; + compatible = "st,plls-c32-a1x-1", "st,clkgen-plls-c32"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-m-a2-pll1-phi0", + "clk-m-a2-pll1-phi1", + "clk-m-a2-pll1-phi2", + "clk-m-a2-pll1-phi3"; + }; + + clk_m_a2_osc_prediv: clk-m-a2-osc-prediv { + #clock-cells = <0>; + compatible = "st,clkgena-prediv-c32", + "st,clkgena-prediv"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-m-a2-osc-prediv"; + }; + + clk_m_a2_div0: clk-m-a2-div0 { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c32-odf0", + "st,clkgena-divmux"; + + clocks = <&clk_m_a2_osc_prediv>, + <&clk_m_a2_pll0 0>, /* PLL0 PHI0 */ + <&clk_m_a2_pll1 0>; /* PLL1 PHI0 */ + + clock-output-names = "clk-m-vtac-main-phy", + "clk-m-vtac-aux-phy", + "clk-m-stac-phy", + "clk-m-stac-sys", + "", /* clk-m-mpestac-pg */ + "", /* clk-m-mpestac-wc */ + "", /* clk-m-mpevtacaux-pg*/ + ""; /* clk-m-mpevtacmain-pg*/ + }; + + clk_m_a2_div1: clk-m-a2-div1 { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c32-odf1", + "st,clkgena-divmux"; + + clocks = <&clk_m_a2_osc_prediv>, + <&clk_m_a2_pll0 1>, /* PLL0 PHI1 */ + <&clk_m_a2_pll1 1>; /* PLL1 PHI1 */ + + clock-output-names = "", /* clk-m-mpevtacrx0-wc */ + "", /* clk-m-mpevtacrx1-wc */ + "clk-m-compo-main", + "clk-m-compo-aux", + "clk-m-bdisp-0", + "clk-m-bdisp-1", + "clk-m-icn-bdisp", + "clk-m-icn-compo"; + }; + + clk_m_a2_div2: clk-m-a2-div2 { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c32-odf2", + "st,clkgena-divmux"; + + clocks = <&clk_m_a2_osc_prediv>, + <&clk_m_a2_pll0 2>, /* PLL0 PHI2 */ + <&clk_m_a2_pll1 2>; /* PLL1 PHI2 */ + + clock-output-names = "clk-m-icn-vdp-2", + "", /* Unused */ + "clk-m-icn-reg-14", + "clk-m-mdtp", + "clk-m-jpegdec", + "", /* Unused */ + "clk-m-dcephy-impctrl", + ""; /* Unused */ + }; + + clk_m_a2_div3: clk-m-a2-div3 { + #clock-cells = <1>; + compatible = "st,clkgena-divmux-c32-odf3", + "st,clkgena-divmux"; + + clocks = <&clk_m_a2_osc_prediv>, + <&clk_m_a2_pll0 3>, /* PLL0 PHI3 */ + <&clk_m_a2_pll1 3>; /* PLL1 PHI3 */ + + clock-output-names = "", /* Unused */ + ""; /* clk-m-apb-pm-11 */ + /* Remaining outputs unused */ + }; + }; + + /* + * A9 PLL + */ + clockgen-a9@fdde08b0 { + reg = <0xfdde08b0 0x70>; + + clockgen_a9_pll: clockgen-a9-pll { + #clock-cells = <1>; + compatible = "st,stih416-plls-c32-a9", "st,clkgen-plls-c32"; + + clocks = <&clk_sysin>; + clock-output-names = "clockgen-a9-pll-odf"; + }; + }; + + /* + * ARM CPU related clocks + */ + clk_m_a9: clk-m-a9@fdde08ac { + #clock-cells = <0>; + compatible = "st,stih416-clkgen-a9-mux", "st,clkgen-mux"; + reg = <0xfdde08ac 0x4>; + clocks = <&clockgen_a9_pll 0>, + <&clockgen_a9_pll 0>, + <&clk_m_a0_div1 2>, + <&clk_m_a9_ext2f_div2>; }; /* * ARM Peripheral clock for timers */ - arm_periph_clk: arm_periph_clk { + arm_periph_clk: clk-m-a9-periphs { #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <600000000>; + compatible = "fixed-factor-clock"; + clocks = <&clk_m_a9>; + clock-div = <2>; + clock-mult = <1>; }; /* - * Bootloader initialized system infrastructure clock for - * serial devices. + * Frequency synthesizers on the SASG2 */ - CLK_S_ICN_REG_0: clockgenA0@4 { + clockgen_b0: clockgen-b0@fee108b4 { + #clock-cells = <1>; + compatible = "st,stih416-quadfs216", "st,quadfs"; + reg = <0xfee108b4 0x44>; + + clocks = <&clk_sysin>; + clock-output-names = "clk-s-usb48", + "clk-s-dss", + "clk-s-stfe-frc-2", + "clk-s-thsens-scard"; + }; + + clockgen_b1: clockgen-b1@fe8308c4 { + #clock-cells = <1>; + compatible = "st,stih416-quadfs216", "st,quadfs"; + reg = <0xfe8308c4 0x44>; + + clocks = <&clk_sysin>; + clock-output-names = "clk-s-pcm-0", + "clk-s-pcm-1", + "clk-s-pcm-2", + "clk-s-pcm-3"; + }; + + clockgen_c: clockgen-c@fe8307d0 { + #clock-cells = <1>; + compatible = "st,stih416-quadfs432", "st,quadfs"; + reg = <0xfe8307d0 0x44>; + + clocks = <&clk_sysin>; + clock-output-names = "clk-s-c-fs0-ch0", + "clk-s-c-vcc-sd", + "clk-s-c-fs0-ch2"; + }; + + clk_s_vcc_hd: clk-s-vcc-hd@fe8308b8 { #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <100000000>; - clock-output-names = "CLK_S_ICN_REG_0"; + compatible = "st,stih416-clkgenc-vcc-hd", "st,clkgen-mux"; + reg = <0xfe8308b8 0x4>; /* SYSCFG2558 */ + + clocks = <&clk_sysin>, + <&clockgen_c 0>; }; - CLK_S_GMAC0_PHY: clockgenA1@7 { + /* + * Add a dummy clock for the HDMI PHY for the VCC input mux + */ + clk_s_tmds_fromphy: clk-s-tmds-fromphy { #clock-cells = <0>; compatible = "fixed-clock"; - clock-frequency = <25000000>; - clock-output-names = "CLK_S_GMAC0_PHY"; + clock-frequency = <0>; + }; + + clockgen_c_vcc: clockgen-c-vcc@fe8308ac { + #clock-cells = <1>; + compatible = "st,stih416-clkgenc", "st,clkgen-vcc"; + reg = <0xfe8308ac 0xc>; /* SYSCFG2555,2556,2557 */ + + clocks = <&clk_s_vcc_hd>, + <&clockgen_c 1>, + <&clk_s_tmds_fromphy>, + <&clockgen_c 2>; + + clock-output-names = "clk-s-pix-hdmi", + "clk-s-pix-dvo", + "clk-s-out-dvo", + "clk-s-pix-hd", + "clk-s-hddac", + "clk-s-denc", + "clk-s-sddac", + "clk-s-pix-main", + "clk-s-pix-aux", + "clk-s-stfe-frc-0", + "clk-s-ref-mcru", + "clk-s-slave-mcru", + "clk-s-tmds-hdmi", + "clk-s-hdmi-reject-pll", + "clk-s-thsens"; }; - CLK_S_ETH1_PHY: clockgenA0@7 { + clockgen_d: clockgen-d@fee107e0 { + #clock-cells = <1>; + compatible = "st,stih416-quadfs216", "st,quadfs"; + reg = <0xfee107e0 0x44>; + + clocks = <&clk_sysin>; + clock-output-names = "clk-s-ccsc", + "clk-s-stfe-frc-1", + "clk-s-tsout-1", + "clk-s-mchi"; + }; + + /* + * Frequency synthesizers on the MPE42 + */ + clockgen_e: clockgen-e@fd3208bc { + #clock-cells = <1>; + compatible = "st,stih416-quadfs660-E", "st,quadfs"; + reg = <0xfd3208bc 0xb0>; + + clocks = <&clk_sysin>; + clock-output-names = "clk-m-pix-mdtp-0", + "clk-m-pix-mdtp-1", + "clk-m-pix-mdtp-2", + "clk-m-mpelpc"; + }; + + clockgen_f: clockgen-f@fd320878 { + #clock-cells = <1>; + compatible = "st,stih416-quadfs660-F", "st,quadfs"; + reg = <0xfd320878 0xf0>; + + clocks = <&clk_sysin>; + clock-output-names = "clk-m-main-vidfs", + "clk-m-hva-fs", + "clk-m-fvdp-vcpu", + "clk-m-fvdp-proc-fs"; + }; + + clk_m_fvdp_proc: clk-m-fvdp-proc@fd320910 { + #clock-cells = <0>; + compatible = "st,stih416-clkgenf-vcc-fvdp", "st,clkgen-mux"; + reg = <0xfd320910 0x4>; /* SYSCFG8580 */ + + clocks = <&clk_m_a1_div2 0>, + <&clockgen_f 3>; + }; + + clk_m_hva: clk-m-hva@fd690868 { + #clock-cells = <0>; + compatible = "st,stih416-clkgenf-vcc-hva", "st,clkgen-mux"; + reg = <0xfd690868 0x4>; /* SYSCFG9538 */ + + clocks = <&clockgen_f 1>, + <&clk_m_a1_div0 3>; + }; + + clk_m_f_vcc_hd: clk-m-f-vcc-hd@fd32086c { + #clock-cells = <0>; + compatible = "st,stih416-clkgenf-vcc-hd", "st,clkgen-mux"; + reg = <0xfd32086c 0x4>; /* SYSCFG8539 */ + + clocks = <&clockgen_c_vcc 7>, + <&clockgen_f 0>; + }; + + clk_m_f_vcc_sd: clk-m-f-vcc-sd@fd32086c { + #clock-cells = <0>; + compatible = "st,stih416-clkgenf-vcc-sd", "st,clkgen-mux"; + reg = <0xfd32086c 0x4>; /* SYSCFG8539 */ + + clocks = <&clockgen_c_vcc 8>, + <&clockgen_f 1>; + }; + + /* + * Add a dummy clock for the HDMIRx external signal clock + */ + clk_m_pix_hdmirx_sas: clk-m-pix-hdmirx-sas { #clock-cells = <0>; compatible = "fixed-clock"; - clock-frequency = <25000000>; - clock-output-names = "CLK_S_ETH1_PHY"; + clock-frequency = <0>; + }; + + clockgen_f_vcc: clockgen-f-vcc@fd32086c { + #clock-cells = <1>; + compatible = "st,stih416-clkgenf", "st,clkgen-vcc"; + reg = <0xfd32086c 0xc>; /* SYSCFG8539,8540,8541 */ + + clocks = <&clk_m_f_vcc_hd>, + <&clk_m_f_vcc_sd>, + <&clockgen_f 0>, + <&clk_m_pix_hdmirx_sas>; + + clock-output-names = "clk-m-pix-main-pipe", + "clk-m-pix-aux-pipe", + "clk-m-pix-main-cru", + "clk-m-pix-aux-cru", + "clk-m-xfer-be-compo", + "clk-m-xfer-pip-compo", + "clk-m-xfer-aux-compo", + "clk-m-vsens", + "clk-m-pix-hdmirx-0", + "clk-m-pix-hdmirx-1"; + }; + + /* + * DDR PLL + */ + clockgen-ddr@0xfdde07d8 { + reg = <0xfdde07d8 0x110>; + + clockgen_ddr_pll: clockgen-ddr-pll { + #clock-cells = <1>; + compatible = "st,stih416-plls-c32-ddr", "st,clkgen-plls-c32"; + + clocks = <&clk_sysin>; + clock-output-names = "clockgen-ddr0", + "clockgen-ddr1"; + }; + }; + + /* + * GPU PLL + */ + clockgen-gpu@fd68ff00 { + reg = <0xfd68ff00 0x910>; + + clockgen_gpu_pll: clockgen-gpu-pll { + #clock-cells = <1>; + compatible = "st,stih416-gpu-pll-c32", "st,clkgengpu-pll-c32"; + + clocks = <&clk_sysin>; + clock-output-names = "clockgen-gpu-pll"; + }; }; }; }; diff --git a/arch/arm/boot/dts/stih416-pinctrl.dtsi b/arch/arm/boot/dts/stih416-pinctrl.dtsi index aeea304086eb..ee6c119e261e 100644 --- a/arch/arm/boot/dts/stih416-pinctrl.dtsi +++ b/arch/arm/boot/dts/stih416-pinctrl.dtsi @@ -53,7 +53,7 @@ reg = <0xfe61f080 0x4>; reg-names = "irqmux"; interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>; - interrupts-names = "irqmux"; + interrupt-names = "irqmux"; ranges = <0 0xfe610000 0x6000>; PIO0: gpio@fe610000 { @@ -122,6 +122,22 @@ }; }; + keyscan { + pinctrl_keyscan: keyscan { + st,pins { + keyin0 = <&PIO0 2 ALT2 IN>; + keyin1 = <&PIO0 3 ALT2 IN>; + keyin2 = <&PIO0 4 ALT2 IN>; + keyin3 = <&PIO2 6 ALT2 IN>; + + keyout0 = <&PIO1 6 ALT2 OUT>; + keyout1 = <&PIO1 7 ALT2 OUT>; + keyout2 = <&PIO0 6 ALT2 OUT>; + keyout3 = <&PIO2 7 ALT2 OUT>; + }; + }; + }; + sbc_i2c0 { pinctrl_sbc_i2c0_default: sbc_i2c0-default { st,pins { @@ -201,7 +217,7 @@ reg = <0xfee0f080 0x4>; reg-names = "irqmux"; interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; - interrupts-names = "irqmux"; + interrupt-names = "irqmux"; ranges = <0 0xfee00000 0x10000>; PIO5: gpio@fee00000 { @@ -333,7 +349,7 @@ reg = <0xfe82f080 0x4>; reg-names = "irqmux"; interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; - interrupts-names = "irqmux"; + interrupt-names = "irqmux"; ranges = <0 0xfe820000 0x6000>; PIO13: gpio@fe820000 { @@ -461,7 +477,7 @@ reg = <0xfd6bf080 0x4>; reg-names = "irqmux"; interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; - interrupts-names = "irqmux"; + interrupt-names = "irqmux"; ranges = <0 0xfd6b0000 0x3000>; PIO100: gpio@fd6b0000 { @@ -498,7 +514,7 @@ reg = <0xfd33f080 0x4>; reg-names = "irqmux"; interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; - interrupts-names = "irqmux"; + interrupt-names = "irqmux"; ranges = <0 0xfd330000 0x5000>; PIO103: gpio@fd330000 { diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi index 78746d20382e..06473c5d9ea9 100644 --- a/arch/arm/boot/dts/stih416.dtsi +++ b/arch/arm/boot/dts/stih416.dtsi @@ -89,7 +89,7 @@ status = "disabled"; reg = <0xfed32000 0x2c>; interrupts = <0 197 0>; - clocks = <&CLK_S_ICN_REG_0>; + clocks = <&clk_s_a0_ls CLK_ICN_REG>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_serial2 &pinctrl_serial2_oe>; }; @@ -102,14 +102,14 @@ interrupts = <0 210 0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sbc_serial1>; - clocks = <&CLK_SYSIN>; + clocks = <&clk_sysin>; }; i2c@fed40000 { compatible = "st,comms-ssc4-i2c"; reg = <0xfed40000 0x110>; interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&CLK_S_ICN_REG_0>; + clocks = <&clk_s_a0_ls CLK_ICN_REG>; clock-names = "ssc"; clock-frequency = <400000>; pinctrl-names = "default"; @@ -122,7 +122,7 @@ compatible = "st,comms-ssc4-i2c"; reg = <0xfed41000 0x110>; interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&CLK_S_ICN_REG_0>; + clocks = <&clk_s_a0_ls CLK_ICN_REG>; clock-names = "ssc"; clock-frequency = <400000>; pinctrl-names = "default"; @@ -135,7 +135,7 @@ compatible = "st,comms-ssc4-i2c"; reg = <0xfe540000 0x110>; interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&CLK_SYSIN>; + clocks = <&clk_sysin>; clock-names = "ssc"; clock-frequency = <400000>; pinctrl-names = "default"; @@ -148,7 +148,7 @@ compatible = "st,comms-ssc4-i2c"; reg = <0xfe541000 0x110>; interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&CLK_SYSIN>; + clocks = <&clk_sysin>; clock-names = "ssc"; clock-frequency = <400000>; pinctrl-names = "default"; @@ -176,7 +176,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mii0>; clock-names = "stmmaceth"; - clocks = <&CLK_S_GMAC0_PHY>; + clocks = <&clk_s_a1_ls CLK_GMAC0_PHY>; }; ethernet1: dwmac@fef08000 { @@ -198,7 +198,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mii1>; clock-names = "stmmaceth"; - clocks = <&CLK_S_ETH1_PHY>; + clocks = <&clk_s_a0_ls CLK_ETH1_PHY>; }; rc: rc@fe518000 { @@ -206,7 +206,7 @@ reg = <0xfe518000 0x234>; interrupts = <0 203 0>; rx-mode = "infrared"; - clocks = <&CLK_SYSIN>; + clocks = <&clk_sysin>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ir>; resets = <&softreset STIH416_IRB_SOFTRESET>; @@ -224,5 +224,17 @@ status = "disabled"; }; + + keyscan: keyscan@fe4b0000 { + compatible = "st,sti-keyscan"; + status = "disabled"; + reg = <0xfe4b0000 0x2000>; + interrupts = <GIC_SPI 212 IRQ_TYPE_NONE>; + clocks = <&clk_sysin>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_keyscan>; + resets = <&powerdown STIH416_KEYSCAN_POWERDOWN>, + <&softreset STIH416_KEYSCAN_SOFTRESET>; + }; }; }; diff --git a/arch/arm/boot/dts/stih41x-b2000.dtsi b/arch/arm/boot/dts/stih41x-b2000.dtsi index bf65c49095af..b3dd6ca5c2ae 100644 --- a/arch/arm/boot/dts/stih41x-b2000.dtsi +++ b/arch/arm/boot/dts/stih41x-b2000.dtsi @@ -6,6 +6,7 @@ * it under the terms of the GNU General Public License version 2 as * publishhed by the Free Software Foundation. */ +#include <dt-bindings/input/input.h> / { memory{ @@ -14,7 +15,7 @@ }; chosen { - bootargs = "console=ttyAS0,115200"; + bootargs = "console=ttyAS0,115200 clk_ignore_unused"; linux,stdout-path = &serial2; }; @@ -68,5 +69,27 @@ snps,reset-active-low; snps,reset-delays-us = <0 10000 10000>; }; + + keyscan: keyscan@fe4b0000 { + keypad,num-rows = <4>; + keypad,num-columns = <4>; + st,debounce-us = <5000>; + linux,keymap = < MATRIX_KEY(0x00, 0x00, KEY_F13) + MATRIX_KEY(0x00, 0x01, KEY_F9) + MATRIX_KEY(0x00, 0x02, KEY_F5) + MATRIX_KEY(0x00, 0x03, KEY_F1) + MATRIX_KEY(0x01, 0x00, KEY_F14) + MATRIX_KEY(0x01, 0x01, KEY_F10) + MATRIX_KEY(0x01, 0x02, KEY_F6) + MATRIX_KEY(0x01, 0x03, KEY_F2) + MATRIX_KEY(0x02, 0x00, KEY_F15) + MATRIX_KEY(0x02, 0x01, KEY_F11) + MATRIX_KEY(0x02, 0x02, KEY_F7) + MATRIX_KEY(0x02, 0x03, KEY_F3) + MATRIX_KEY(0x03, 0x00, KEY_F16) + MATRIX_KEY(0x03, 0x01, KEY_F12) + MATRIX_KEY(0x03, 0x02, KEY_F8) + MATRIX_KEY(0x03, 0x03, KEY_F4) >; + }; }; }; diff --git a/arch/arm/boot/dts/stih41x-b2020.dtsi b/arch/arm/boot/dts/stih41x-b2020.dtsi index 838513f9ddc0..d8a84295c328 100644 --- a/arch/arm/boot/dts/stih41x-b2020.dtsi +++ b/arch/arm/boot/dts/stih41x-b2020.dtsi @@ -14,7 +14,7 @@ }; chosen { - bootargs = "console=ttyAS0,115200"; + bootargs = "console=ttyAS0,115200 clk_ignore_unused"; linux,stdout-path = &sbc_serial1; }; diff --git a/arch/arm/boot/dts/stih41x.dtsi b/arch/arm/boot/dts/stih41x.dtsi index f5b9898d9c6e..5cb0e63376b5 100644 --- a/arch/arm/boot/dts/stih41x.dtsi +++ b/arch/arm/boot/dts/stih41x.dtsi @@ -1,3 +1,10 @@ +/* + * Copyright (C) 2014 STMicroelectronics Limited. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * publishhed by the Free Software Foundation. + */ / { #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/boot/dts/sun4i-a10-a1000.dts b/arch/arm/boot/dts/sun4i-a10-a1000.dts index fa746aea5e66..0b97c071dd56 100644 --- a/arch/arm/boot/dts/sun4i-a10-a1000.dts +++ b/arch/arm/boot/dts/sun4i-a10-a1000.dts @@ -36,6 +36,16 @@ }; }; + mmc0: mmc@01c0f000 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 1 0>; /* PH1 */ + cd-inverted; + status = "okay"; + }; + usbphy: phy@01c13400 { usb1_vbus-supply = <®_usb1_vbus>; usb2_vbus-supply = <®_usb2_vbus>; diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts index 4684cbe6843b..c200eacc66e8 100644 --- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts +++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts @@ -34,6 +34,16 @@ }; }; + mmc0: mmc@01c0f000 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 1 0>; /* PH1 */ + cd-inverted; + status = "okay"; + }; + usbphy: phy@01c13400 { usb1_vbus-supply = <®_usb1_vbus>; usb2_vbus-supply = <®_usb2_vbus>; diff --git a/arch/arm/boot/dts/sun4i-a10-hackberry.dts b/arch/arm/boot/dts/sun4i-a10-hackberry.dts index d7c17e46ce23..547fadcb984b 100644 --- a/arch/arm/boot/dts/sun4i-a10-hackberry.dts +++ b/arch/arm/boot/dts/sun4i-a10-hackberry.dts @@ -36,6 +36,16 @@ }; }; + mmc0: mmc@01c0f000 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 1 0>; /* PH1 */ + cd-inverted; + status = "okay"; + }; + usbphy: phy@01c13400 { usb1_vbus-supply = <®_usb1_vbus>; usb2_vbus-supply = <®_usb2_vbus>; diff --git a/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts b/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts index fe9272ee55c3..f13723e18b86 100644 --- a/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts +++ b/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts @@ -24,6 +24,16 @@ }; soc@01c00000 { + mmc0: mmc@01c0f000 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 1 0>; /* PH1 */ + cd-inverted; + status = "okay"; + }; + uart0: serial@01c28000 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; diff --git a/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts b/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts index dd84a9e313b3..c01cea50cf0c 100644 --- a/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts +++ b/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts @@ -20,6 +20,16 @@ compatible = "pineriver,mini-xplus", "allwinner,sun4i-a10"; soc@01c00000 { + mmc0: mmc@01c0f000 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 1 0>; /* PH1 */ + cd-inverted; + status = "okay"; + }; + usbphy: phy@01c13400 { usb1_vbus-supply = <®_usb1_vbus>; usb2_vbus-supply = <®_usb2_vbus>; diff --git a/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts b/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts index 66cf0c7cf5b7..d46a7dbecef5 100644 --- a/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts +++ b/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts @@ -33,6 +33,16 @@ }; }; + mmc0: mmc@01c0f000 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 1 0>; /* PH1 */ + cd-inverted; + status = "okay"; + }; + usbphy: phy@01c13400 { usb1_vbus-supply = <®_usb1_vbus>; usb2_vbus-supply = <®_usb2_vbus>; diff --git a/arch/arm/boot/dts/sun4i-a10-pcduino.dts b/arch/arm/boot/dts/sun4i-a10-pcduino.dts index 255b47e7019c..fb03bccb78d2 100644 --- a/arch/arm/boot/dts/sun4i-a10-pcduino.dts +++ b/arch/arm/boot/dts/sun4i-a10-pcduino.dts @@ -34,6 +34,16 @@ }; }; + mmc0: mmc@01c0f000 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 1 0>; /* PH1 */ + cd-inverted; + status = "okay"; + }; + usbphy: phy@01c13400 { usb1_vbus-supply = <®_usb1_vbus>; usb2_vbus-supply = <®_usb2_vbus>; diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index 9174724571e2..c7b794ed337d 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -377,6 +377,42 @@ #size-cells = <0>; }; + mmc0: mmc@01c0f000 { + compatible = "allwinner,sun4i-a10-mmc"; + reg = <0x01c0f000 0x1000>; + clocks = <&ahb_gates 8>, <&mmc0_clk>; + clock-names = "ahb", "mmc"; + interrupts = <32>; + status = "disabled"; + }; + + mmc1: mmc@01c10000 { + compatible = "allwinner,sun4i-a10-mmc"; + reg = <0x01c10000 0x1000>; + clocks = <&ahb_gates 9>, <&mmc1_clk>; + clock-names = "ahb", "mmc"; + interrupts = <33>; + status = "disabled"; + }; + + mmc2: mmc@01c11000 { + compatible = "allwinner,sun4i-a10-mmc"; + reg = <0x01c11000 0x1000>; + clocks = <&ahb_gates 10>, <&mmc2_clk>; + clock-names = "ahb", "mmc"; + interrupts = <34>; + status = "disabled"; + }; + + mmc3: mmc@01c12000 { + compatible = "allwinner,sun4i-a10-mmc"; + reg = <0x01c12000 0x1000>; + clocks = <&ahb_gates 11>, <&mmc3_clk>; + clock-names = "ahb", "mmc"; + interrupts = <35>; + status = "disabled"; + }; + usbphy: phy@01c13400 { #phy-cells = <1>; compatible = "allwinner,sun4i-a10-usb-phy"; @@ -477,6 +513,20 @@ #size-cells = <0>; #gpio-cells = <3>; + pwm0_pins_a: pwm0@0 { + allwinner,pins = "PB2"; + allwinner,function = "pwm"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + + pwm1_pins_a: pwm1@0 { + allwinner,pins = "PI3"; + allwinner,function = "pwm"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + uart0_pins_a: uart0@0 { allwinner,pins = "PB22", "PB23"; allwinner,function = "uart0"; @@ -529,6 +579,20 @@ allwinner,drive = <0>; allwinner,pull = <0>; }; + + mmc0_pins_a: mmc0@0 { + allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5"; + allwinner,function = "mmc0"; + allwinner,drive = <2>; + allwinner,pull = <0>; + }; + + mmc0_cd_pin_reference_design: mmc0_cd_pin@0 { + allwinner,pins = "PH1"; + allwinner,function = "gpio_in"; + allwinner,drive = <0>; + allwinner,pull = <1>; + }; }; timer@01c20c00 { @@ -549,6 +613,14 @@ interrupts = <24>; }; + pwm: pwm@01c20e00 { + compatible = "allwinner,sun4i-a10-pwm"; + reg = <0x01c20e00 0xc>; + clocks = <&osc24M>; + #pwm-cells = <3>; + status = "disabled"; + }; + sid: eeprom@01c23800 { compatible = "allwinner,sun4i-a10-sid"; reg = <0x01c23800 0x10>; @@ -647,6 +719,8 @@ clocks = <&apb1_gates 0>; clock-frequency = <100000>; status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; }; i2c1: i2c@01c2b000 { @@ -656,6 +730,8 @@ clocks = <&apb1_gates 1>; clock-frequency = <100000>; status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; }; i2c2: i2c@01c2b400 { @@ -665,6 +741,8 @@ clocks = <&apb1_gates 2>; clock-frequency = <100000>; status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; }; }; }; diff --git a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts index 23611b71d3aa..ea9519da5764 100644 --- a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts +++ b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts @@ -35,6 +35,26 @@ }; }; + mmc0: mmc@01c0f000 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_olinuxino_micro>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 6 1 0>; /* PG1 */ + cd-inverted; + status = "okay"; + }; + + mmc1: mmc@01c10000 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins_a>, <&mmc1_cd_pin_olinuxino_micro>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 6 13 0>; /* PG13 */ + cd-inverted; + status = "okay"; + }; + usbphy: phy@01c13400 { usb1_vbus-supply = <®_usb1_vbus>; status = "okay"; @@ -49,6 +69,20 @@ }; pinctrl@01c20800 { + mmc0_cd_pin_olinuxino_micro: mmc0_cd_pin@0 { + allwinner,pins = "PG1"; + allwinner,function = "gpio_in"; + allwinner,drive = <0>; + allwinner,pull = <1>; + }; + + mmc1_cd_pin_olinuxino_micro: mmc1_cd_pin@0 { + allwinner,pins = "PG13"; + allwinner,function = "gpio_in"; + allwinner,drive = <0>; + allwinner,pull = <1>; + }; + led_pins_olinuxino: led_pins@0 { allwinner,pins = "PE3"; allwinner,function = "gpio_out"; diff --git a/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts b/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts new file mode 100644 index 000000000000..43a93762d4f2 --- /dev/null +++ b/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts @@ -0,0 +1,100 @@ +/* + * Copyright 2014 Hans de Goede <[email protected]> + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +/include/ "sun5i-a10s.dtsi" +/include/ "sunxi-common-regulators.dtsi" + +/ { + model = "R7 A10s hdmi tv-stick"; + compatible = "allwinner,r7-tv-dongle", "allwinner,sun5i-a10s"; + + soc@01c00000 { + mmc0: mmc@01c0f000 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_r7>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 6 1 0>; /* PG1 */ + cd-inverted; + status = "okay"; + }; + + mmc1: mmc@01c10000 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins_a>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + non-removable; + status = "okay"; + }; + + usbphy: phy@01c13400 { + usb1_vbus-supply = <®_usb1_vbus>; + status = "okay"; + }; + + ehci0: usb@01c14000 { + status = "okay"; + }; + + ohci0: usb@01c14400 { + status = "okay"; + }; + + pinctrl@01c20800 { + mmc0_cd_pin_r7: mmc0_cd_pin@0 { + allwinner,pins = "PG1"; + allwinner,function = "gpio_in"; + allwinner,drive = <0>; + allwinner,pull = <1>; + }; + + led_pins_r7: led_pins@0 { + allwinner,pins = "PB2"; + allwinner,function = "gpio_out"; + allwinner,drive = <1>; + allwinner,pull = <0>; + }; + + usb1_vbus_pin_r7: usb1_vbus_pin@0 { + allwinner,pins = "PG13"; + allwinner,function = "gpio_out"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + }; + + uart0: serial@01c28000 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pins_r7>; + + green { + label = "r7-tv-dongle:green:usr"; + gpios = <&pio 1 2 0>; + default-state = "on"; + }; + }; + + reg_usb1_vbus: usb1-vbus { + pinctrl-0 = <&usb1_vbus_pin_r7>; + gpio = <&pio 6 13 0>; + status = "okay"; + }; +}; diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi index 79989ed5658d..aa1dd59dc34a 100644 --- a/arch/arm/boot/dts/sun5i-a10s.dtsi +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi @@ -338,6 +338,33 @@ #size-cells = <0>; }; + mmc0: mmc@01c0f000 { + compatible = "allwinner,sun5i-a13-mmc"; + reg = <0x01c0f000 0x1000>; + clocks = <&ahb_gates 8>, <&mmc0_clk>; + clock-names = "ahb", "mmc"; + interrupts = <32>; + status = "disabled"; + }; + + mmc1: mmc@01c10000 { + compatible = "allwinner,sun5i-a13-mmc"; + reg = <0x01c10000 0x1000>; + clocks = <&ahb_gates 9>, <&mmc1_clk>; + clock-names = "ahb", "mmc"; + interrupts = <33>; + status = "disabled"; + }; + + mmc2: mmc@01c11000 { + compatible = "allwinner,sun5i-a13-mmc"; + reg = <0x01c11000 0x1000>; + clocks = <&ahb_gates 10>, <&mmc2_clk>; + clock-names = "ahb", "mmc"; + interrupts = <34>; + status = "disabled"; + }; + usbphy: phy@01c13400 { #phy-cells = <1>; compatible = "allwinner,sun5i-a13-usb-phy"; @@ -451,6 +478,20 @@ allwinner,drive = <0>; allwinner,pull = <0>; }; + + mmc0_pins_a: mmc0@0 { + allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5"; + allwinner,function = "mmc0"; + allwinner,drive = <2>; + allwinner,pull = <0>; + }; + + mmc1_pins_a: mmc1@0 { + allwinner,pins = "PG3","PG4","PG5","PG6","PG7","PG8"; + allwinner,function = "mmc1"; + allwinner,drive = <2>; + allwinner,pull = <0>; + }; }; timer@01c20c00 { diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts index 11169d5b5b86..fa44b026483b 100644 --- a/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts +++ b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts @@ -21,6 +21,16 @@ compatible = "olimex,a13-olinuxino-micro", "allwinner,sun5i-a13"; soc@01c00000 { + mmc0: mmc@01c0f000 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_olinuxinom>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 6 0 0>; /* PG0 */ + cd-inverted; + status = "okay"; + }; + usbphy: phy@01c13400 { usb1_vbus-supply = <®_usb1_vbus>; status = "okay"; @@ -35,6 +45,13 @@ }; pinctrl@01c20800 { + mmc0_cd_pin_olinuxinom: mmc0_cd_pin@0 { + allwinner,pins = "PG0"; + allwinner,function = "gpio_in"; + allwinner,drive = <0>; + allwinner,pull = <1>; + }; + led_pins_olinuxinom: led_pins@0 { allwinner,pins = "PG9"; allwinner,function = "gpio_out"; diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts index 7a9187bbeb28..429994e1943e 100644 --- a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts +++ b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts @@ -20,6 +20,16 @@ compatible = "olimex,a13-olinuxino", "allwinner,sun5i-a13"; soc@01c00000 { + mmc0: mmc@01c0f000 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_olinuxino>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 6 0 0>; /* PG0 */ + cd-inverted; + status = "okay"; + }; + usbphy: phy@01c13400 { usb1_vbus-supply = <®_usb1_vbus>; status = "okay"; @@ -34,6 +44,13 @@ }; pinctrl@01c20800 { + mmc0_cd_pin_olinuxino: mmc0_cd_pin@0 { + allwinner,pins = "PG0"; + allwinner,function = "gpio_in"; + allwinner,drive = <0>; + allwinner,pull = <1>; + }; + led_pins_olinuxino: led_pins@0 { allwinner,pins = "PG9"; allwinner,function = "gpio_out"; diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi index f01c315bdc4b..c9fdb7b3ecd9 100644 --- a/arch/arm/boot/dts/sun5i-a13.dtsi +++ b/arch/arm/boot/dts/sun5i-a13.dtsi @@ -320,6 +320,24 @@ #size-cells = <0>; }; + mmc0: mmc@01c0f000 { + compatible = "allwinner,sun5i-a13-mmc"; + reg = <0x01c0f000 0x1000>; + clocks = <&ahb_gates 8>, <&mmc0_clk>; + clock-names = "ahb", "mmc"; + interrupts = <32>; + status = "disabled"; + }; + + mmc2: mmc@01c11000 { + compatible = "allwinner,sun5i-a13-mmc"; + reg = <0x01c11000 0x1000>; + clocks = <&ahb_gates 10>, <&mmc2_clk>; + clock-names = "ahb", "mmc"; + interrupts = <34>; + status = "disabled"; + }; + usbphy: phy@01c13400 { #phy-cells = <1>; compatible = "allwinner,sun5i-a13-usb-phy"; @@ -415,6 +433,13 @@ allwinner,drive = <0>; allwinner,pull = <0>; }; + + mmc0_pins_a: mmc0@0 { + allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5"; + allwinner,function = "mmc0"; + allwinner,drive = <2>; + allwinner,pull = <0>; + }; }; timer@01c20c00 { @@ -467,6 +492,8 @@ clocks = <&apb1_gates 0>; clock-frequency = <100000>; status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; }; i2c1: i2c@01c2b000 { @@ -476,6 +503,8 @@ clocks = <&apb1_gates 1>; clock-frequency = <100000>; status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; }; i2c2: i2c@01c2b400 { @@ -485,6 +514,8 @@ clocks = <&apb1_gates 2>; clock-frequency = <100000>; status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; }; timer@01c60000 { diff --git a/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts b/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts new file mode 100644 index 000000000000..2bbf8867362b --- /dev/null +++ b/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts @@ -0,0 +1,57 @@ +/* + * Copyright 2014 Boris Brezillon + * + * Boris Brezillon <[email protected]> + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +/include/ "sun6i-a31.dtsi" +/include/ "sunxi-common-regulators.dtsi" + +/ { + model = "Allwinner A31 APP4 EVB1 Evaluation Board"; + compatible = "allwinner,app4-evb1", "allwinner,sun6i-a31"; + + chosen { + bootargs = "earlyprintk console=ttyS0,115200"; + }; + + soc@01c00000 { + pio: pinctrl@01c20800 { + usb1_vbus_pin_a: usb1_vbus_pin@0 { + allwinner,pins = "PH27"; + allwinner,function = "gpio_out"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + }; + + usbphy: phy@01c19400 { + usb1_vbus-supply = <®_usb1_vbus>; + status = "okay"; + }; + + ehci0: usb@01c1a000 { + status = "okay"; + }; + + uart0: serial@01c28000 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; + }; + }; + + reg_usb1_vbus: usb1-vbus { + pinctrl-0 = <&usb1_vbus_pin_a>; + gpio = <&pio 7 27 0>; + status = "okay"; + }; +}; diff --git a/arch/arm/boot/dts/sun6i-a31-m9.dts b/arch/arm/boot/dts/sun6i-a31-m9.dts new file mode 100644 index 000000000000..bc6115da5ae1 --- /dev/null +++ b/arch/arm/boot/dts/sun6i-a31-m9.dts @@ -0,0 +1,50 @@ +/* + * Copyright 2014 Hans de Goede <[email protected]> + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +/include/ "sun6i-a31.dtsi" +/include/ "sunxi-common-regulators.dtsi" + +/ { + model = "Mele M9 / A1000G Quad top set box"; + compatible = "mele,m9", "allwinner,sun6i-a31"; + + chosen { + bootargs = "earlyprintk console=ttyS0,115200"; + }; + + soc@01c00000 { + mmc0: mmc@01c0f000 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_m9>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 22 0>; /* PH22 */ + cd-inverted; + status = "okay"; + }; + + pio: pinctrl@01c20800 { + mmc0_cd_pin_m9: mmc0_cd_pin@0 { + allwinner,pins = "PH22"; + allwinner,function = "gpio_in"; + allwinner,drive = <0>; + allwinner,pull = <1>; + }; + }; + + uart0: serial@01c28000 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; + }; + }; +}; diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index d45efa74827c..2ad880c0821d 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -59,6 +59,14 @@ reg = <0x40000000 0x80000000>; }; + pmu { + compatible = "arm,cortex-a7-pmu", "arm,cortex-a15-pmu"; + interrupts = <0 120 4>, + <0 121 4>, + <0 122 4>, + <0 123 4>; + }; + clocks { #address-cells = <1>; #size-cells = <1>; @@ -198,6 +206,38 @@ "apb2_uart4", "apb2_uart5"; }; + mmc0_clk: clk@01c20088 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod0-clk"; + reg = <0x01c20088 0x4>; + clocks = <&osc24M>, <&pll6>; + clock-output-names = "mmc0"; + }; + + mmc1_clk: clk@01c2008c { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod0-clk"; + reg = <0x01c2008c 0x4>; + clocks = <&osc24M>, <&pll6>; + clock-output-names = "mmc1"; + }; + + mmc2_clk: clk@01c20090 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod0-clk"; + reg = <0x01c20090 0x4>; + clocks = <&osc24M>, <&pll6>; + clock-output-names = "mmc2"; + }; + + mmc3_clk: clk@01c20094 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod0-clk"; + reg = <0x01c20094 0x4>; + clocks = <&osc24M>, <&pll6>; + clock-output-names = "mmc3"; + }; + spi0_clk: clk@01c200a0 { #clock-cells = <0>; compatible = "allwinner,sun4i-a10-mod0-clk"; @@ -229,6 +269,17 @@ clocks = <&osc24M>, <&pll6>; clock-output-names = "spi3"; }; + + usb_clk: clk@01c200cc { + #clock-cells = <1>; + #reset-cells = <1>; + compatible = "allwinner,sun6i-a31-usb-clk"; + reg = <0x01c200cc 0x4>; + clocks = <&osc24M>; + clock-output-names = "usb_phy0", "usb_phy1", "usb_phy2", + "usb_ohci0", "usb_ohci1", + "usb_ohci2"; + }; }; soc@01c00000 { @@ -237,12 +288,134 @@ #size-cells = <1>; ranges; - nmi_intc: interrupt-controller@01f00c0c { - compatible = "allwinner,sun6i-a31-sc-nmi"; - interrupt-controller; - #interrupt-cells = <2>; - reg = <0x01f00c0c 0x38>; - interrupts = <0 32 4>; + dma: dma-controller@01c02000 { + compatible = "allwinner,sun6i-a31-dma"; + reg = <0x01c02000 0x1000>; + interrupts = <0 50 4>; + clocks = <&ahb1_gates 6>; + resets = <&ahb1_rst 6>; + #dma-cells = <1>; + }; + + mmc0: mmc@01c0f000 { + compatible = "allwinner,sun5i-a13-mmc"; + reg = <0x01c0f000 0x1000>; + clocks = <&ahb1_gates 8>, <&mmc0_clk>; + clock-names = "ahb", "mmc"; + resets = <&ahb1_rst 8>; + reset-names = "ahb"; + interrupts = <0 60 4>; + status = "disabled"; + }; + + mmc1: mmc@01c10000 { + compatible = "allwinner,sun5i-a13-mmc"; + reg = <0x01c10000 0x1000>; + clocks = <&ahb1_gates 9>, <&mmc1_clk>; + clock-names = "ahb", "mmc"; + resets = <&ahb1_rst 9>; + reset-names = "ahb"; + interrupts = <0 61 4>; + status = "disabled"; + }; + + mmc2: mmc@01c11000 { + compatible = "allwinner,sun5i-a13-mmc"; + reg = <0x01c11000 0x1000>; + clocks = <&ahb1_gates 10>, <&mmc2_clk>; + clock-names = "ahb", "mmc"; + resets = <&ahb1_rst 10>; + reset-names = "ahb"; + interrupts = <0 62 4>; + status = "disabled"; + }; + + mmc3: mmc@01c12000 { + compatible = "allwinner,sun5i-a13-mmc"; + reg = <0x01c12000 0x1000>; + clocks = <&ahb1_gates 11>, <&mmc3_clk>; + clock-names = "ahb", "mmc"; + resets = <&ahb1_rst 11>; + reset-names = "ahb"; + interrupts = <0 63 4>; + status = "disabled"; + }; + + usbphy: phy@01c19400 { + compatible = "allwinner,sun6i-a31-usb-phy"; + reg = <0x01c19400 0x10>, + <0x01c1a800 0x4>, + <0x01c1b800 0x4>; + reg-names = "phy_ctrl", + "pmu1", + "pmu2"; + clocks = <&usb_clk 8>, + <&usb_clk 9>, + <&usb_clk 10>; + clock-names = "usb0_phy", + "usb1_phy", + "usb2_phy"; + resets = <&usb_clk 0>, + <&usb_clk 1>, + <&usb_clk 2>; + reset-names = "usb0_reset", + "usb1_reset", + "usb2_reset"; + status = "disabled"; + #phy-cells = <1>; + }; + + ehci0: usb@01c1a000 { + compatible = "allwinner,sun6i-a31-ehci", "generic-ehci"; + reg = <0x01c1a000 0x100>; + interrupts = <0 72 4>; + clocks = <&ahb1_gates 26>; + resets = <&ahb1_rst 26>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; + }; + + ohci0: usb@01c1a400 { + compatible = "allwinner,sun6i-a31-ohci", "generic-ohci"; + reg = <0x01c1a400 0x100>; + interrupts = <0 73 4>; + clocks = <&ahb1_gates 29>, <&usb_clk 16>; + resets = <&ahb1_rst 29>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; + }; + + ehci1: usb@01c1b000 { + compatible = "allwinner,sun6i-a31-ehci", "generic-ehci"; + reg = <0x01c1b000 0x100>; + interrupts = <0 74 4>; + clocks = <&ahb1_gates 27>; + resets = <&ahb1_rst 27>; + phys = <&usbphy 2>; + phy-names = "usb"; + status = "disabled"; + }; + + ohci1: usb@01c1b400 { + compatible = "allwinner,sun6i-a31-ohci", "generic-ohci"; + reg = <0x01c1b400 0x100>; + interrupts = <0 75 4>; + clocks = <&ahb1_gates 30>, <&usb_clk 17>; + resets = <&ahb1_rst 30>; + phys = <&usbphy 2>; + phy-names = "usb"; + status = "disabled"; + }; + + ohci2: usb@01c1c000 { + compatible = "allwinner,sun6i-a31-ohci", "generic-ohci"; + reg = <0x01c1c400 0x100>; + interrupts = <0 77 4>; + clocks = <&ahb1_gates 31>, <&usb_clk 18>; + resets = <&ahb1_rst 31>; + status = "disabled"; }; pio: pinctrl@01c20800 { @@ -286,6 +459,13 @@ allwinner,drive = <0>; allwinner,pull = <0>; }; + + mmc0_pins_a: mmc0@0 { + allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5"; + allwinner,function = "mmc0"; + allwinner,drive = <2>; + allwinner,pull = <0>; + }; }; ahb1_rst: reset@01c202c0 { @@ -330,6 +510,8 @@ reg-io-width = <4>; clocks = <&apb2_gates 16>; resets = <&apb2_rst 16>; + dmas = <&dma 6>, <&dma 6>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -341,6 +523,8 @@ reg-io-width = <4>; clocks = <&apb2_gates 17>; resets = <&apb2_rst 17>; + dmas = <&dma 7>, <&dma 7>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -352,6 +536,8 @@ reg-io-width = <4>; clocks = <&apb2_gates 18>; resets = <&apb2_rst 18>; + dmas = <&dma 8>, <&dma 8>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -363,6 +549,8 @@ reg-io-width = <4>; clocks = <&apb2_gates 19>; resets = <&apb2_rst 19>; + dmas = <&dma 9>, <&dma 9>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -374,6 +562,8 @@ reg-io-width = <4>; clocks = <&apb2_gates 20>; resets = <&apb2_rst 20>; + dmas = <&dma 10>, <&dma 10>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -385,6 +575,8 @@ reg-io-width = <4>; clocks = <&apb2_gates 21>; resets = <&apb2_rst 21>; + dmas = <&dma 22>, <&dma 22>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -434,6 +626,8 @@ interrupts = <0 65 4>; clocks = <&ahb1_gates 20>, <&spi0_clk>; clock-names = "ahb", "mod"; + dmas = <&dma 23>, <&dma 23>; + dma-names = "rx", "tx"; resets = <&ahb1_rst 20>; status = "disabled"; }; @@ -444,6 +638,8 @@ interrupts = <0 66 4>; clocks = <&ahb1_gates 21>, <&spi1_clk>; clock-names = "ahb", "mod"; + dmas = <&dma 24>, <&dma 24>; + dma-names = "rx", "tx"; resets = <&ahb1_rst 21>; status = "disabled"; }; @@ -454,6 +650,8 @@ interrupts = <0 67 4>; clocks = <&ahb1_gates 22>, <&spi2_clk>; clock-names = "ahb", "mod"; + dmas = <&dma 25>, <&dma 25>; + dma-names = "rx", "tx"; resets = <&ahb1_rst 22>; status = "disabled"; }; @@ -464,6 +662,8 @@ interrupts = <0 68 4>; clocks = <&ahb1_gates 23>, <&spi3_clk>; clock-names = "ahb", "mod"; + dmas = <&dma 26>, <&dma 26>; + dma-names = "rx", "tx"; resets = <&ahb1_rst 23>; status = "disabled"; }; @@ -479,14 +679,74 @@ interrupts = <1 9 0xf04>; }; + nmi_intc: interrupt-controller@01f00c0c { + compatible = "allwinner,sun6i-a31-sc-nmi"; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x01f00c0c 0x38>; + interrupts = <0 32 4>; + }; + + prcm@01f01400 { + compatible = "allwinner,sun6i-a31-prcm"; + reg = <0x01f01400 0x200>; + + ar100: ar100_clk { + compatible = "allwinner,sun6i-a31-ar100-clk"; + #clock-cells = <0>; + clocks = <&osc32k>, <&osc24M>, <&pll6>, <&pll6>; + clock-output-names = "ar100"; + }; + + ahb0: ahb0_clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <1>; + clocks = <&ar100>; + clock-output-names = "ahb0"; + }; + + apb0: apb0_clk { + compatible = "allwinner,sun6i-a31-apb0-clk"; + #clock-cells = <0>; + clocks = <&ahb0>; + clock-output-names = "apb0"; + }; + + apb0_gates: apb0_gates_clk { + compatible = "allwinner,sun6i-a31-apb0-gates-clk"; + #clock-cells = <1>; + clocks = <&apb0>; + clock-output-names = "apb0_pio", "apb0_ir", + "apb0_timer", "apb0_p2wi", + "apb0_uart", "apb0_1wire", + "apb0_i2c"; + }; + + apb0_rst: apb0_rst { + compatible = "allwinner,sun6i-a31-clock-reset"; + #reset-cells = <1>; + }; + }; + cpucfg@01f01c00 { compatible = "allwinner,sun6i-a31-cpuconfig"; reg = <0x01f01c00 0x300>; }; - prcm@01f01c00 { - compatible = "allwinner,sun6i-a31-prcm"; - reg = <0x01f01400 0x200>; + r_pio: pinctrl@01f02c00 { + compatible = "allwinner,sun6i-a31-r-pinctrl"; + reg = <0x01f02c00 0x400>; + interrupts = <0 45 4>, + <0 46 4>; + clocks = <&apb0_gates 0>; + resets = <&apb0_rst 0>; + gpio-controller; + interrupt-controller; + #address-cells = <1>; + #size-cells = <0>; + #gpio-cells = <3>; }; }; }; diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts index 68de89ffbdfa..a5ad945197e8 100644 --- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts +++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts @@ -20,6 +20,16 @@ compatible = "cubietech,cubieboard2", "allwinner,sun7i-a20"; soc@01c00000 { + mmc0: mmc@01c0f000 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 1 0>; /* PH1 */ + cd-inverted; + status = "okay"; + }; + usbphy: phy@01c13400 { usb1_vbus-supply = <®_usb1_vbus>; usb2_vbus-supply = <®_usb2_vbus>; diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts index cb25d3c8da58..b7e79d0bf4a7 100644 --- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts +++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts @@ -20,6 +20,24 @@ compatible = "cubietech,cubietruck", "allwinner,sun7i-a20"; soc@01c00000 { + mmc0: mmc@01c0f000 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 1 0>; /* PH1 */ + cd-inverted; + status = "okay"; + }; + + mmc3: mmc@01c12000 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc3_pins_a>; + vmmc-supply = <®_vmmc3>; + non-removable; + status = "okay"; + }; + usbphy: phy@01c13400 { usb1_vbus-supply = <®_usb1_vbus>; usb2_vbus-supply = <®_usb2_vbus>; @@ -48,6 +66,18 @@ }; pinctrl@01c20800 { + mmc3_pins_a: mmc3@0 { + /* AP6210 requires pull-up */ + allwinner,pull = <1>; + }; + + vmmc3_pin_cubietruck: vmmc3_pin@0 { + allwinner,pins = "PH9"; + allwinner,function = "gpio_out"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + ahci_pwr_pin_cubietruck: ahci_pwr_pin@1 { allwinner,pins = "PH12"; allwinner,function = "gpio_out"; @@ -63,6 +93,12 @@ }; }; + pwm: pwm@01c20e00 { + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pins_a>, <&pwm1_pins_a>; + status = "okay"; + }; + uart0: serial@01c28000 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; @@ -139,4 +175,15 @@ reg_usb2_vbus: usb2-vbus { status = "okay"; }; + + reg_vmmc3: vmmc3 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&vmmc3_pin_cubietruck>; + regulator-name = "vmmc3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + gpio = <&pio 7 9 0>; + }; }; diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts index eeadf76362fa..b759630bc9a9 100644 --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts @@ -31,6 +31,26 @@ status = "okay"; }; + mmc0: mmc@01c0f000 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 1 0>; /* PH1 */ + cd-inverted; + status = "okay"; + }; + + mmc3: mmc@01c12000 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc3_pins_a>, <&mmc3_cd_pin_olinuxinom>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 11 0>; /* PH11 */ + cd-inverted; + status = "okay"; + }; + usbphy: phy@01c13400 { usb1_vbus-supply = <®_usb1_vbus>; usb2_vbus-supply = <®_usb2_vbus>; @@ -65,6 +85,13 @@ }; pinctrl@01c20800 { + mmc3_cd_pin_olinuxinom: mmc3_cd_pin@0 { + allwinner,pins = "PH11"; + allwinner,function = "gpio_in"; + allwinner,drive = <0>; + allwinner,pull = <1>; + }; + led_pins_olinuxino: led_pins@0 { allwinner,pins = "PH2"; allwinner,function = "gpio_out"; diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 32efc105df83..56df970ffe25 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -57,6 +57,12 @@ <1 10 0xf08>; }; + pmu { + compatible = "arm,cortex-a7-pmu", "arm,cortex-a15-pmu"; + interrupts = <0 120 4>, + <0 121 4>; + }; + clocks { #address-cells = <1>; #size-cells = <1>; @@ -447,6 +453,42 @@ #size-cells = <0>; }; + mmc0: mmc@01c0f000 { + compatible = "allwinner,sun5i-a13-mmc"; + reg = <0x01c0f000 0x1000>; + clocks = <&ahb_gates 8>, <&mmc0_clk>; + clock-names = "ahb", "mmc"; + interrupts = <0 32 4>; + status = "disabled"; + }; + + mmc1: mmc@01c10000 { + compatible = "allwinner,sun5i-a13-mmc"; + reg = <0x01c10000 0x1000>; + clocks = <&ahb_gates 9>, <&mmc1_clk>; + clock-names = "ahb", "mmc"; + interrupts = <0 33 4>; + status = "disabled"; + }; + + mmc2: mmc@01c11000 { + compatible = "allwinner,sun5i-a13-mmc"; + reg = <0x01c11000 0x1000>; + clocks = <&ahb_gates 10>, <&mmc2_clk>; + clock-names = "ahb", "mmc"; + interrupts = <0 34 4>; + status = "disabled"; + }; + + mmc3: mmc@01c12000 { + compatible = "allwinner,sun5i-a13-mmc"; + reg = <0x01c12000 0x1000>; + clocks = <&ahb_gates 11>, <&mmc3_clk>; + clock-names = "ahb", "mmc"; + interrupts = <0 35 4>; + status = "disabled"; + }; + usbphy: phy@01c13400 { #phy-cells = <1>; compatible = "allwinner,sun7i-a20-usb-phy"; @@ -540,6 +582,20 @@ #size-cells = <0>; #gpio-cells = <3>; + pwm0_pins_a: pwm0@0 { + allwinner,pins = "PB2"; + allwinner,function = "pwm"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + + pwm1_pins_a: pwm1@0 { + allwinner,pins = "PI3"; + allwinner,function = "pwm"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + uart0_pins_a: uart0@0 { allwinner,pins = "PB22", "PB23"; allwinner,function = "uart0"; @@ -653,6 +709,27 @@ allwinner,drive = <0>; allwinner,pull = <0>; }; + + mmc0_pins_a: mmc0@0 { + allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5"; + allwinner,function = "mmc0"; + allwinner,drive = <2>; + allwinner,pull = <0>; + }; + + mmc0_cd_pin_reference_design: mmc0_cd_pin@0 { + allwinner,pins = "PH1"; + allwinner,function = "gpio_in"; + allwinner,drive = <0>; + allwinner,pull = <1>; + }; + + mmc3_pins_a: mmc3@0 { + allwinner,pins = "PI4","PI5","PI6","PI7","PI8","PI9"; + allwinner,function = "mmc3"; + allwinner,drive = <2>; + allwinner,pull = <0>; + }; }; timer@01c20c00 { @@ -678,6 +755,14 @@ interrupts = <0 24 4>; }; + pwm: pwm@01c20e00 { + compatible = "allwinner,sun7i-a20-pwm"; + reg = <0x01c20e00 0xc>; + clocks = <&osc24M>; + #pwm-cells = <3>; + status = "disabled"; + }; + sid: eeprom@01c23800 { compatible = "allwinner,sun7i-a20-sid"; reg = <0x01c23800 0x200>; @@ -776,6 +861,8 @@ clocks = <&apb1_gates 0>; clock-frequency = <100000>; status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; }; i2c1: i2c@01c2b000 { @@ -785,6 +872,8 @@ clocks = <&apb1_gates 1>; clock-frequency = <100000>; status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; }; i2c2: i2c@01c2b400 { @@ -794,6 +883,8 @@ clocks = <&apb1_gates 2>; clock-frequency = <100000>; status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; }; i2c3: i2c@01c2b800 { @@ -803,6 +894,8 @@ clocks = <&apb1_gates 3>; clock-frequency = <100000>; status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; }; i2c4: i2c@01c2bc00 { @@ -812,6 +905,8 @@ clocks = <&apb1_gates 15>; clock-frequency = <100000>; status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; }; gmac: ethernet@01c50000 { diff --git a/arch/arm/boot/dts/sunxi-common-regulators.dtsi b/arch/arm/boot/dts/sunxi-common-regulators.dtsi index 18eeac0670b9..026bd83f078f 100644 --- a/arch/arm/boot/dts/sunxi-common-regulators.dtsi +++ b/arch/arm/boot/dts/sunxi-common-regulators.dtsi @@ -72,4 +72,11 @@ gpio = <&pio 7 3 0>; status = "disabled"; }; + + reg_vcc3v3: vcc3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; }; diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts index a288a12823ed..5c21d216515a 100644 --- a/arch/arm/boot/dts/tegra114-dalmore.dts +++ b/arch/arm/boot/dts/tegra114-dalmore.dts @@ -25,6 +25,7 @@ hdmi@54280000 { status = "okay"; + hdmi-supply = <&vdd_5v0_hdmi>; vdd-supply = <&vdd_hdmi_reg>; pll-supply = <&palmas_smps3_reg>; @@ -36,6 +37,8 @@ dsi@54300000 { status = "okay"; + avdd-dsi-csi-supply = <&avdd_1v2_reg>; + panel@0 { compatible = "panasonic,vvx10f004b00", "simple-panel"; @@ -982,12 +985,10 @@ regulator-max-microvolt = <2800000>; }; - ldo3 { + avdd_1v2_reg: ldo3 { regulator-name = "avdd-dsi-csi"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; - regulator-always-on; - regulator-boot-on; }; ldo4 { @@ -1105,6 +1106,7 @@ sdhci@78000400 { cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>; bus-width = <4>; status = "okay"; }; @@ -1231,8 +1233,6 @@ regulator-name = "vdd_hdmi_5v0"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; - enable-active-high; - gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>; vin-supply = <&tps65090_dcdc1_reg>; }; @@ -1245,6 +1245,17 @@ enable-active-high; gpio = <&palmas_gpio 6 0>; }; + + vdd_5v0_hdmi: regulator@7 { + compatible = "regulator-fixed"; + reg = <7>; + regulator-name = "VDD_5V0_HDMI_CON"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <&tps65090_dcdc1_reg>; + }; }; sound { diff --git a/arch/arm/boot/dts/tegra114-roth.dts b/arch/arm/boot/dts/tegra114-roth.dts new file mode 100644 index 000000000000..0b0e8e07d965 --- /dev/null +++ b/arch/arm/boot/dts/tegra114-roth.dts @@ -0,0 +1,1113 @@ +/dts-v1/; + +#include <dt-bindings/input/input.h> +#include "tegra114.dtsi" + +/ { + model = "NVIDIA SHIELD"; + compatible = "nvidia,roth", "nvidia,tegra114"; + + chosen { + /* SHIELD's bootloader's arguments need to be overridden */ + bootargs = "console=ttyS0,115200n8 console=tty1 gpt fbcon=rotate:1"; + /* SHIELD's bootloader will place initrd at this address */ + linux,initrd-start = <0x82000000>; + linux,initrd-end = <0x82800000>; + }; + + firmware { + trusted-foundations { + compatible = "tlm,trusted-foundations"; + tlm,version-major = <2>; + tlm,version-minor = <8>; + }; + }; + + memory { + /* memory >= 0x79600000 is reserved for firmware usage */ + reg = <0x80000000 0x79600000>; + }; + + pinmux@70000868 { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + clk1_out_pw4 { + nvidia,pins = "clk1_out_pw4"; + nvidia,function = "extperiph1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + dap1_din_pn1 { + nvidia,pins = "dap1_din_pn1"; + nvidia,function = "i2s0"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dap1_dout_pn2 { + nvidia,pins = "dap1_dout_pn2", + "dap1_fs_pn0", + "dap1_sclk_pn3"; + nvidia,function = "i2s0"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dap2_din_pa4 { + nvidia,pins = "dap2_din_pa4"; + nvidia,function = "i2s1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dap2_dout_pa5 { + nvidia,pins = "dap2_dout_pa5", + "dap2_fs_pa2", + "dap2_sclk_pa3"; + nvidia,function = "i2s1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dap4_din_pp5 { + nvidia,pins = "dap4_din_pp5", + "dap4_dout_pp6", + "dap4_fs_pp4", + "dap4_sclk_pp7"; + nvidia,function = "i2s3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dvfs_pwm_px0 { + nvidia,pins = "dvfs_pwm_px0", + "dvfs_clk_px2"; + nvidia,function = "cldvfs"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ulpi_clk_py0 { + nvidia,pins = "ulpi_clk_py0", + "ulpi_data0_po1", + "ulpi_data1_po2", + "ulpi_data2_po3", + "ulpi_data3_po4", + "ulpi_data4_po5", + "ulpi_data5_po6", + "ulpi_data6_po7", + "ulpi_data7_po0"; + nvidia,function = "ulpi"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + ulpi_dir_py1 { + nvidia,pins = "ulpi_dir_py1", + "ulpi_nxt_py2"; + nvidia,function = "ulpi"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + ulpi_stp_py3 { + nvidia,pins = "ulpi_stp_py3"; + nvidia,function = "ulpi"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + cam_i2c_scl_pbb1 { + nvidia,pins = "cam_i2c_scl_pbb1", + "cam_i2c_sda_pbb2"; + nvidia,function = "i2c3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,lock = <TEGRA_PIN_DISABLE>; + nvidia,open-drain = <TEGRA_PIN_DISABLE>; + }; + cam_mclk_pcc0 { + nvidia,pins = "cam_mclk_pcc0", + "pbb0"; + nvidia,function = "vi_alt3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + nvidia,lock = <TEGRA_PIN_DISABLE>; + }; + pbb4 { + nvidia,pins = "pbb4"; + nvidia,function = "vgp4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + nvidia,lock = <TEGRA_PIN_DISABLE>; + }; + gen2_i2c_scl_pt5 { + nvidia,pins = "gen2_i2c_scl_pt5", + "gen2_i2c_sda_pt6"; + nvidia,function = "i2c2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,lock = <TEGRA_PIN_DISABLE>; + nvidia,open-drain = <TEGRA_PIN_DISABLE>; + }; + gmi_a16_pj7 { + nvidia,pins = "gmi_a16_pj7", + "gmi_a19_pk7"; + nvidia,function = "uartd"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + gmi_a17_pb0 { + nvidia,pins = "gmi_a17_pb0", + "gmi_a18_pb1"; + nvidia,function = "uartd"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gmi_ad5_pg5 { + nvidia,pins = "gmi_ad5_pg5", + "gmi_wr_n_pi0"; + nvidia,function = "spi4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gmi_ad6_pg6 { + nvidia,pins = "gmi_ad6_pg6", + "gmi_ad7_pg7"; + nvidia,function = "spi4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gmi_ad12_ph4 { + nvidia,pins = "gmi_ad12_ph4"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + gmi_cs6_n_pi13 { + nvidia,pins = "gmi_cs6_n_pi3"; + nvidia,function = "nand"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + gmi_ad9_ph1 { + nvidia,pins = "gmi_ad9_ph1"; + nvidia,function = "pwm1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + gmi_cs1_n_pj2 { + nvidia,pins = "gmi_cs1_n_pj2", + "gmi_oe_n_pi1"; + nvidia,function = "soc"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gmi_rst_n_pi4 { + nvidia,pins = "gmi_rst_n_pi4"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gmi_iordy_pi5 { + nvidia,pins = "gmi_iordy_pi5"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + clk2_out_pw5 { + nvidia,pins = "clk2_out_pw5"; + nvidia,function = "extperiph2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc1_clk_pz0 { + nvidia,pins = "sdmmc1_clk_pz0"; + nvidia,function = "sdmmc1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + sdmmc1_cmd_pz1 { + nvidia,pins = "sdmmc1_cmd_pz1", + "sdmmc1_dat0_py7", + "sdmmc1_dat1_py6", + "sdmmc1_dat2_py5", + "sdmmc1_dat3_py4"; + nvidia,function = "sdmmc1"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc3_clk_pa6 { + nvidia,pins = "sdmmc3_clk_pa6"; + nvidia,function = "sdmmc3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + sdmmc3_cmd_pa7 { + nvidia,pins = "sdmmc3_cmd_pa7", + "sdmmc3_dat0_pb7", + "sdmmc3_dat1_pb6", + "sdmmc3_dat2_pb5", + "sdmmc3_dat3_pb4", + "sdmmc3_cd_n_pv2", + "sdmmc3_clk_lb_out_pee4", + "sdmmc3_clk_lb_in_pee5"; + nvidia,function = "sdmmc3"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_col4_pq4 { + nvidia,pins = "kb_col4_pq4"; + nvidia,function = "sdmmc3"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc4_clk_pcc4 { + nvidia,pins = "sdmmc4_clk_pcc4"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + sdmmc4_cmd_pt7 { + nvidia,pins = "sdmmc4_cmd_pt7", + "sdmmc4_dat0_paa0", + "sdmmc4_dat1_paa1", + "sdmmc4_dat2_paa2", + "sdmmc4_dat3_paa3", + "sdmmc4_dat4_paa4", + "sdmmc4_dat5_paa5", + "sdmmc4_dat6_paa6", + "sdmmc4_dat7_paa7"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + clk_32k_out_pa0 { + nvidia,pins = "clk_32k_out_pa0"; + nvidia,function = "blink"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_col0_pq0 { + nvidia,pins = "kb_col0_pq0", + "kb_col1_pq1", + "kb_col2_pq2", + "kb_row0_pr0", + "kb_row1_pr1", + "kb_row2_pr2", + "kb_row8_ps0"; + nvidia,function = "kbc"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_row7_pr7 { + nvidia,pins = "kb_row7_pr7"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_row10_ps2 { + nvidia,pins = "kb_row10_ps2"; + nvidia,function = "uarta"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_row9_ps1 { + nvidia,pins = "kb_row9_ps1"; + nvidia,function = "uarta"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pwr_i2c_scl_pz6 { + nvidia,pins = "pwr_i2c_scl_pz6", + "pwr_i2c_sda_pz7"; + nvidia,function = "i2cpwr"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,lock = <TEGRA_PIN_DISABLE>; + nvidia,open-drain = <TEGRA_PIN_DISABLE>; + }; + sys_clk_req_pz5 { + nvidia,pins = "sys_clk_req_pz5"; + nvidia,function = "sysclk"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + core_pwr_req { + nvidia,pins = "core_pwr_req"; + nvidia,function = "pwron"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + cpu_pwr_req { + nvidia,pins = "cpu_pwr_req"; + nvidia,function = "cpu"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pwr_int_n { + nvidia,pins = "pwr_int_n"; + nvidia,function = "pmi"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + reset_out_n { + nvidia,pins = "reset_out_n"; + nvidia,function = "reset_out_n"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + clk3_out_pee0 { + nvidia,pins = "clk3_out_pee0"; + nvidia,function = "extperiph3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + gen1_i2c_scl_pc4 { + nvidia,pins = "gen1_i2c_scl_pc4", + "gen1_i2c_sda_pc5"; + nvidia,function = "i2c1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,lock = <TEGRA_PIN_DISABLE>; + nvidia,open-drain = <TEGRA_PIN_DISABLE>; + }; + uart2_cts_n_pj5 { + nvidia,pins = "uart2_cts_n_pj5"; + nvidia,function = "uartb"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + uart2_rts_n_pj6 { + nvidia,pins = "uart2_rts_n_pj6"; + nvidia,function = "uartb"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + uart2_rxd_pc3 { + nvidia,pins = "uart2_rxd_pc3"; + nvidia,function = "irda"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + uart2_txd_pc2 { + nvidia,pins = "uart2_txd_pc2"; + nvidia,function = "irda"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + uart3_cts_n_pa1 { + nvidia,pins = "uart3_cts_n_pa1", + "uart3_rxd_pw7"; + nvidia,function = "uartc"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + uart3_rts_n_pc0 { + nvidia,pins = "uart3_rts_n_pc0", + "uart3_txd_pw6"; + nvidia,function = "uartc"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + owr { + nvidia,pins = "owr"; + nvidia,function = "owr"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + hdmi_cec_pee3 { + nvidia,pins = "hdmi_cec_pee3"; + nvidia,function = "cec"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,lock = <TEGRA_PIN_DISABLE>; + nvidia,open-drain = <TEGRA_PIN_DISABLE>; + }; + ddc_scl_pv4 { + nvidia,pins = "ddc_scl_pv4", + "ddc_sda_pv5"; + nvidia,function = "i2c4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,lock = <TEGRA_PIN_DISABLE>; + nvidia,rcv-sel = <TEGRA_PIN_ENABLE>; + }; + spdif_in_pk6 { + nvidia,pins = "spdif_in_pk6"; + nvidia,function = "usb"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,lock = <TEGRA_PIN_DISABLE>; + }; + usb_vbus_en0_pn4 { + nvidia,pins = "usb_vbus_en0_pn4"; + nvidia,function = "usb"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,lock = <TEGRA_PIN_DISABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + gpio_x6_aud_px6 { + nvidia,pins = "gpio_x6_aud_px6"; + nvidia,function = "spi6"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gpio_x1_aud_px1 { + nvidia,pins = "gpio_x1_aud_px1"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gpio_x7_aud_px7 { + nvidia,pins = "gpio_x7_aud_px7"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gmi_adv_n_pk0 { + nvidia,pins = "gmi_adv_n_pk0"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gmi_cs0_n_pj0 { + nvidia,pins = "gmi_cs0_n_pj0"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pu3 { + nvidia,pins = "pu3"; + nvidia,function = "pwm0"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + gpio_x4_aud_px4 { + nvidia,pins = "gpio_x4_aud_px4", + "gpio_x5_aud_px5"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gpio_x3_aud_px3 { + nvidia,pins = "gpio_x3_aud_px3"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gpio_w2_aud_pw2 { + nvidia,pins = "gpio_w2_aud_pw2"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gpio_w3_aud_pw3 { + nvidia,pins = "gpio_w3_aud_pw3"; + nvidia,function = "spi6"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dap3_fs_pp0 { + nvidia,pins = "dap3_fs_pp0", + "dap3_din_pp1", + "dap3_dout_pp2", + "dap3_sclk_pp3"; + nvidia,function = "i2s2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pv0 { + nvidia,pins = "pv0"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pv1 { + nvidia,pins = "pv1"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pbb3 { + nvidia,pins = "pbb3", + "pbb5", + "pbb6", + "pbb7"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pcc1 { + nvidia,pins = "pcc1", + "pcc2"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gmi_ad0_pg0 { + nvidia,pins = "gmi_ad0_pg0", + "gmi_ad1_pg1"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + gmi_ad10_ph2 { + nvidia,pins = "gmi_ad10_ph2", + "gmi_ad12_ph4", + "gmi_ad15_ph7", + "gmi_cs3_n_pk4"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + gmi_ad11_ph3 { + nvidia,pins = "gmi_ad11_ph3", + "gmi_ad13_ph5", + "gmi_ad8_ph0", + "gmi_clk_pk1", + "gmi_cs2_n_pk3"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + gmi_ad14_ph6 { + nvidia,pins = "gmi_ad14_ph6", + "gmi_cs0_n_pj0", + "gmi_cs4_n_pk2", + "gmi_cs7_n_pi6", + "gmi_dqs_p_pj3", + "gmi_wp_n_pc7"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gmi_ad2_pg2 { + nvidia,pins = "gmi_ad2_pg2", + "gmi_ad3_pg3"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc1_wp_n_pv3 { + nvidia,pins = "sdmmc1_wp_n_pv3"; + nvidia,function = "spi4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + clk2_req_pcc5 { + nvidia,pins = "clk2_req_pcc5"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_col3_pq3 { + nvidia,pins = "kb_col3_pq3"; + nvidia,function = "pwm2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_col5_pq5 { + nvidia,pins = "kb_col5_pq5"; + nvidia,function = "kbc"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_col6_pq6 { + nvidia,pins = "kb_col6_pq6", + "kb_col7_pq7"; + nvidia,function = "kbc"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_row3_pr3 { + nvidia,pins = "kb_row3_pr3", + "kb_row4_pr4", + "kb_row6_pr6"; + nvidia,function = "kbc"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + clk3_req_pee1 { + nvidia,pins = "clk3_req_pee1"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pu2 { + nvidia,pins = "pu2"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + hdmi_int_pn7 { + nvidia,pins = "hdmi_int_pn7"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + + drive_sdio1 { + nvidia,pins = "drive_sdio1"; + nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>; + nvidia,schmitt = <TEGRA_PIN_DISABLE>; + nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>; + nvidia,pull-down-strength = <36>; + nvidia,pull-up-strength = <20>; + nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>; + nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOW>; + }; + drive_sdio3 { + nvidia,pins = "drive_sdio3"; + nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>; + nvidia,schmitt = <TEGRA_PIN_DISABLE>; + nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>; + nvidia,pull-down-strength = <36>; + nvidia,pull-up-strength = <20>; + nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>; + nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>; + }; + drive_gma { + nvidia,pins = "drive_gma"; + nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>; + nvidia,schmitt = <TEGRA_PIN_DISABLE>; + nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>; + nvidia,pull-down-strength = <2>; + nvidia,pull-up-strength = <2>; + nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>; + nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>; + nvidia,drive-type = <1>; + }; + }; + }; + + /* Usable on reworked devices only */ + serial@70006300 { + status = "okay"; + }; + + pwm@7000a000 { + status = "okay"; + }; + + i2c@7000d000 { + status = "okay"; + clock-frequency = <400000>; + + regulator@43 { + compatible = "ti,tps51632"; + reg = <0x43>; + regulator-name = "vdd-cpu"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1520000>; + regulator-always-on; + regulator-boot-on; + }; + + palmas: pmic@58 { + compatible = "ti,palmas"; + reg = <0x58>; + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_LOW>; + + #interrupt-cells = <2>; + interrupt-controller; + + ti,system-power-controller; + + palmas_gpio: gpio { + compatible = "ti,palmas-gpio"; + gpio-controller; + #gpio-cells = <2>; + }; + + pmic { + compatible = "ti,tps65913-pmic", "ti,palmas-pmic"; + + regulators { + smps12 { + regulator-name = "vdd-ddr"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + vdd_1v8: smps3 { + regulator-name = "vdd-1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + smps457 { + regulator-name = "vdd-soc"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + }; + + smps8 { + regulator-name = "avdd-pll-1v05"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-always-on; + regulator-boot-on; + }; + + smps9 { + regulator-name = "vdd-2v85-emmc"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + + smps10_out1 { + regulator-name = "vdd-fan"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; + + smps10_out2 { + regulator-name = "vdd-5v0-sys"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo2 { + regulator-name = "vdd-2v8-display"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-boot-on; + }; + + ldo3 { + regulator-name = "avdd-1v2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo4 { + regulator-name = "vpp-fuse"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo5 { + regulator-name = "avdd-hdmi-pll"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + ldo6 { + regulator-name = "vdd-sensor-2v8"; + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + }; + + ldo8 { + regulator-name = "vdd-rtc"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + regulator-boot-on; + ti,enable-ldo8-tracking; + }; + + vddio_sdmmc3: ldo9 { + regulator-name = "vddio-sdmmc3"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + ldousb { + regulator-name = "avdd-usb-hdmi"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + vdd_3v3_sys: regen1 { + regulator-name = "rail-3v3"; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + regen2 { + regulator-name = "rail-5v0"; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; + + }; + }; + + rtc { + compatible = "ti,palmas-rtc"; + interrupt-parent = <&palmas>; + interrupts = <8 0>; + }; + + }; + }; + + pmc@7000e400 { + nvidia,invert-interrupt; + }; + + /* SD card */ + sdhci@78000400 { + status = "okay"; + bus-width = <4>; + vmmc-supply = <&vddio_sdmmc3>; + cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; + power-gpios = <&gpio TEGRA_GPIO(H, 0) GPIO_ACTIVE_HIGH>; + }; + + /* eMMC */ + sdhci@78000600 { + status = "okay"; + bus-width = <8>; + vmmc-supply = <&vdd_1v8>; + non-removable; + }; + + /* External USB port (must be powered) */ + usb@7d000000 { + status = "okay"; + }; + + usb-phy@7d000000 { + status = "okay"; + nvidia,xcvr-setup = <7>; + nvidia,xcvr-lsfslew = <2>; + nvidia,xcvr-lsrslew = <2>; + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; + /* Should be changed to "otg" once we have vbus_supply */ + /* As of now, USB devices need to be powered externally */ + dr_mode = "host"; + }; + + /* SHIELD controller */ + usb@7d008000 { + status = "okay"; + }; + + usb-phy@7d008000 { + status = "okay"; + nvidia,xcvr-setup = <7>; + nvidia,xcvr-lsfslew = <2>; + nvidia,xcvr-lsrslew = <2>; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm 1 40000>; + + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + + power-supply = <&lcd_bl_en>; + enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + back { + label = "Back"; + gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>; + linux,code = <KEY_BACK>; + }; + + home { + label = "Home"; + gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>; + linux,code = <KEY_HOME>; + }; + + power { + label = "Power"; + gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; + linux,code = <KEY_POWER>; + gpio-key,wakeup; + }; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + lcd_bl_en: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "lcd_bl_en"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-boot-on; + }; + + regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "vdd_lcd_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vdd_1v8>; + enable-active-high; + gpio = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>; + regulator-boot-on; + }; + + regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "vdd_1v8_ts"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&gpio TEGRA_GPIO(K, 3) GPIO_ACTIVE_LOW>; + regulator-boot-on; + }; + + regulator@3 { + compatible = "regulator-fixed"; + reg = <3>; + regulator-name = "vdd_3v3_ts"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + gpio = <&gpio TEGRA_GPIO(H, 5) GPIO_ACTIVE_HIGH>; + regulator-boot-on; + }; + + regulator@4 { + compatible = "regulator-fixed"; + reg = <4>; + regulator-name = "vdd_1v8_com"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vdd_1v8>; + enable-active-high; + gpio = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_HIGH>; + regulator-boot-on; + }; + + regulator@5 { + compatible = "regulator-fixed"; + reg = <5>; + regulator-name = "vdd_3v3_com"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vdd_3v3_sys>; + enable-active-high; + gpio = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_HIGH>; + regulator-always-on; + regulator-boot-on; + }; + }; +}; diff --git a/arch/arm/boot/dts/tegra114-tn7.dts b/arch/arm/boot/dts/tegra114-tn7.dts new file mode 100644 index 000000000000..963662145635 --- /dev/null +++ b/arch/arm/boot/dts/tegra114-tn7.dts @@ -0,0 +1,348 @@ +/dts-v1/; + +#include <dt-bindings/input/input.h> +#include "tegra114.dtsi" + +/ { + model = "Tegra Note 7"; + compatible = "nvidia,tn7", "nvidia,tegra114"; + + chosen { + /* TN7's bootloader's arguments need to be overridden */ + bootargs = "console=ttyS0,115200n8 console=tty1 gpt fbcon=rotate:2"; + /* TN7's bootloader will place initrd at this address */ + linux,initrd-start = <0x82000000>; + linux,initrd-end = <0x82800000>; + }; + + firmware { + trusted-foundations { + compatible = "tlm,trusted-foundations"; + tlm,version-major = <2>; + tlm,version-minor = <8>; + }; + }; + + memory { + /* memory >= 0x37e00000 is reserved for firmware usage */ + reg = <0x80000000 0x37e00000>; + }; + + host1x@50000000 { + dsi@54300000 { + status = "okay"; + + vdd-supply = <&vdd_1v2_ap>; + + panel@0 { + compatible = "lg,ld070wx3-sl01"; + reg = <0>; + + power-supply = <&vdd_lcd>; + backlight = <&backlight>; + }; + }; + }; + + serial@70006300 { + status = "okay"; + }; + + pwm@7000a000 { + status = "okay"; + }; + + i2c@7000d000 { + status = "okay"; + clock-frequency = <400000>; + + palmas: pmic@58 { + compatible = "ti,palmas"; + reg = <0x58>; + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_LOW>; + + #interrupt-cells = <2>; + interrupt-controller; + + ti,system-power-controller; + + palmas_gpio: gpio { + compatible = "ti,palmas-gpio"; + gpio-controller; + #gpio-cells = <2>; + }; + + pmic { + compatible = "ti,tps65913-pmic", "ti,palmas-pmic"; + + ldoln-in-supply = <&vdd_smps10_out2>; + + regulators { + smps123 { + regulator-name = "vd-cpu"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + }; + + smps45 { + regulator-name = "vd-soc"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + regulator-boot-on; + }; + + smps6 { + regulator-name = "va-lcd-hv"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + regulator-boot-on; + }; + + smps7 { + regulator-name = "vd-ddr"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-boot-on; + }; + + vdd_1v8: smps8 { + regulator-name = "vs-pmu-1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + vdd_2v9_sys: smps9 { + regulator-name = "vs-sys-2v9"; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <2900000>; + regulator-always-on; + regulator-boot-on; + }; + + vdd_smps10_out1: smps10_out1 { + regulator-name = "vd-smps10-out1"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; + + vdd_smps10_out2: smps10_out2 { + regulator-name = "vd-smps10-out2"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo1 { + regulator-name = "va-pllx"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-always-on; + regulator-boot-on; + }; + + vdd_1v2_ap: ldo2 { + regulator-name = "va-ap-1v2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo3 { + regulator-name = "vd-fuse"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo4 { + regulator-name = "vd-ts-hv"; + regulator-min-microvolt = <3200000>; + regulator-max-microvolt = <3200000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo5 { + regulator-name = "va-cam2-hv"; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <2700000>; + }; + + ldo6 { + regulator-name = "va-sns-hv"; + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + }; + + ldo7 { + regulator-name = "va-cam1-hv"; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <2700000>; + }; + + ldo8 { + regulator-name = "va-ap-rtc"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + ti,enable-ldo8-tracking; + regulator-always-on; + regulator-boot-on; + }; + + ldo9 { + regulator-name = "vi-sdcard"; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <2900000>; + }; + + ldousb { + regulator-name = "avdd-usb"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + ldoln { + regulator-name = "va-hdmi"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + }; + }; + + rtc { + compatible = "ti,palmas-rtc"; + interrupt-parent = <&palmas>; + interrupts = <8 0>; + }; + + }; + }; + + pmc@7000e400 { + nvidia,invert-interrupt; + }; + + /* eMMC */ + sdhci@78000600 { + status = "okay"; + bus-width = <8>; + vmmc-supply = <&vdd_1v8>; + non-removable; + }; + + usb@7d000000 { + status = "okay"; + }; + + usb-phy@7d000000 { + status = "okay"; + nvidia,xcvr-setup = <7>; + nvidia,xcvr-lsfslew = <2>; + nvidia,xcvr-lsrslew = <2>; + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; + /* Should be changed to "otg" once we have vbus_supply */ + /* As of now, USB devices need to be powered externally */ + dr_mode = "host"; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm 1 40000>; + + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + + power-supply = <&lcd_bl_en>; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock { + compatible = "fixed-clock"; + reg = <0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + power { + label = "Power"; + gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; + linux,code = <KEY_POWER>; + gpio-key,wakeup; + }; + + volume_down { + label = "Volume Down"; + gpios = <&gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_LOW>; + linux,code = <KEY_VOLUMEDOWN>; + }; + + volume_up { + label = "Volume Up"; + gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>; + linux,code = <KEY_VOLUMEUP>; + }; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + /* FIXME: output of BQ24192 */ + vs_sys: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "VS_SYS"; + regulator-min-microvolt = <4200000>; + regulator-max-microvolt = <4200000>; + regulator-always-on; + regulator-boot-on; + }; + + lcd_bl_en: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "VDD_LCD_BL"; + regulator-min-microvolt = <16500000>; + regulator-max-microvolt = <16500000>; + gpio = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <&vs_sys>; + regulator-boot-on; + }; + + vdd_lcd: regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "VD_LCD_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&palmas_gpio 4 GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <&vdd_1v8>; + regulator-boot-on; + }; + }; +}; diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts new file mode 100644 index 000000000000..e31fb61a81d3 --- /dev/null +++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts @@ -0,0 +1,1827 @@ +/dts-v1/; + +#include <dt-bindings/input/input.h> +#include "tegra124.dtsi" + +/ { + model = "NVIDIA Tegra124 Jetson TK1"; + compatible = "nvidia,jetson-tk1", "nvidia,tegra124"; + + aliases { + rtc0 = "/i2c@0,7000d000/pmic@40"; + rtc1 = "/rtc@0,7000e000"; + }; + + memory { + reg = <0x0 0x80000000 0x0 0x80000000>; + }; + + host1x@0,50000000 { + hdmi@0,54280000 { + status = "okay"; + + hdmi-supply = <&vdd_5v0_hdmi>; + pll-supply = <&vdd_hdmi_pll>; + vdd-supply = <&vdd_3v3_hdmi>; + + nvidia,ddc-i2c-bus = <&hdmi_ddc>; + nvidia,hpd-gpio = + <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; + }; + }; + + pinmux: pinmux@0,70000868 { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + clk_32k_out_pa0 { + nvidia,pins = "clk_32k_out_pa0"; + nvidia,function = "soc"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + uart3_cts_n_pa1 { + nvidia,pins = "uart3_cts_n_pa1"; + nvidia,function = "uartc"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dap2_fs_pa2 { + nvidia,pins = "dap2_fs_pa2"; + nvidia,function = "i2s1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dap2_sclk_pa3 { + nvidia,pins = "dap2_sclk_pa3"; + nvidia,function = "i2s1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dap2_din_pa4 { + nvidia,pins = "dap2_din_pa4"; + nvidia,function = "i2s1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dap2_dout_pa5 { + nvidia,pins = "dap2_dout_pa5"; + nvidia,function = "i2s1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc3_clk_pa6 { + nvidia,pins = "sdmmc3_clk_pa6"; + nvidia,function = "sdmmc3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + sdmmc3_cmd_pa7 { + nvidia,pins = "sdmmc3_cmd_pa7"; + nvidia,function = "sdmmc3"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pb0 { + nvidia,pins = "pb0"; + nvidia,function = "uartd"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pb1 { + nvidia,pins = "pb1"; + nvidia,function = "uartd"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc3_dat3_pb4 { + nvidia,pins = "sdmmc3_dat3_pb4"; + nvidia,function = "sdmmc3"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc3_dat2_pb5 { + nvidia,pins = "sdmmc3_dat2_pb5"; + nvidia,function = "sdmmc3"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc3_dat1_pb6 { + nvidia,pins = "sdmmc3_dat1_pb6"; + nvidia,function = "sdmmc3"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc3_dat0_pb7 { + nvidia,pins = "sdmmc3_dat0_pb7"; + nvidia,function = "sdmmc3"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + uart3_rts_n_pc0 { + nvidia,pins = "uart3_rts_n_pc0"; + nvidia,function = "uartc"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + uart2_txd_pc2 { + nvidia,pins = "uart2_txd_pc2"; + nvidia,function = "irda"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + uart2_rxd_pc3 { + nvidia,pins = "uart2_rxd_pc3"; + nvidia,function = "irda"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gen1_i2c_scl_pc4 { + nvidia,pins = "gen1_i2c_scl_pc4"; + nvidia,function = "i2c1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + gen1_i2c_sda_pc5 { + nvidia,pins = "gen1_i2c_sda_pc5"; + nvidia,function = "i2c1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + pc7 { + nvidia,pins = "pc7"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pg0 { + nvidia,pins = "pg0"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pg1 { + nvidia,pins = "pg1"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pg2 { + nvidia,pins = "pg2"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pg3 { + nvidia,pins = "pg3"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pg4 { + nvidia,pins = "pg4"; + nvidia,function = "spi4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pg5 { + nvidia,pins = "pg5"; + nvidia,function = "spi4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pg6 { + nvidia,pins = "pg6"; + nvidia,function = "spi4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pg7 { + nvidia,pins = "pg7"; + nvidia,function = "spi4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + ph0 { + nvidia,pins = "ph0"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ph1 { + nvidia,pins = "ph1"; + nvidia,function = "pwm1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ph2 { + nvidia,pins = "ph2"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ph3 { + nvidia,pins = "ph3"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ph4 { + nvidia,pins = "ph4"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + ph5 { + nvidia,pins = "ph5"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ph6 { + nvidia,pins = "ph6"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + ph7 { + nvidia,pins = "ph7"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pi0 { + nvidia,pins = "pi0"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pi1 { + nvidia,pins = "pi1"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pi2 { + nvidia,pins = "pi2"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pi3 { + nvidia,pins = "pi3"; + nvidia,function = "spi4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pi4 { + nvidia,pins = "pi4"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pi5 { + nvidia,pins = "pi5"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pi6 { + nvidia,pins = "pi6"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pi7 { + nvidia,pins = "pi7"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pj0 { + nvidia,pins = "pj0"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pj2 { + nvidia,pins = "pj2"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + uart2_cts_n_pj5 { + nvidia,pins = "uart2_cts_n_pj5"; + nvidia,function = "uartb"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + uart2_rts_n_pj6 { + nvidia,pins = "uart2_rts_n_pj6"; + nvidia,function = "uartb"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pj7 { + nvidia,pins = "pj7"; + nvidia,function = "uartd"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pk0 { + nvidia,pins = "pk0"; + nvidia,function = "soc"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pk1 { + nvidia,pins = "pk1"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pk2 { + nvidia,pins = "pk2"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pk3 { + nvidia,pins = "pk3"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pk4 { + nvidia,pins = "pk4"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + spdif_out_pk5 { + nvidia,pins = "spdif_out_pk5"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + spdif_in_pk6 { + nvidia,pins = "spdif_in_pk6"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pk7 { + nvidia,pins = "pk7"; + nvidia,function = "uartd"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + dap1_fs_pn0 { + nvidia,pins = "dap1_fs_pn0"; + nvidia,function = "i2s0"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dap1_din_pn1 { + nvidia,pins = "dap1_din_pn1"; + nvidia,function = "i2s0"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dap1_dout_pn2 { + nvidia,pins = "dap1_dout_pn2"; + nvidia,function = "sata"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + dap1_sclk_pn3 { + nvidia,pins = "dap1_sclk_pn3"; + nvidia,function = "i2s0"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + usb_vbus_en0_pn4 { + nvidia,pins = "usb_vbus_en0_pn4"; + nvidia,function = "usb"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + usb_vbus_en1_pn5 { + nvidia,pins = "usb_vbus_en1_pn5"; + nvidia,function = "usb"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + hdmi_int_pn7 { + nvidia,pins = "hdmi_int_pn7"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,rcv-sel = <TEGRA_PIN_DISABLE>; + }; + ulpi_data7_po0 { + nvidia,pins = "ulpi_data7_po0"; + nvidia,function = "ulpi"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + ulpi_data0_po1 { + nvidia,pins = "ulpi_data0_po1"; + nvidia,function = "ulpi"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + ulpi_data1_po2 { + nvidia,pins = "ulpi_data1_po2"; + nvidia,function = "ulpi"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + ulpi_data2_po3 { + nvidia,pins = "ulpi_data2_po3"; + nvidia,function = "ulpi"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + ulpi_data3_po4 { + nvidia,pins = "ulpi_data3_po4"; + nvidia,function = "ulpi"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + ulpi_data4_po5 { + nvidia,pins = "ulpi_data4_po5"; + nvidia,function = "ulpi"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + ulpi_data5_po6 { + nvidia,pins = "ulpi_data5_po6"; + nvidia,function = "ulpi"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ulpi_data6_po7 { + nvidia,pins = "ulpi_data6_po7"; + nvidia,function = "ulpi"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dap3_fs_pp0 { + nvidia,pins = "dap3_fs_pp0"; + nvidia,function = "i2s2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + dap3_din_pp1 { + nvidia,pins = "dap3_din_pp1"; + nvidia,function = "i2s2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + dap3_dout_pp2 { + nvidia,pins = "dap3_dout_pp2"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + dap3_sclk_pp3 { + nvidia,pins = "dap3_sclk_pp3"; + nvidia,function = "rsvd3"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + dap4_fs_pp4 { + nvidia,pins = "dap4_fs_pp4"; + nvidia,function = "i2s3"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dap4_din_pp5 { + nvidia,pins = "dap4_din_pp5"; + nvidia,function = "i2s3"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dap4_dout_pp6 { + nvidia,pins = "dap4_dout_pp6"; + nvidia,function = "i2s3"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dap4_sclk_pp7 { + nvidia,pins = "dap4_sclk_pp7"; + nvidia,function = "i2s3"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_col0_pq0 { + nvidia,pins = "kb_col0_pq0"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_col1_pq1 { + nvidia,pins = "kb_col1_pq1"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_col2_pq2 { + nvidia,pins = "kb_col2_pq2"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_col3_pq3 { + nvidia,pins = "kb_col3_pq3"; + nvidia,function = "kbc"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_col4_pq4 { + nvidia,pins = "kb_col4_pq4"; + nvidia,function = "sdmmc3"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_col5_pq5 { + nvidia,pins = "kb_col5_pq5"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_col6_pq6 { + nvidia,pins = "kb_col6_pq6"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_col7_pq7 { + nvidia,pins = "kb_col7_pq7"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_row0_pr0 { + nvidia,pins = "kb_row0_pr0"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_row1_pr1 { + nvidia,pins = "kb_row1_pr1"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_row2_pr2 { + nvidia,pins = "kb_row2_pr2"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_row3_pr3 { + nvidia,pins = "kb_row3_pr3"; + nvidia,function = "sys"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_row4_pr4 { + nvidia,pins = "kb_row4_pr4"; + nvidia,function = "rsvd3"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_row5_pr5 { + nvidia,pins = "kb_row5_pr5"; + nvidia,function = "rsvd3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_row6_pr6 { + nvidia,pins = "kb_row6_pr6"; + nvidia,function = "displaya_alt"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_row7_pr7 { + nvidia,pins = "kb_row7_pr7"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_row8_ps0 { + nvidia,pins = "kb_row8_ps0"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_row9_ps1 { + nvidia,pins = "kb_row9_ps1"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_row10_ps2 { + nvidia,pins = "kb_row10_ps2"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_row11_ps3 { + nvidia,pins = "kb_row11_ps3"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_row12_ps4 { + nvidia,pins = "kb_row12_ps4"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_row13_ps5 { + nvidia,pins = "kb_row13_ps5"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_row14_ps6 { + nvidia,pins = "kb_row14_ps6"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_row15_ps7 { + nvidia,pins = "kb_row15_ps7"; + nvidia,function = "soc"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + kb_row16_pt0 { + nvidia,pins = "kb_row16_pt0"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + kb_row17_pt1 { + nvidia,pins = "kb_row17_pt1"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + gen2_i2c_scl_pt5 { + nvidia,pins = "gen2_i2c_scl_pt5"; + nvidia,function = "i2c2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + gen2_i2c_sda_pt6 { + nvidia,pins = "gen2_i2c_sda_pt6"; + nvidia,function = "i2c2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + sdmmc4_cmd_pt7 { + nvidia,pins = "sdmmc4_cmd_pt7"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pu0 { + nvidia,pins = "pu0"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pu1 { + nvidia,pins = "pu1"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pu2 { + nvidia,pins = "pu2"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pu3 { + nvidia,pins = "pu3"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pu4 { + nvidia,pins = "pu4"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pu5 { + nvidia,pins = "pu5"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pu6 { + nvidia,pins = "pu6"; + nvidia,function = "rsvd3"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pv0 { + nvidia,pins = "pv0"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pv1 { + nvidia,pins = "pv1"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc3_cd_n_pv2 { + nvidia,pins = "sdmmc3_cd_n_pv2"; + nvidia,function = "sdmmc3"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc1_wp_n_pv3 { + nvidia,pins = "sdmmc1_wp_n_pv3"; + nvidia,function = "sdmmc1"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ddc_scl_pv4 { + nvidia,pins = "ddc_scl_pv4"; + nvidia,function = "i2c4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,rcv-sel = <TEGRA_PIN_DISABLE>; + }; + ddc_sda_pv5 { + nvidia,pins = "ddc_sda_pv5"; + nvidia,function = "i2c4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,rcv-sel = <TEGRA_PIN_DISABLE>; + }; + gpio_w2_aud_pw2 { + nvidia,pins = "gpio_w2_aud_pw2"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gpio_w3_aud_pw3 { + nvidia,pins = "gpio_w3_aud_pw3"; + nvidia,function = "spi6"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dap_mclk1_pw4 { + nvidia,pins = "dap_mclk1_pw4"; + nvidia,function = "extperiph1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + clk2_out_pw5 { + nvidia,pins = "clk2_out_pw5"; + nvidia,function = "extperiph2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + uart3_txd_pw6 { + nvidia,pins = "uart3_txd_pw6"; + nvidia,function = "uartc"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + uart3_rxd_pw7 { + nvidia,pins = "uart3_rxd_pw7"; + nvidia,function = "uartc"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dvfs_pwm_px0 { + nvidia,pins = "dvfs_pwm_px0"; + nvidia,function = "cldvfs"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + gpio_x1_aud_px1 { + nvidia,pins = "gpio_x1_aud_px1"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + dvfs_clk_px2 { + nvidia,pins = "dvfs_clk_px2"; + nvidia,function = "cldvfs"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + gpio_x3_aud_px3 { + nvidia,pins = "gpio_x3_aud_px3"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gpio_x4_aud_px4 { + nvidia,pins = "gpio_x4_aud_px4"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + gpio_x5_aud_px5 { + nvidia,pins = "gpio_x5_aud_px5"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gpio_x6_aud_px6 { + nvidia,pins = "gpio_x6_aud_px6"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + gpio_x7_aud_px7 { + nvidia,pins = "gpio_x7_aud_px7"; + nvidia,function = "rsvd1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ulpi_clk_py0 { + nvidia,pins = "ulpi_clk_py0"; + nvidia,function = "spi1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ulpi_dir_py1 { + nvidia,pins = "ulpi_dir_py1"; + nvidia,function = "spi1"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + ulpi_nxt_py2 { + nvidia,pins = "ulpi_nxt_py2"; + nvidia,function = "spi1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + ulpi_stp_py3 { + nvidia,pins = "ulpi_stp_py3"; + nvidia,function = "spi1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + sdmmc1_dat3_py4 { + nvidia,pins = "sdmmc1_dat3_py4"; + nvidia,function = "sdmmc1"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc1_dat2_py5 { + nvidia,pins = "sdmmc1_dat2_py5"; + nvidia,function = "sdmmc1"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc1_dat1_py6 { + nvidia,pins = "sdmmc1_dat1_py6"; + nvidia,function = "sdmmc1"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc1_dat0_py7 { + nvidia,pins = "sdmmc1_dat0_py7"; + nvidia,function = "sdmmc1"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc1_clk_pz0 { + nvidia,pins = "sdmmc1_clk_pz0"; + nvidia,function = "sdmmc1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc1_cmd_pz1 { + nvidia,pins = "sdmmc1_cmd_pz1"; + nvidia,function = "sdmmc1"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pwr_i2c_scl_pz6 { + nvidia,pins = "pwr_i2c_scl_pz6"; + nvidia,function = "i2cpwr"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + pwr_i2c_sda_pz7 { + nvidia,pins = "pwr_i2c_sda_pz7"; + nvidia,function = "i2cpwr"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + sdmmc4_dat0_paa0 { + nvidia,pins = "sdmmc4_dat0_paa0"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc4_dat1_paa1 { + nvidia,pins = "sdmmc4_dat1_paa1"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc4_dat2_paa2 { + nvidia,pins = "sdmmc4_dat2_paa2"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc4_dat3_paa3 { + nvidia,pins = "sdmmc4_dat3_paa3"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc4_dat4_paa4 { + nvidia,pins = "sdmmc4_dat4_paa4"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc4_dat5_paa5 { + nvidia,pins = "sdmmc4_dat5_paa5"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc4_dat6_paa6 { + nvidia,pins = "sdmmc4_dat6_paa6"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc4_dat7_paa7 { + nvidia,pins = "sdmmc4_dat7_paa7"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pbb0 { + nvidia,pins = "pbb0"; + nvidia,function = "vimclk2_alt"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + cam_i2c_scl_pbb1 { + nvidia,pins = "cam_i2c_scl_pbb1"; + nvidia,function = "i2c3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + cam_i2c_sda_pbb2 { + nvidia,pins = "cam_i2c_sda_pbb2"; + nvidia,function = "i2c3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + pbb3 { + nvidia,pins = "pbb3"; + nvidia,function = "vgp3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pbb4 { + nvidia,pins = "pbb4"; + nvidia,function = "vgp4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pbb5 { + nvidia,pins = "pbb5"; + nvidia,function = "rsvd3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pbb6 { + nvidia,pins = "pbb6"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pbb7 { + nvidia,pins = "pbb7"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + cam_mclk_pcc0 { + nvidia,pins = "cam_mclk_pcc0"; + nvidia,function = "vi_alt3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pcc1 { + nvidia,pins = "pcc1"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + pcc2 { + nvidia,pins = "pcc2"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc4_clk_pcc4 { + nvidia,pins = "sdmmc4_clk_pcc4"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + clk2_req_pcc5 { + nvidia,pins = "clk2_req_pcc5"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + clk3_out_pee0 { + nvidia,pins = "clk3_out_pee0"; + nvidia,function = "extperiph3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + clk3_req_pee1 { + nvidia,pins = "clk3_req_pee1"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + dap_mclk1_req_pee2 { + nvidia,pins = "dap_mclk1_req_pee2"; + nvidia,function = "sata"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + hdmi_cec_pee3 { + nvidia,pins = "hdmi_cec_pee3"; + nvidia,function = "cec"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,open-drain = <TEGRA_PIN_ENABLE>; + }; + sdmmc3_clk_lb_out_pee4 { + nvidia,pins = "sdmmc3_clk_lb_out_pee4"; + nvidia,function = "sdmmc3"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + sdmmc3_clk_lb_in_pee5 { + nvidia,pins = "sdmmc3_clk_lb_in_pee5"; + nvidia,function = "sdmmc3"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + dp_hpd_pff0 { + nvidia,pins = "dp_hpd_pff0"; + nvidia,function = "dp"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + usb_vbus_en2_pff1 { + nvidia,pins = "usb_vbus_en2_pff1"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + nvidia,open-drain = <TEGRA_PIN_DISABLE>; + }; + pff2 { + nvidia,pins = "pff2"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,open-drain = <TEGRA_PIN_DISABLE>; + }; + core_pwr_req { + nvidia,pins = "core_pwr_req"; + nvidia,function = "pwron"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + cpu_pwr_req { + nvidia,pins = "cpu_pwr_req"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + pwr_int_n { + nvidia,pins = "pwr_int_n"; + nvidia,function = "pmi"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + reset_out_n { + nvidia,pins = "reset_out_n"; + nvidia,function = "reset_out_n"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + owr { + nvidia,pins = "owr"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_DOWN>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + nvidia,rcv-sel = <TEGRA_PIN_DISABLE>; + }; + clk_32k_in { + nvidia,pins = "clk_32k_in"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + jtag_rtck { + nvidia,pins = "jtag_rtck"; + nvidia,function = "rtck"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + }; + }; + }; + + /* DB9 serial port */ + serial@0,70006300 { + status = "okay"; + }; + + /* Expansion GEN1_I2C_*, mini-PCIe I2C, on-board components */ + i2c@0,7000c000 { + status = "okay"; + clock-frequency = <100000>; + + rt5639: audio-codec@1c { + compatible = "realtek,rt5639"; + reg = <0x1c>; + interrupt-parent = <&gpio>; + interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>; + realtek,ldo1-en-gpios = + <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_HIGH>; + }; + + temperature-sensor@4c { + compatible = "ti,tmp451"; + reg = <0x4c>; + interrupt-parent = <&gpio>; + interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>; + }; + + eeprom@56 { + compatible = "atmel,24c02"; + reg = <0x56>; + pagesize = <8>; + }; + }; + + /* Expansion GEN2_I2C_* */ + i2c@0,7000c400 { + status = "okay"; + clock-frequency = <100000>; + }; + + /* Expansion CAM_I2C_* */ + i2c@0,7000c500 { + status = "okay"; + clock-frequency = <100000>; + }; + + /* HDMI DDC */ + hdmi_ddc: i2c@0,7000c700 { + status = "okay"; + clock-frequency = <100000>; + }; + + /* Expansion PWR_I2C_*, on-board components */ + i2c@0,7000d000 { + status = "okay"; + clock-frequency = <400000>; + + pmic: pmic@40 { + compatible = "ams,as3722"; + reg = <0x40>; + interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; + + ams,system-power-controller; + + #interrupt-cells = <2>; + interrupt-controller; + + gpio-controller; + #gpio-cells = <2>; + + pinctrl-names = "default"; + pinctrl-0 = <&as3722_default>; + + as3722_default: pinmux { + gpio0 { + pins = "gpio0"; + function = "gpio"; + bias-pull-down; + }; + + gpio1_2_4_7 { + pins = "gpio1", "gpio2", "gpio4", "gpio7"; + function = "gpio"; + bias-pull-up; + }; + + gpio3_5_6 { + pins = "gpio3", "gpio5", "gpio6"; + bias-high-impedance; + }; + }; + + regulators { + vsup-sd2-supply = <&vdd_5v0_sys>; + vsup-sd3-supply = <&vdd_5v0_sys>; + vsup-sd4-supply = <&vdd_5v0_sys>; + vsup-sd5-supply = <&vdd_5v0_sys>; + vin-ldo0-supply = <&vdd_1v35_lp0>; + vin-ldo1-6-supply = <&vdd_3v3_run>; + vin-ldo2-5-7-supply = <&vddio_1v8>; + vin-ldo3-4-supply = <&vdd_3v3_sys>; + vin-ldo9-10-supply = <&vdd_5v0_sys>; + vin-ldo11-supply = <&vdd_3v3_run>; + + sd0 { + regulator-name = "+VDD_CPU_AP"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1400000>; + regulator-min-microamp = <3500000>; + regulator-max-microamp = <3500000>; + regulator-always-on; + regulator-boot-on; + ams,external-control = <2>; + }; + + sd1 { + regulator-name = "+VDD_CORE"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1350000>; + regulator-min-microamp = <2500000>; + regulator-max-microamp = <2500000>; + regulator-always-on; + regulator-boot-on; + ams,external-control = <1>; + }; + + vdd_1v35_lp0: sd2 { + regulator-name = "+1.35V_LP0(sd2)"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-boot-on; + }; + + sd3 { + regulator-name = "+1.35V_LP0(sd3)"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-boot-on; + }; + + vdd_1v05_run: sd4 { + regulator-name = "+1.05V_RUN"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + }; + + vddio_1v8: sd5 { + regulator-name = "+1.8V_VDDIO"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + sd6 { + regulator-name = "+VDD_GPU_AP"; + regulator-min-microvolt = <650000>; + regulator-max-microvolt = <1200000>; + regulator-min-microamp = <3500000>; + regulator-max-microamp = <3500000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo0 { + regulator-name = "+1.05V_RUN_AVDD"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-boot-on; + regulator-always-on; + ams,external-control = <1>; + }; + + ldo1 { + regulator-name = "+1.8V_RUN_CAM"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo2 { + regulator-name = "+1.2V_GEN_AVDD"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo3 { + regulator-name = "+1.05V_LP0_VDD_RTC"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-boot-on; + regulator-always-on; + ams,enable-tracking; + }; + + ldo4 { + regulator-name = "+2.8V_RUN_CAM"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + ldo5 { + regulator-name = "+1.2V_RUN_CAM_FRONT"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + vddio_sdmmc3: ldo6 { + regulator-name = "+VDDIO_SDMMC3"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + + ldo7 { + regulator-name = "+1.05V_RUN_CAM_REAR"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + }; + + ldo9 { + regulator-name = "+3.3V_RUN_TOUCH"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + ldo10 { + regulator-name = "+2.8V_RUN_CAM_AF"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + ldo11 { + regulator-name = "+1.8V_RUN_VPP_FUSE"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + }; + }; + }; + + /* Expansion TS_SPI_* */ + spi@0,7000d400 { + status = "okay"; + }; + + /* Internal SPI */ + spi@0,7000da00 { + status = "okay"; + spi-max-frequency = <25000000>; + spi-flash@0 { + compatible = "winbond,w25q32dw"; + reg = <0>; + spi-max-frequency = <20000000>; + }; + }; + + pmc@0,7000e400 { + nvidia,invert-interrupt; + nvidia,suspend-mode = <1>; + nvidia,cpu-pwr-good-time = <500>; + nvidia,cpu-pwr-off-time = <300>; + nvidia,core-pwr-good-time = <641 3845>; + nvidia,core-pwr-off-time = <61036>; + nvidia,core-power-req-active-high; + nvidia,sys-clock-req-active-high; + }; + + /* SD card */ + sdhci@0,700b0400 { + status = "okay"; + cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; + power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>; + wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>; + bus-width = <4>; + vqmmc-supply = <&vddio_sdmmc3>; + }; + + /* eMMC */ + sdhci@0,700b0600 { + status = "okay"; + bus-width = <8>; + }; + + ahub@0,70300000 { + i2s@0,70301100 { + status = "okay"; + }; + }; + + /* mini-PCIe USB */ + usb@0,7d004000 { + status = "okay"; + }; + + usb-phy@0,7d004000 { + status = "okay"; + }; + + /* USB A connector */ + usb@0,7d008000 { + status = "okay"; + }; + + usb-phy@0,7d008000 { + status = "okay"; + vbus-supply = <&vdd_usb3_vbus>; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock@0 { + compatible = "fixed-clock"; + reg = <0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + power { + label = "Power"; + gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; + linux,code = <KEY_POWER>; + debounce-interval = <10>; + gpio-key,wakeup; + }; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + vdd_mux: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "+VDD_MUX"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-always-on; + regulator-boot-on; + }; + + vdd_5v0_sys: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "+5V_SYS"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vdd_mux>; + }; + + vdd_3v3_sys: regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "+3.3V_SYS"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vdd_mux>; + }; + + vdd_3v3_run: regulator@3 { + compatible = "regulator-fixed"; + reg = <3>; + regulator-name = "+3.3V_RUN"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + gpio = <&pmic 1 GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <&vdd_3v3_sys>; + }; + + vdd_3v3_hdmi: regulator@4 { + compatible = "regulator-fixed"; + reg = <4>; + regulator-name = "+3.3V_AVDD_HDMI_AP_GATED"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vdd_3v3_run>; + }; + + vdd_usb1_vbus: regulator@7 { + compatible = "regulator-fixed"; + reg = <7>; + regulator-name = "+USB0_VBUS_SW"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>; + enable-active-high; + gpio-open-drain; + vin-supply = <&vdd_5v0_sys>; + }; + + vdd_usb3_vbus: regulator@8 { + compatible = "regulator-fixed"; + reg = <8>; + regulator-name = "+5V_USB_HS"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>; + enable-active-high; + gpio-open-drain; + vin-supply = <&vdd_5v0_sys>; + }; + + vdd_3v3_lp0: regulator@10 { + compatible = "regulator-fixed"; + reg = <10>; + regulator-name = "+3.3V_LP0"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + gpio = <&pmic 2 GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <&vdd_3v3_sys>; + }; + + vdd_hdmi_pll: regulator@11 { + compatible = "regulator-fixed"; + reg = <11>; + regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>; + vin-supply = <&vdd_1v05_run>; + }; + + vdd_5v0_hdmi: regulator@12 { + compatible = "regulator-fixed"; + reg = <12>; + regulator-name = "+5V_HDMI_CON"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <&vdd_5v0_sys>; + }; + }; + + sound { + compatible = "nvidia,tegra-audio-rt5640-jetson-tk1", + "nvidia,tegra-audio-rt5640"; + nvidia,model = "NVIDIA Tegra Jetson TK1"; + + nvidia,audio-routing = + "Headphones", "HPOR", + "Headphones", "HPOL", + "Mic Jack", "MICBIAS1", + "IN2P", "Mic Jack"; + + nvidia,i2s-controller = <&tegra_i2s1>; + nvidia,audio-codec = <&rt5639>; + + nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_LOW>; + + clocks = <&tegra_car TEGRA124_CLK_PLL_A>, + <&tegra_car TEGRA124_CLK_PLL_A_OUT0>, + <&tegra_car TEGRA124_CLK_EXTERN1>; + clock-names = "pll_a", "pll_a_out0", "mclk"; + }; +}; diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts index c17283c04598..f0bb84244025 100644 --- a/arch/arm/boot/dts/tegra124-venice2.dts +++ b/arch/arm/boot/dts/tegra124-venice2.dts @@ -17,6 +17,18 @@ }; host1x@0,50000000 { + hdmi@0,54280000 { + status = "okay"; + + vdd-supply = <&vdd_3v3_hdmi>; + pll-supply = <&vdd_hdmi_pll>; + hdmi-supply = <&vdd_5v0_hdmi>; + + nvidia,ddc-i2c-bus = <&hdmi_ddc>; + nvidia,hpd-gpio = + <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; + }; + sor@0,54540000 { status = "okay"; @@ -601,7 +613,7 @@ clock-frequency = <100000>; }; - i2c@0,7000c700 { + hdmi_ddc: i2c@0,7000c700 { status = "okay"; clock-frequency = <100000>; }; @@ -700,7 +712,7 @@ regulator-boot-on; }; - sd4 { + vdd_1v05_run: sd4 { regulator-name = "+1.05V_RUN"; regulator-min-microvolt = <1050000>; regulator-max-microvolt = <1050000>; @@ -931,9 +943,10 @@ sdhci@0,700b0400 { cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>; power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>; + wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>; status = "okay"; bus-width = <4>; - vmmc-supply = <&vddio_sdmmc3>; + vqmmc-supply = <&vddio_sdmmc3>; }; sdhci@0,700b0600 { @@ -1060,6 +1073,8 @@ regulator-name = "+3.3V_RUN"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; gpio = <&pmic 1 GPIO_ACTIVE_HIGH>; enable-active-high; vin-supply = <&vdd_3v3_sys>; @@ -1145,6 +1160,27 @@ enable-active-high; vin-supply = <&vdd_3v3_sys>; }; + + vdd_hdmi_pll: regulator@11 { + compatible = "regulator-fixed"; + reg = <11>; + regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>; + vin-supply = <&vdd_1v05_run>; + }; + + vdd_5v0_hdmi: regulator@12 { + compatible = "regulator-fixed"; + reg = <12>; + regulator-name = "+5V_HDMI_CON"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <&vdd_5v0_sys>; + }; }; sound { diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index cf45a1a39483..6e6bc4e8185c 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -51,6 +51,18 @@ nvidia,head = <1>; }; + hdmi@0,54280000 { + compatible = "nvidia,tegra124-hdmi"; + reg = <0x0 0x54280000 0x0 0x00040000>; + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&tegra_car TEGRA124_CLK_HDMI>, + <&tegra_car TEGRA124_CLK_PLL_D2_OUT0>; + clock-names = "hdmi", "parent"; + resets = <&tegra_car 51>; + reset-names = "hdmi"; + status = "disabled"; + }; + sor@0,54540000 { compatible = "nvidia,tegra124-sor"; reg = <0x0 0x54540000 0x0 0x00040000>; @@ -233,19 +245,6 @@ status = "disabled"; }; - serial@0,70006400 { - compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart"; - reg = <0x0 0x70006400 0x0 0x40>; - reg-shift = <2>; - interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&tegra_car TEGRA124_CLK_UARTE>; - resets = <&tegra_car 66>; - reset-names = "serial"; - dmas = <&apbdma 20>, <&apbdma 20>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - pwm@0,7000a000 { compatible = "nvidia,tegra124-pwm", "nvidia,tegra20-pwm"; reg = <0x0 0x7000a000 0x0 0x100>; diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts index 3fb1f50f6d46..f45aad688d9b 100644 --- a/arch/arm/boot/dts/tegra20-harmony.dts +++ b/arch/arm/boot/dts/tegra20-harmony.dts @@ -28,6 +28,7 @@ hdmi@54280000 { status = "okay"; + hdmi-supply = <&vdd_5v0_hdmi>; vdd-supply = <&hdmi_vdd_reg>; pll-supply = <&hdmi_pll_reg>; @@ -724,6 +725,17 @@ gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>; enable-active-high; }; + + vdd_5v0_hdmi: regulator@6 { + compatible = "regulator-fixed"; + reg = <6>; + regulator-name = "VDDIO_HDMI"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio TEGRA_GPIO(T, 2) GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <&vdd_5v0_reg>; + }; }; sound { diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts index e93fe45b7803..3189791a9289 100644 --- a/arch/arm/boot/dts/tegra30-beaver.dts +++ b/arch/arm/boot/dts/tegra30-beaver.dts @@ -40,6 +40,7 @@ hdmi@54280000 { status = "okay"; + hdmi-supply = <&vdd_5v0_hdmi>; vdd-supply = <&sys_3v3_reg>; pll-supply = <&vio_reg>; @@ -478,6 +479,17 @@ gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>; vin-supply = <&sys_3v3_reg>; }; + + vdd_5v0_hdmi: regulator@8 { + compatible = "regulator-fixed"; + reg = <8>; + regulator-name = "+VDD_5V_HDMI"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&sys_3v3_reg>; + }; }; sound { diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts new file mode 100644 index 000000000000..7793abd5bef1 --- /dev/null +++ b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts @@ -0,0 +1,205 @@ +/dts-v1/; + +#include "tegra30-colibri.dtsi" + +/ { + model = "Toradex Colibri T30 on Colibri Evaluation Board"; + compatible = "toradex,colibri_t30-eval-v3", "toradex,colibri_t30", "nvidia,tegra30"; + + aliases { + rtc0 = "/i2c@7000c000/rtc@68"; + rtc1 = "/i2c@7000d000/tps65911@2d"; + rtc2 = "/rtc@7000e000"; + }; + + host1x@50000000 { + dc@54200000 { + rgb { + status = "okay"; + nvidia,panel = <&panel>; + }; + }; + hdmi@54280000 { + status = "okay"; + }; + }; + + serial@70006000 { + status = "okay"; + }; + + serial@70006040 { + compatible = "nvidia,tegra30-hsuart"; + status = "okay"; + }; + + serial@70006300 { + compatible = "nvidia,tegra30-hsuart"; + status = "okay"; + }; + + pwm@7000a000 { + status = "okay"; + }; + + /* + * GEN1_I2C: I2C_SDA/SCL on SODIMM pin 194/196 (e.g. RTC on carrier + * board) + */ + i2c@7000c000 { + status = "okay"; + clock-frequency = <100000>; + + /* M41T0M6 real time clock on carrier board */ + rtc@68 { + compatible = "stm,m41t00"; + reg = <0x68>; + }; + }; + + /* DDC_CLOCK/DATA on X3 pin 15/16 (e.g. display EDID) */ + hdmiddc: i2c@7000c700 { + status = "okay"; + }; + + /* SPI1: Colibri SSP */ + spi@7000d400 { + status = "okay"; + spi-max-frequency = <25000000>; + can0: can@0 { + compatible = "microchip,mcp2515"; + reg = <0>; + clocks = <&clk16m>; + interrupt-parent = <&gpio>; + interrupts = <TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>; + spi-max-frequency = <10000000>; + }; + spidev0: spi@1 { + compatible = "spidev"; + reg = <1>; + spi-max-frequency = <25000000>; + }; + }; + + sdhci@78000200 { + status = "okay"; + bus-width = <4>; + cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; + no-1-8-v; + }; + + /* EHCI instance 0: USB1_DP/N -> USBC_P/N */ + usb@7d000000 { + status = "okay"; + }; + + usb-phy@7d000000 { + status = "okay"; + dr_mode = "otg"; + vbus-supply = <&usbc_vbus_reg>; + }; + + /* EHCI instance 2: USB3_DP/N -> USBH_P/N */ + usb@7d008000 { + status = "okay"; + }; + + usb-phy@7d008000 { + status = "okay"; + vbus-supply = <&usbh_vbus_reg>; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + + /* PWM<A> */ + pwms = <&pwm 0 5000000>; + brightness-levels = <255 128 64 32 16 8 4 0>; + default-brightness-level = <6>; + /* BL_ON */ + enable-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>; + }; + + clocks { + clk16m: clk@1 { + compatible = "fixed-clock"; + reg=<1>; + #clock-cells = <0>; + clock-frequency = <16000000>; + clock-output-names = "clk16m"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + power { + label = "Power"; + gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>; + linux,code = <KEY_POWER>; + debounce-interval = <10>; + gpio-key,wakeup; + }; + }; + + panel: panel { + /* + * edt,et057090dhu: EDT 5.7" LCD TFT + * edt,et070080dh6: EDT 7.0" LCD TFT + */ + compatible = "edt,et057090dhu", "simple-panel"; + + backlight = <&backlight>; + }; + + pwmleds { + compatible = "pwm-leds"; + + pwmb { + label = "PWM<B>"; + pwms = <&pwm 1 19600>; + max-brightness = <255>; + }; + pwmc { + label = "PWM<C>"; + pwms = <&pwm 2 19600>; + max-brightness = <255>; + }; + pwmd { + label = "PWM<D>"; + pwms = <&pwm 3 19600>; + max-brightness = <255>; + }; + }; + + regulators { + sys_5v0_reg: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "5v0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + usbc_vbus_reg: regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "usbc_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&sys_5v0_reg>; + }; + + /* USBH_PEN */ + usbh_vbus_reg: regulator@3 { + compatible = "regulator-fixed"; + reg = <3>; + regulator-name = "usbh_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>; + vin-supply = <&sys_5v0_reg>; + }; + }; +}; diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi new file mode 100644 index 000000000000..bf16f8e65627 --- /dev/null +++ b/arch/arm/boot/dts/tegra30-colibri.dtsi @@ -0,0 +1,377 @@ +#include <dt-bindings/input/input.h> +#include "tegra30.dtsi" + +/* + * Toradex Colibri T30 Device Tree + * Compatible for Revisions 1.1B/1.1C/1.1D + */ +/ { + model = "Toradex Colibri T30"; + compatible = "toradex,colibri_t30", "nvidia,tegra30"; + + memory { + reg = <0x80000000 0x40000000>; + }; + + host1x@50000000 { + hdmi@54280000 { + vdd-supply = <&sys_3v3_reg>; + pll-supply = <&vio_reg>; + + nvidia,hpd-gpio = + <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; + nvidia,ddc-i2c-bus = <&hdmiddc>; + }; + }; + + pinmux@70000868 { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + /* Colibri BL_ON */ + pv2 { + nvidia,pins = "pv2"; + nvidia,function = "rsvd4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + + /* Colibri Backlight PWM<A> */ + sdmmc3_dat3_pb4 { + nvidia,pins = "sdmmc3_dat3_pb4"; + nvidia,function = "pwm0"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + + /* Colibri CAN_INT */ + kb_row8_ps0 { + nvidia,pins = "kb_row8_ps0"; + nvidia,function = "kbc"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + + /* + * Colibri L_BIAS, LCD_M1 is muxed with LCD_DE + * todays display need DE, disable LCD_M1 + */ + lcd_m1_pw1 { + nvidia,pins = "lcd_m1_pw1"; + nvidia,function = "rsvd3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + + /* Thermal alert, need to be disabled */ + lcd_dc1_pd2 { + nvidia,pins = "lcd_dc1_pd2"; + nvidia,function = "rsvd3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + }; + + /* Colibri MMC */ + kb_row10_ps2 { + nvidia,pins = "kb_row10_ps2"; + nvidia,function = "sdmmc2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + kb_row11_ps3 { + nvidia,pins = "kb_row11_ps3", + "kb_row12_ps4", + "kb_row13_ps5", + "kb_row14_ps6", + "kb_row15_ps7"; + nvidia,function = "sdmmc2"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + + /* Colibri SSP */ + ulpi_clk_py0 { + nvidia,pins = "ulpi_clk_py0", + "ulpi_dir_py1", + "ulpi_nxt_py2", + "ulpi_stp_py3"; + nvidia,function = "spi1"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + sdmmc3_dat6_pd3 { + nvidia,pins = "sdmmc3_dat6_pd3", + "sdmmc3_dat7_pd4"; + nvidia,function = "spdif"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + }; + + /* Colibri UART_A */ + ulpi_data0 { + nvidia,pins = "ulpi_data0_po1", + "ulpi_data1_po2", + "ulpi_data2_po3", + "ulpi_data3_po4", + "ulpi_data4_po5", + "ulpi_data5_po6", + "ulpi_data6_po7", + "ulpi_data7_po0"; + nvidia,function = "uarta"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + + /* Colibri UART_B */ + gmi_a16_pj7 { + nvidia,pins = "gmi_a16_pj7", + "gmi_a17_pb0", + "gmi_a18_pb1", + "gmi_a19_pk7"; + nvidia,function = "uartd"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + + /* Colibri UART_C */ + uart2_rxd { + nvidia,pins = "uart2_rxd_pc3", + "uart2_txd_pc2"; + nvidia,function = "uartb"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + + /* eMMC */ + sdmmc4_clk_pcc4 { + nvidia,pins = "sdmmc4_clk_pcc4", + "sdmmc4_rst_n_pcc3"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + sdmmc4_dat0_paa0 { + nvidia,pins = "sdmmc4_dat0_paa0", + "sdmmc4_dat1_paa1", + "sdmmc4_dat2_paa2", + "sdmmc4_dat3_paa3", + "sdmmc4_dat4_paa4", + "sdmmc4_dat5_paa5", + "sdmmc4_dat6_paa6", + "sdmmc4_dat7_paa7"; + nvidia,function = "sdmmc4"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + }; + }; + + hdmiddc: i2c@7000c700 { + clock-frequency = <100000>; + }; + + /* + * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and + * touch screen controller + */ + i2c@7000d000 { + status = "okay"; + clock-frequency = <100000>; + + pmic: tps65911@2d { + compatible = "ti,tps65911"; + reg = <0x2d>; + + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; + #interrupt-cells = <2>; + interrupt-controller; + + ti,system-power-controller; + + #gpio-cells = <2>; + gpio-controller; + + vcc1-supply = <&sys_3v3_reg>; + vcc2-supply = <&sys_3v3_reg>; + vcc3-supply = <&vio_reg>; + vcc4-supply = <&sys_3v3_reg>; + vcc5-supply = <&sys_3v3_reg>; + vcc6-supply = <&vio_reg>; + vcc7-supply = <&sys_5v0_reg>; + vccio-supply = <&sys_3v3_reg>; + + regulators { + /* SW1: +V1.35_VDDIO_DDR */ + vdd1_reg: vdd1 { + regulator-name = "vddio_ddr_1v35"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + }; + + /* SW2: unused */ + + /* SW CTRL: +V1.0_VDD_CPU */ + vddctrl_reg: vddctrl { + regulator-name = "vdd_cpu,vdd_sys"; + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1150000>; + regulator-always-on; + }; + + /* SWIO: +V1.8 */ + vio_reg: vio { + regulator-name = "vdd_1v8_gen"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + /* LDO1: unused */ + + /* + * EN_+V3.3 switching via FET: + * +V3.3_AUDIO_AVDD_S, +V3.3 and +V1.8_VDD_LAN + * see also v3_3 fixed supply + */ + ldo2_reg: ldo2 { + regulator-name = "en_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + /* LDO3: unused */ + + /* +V1.2_VDD_RTC */ + ldo4_reg: ldo4 { + regulator-name = "vdd_rtc"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + /* + * +V2.8_AVDD_VDAC: + * only required for analog RGB + */ + ldo5_reg: ldo5 { + regulator-name = "avdd_vdac"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + + /* + * +V1.05_AVDD_PLLE: avdd_plle should be 1.05V + * but LDO6 can't set voltage in 50mV + * granularity + */ + ldo6_reg: ldo6 { + regulator-name = "avdd_plle"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + }; + + /* +V1.2_AVDD_PLL */ + ldo7_reg: ldo7 { + regulator-name = "avdd_pll"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + /* +V1.0_VDD_DDR_HS */ + ldo8_reg: ldo8 { + regulator-name = "vdd_ddr_hs"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + }; + }; + + /* + * LM95245 temperature sensor + * Note: OVERT_N directly connected to PMIC PWRDN + */ + temp-sensor@4c { + compatible = "national,lm95245"; + reg = <0x4c>; + }; + + /* SW: +V1.2_VDD_CORE */ + tps62362@60 { + compatible = "ti,tps62362"; + reg = <0x60>; + + regulator-name = "tps62362-vout"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-boot-on; + regulator-always-on; + ti,vsel0-state-low; + /* VSEL1: EN_CORE_DVFS_N low for DVFS */ + ti,vsel1-state-low; + }; + }; + + pmc@7000e400 { + nvidia,invert-interrupt; + nvidia,suspend-mode = <1>; + nvidia,cpu-pwr-good-time = <5000>; + nvidia,cpu-pwr-off-time = <5000>; + nvidia,core-pwr-good-time = <3845 3845>; + nvidia,core-pwr-off-time = <0>; + nvidia,core-power-req-active-high; + nvidia,sys-clock-req-active-high; + }; + + emmc: sdhci@78000600 { + status = "okay"; + bus-width = <8>; + non-removable; + }; + + /* EHCI instance 1: USB2_DP/N -> AX88772B */ + usb@7d004000 { + status = "okay"; + }; + + usb-phy@7d004000 { + status = "okay"; + nvidia,is-wired = <1>; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clk@0 { + compatible = "fixed-clock"; + reg=<0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + sys_3v3_reg: regulator@100 { + compatible = "regulator-fixed"; + reg = <100>; + regulator-name = "3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; +}; diff --git a/arch/arm/boot/dts/vf610-colibri.dts b/arch/arm/boot/dts/vf610-colibri.dts new file mode 100644 index 000000000000..aecc7dbc65e8 --- /dev/null +++ b/arch/arm/boot/dts/vf610-colibri.dts @@ -0,0 +1,123 @@ +/* + * Copyright 2014 Toradex AG + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +/dts-v1/; +#include "vf610.dtsi" + +/ { + model = "Toradex Colibri VF61 COM"; + compatible = "toradex,vf610-colibri", "fsl,vf610"; + + chosen { + bootargs = "console=ttyLP0,115200"; + }; + + memory { + reg = <0x80000000 0x10000000>; + }; + + clocks { + enet_ext { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + }; + }; + +}; + +&esdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esdhc1>; + bus-width = <4>; + status = "okay"; +}; + +&fec1 { + phy-mode = "rmii"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec1>; + status = "okay"; +}; + +&L2 { + arm,data-latency = <2 1 2>; + arm,tag-latency = <3 2 3>; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&iomuxc { + vf610-colibri { + pinctrl_esdhc1: esdhc1grp { + fsl,fsl,pins = < + VF610_PAD_PTA24__ESDHC1_CLK 0x31ef + VF610_PAD_PTA25__ESDHC1_CMD 0x31ef + VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef + VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef + VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef + VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef + VF610_PAD_PTB20__GPIO_42 0x219d + >; + }; + + pinctrl_fec1: fec1grp { + fsl,pins = < + VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2 + VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3 + VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1 + VF610_PAD_PTC12__ENET_RMII_RXD1 0x30d1 + VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1 + VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1 + VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2 + VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2 + VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2 + >; + }; + + pinctrl_uart0: uart0grp { + fsl,pins = < + VF610_PAD_PTB10__UART0_TX 0x21a2 + VF610_PAD_PTB11__UART0_RX 0x21a1 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + VF610_PAD_PTB4__UART1_TX 0x21a2 + VF610_PAD_PTB5__UART1_RX 0x21a1 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + VF610_PAD_PTD0__UART2_TX 0x21a2 + VF610_PAD_PTD1__UART2_RX 0x21a1 + VF610_PAD_PTD2__UART2_RTS 0x21a2 + VF610_PAD_PTD3__UART2_CTS 0x21a1 + >; + }; + }; +}; diff --git a/arch/arm/boot/dts/vf610-twr.dts b/arch/arm/boot/dts/vf610-twr.dts index 7dd1d6ede525..11d733406c7e 100644 --- a/arch/arm/boot/dts/vf610-twr.dts +++ b/arch/arm/boot/dts/vf610-twr.dts @@ -25,11 +25,13 @@ clocks { audio_ext { compatible = "fixed-clock"; + #clock-cells = <0>; clock-frequency = <24576000>; }; enet_ext { compatible = "fixed-clock"; + #clock-cells = <0>; clock-frequency = <50000000>; }; }; @@ -111,6 +113,13 @@ }; }; +&esdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esdhc1>; + bus-width = <4>; + status = "okay"; +}; + &fec0 { phy-mode = "rmii"; pinctrl-names = "default"; @@ -158,6 +167,18 @@ >; }; + pinctrl_esdhc1: esdhc1grp { + fsl,fsl,pins = < + VF610_PAD_PTA24__ESDHC1_CLK 0x31ef + VF610_PAD_PTA25__ESDHC1_CMD 0x31ef + VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef + VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef + VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef + VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef + VF610_PAD_PTA7__GPIO_134 0x219d + >; + }; + pinctrl_fec0: fec0grp { fsl,pins = < VF610_PAD_PTA6__RMII_CLKIN 0x30d1 @@ -194,6 +215,17 @@ >; }; + pinctrl_pwm0: pwm0grp { + fsl,pins = < + VF610_PAD_PTB0__FTM0_CH0 0x1582 + VF610_PAD_PTB1__FTM0_CH1 0x1582 + VF610_PAD_PTB2__FTM0_CH2 0x1582 + VF610_PAD_PTB3__FTM0_CH3 0x1582 + VF610_PAD_PTB6__FTM0_CH6 0x1582 + VF610_PAD_PTB7__FTM0_CH7 0x1582 + >; + }; + pinctrl_sai2: sai2grp { fsl,pins = < VF610_PAD_PTA16__SAI2_TX_BCLK 0x02ed @@ -215,6 +247,12 @@ }; }; +&pwm0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0>; + status = "okay"; +}; + &sai2 { #sound-dai-cells = <0>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi index 804873367669..73355ddc5186 100644 --- a/arch/arm/boot/dts/vf610.dtsi +++ b/arch/arm/boot/dts/vf610.dtsi @@ -45,11 +45,13 @@ sxosc { compatible = "fixed-clock"; + #clock-cells = <0>; clock-frequency = <32768>; }; fxosc { compatible = "fixed-clock"; + #clock-cells = <0>; clock-frequency = <24000000>; }; }; @@ -72,8 +74,6 @@ intc: interrupt-controller@40002000 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; - #address-cells = <1>; - #size-cells = <1>; interrupt-controller; reg = <0x40003000 0x1000>, <0x40002100 0x100>; @@ -183,6 +183,19 @@ clock-names = "pit"; }; + pwm0: pwm@40038000 { + compatible = "fsl,vf610-ftm-pwm"; + #pwm-cells = <3>; + reg = <0x40038000 0x1000>; + clock-names = "ftm_sys", "ftm_ext", + "ftm_fix", "ftm_cnt_clk_en"; + clocks = <&clks VF610_CLK_FTM0>, + <&clks VF610_CLK_FTM0_EXT_SEL>, + <&clks VF610_CLK_FTM0_FIX_SEL>, + <&clks VF610_CLK_FTM0_EXT_FIX_EN>; + status = "disabled"; + }; + adc0: adc@4003b000 { compatible = "fsl,vf610-adc"; reg = <0x4003b000 0x1000>; @@ -347,6 +360,17 @@ status = "disabled"; }; + esdhc1: esdhc@400b2000 { + compatible = "fsl,imx53-esdhc"; + reg = <0x400b2000 0x4000>; + interrupts = <0 28 0x04>; + clocks = <&clks VF610_CLK_IPG_BUS>, + <&clks VF610_CLK_PLATFORM_BUS>, + <&clks VF610_CLK_ESDHC1>; + clock-names = "ipg", "ahb", "per"; + status = "disabled"; + }; + fec0: ethernet@400d0000 { compatible = "fsl,mvf600-fec"; reg = <0x400d0000 0x1000>; diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index 511180769af5..c1176abc34d9 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -24,6 +24,7 @@ device_type = "cpu"; reg = <0>; clocks = <&clkc 3>; + clock-latency = <1000>; operating-points = < /* kHz uV */ 666667 1000000 @@ -54,6 +55,28 @@ interrupt-parent = <&intc>; ranges; + i2c0: zynq-i2c@e0004000 { + compatible = "cdns,i2c-r1p10"; + status = "disabled"; + clocks = <&clkc 38>; + interrupt-parent = <&intc>; + interrupts = <0 25 4>; + reg = <0xe0004000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c1: zynq-i2c@e0005000 { + compatible = "cdns,i2c-r1p10"; + status = "disabled"; + clocks = <&clkc 39>; + interrupt-parent = <&intc>; + interrupts = <0 48 4>; + reg = <0xe0005000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + }; + intc: interrupt-controller@f8f01000 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts index c913f77a21eb..5e09cee33d42 100644 --- a/arch/arm/boot/dts/zynq-zc702.dts +++ b/arch/arm/boot/dts/zynq-zc702.dts @@ -34,6 +34,82 @@ phy-mode = "rgmii"; }; +&i2c0 { + status = "okay"; + clock-frequency = <400000>; + + i2cswitch@74 { + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + si570: clock-generator@5d { + #clock-cells = <0>; + compatible = "silabs,si570"; + temperature-stability = <50>; + reg = <0x5d>; + factory-fout = <156250000>; + clock-frequency = <148500000>; + }; + }; + + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + eeprom@54 { + compatible = "at,24c08"; + reg = <0x54>; + }; + }; + + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + gpio@21 { + compatible = "ti,tca6416"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + }; + }; + + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + rtc@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + }; + }; + + i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + hwmon@52 { + compatible = "ti,ucd9248"; + reg = <52>; + }; + hwmon@53 { + compatible = "ti,ucd9248"; + reg = <53>; + }; + hwmon@54 { + compatible = "ti,ucd9248"; + reg = <54>; + }; + }; + }; +}; + &sdhci0 { status = "okay"; }; diff --git a/arch/arm/boot/dts/zynq-zc706.dts b/arch/arm/boot/dts/zynq-zc706.dts index 88f62c50382e..4cc9913078cd 100644 --- a/arch/arm/boot/dts/zynq-zc706.dts +++ b/arch/arm/boot/dts/zynq-zc706.dts @@ -35,6 +35,74 @@ phy-mode = "rgmii"; }; +&i2c0 { + status = "okay"; + clock-frequency = <400000>; + + i2cswitch@74 { + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + si570: clock-generator@5d { + #clock-cells = <0>; + compatible = "silabs,si570"; + temperature-stability = <50>; + reg = <0x5d>; + factory-fout = <156250000>; + clock-frequency = <148500000>; + }; + }; + + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + eeprom@54 { + compatible = "at,24c08"; + reg = <0x54>; + }; + }; + + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + gpio@21 { + compatible = "ti,tca6416"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + }; + }; + + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + rtc@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + }; + }; + + i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + ucd90120@65 { + compatible = "ti,ucd90120"; + reg = <0x65>; + }; + }; + }; +}; + &sdhci0 { status = "okay"; }; diff --git a/arch/arm/common/bL_switcher.c b/arch/arm/common/bL_switcher.c index 5774b6ea7ad5..f01c0ee0c87e 100644 --- a/arch/arm/common/bL_switcher.c +++ b/arch/arm/common/bL_switcher.c @@ -797,10 +797,8 @@ static int __init bL_switcher_init(void) { int ret; - if (MAX_NR_CLUSTERS != 2) { - pr_err("%s: only dual cluster systems are supported\n", __func__); - return -EINVAL; - } + if (!mcpm_is_available()) + return -ENODEV; cpu_notifier(bL_switcher_hotplug_callback, 0); diff --git a/arch/arm/common/mcpm_entry.c b/arch/arm/common/mcpm_entry.c index 1e361abc29eb..86fd60fefbc9 100644 --- a/arch/arm/common/mcpm_entry.c +++ b/arch/arm/common/mcpm_entry.c @@ -48,6 +48,11 @@ int __init mcpm_platform_register(const struct mcpm_platform_ops *ops) return 0; } +bool mcpm_is_available(void) +{ + return (platform_ops) ? true : false; +} + int mcpm_cpu_power_up(unsigned int cpu, unsigned int cluster) { if (!platform_ops) diff --git a/arch/arm/configs/at91sam9g45_defconfig b/arch/arm/configs/at91sam9g45_defconfig index e181a50fd65a..c6661a60025d 100644 --- a/arch/arm/configs/at91sam9g45_defconfig +++ b/arch/arm/configs/at91sam9g45_defconfig @@ -83,7 +83,6 @@ CONFIG_KEYBOARD_GPIO=y # CONFIG_INPUT_MOUSE is not set CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_ATMEL_MXT=m -CONFIG_TOUCHSCREEN_ATMEL_TSADCC=y # CONFIG_SERIO is not set # CONFIG_LEGACY_PTYS is not set CONFIG_SERIAL_ATMEL=y @@ -146,6 +145,8 @@ CONFIG_DMADEVICES=y CONFIG_AT_HDMAC=y CONFIG_DMATEST=m # CONFIG_IOMMU_SUPPORT is not set +CONFIG_IIO=y +CONFIG_AT91_ADC=y CONFIG_EXT4_FS=y CONFIG_FANOTIFY=y CONFIG_VFAT_FS=y diff --git a/arch/arm/configs/at91sam9rl_defconfig b/arch/arm/configs/at91sam9rl_defconfig index 85f846ae9ff2..5d7797d43d23 100644 --- a/arch/arm/configs/at91sam9rl_defconfig +++ b/arch/arm/configs/at91sam9rl_defconfig @@ -45,7 +45,6 @@ CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_ATMEL_TSADCC=y # CONFIG_SERIO is not set CONFIG_SERIAL_ATMEL=y CONFIG_SERIAL_ATMEL_CONSOLE=y @@ -65,6 +64,8 @@ CONFIG_MMC=y CONFIG_MMC_ATMELMCI=m CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_AT91SAM9=y +CONFIG_IIO=y +CONFIG_AT91_ADC=y CONFIG_EXT2_FS=y CONFIG_MSDOS_FS=y CONFIG_VFAT_FS=y diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig index 4ce7b70ea901..e07a227ec0db 100644 --- a/arch/arm/configs/exynos_defconfig +++ b/arch/arm/configs/exynos_defconfig @@ -65,6 +65,7 @@ CONFIG_TCG_TIS_I2C_INFINEON=y CONFIG_I2C=y CONFIG_I2C_MUX=y CONFIG_I2C_ARB_GPIO_CHALLENGE=y +CONFIG_I2C_EXYNOS5=y CONFIG_I2C_S3C2410=y CONFIG_DEBUG_GPIO=y # CONFIG_HWMON is not set diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig index a9667957b757..a4e8d017f25b 100644 --- a/arch/arm/configs/omap2plus_defconfig +++ b/arch/arm/configs/omap2plus_defconfig @@ -226,7 +226,7 @@ CONFIG_USB_DWC3=m CONFIG_USB_TEST=y CONFIG_NOP_USB_XCEIV=y CONFIG_OMAP_USB2=y -CONFIG_OMAP_USB3=y +CONFIG_TI_PIPE3=y CONFIG_AM335X_PHY_USB=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DEBUG=y diff --git a/arch/arm/configs/sama5_defconfig b/arch/arm/configs/sama5_defconfig index dc3881e07630..869fa18ebeb2 100644 --- a/arch/arm/configs/sama5_defconfig +++ b/arch/arm/configs/sama5_defconfig @@ -122,7 +122,6 @@ CONFIG_KEYBOARD_GPIO=y # CONFIG_INPUT_MOUSE is not set CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_ATMEL_MXT=y -CONFIG_TOUCHSCREEN_ATMEL_TSADCC=y # CONFIG_SERIO is not set CONFIG_LEGACY_PTY_COUNT=4 CONFIG_SERIAL_ATMEL=y diff --git a/arch/arm/configs/u300_defconfig b/arch/arm/configs/u300_defconfig index fd81a1b99cce..aaa95ab606a8 100644 --- a/arch/arm/configs/u300_defconfig +++ b/arch/arm/configs/u300_defconfig @@ -11,6 +11,7 @@ CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y # CONFIG_LBDAF is not set # CONFIG_BLK_DEV_BSG is not set +CONFIG_PARTITION_ADVANCED=y # CONFIG_IOSCHED_CFQ is not set # CONFIG_ARCH_MULTI_V7 is not set CONFIG_ARCH_U300=y @@ -21,7 +22,6 @@ CONFIG_ZBOOT_ROM_TEXT=0x0 CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_CMDLINE="root=/dev/ram0 rw rootfstype=rootfs console=ttyAMA0,115200n8 lpj=515072" CONFIG_CPU_IDLE=y -CONFIG_FPE_NWFPE=y # CONFIG_SUSPEND is not set CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" # CONFIG_PREVENT_FIRMWARE_BUILD is not set @@ -64,8 +64,8 @@ CONFIG_TMPFS=y CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ISO8859_1=y CONFIG_PRINTK_TIME=y +CONFIG_DEBUG_INFO=y CONFIG_DEBUG_FS=y # CONFIG_SCHED_DEBUG is not set CONFIG_TIMER_STATS=y # CONFIG_DEBUG_PREEMPT is not set -CONFIG_DEBUG_INFO=y diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig index 65f77885c167..d219d6a43238 100644 --- a/arch/arm/configs/u8500_defconfig +++ b/arch/arm/configs/u8500_defconfig @@ -1,16 +1,16 @@ # CONFIG_SWAP is not set CONFIG_SYSVIPC=y -CONFIG_NO_HZ=y +CONFIG_NO_HZ_IDLE=y CONFIG_HIGH_RES_TIMERS=y CONFIG_BLK_DEV_INITRD=y CONFIG_KALLSYMS_ALL=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y # CONFIG_BLK_DEV_BSG is not set +CONFIG_PARTITION_ADVANCED=y CONFIG_ARCH_U8500=y CONFIG_MACH_HREFV60=y CONFIG_MACH_SNOWBALL=y -CONFIG_MACH_UX500_DT=y CONFIG_SMP=y CONFIG_NR_CPUS=2 CONFIG_PREEMPT=y @@ -34,16 +34,22 @@ CONFIG_IP_PNP=y CONFIG_IP_PNP_DHCP=y CONFIG_NETFILTER=y CONFIG_PHONET=y -# CONFIG_WIRELESS is not set +CONFIG_CFG80211=y +CONFIG_CFG80211_DEBUGFS=y +CONFIG_MAC80211=y +CONFIG_MAC80211_LEDS=y CONFIG_CAIF=y CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_SIZE=65536 CONFIG_SENSORS_BH1780=y CONFIG_NETDEVICES=y CONFIG_SMSC911X=y CONFIG_SMSC_PHY=y -# CONFIG_WLAN is not set +CONFIG_CW1200=y +CONFIG_CW1200_WLAN_SDIO=y # CONFIG_INPUT_MOUSEDEV_PSAUX is not set CONFIG_INPUT_EVDEV=y # CONFIG_KEYBOARD_ATKBD is not set @@ -85,15 +91,12 @@ CONFIG_AB8500_USB=y CONFIG_USB_GADGET=y CONFIG_USB_ETH=m CONFIG_MMC=y -CONFIG_MMC_UNSAFE_RESUME=y -# CONFIG_MMC_BLOCK_BOUNCE is not set CONFIG_MMC_ARMMMCI=y CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y CONFIG_LEDS_LM3530=y CONFIG_LEDS_GPIO=y CONFIG_LEDS_LP5521=y -CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_HEARTBEAT=y CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_AB8500=y @@ -103,6 +106,11 @@ CONFIG_STE_DMA40=y CONFIG_STAGING=y CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=y CONFIG_HSEM_U8500=y +CONFIG_IIO=y +CONFIG_IIO_ST_ACCEL_3AXIS=y +CONFIG_IIO_ST_GYRO_3AXIS=y +CONFIG_IIO_ST_MAGN_3AXIS=y +CONFIG_IIO_ST_PRESS=y CONFIG_EXT2_FS=y CONFIG_EXT2_FS_XATTR=y CONFIG_EXT2_FS_POSIX_ACL=y @@ -110,8 +118,6 @@ CONFIG_EXT2_FS_SECURITY=y CONFIG_EXT3_FS=y CONFIG_EXT4_FS=y CONFIG_VFAT_FS=y -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y # CONFIG_MISC_FILESYSTEMS is not set diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h index c651e3b26ec7..4764344367d4 100644 --- a/arch/arm/include/asm/cputype.h +++ b/arch/arm/include/asm/cputype.h @@ -222,22 +222,22 @@ static inline int cpu_is_xsc3(void) #endif /* - * Marvell's PJ4 core is based on V7 version. It has some modification - * for coprocessor setting. For this reason, we need a way to distinguish - * it. + * Marvell's PJ4 and PJ4B cores are based on V7 version, + * but require a specical sequence for enabling coprocessors. + * For this reason, we need a way to distinguish them. */ -#ifndef CONFIG_CPU_PJ4 -#define cpu_is_pj4() 0 -#else +#if defined(CONFIG_CPU_PJ4) || defined(CONFIG_CPU_PJ4B) static inline int cpu_is_pj4(void) { unsigned int id; id = read_cpuid_id(); - if ((id & 0xfffffff0) == 0x562f5840) + if ((id & 0xff0fff00) == 0x560f5800) return 1; return 0; } +#else +#define cpu_is_pj4() 0 #endif #endif diff --git a/arch/arm/include/asm/div64.h b/arch/arm/include/asm/div64.h index 191ada6e4d2d..662c7bd06108 100644 --- a/arch/arm/include/asm/div64.h +++ b/arch/arm/include/asm/div64.h @@ -156,7 +156,7 @@ /* Select the best insn combination to perform the */ \ /* actual __m * __n / (__p << 64) operation. */ \ if (!__c) { \ - asm ( "umull %Q0, %R0, %1, %Q2\n\t" \ + asm ( "umull %Q0, %R0, %Q1, %Q2\n\t" \ "mov %Q0, #0" \ : "=&r" (__res) \ : "r" (__m), "r" (__n) \ diff --git a/arch/arm/include/asm/mcpm.h b/arch/arm/include/asm/mcpm.h index 608516ebabfe..a5ff410dcdb6 100644 --- a/arch/arm/include/asm/mcpm.h +++ b/arch/arm/include/asm/mcpm.h @@ -54,6 +54,13 @@ void mcpm_set_early_poke(unsigned cpu, unsigned cluster, */ /** + * mcpm_is_available - returns whether MCPM is initialized and available + * + * This returns true or false accordingly. + */ +bool mcpm_is_available(void); + +/** * mcpm_cpu_power_up - make given CPU in given cluster runable * * @cpu: CPU number within given cluster diff --git a/arch/arm/include/asm/tlb.h b/arch/arm/include/asm/tlb.h index 0baf7f0d9394..f1a0dace3efe 100644 --- a/arch/arm/include/asm/tlb.h +++ b/arch/arm/include/asm/tlb.h @@ -98,15 +98,25 @@ static inline void __tlb_alloc_page(struct mmu_gather *tlb) } } -static inline void tlb_flush_mmu(struct mmu_gather *tlb) +static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb) { tlb_flush(tlb); +} + +static inline void tlb_flush_mmu_free(struct mmu_gather *tlb) +{ free_pages_and_swap_cache(tlb->pages, tlb->nr); tlb->nr = 0; if (tlb->pages == tlb->local) __tlb_alloc_page(tlb); } +static inline void tlb_flush_mmu(struct mmu_gather *tlb) +{ + tlb_flush_mmu_tlbonly(tlb); + tlb_flush_mmu_free(tlb); +} + static inline void tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, unsigned long start, unsigned long end) { diff --git a/arch/arm/include/uapi/asm/unistd.h b/arch/arm/include/uapi/asm/unistd.h index fb5584d0cc05..ba94446c72d9 100644 --- a/arch/arm/include/uapi/asm/unistd.h +++ b/arch/arm/include/uapi/asm/unistd.h @@ -408,6 +408,7 @@ #define __NR_finit_module (__NR_SYSCALL_BASE+379) #define __NR_sched_setattr (__NR_SYSCALL_BASE+380) #define __NR_sched_getattr (__NR_SYSCALL_BASE+381) +#define __NR_renameat2 (__NR_SYSCALL_BASE+382) /* * This may need to be greater than __NR_last_syscall+1 in order to diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index a766bcbaf8ad..040619c32d68 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile @@ -79,6 +79,7 @@ obj-$(CONFIG_CPU_XSCALE) += xscale-cp0.o obj-$(CONFIG_CPU_XSC3) += xscale-cp0.o obj-$(CONFIG_CPU_MOHAWK) += xscale-cp0.o obj-$(CONFIG_CPU_PJ4) += pj4-cp0.o +obj-$(CONFIG_CPU_PJ4B) += pj4-cp0.o obj-$(CONFIG_IWMMXT) += iwmmxt.o obj-$(CONFIG_PERF_EVENTS) += perf_regs.o obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o perf_event_cpu.o diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S index 166e945de832..8f51bdcdacbb 100644 --- a/arch/arm/kernel/calls.S +++ b/arch/arm/kernel/calls.S @@ -391,6 +391,7 @@ CALL(sys_finit_module) /* 380 */ CALL(sys_sched_setattr) CALL(sys_sched_getattr) + CALL(sys_renameat2) #ifndef syscalls_counted .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls #define syscalls_counted diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index f8c08839edf3..591d6e4a6492 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S @@ -587,7 +587,7 @@ __fixup_pv_table: add r6, r6, r3 @ adjust __pv_phys_pfn_offset address add r7, r7, r3 @ adjust __pv_offset address mov r0, r8, lsr #12 @ convert to PFN - str r0, [r6, #LOW_OFFSET] @ save computed PHYS_OFFSET to __pv_phys_pfn_offset + str r0, [r6] @ save computed PHYS_OFFSET to __pv_phys_pfn_offset strcc ip, [r7, #HIGH_OFFSET] @ save to __pv_offset high bits mov r6, r3, lsr #24 @ constant for add/sub instructions teq r3, r6, lsl #24 @ must be 16MiB aligned diff --git a/arch/arm/kernel/iwmmxt.S b/arch/arm/kernel/iwmmxt.S index a08783823b32..2452dd1bef53 100644 --- a/arch/arm/kernel/iwmmxt.S +++ b/arch/arm/kernel/iwmmxt.S @@ -19,12 +19,16 @@ #include <asm/thread_info.h> #include <asm/asm-offsets.h> -#if defined(CONFIG_CPU_PJ4) +#if defined(CONFIG_CPU_PJ4) || defined(CONFIG_CPU_PJ4B) #define PJ4(code...) code #define XSC(code...) -#else +#elif defined(CONFIG_CPU_MOHAWK) || \ + defined(CONFIG_CPU_XSC3) || \ + defined(CONFIG_CPU_XSCALE) #define PJ4(code...) #define XSC(code...) code +#else +#error "Unsupported iWMMXt architecture" #endif #define MMX_WR0 (0x00) diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c index f0d180d8b29f..8cf0996aa1a8 100644 --- a/arch/arm/kernel/machine_kexec.c +++ b/arch/arm/kernel/machine_kexec.c @@ -184,3 +184,10 @@ void machine_kexec(struct kimage *image) soft_restart(reboot_entry_phys); } + +void arch_crash_save_vmcoreinfo(void) +{ +#ifdef CONFIG_ARM_LPAE + VMCOREINFO_CONFIG(ARM_LPAE); +#endif +} diff --git a/arch/arm/kernel/pj4-cp0.c b/arch/arm/kernel/pj4-cp0.c index fc7208636284..8153e36b2491 100644 --- a/arch/arm/kernel/pj4-cp0.c +++ b/arch/arm/kernel/pj4-cp0.c @@ -45,7 +45,7 @@ static int iwmmxt_do(struct notifier_block *self, unsigned long cmd, void *t) return NOTIFY_DONE; } -static struct notifier_block iwmmxt_notifier_block = { +static struct notifier_block __maybe_unused iwmmxt_notifier_block = { .notifier_call = iwmmxt_do, }; @@ -72,6 +72,33 @@ static void __init pj4_cp_access_write(u32 value) : "=r" (temp) : "r" (value)); } +static int __init pj4_get_iwmmxt_version(void) +{ + u32 cp_access, wcid; + + cp_access = pj4_cp_access_read(); + pj4_cp_access_write(cp_access | 0xf); + + /* check if coprocessor 0 and 1 are available */ + if ((pj4_cp_access_read() & 0xf) != 0xf) { + pj4_cp_access_write(cp_access); + return -ENODEV; + } + + /* read iWMMXt coprocessor id register p1, c0 */ + __asm__ __volatile__ ("mrc p1, 0, %0, c0, c0, 0\n" : "=r" (wcid)); + + pj4_cp_access_write(cp_access); + + /* iWMMXt v1 */ + if ((wcid & 0xffffff00) == 0x56051000) + return 1; + /* iWMMXt v2 */ + if ((wcid & 0xffffff00) == 0x56052000) + return 2; + + return -EINVAL; +} /* * Disable CP0/CP1 on boot, and let call_fpe() and the iWMMXt lazy @@ -79,17 +106,26 @@ static void __init pj4_cp_access_write(u32 value) */ static int __init pj4_cp0_init(void) { - u32 cp_access; + u32 __maybe_unused cp_access; + int vers; if (!cpu_is_pj4()) return 0; + vers = pj4_get_iwmmxt_version(); + if (vers < 0) + return 0; + +#ifndef CONFIG_IWMMXT + pr_info("PJ4 iWMMXt coprocessor detected, but kernel support is missing.\n"); +#else cp_access = pj4_cp_access_read() & ~0xf; pj4_cp_access_write(cp_access); - printk(KERN_INFO "PJ4 iWMMXt coprocessor enabled.\n"); + pr_info("PJ4 iWMMXt v%d coprocessor enabled.\n", vers); elf_hwcap |= HWCAP_IWMMXT; thread_register_notifier(&iwmmxt_notifier_block); +#endif return 0; } diff --git a/arch/arm/kernel/sys_oabi-compat.c b/arch/arm/kernel/sys_oabi-compat.c index 702bd329d9d0..e90a3148f385 100644 --- a/arch/arm/kernel/sys_oabi-compat.c +++ b/arch/arm/kernel/sys_oabi-compat.c @@ -203,9 +203,9 @@ asmlinkage long sys_oabi_fcntl64(unsigned int fd, unsigned int cmd, int ret; switch (cmd) { - case F_GETLKP: - case F_SETLKP: - case F_SETLKPW: + case F_OFD_GETLK: + case F_OFD_SETLK: + case F_OFD_SETLKW: case F_GETLK64: case F_SETLK64: case F_SETLKW64: diff --git a/arch/arm/kvm/Kconfig b/arch/arm/kvm/Kconfig index 466bd299b1a8..4be5bb150bdd 100644 --- a/arch/arm/kvm/Kconfig +++ b/arch/arm/kvm/Kconfig @@ -23,7 +23,7 @@ config KVM select HAVE_KVM_CPU_RELAX_INTERCEPT select KVM_MMIO select KVM_ARM_HOST - depends on ARM_VIRT_EXT && ARM_LPAE + depends on ARM_VIRT_EXT && ARM_LPAE && !CPU_BIG_ENDIAN ---help--- Support hosting virtualized guest machines. You will also need to select one or more of the processor modules below. diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c index 80bb1e6c2c29..16f804938b8f 100644 --- a/arch/arm/kvm/mmu.c +++ b/arch/arm/kvm/mmu.c @@ -42,6 +42,8 @@ static unsigned long hyp_idmap_start; static unsigned long hyp_idmap_end; static phys_addr_t hyp_idmap_vector; +#define pgd_order get_order(PTRS_PER_PGD * sizeof(pgd_t)) + #define kvm_pmd_huge(_x) (pmd_huge(_x) || pmd_trans_huge(_x)) static void kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) @@ -293,14 +295,14 @@ void free_boot_hyp_pgd(void) if (boot_hyp_pgd) { unmap_range(NULL, boot_hyp_pgd, hyp_idmap_start, PAGE_SIZE); unmap_range(NULL, boot_hyp_pgd, TRAMPOLINE_VA, PAGE_SIZE); - kfree(boot_hyp_pgd); + free_pages((unsigned long)boot_hyp_pgd, pgd_order); boot_hyp_pgd = NULL; } if (hyp_pgd) unmap_range(NULL, hyp_pgd, TRAMPOLINE_VA, PAGE_SIZE); - kfree(init_bounce_page); + free_page((unsigned long)init_bounce_page); init_bounce_page = NULL; mutex_unlock(&kvm_hyp_pgd_mutex); @@ -330,7 +332,7 @@ void free_hyp_pgds(void) for (addr = VMALLOC_START; is_vmalloc_addr((void*)addr); addr += PGDIR_SIZE) unmap_range(NULL, hyp_pgd, KERN_TO_HYP(addr), PGDIR_SIZE); - kfree(hyp_pgd); + free_pages((unsigned long)hyp_pgd, pgd_order); hyp_pgd = NULL; } @@ -1024,7 +1026,7 @@ int kvm_mmu_init(void) size_t len = __hyp_idmap_text_end - __hyp_idmap_text_start; phys_addr_t phys_base; - init_bounce_page = kmalloc(PAGE_SIZE, GFP_KERNEL); + init_bounce_page = (void *)__get_free_page(GFP_KERNEL); if (!init_bounce_page) { kvm_err("Couldn't allocate HYP init bounce page\n"); err = -ENOMEM; @@ -1050,8 +1052,9 @@ int kvm_mmu_init(void) (unsigned long)phys_base); } - hyp_pgd = kzalloc(PTRS_PER_PGD * sizeof(pgd_t), GFP_KERNEL); - boot_hyp_pgd = kzalloc(PTRS_PER_PGD * sizeof(pgd_t), GFP_KERNEL); + hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, pgd_order); + boot_hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, pgd_order); + if (!hyp_pgd || !boot_hyp_pgd) { kvm_err("Hyp mode PGD not allocated\n"); err = -ENOMEM; diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index b2d2cf4dc052..45b55e0f0db6 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -167,7 +167,6 @@ config SOC_AT91SAM9X5 select HAVE_AT91_DBGU0 select HAVE_FB_ATMEL select SOC_AT91SAM9 - select AT91_USE_OLD_CLK select HAVE_AT91_UTMI select HAVE_AT91_SMD select HAVE_AT91_USB_CLK @@ -183,7 +182,6 @@ config SOC_AT91SAM9N12 select HAVE_AT91_DBGU0 select HAVE_FB_ATMEL select SOC_AT91SAM9 - select AT91_USE_OLD_CLK select HAVE_AT91_USB_CLK help Select this if you are using Atmel's AT91SAM9N12 SoC. diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c index f3f19f21352a..4860918b411e 100644 --- a/arch/arm/mach-at91/at91rm9200_devices.c +++ b/arch/arm/mach-at91/at91rm9200_devices.c @@ -25,6 +25,7 @@ #include "board.h" #include "generic.h" +#include "gpio.h" /* -------------------------------------------------------------------- diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c index 8b1b0a870025..14a6e35801ff 100644 --- a/arch/arm/mach-at91/at91sam9260_devices.c +++ b/arch/arm/mach-at91/at91sam9260_devices.c @@ -24,12 +24,11 @@ #include <mach/at91sam9260_matrix.h> #include <mach/at91_matrix.h> #include <mach/at91sam9_smc.h> -#include <mach/at91_adc.h> #include <mach/hardware.h> #include "board.h" #include "generic.h" - +#include "gpio.h" /* -------------------------------------------------------------------- * USB Host @@ -1296,7 +1295,7 @@ static struct resource adc_resources[] = { }; static struct platform_device at91_adc_device = { - .name = "at91_adc", + .name = "at91sam9260-adc", .id = -1, .dev = { .platform_data = &adc_data, @@ -1325,13 +1324,6 @@ static struct at91_adc_trigger at91_adc_triggers[] = { }, }; -static struct at91_adc_reg_desc at91_adc_register_g20 = { - .channel_base = AT91_ADC_CHR(0), - .drdy_mask = AT91_ADC_DRDY, - .status_register = AT91_ADC_SR, - .trigger_register = AT91_ADC_MR, -}; - void __init at91_add_device_adc(struct at91_adc_data *data) { if (!data) @@ -1349,9 +1341,7 @@ void __init at91_add_device_adc(struct at91_adc_data *data) if (data->use_external_triggers) at91_set_A_periph(AT91_PIN_PA22, 0); - data->num_channels = 4; data->startup_time = 10; - data->registers = &at91_adc_register_g20; data->trigger_number = 4; data->trigger_list = at91_adc_triggers; diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c index 80e35895d28f..43b21f456f6e 100644 --- a/arch/arm/mach-at91/at91sam9261_devices.c +++ b/arch/arm/mach-at91/at91sam9261_devices.c @@ -29,7 +29,7 @@ #include "board.h" #include "generic.h" - +#include "gpio.h" /* -------------------------------------------------------------------- * USB Host diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c index 43d53d6156dd..953616e5dbcb 100644 --- a/arch/arm/mach-at91/at91sam9263_devices.c +++ b/arch/arm/mach-at91/at91sam9263_devices.c @@ -28,6 +28,7 @@ #include "board.h" #include "generic.h" +#include "gpio.h" /* -------------------------------------------------------------------- diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index 5e6f498db0a8..9d3d544ac19c 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c @@ -182,7 +182,7 @@ static struct clk vdec_clk = { static struct clk adc_op_clk = { .name = "adc_op_clk", .type = CLK_TYPE_PERIPHERAL, - .rate_hz = 13200000, + .rate_hz = 300000, }; /* AES/TDES/SHA clock - Only for sam9m11/sam9g56 */ diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c index 77b04c2edd78..d943363c1845 100644 --- a/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/arch/arm/mach-at91/at91sam9g45_devices.c @@ -25,7 +25,6 @@ #include <linux/fb.h> #include <video/atmel_lcdc.h> -#include <mach/at91_adc.h> #include <mach/at91sam9g45.h> #include <mach/at91sam9g45_matrix.h> #include <mach/at91_matrix.h> @@ -39,6 +38,7 @@ #include "board.h" #include "generic.h" #include "clock.h" +#include "gpio.h" /* -------------------------------------------------------------------- @@ -1133,58 +1133,7 @@ static void __init at91_add_device_rtc(void) {} /* -------------------------------------------------------------------- - * Touchscreen - * -------------------------------------------------------------------- */ - -#if defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC) || defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC_MODULE) -static u64 tsadcc_dmamask = DMA_BIT_MASK(32); -static struct at91_tsadcc_data tsadcc_data; - -static struct resource tsadcc_resources[] = { - [0] = { - .start = AT91SAM9G45_BASE_TSC, - .end = AT91SAM9G45_BASE_TSC + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC, - .flags = IORESOURCE_IRQ, - } -}; - -static struct platform_device at91sam9g45_tsadcc_device = { - .name = "atmel_tsadcc", - .id = -1, - .dev = { - .dma_mask = &tsadcc_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &tsadcc_data, - }, - .resource = tsadcc_resources, - .num_resources = ARRAY_SIZE(tsadcc_resources), -}; - -void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data) -{ - if (!data) - return; - - at91_set_gpio_input(AT91_PIN_PD20, 0); /* AD0_XR */ - at91_set_gpio_input(AT91_PIN_PD21, 0); /* AD1_XL */ - at91_set_gpio_input(AT91_PIN_PD22, 0); /* AD2_YT */ - at91_set_gpio_input(AT91_PIN_PD23, 0); /* AD3_TB */ - - tsadcc_data = *data; - platform_device_register(&at91sam9g45_tsadcc_device); -} -#else -void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data) {} -#endif - - -/* -------------------------------------------------------------------- - * ADC + * ADC and touchscreen * -------------------------------------------------------------------- */ #if IS_ENABLED(CONFIG_AT91_ADC) @@ -1204,7 +1153,7 @@ static struct resource adc_resources[] = { }; static struct platform_device at91_adc_device = { - .name = "at91_adc", + .name = "at91sam9g45-adc", .id = -1, .dev = { .platform_data = &adc_data, @@ -1236,13 +1185,6 @@ static struct at91_adc_trigger at91_adc_triggers[] = { }, }; -static struct at91_adc_reg_desc at91_adc_register_g45 = { - .channel_base = AT91_ADC_CHR(0), - .drdy_mask = AT91_ADC_DRDY, - .status_register = AT91_ADC_SR, - .trigger_register = 0x08, -}; - void __init at91_add_device_adc(struct at91_adc_data *data) { if (!data) @@ -1268,9 +1210,7 @@ void __init at91_add_device_adc(struct at91_adc_data *data) if (data->use_external_triggers) at91_set_A_periph(AT91_PIN_PD28, 0); - data->num_channels = 8; data->startup_time = 40; - data->registers = &at91_adc_register_g45; data->trigger_number = 4; data->trigger_list = at91_adc_triggers; diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c index f2ea7b0a02da..c8988fe5ff70 100644 --- a/arch/arm/mach-at91/at91sam9n12.c +++ b/arch/arm/mach-at91/at91sam9n12.c @@ -19,9 +19,10 @@ #include "board.h" #include "soc.h" #include "generic.h" -#include "clock.h" #include "sam9_smc.h" +#if defined(CONFIG_OLD_CLK_AT91) +#include "clock.h" /* -------------------------------------------------------------------- * Clocks * -------------------------------------------------------------------- */ @@ -215,6 +216,9 @@ static void __init at91sam9n12_register_clocks(void) ARRAY_SIZE(periph_clocks_lookups)); } +#else +#define at91sam9n12_register_clocks NULL +#endif /* -------------------------------------------------------------------- * AT91SAM9N12 processor initialization diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c index 57f12d86c0e6..a79960f57e6a 100644 --- a/arch/arm/mach-at91/at91sam9rl.c +++ b/arch/arm/mach-at91/at91sam9rl.c @@ -153,6 +153,11 @@ static struct clk ac97_clk = { .pmc_mask = 1 << AT91SAM9RL_ID_AC97C, .type = CLK_TYPE_PERIPHERAL, }; +static struct clk adc_op_clk = { + .name = "adc_op_clk", + .type = CLK_TYPE_PERIPHERAL, + .rate_hz = 1000000, +}; static struct clk *periph_clocks[] __initdata = { &pioA_clk, @@ -178,6 +183,7 @@ static struct clk *periph_clocks[] __initdata = { &udphs_clk, &lcdc_clk, &ac97_clk, + &adc_op_clk, // irq0 }; @@ -216,6 +222,7 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk), CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk), CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioD_clk), + CLKDEV_CON_ID("adc_clk", &tsc_clk), }; static struct clk_lookup usart_clocks_lookups[] = { diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c index 428fc412aaf1..044ad8bc6963 100644 --- a/arch/arm/mach-at91/at91sam9rl_devices.c +++ b/arch/arm/mach-at91/at91sam9rl_devices.c @@ -23,9 +23,11 @@ #include <mach/at91sam9_smc.h> #include <mach/hardware.h> #include <linux/platform_data/dma-atmel.h> +#include <linux/platform_data/at91_adc.h> #include "board.h" #include "generic.h" +#include "gpio.h" /* -------------------------------------------------------------------- @@ -608,14 +610,13 @@ static void __init at91_add_device_tc(void) { } /* -------------------------------------------------------------------- - * Touchscreen + * ADC and Touchscreen * -------------------------------------------------------------------- */ -#if defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC) || defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC_MODULE) -static u64 tsadcc_dmamask = DMA_BIT_MASK(32); -static struct at91_tsadcc_data tsadcc_data; +#if IS_ENABLED(CONFIG_AT91_ADC) +static struct at91_adc_data adc_data; -static struct resource tsadcc_resources[] = { +static struct resource adc_resources[] = { [0] = { .start = AT91SAM9RL_BASE_TSC, .end = AT91SAM9RL_BASE_TSC + SZ_16K - 1, @@ -628,36 +629,71 @@ static struct resource tsadcc_resources[] = { } }; -static struct platform_device at91sam9rl_tsadcc_device = { - .name = "atmel_tsadcc", - .id = -1, - .dev = { - .dma_mask = &tsadcc_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &tsadcc_data, +static struct platform_device at91_adc_device = { + .name = "at91sam9rl-adc", + .id = -1, + .dev = { + .platform_data = &adc_data, }, - .resource = tsadcc_resources, - .num_resources = ARRAY_SIZE(tsadcc_resources), + .resource = adc_resources, + .num_resources = ARRAY_SIZE(adc_resources), }; -void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data) +static struct at91_adc_trigger at91_adc_triggers[] = { + [0] = { + .name = "external-rising", + .value = 1, + .is_external = true, + }, + [1] = { + .name = "external-falling", + .value = 2, + .is_external = true, + }, + [2] = { + .name = "external-any", + .value = 3, + .is_external = true, + }, + [3] = { + .name = "continuous", + .value = 6, + .is_external = false, + }, +}; + +void __init at91_add_device_adc(struct at91_adc_data *data) { if (!data) return; - at91_set_A_periph(AT91_PIN_PA17, 0); /* AD0_XR */ - at91_set_A_periph(AT91_PIN_PA18, 0); /* AD1_XL */ - at91_set_A_periph(AT91_PIN_PA19, 0); /* AD2_YT */ - at91_set_A_periph(AT91_PIN_PA20, 0); /* AD3_TB */ - - tsadcc_data = *data; - platform_device_register(&at91sam9rl_tsadcc_device); + if (test_bit(0, &data->channels_used)) + at91_set_A_periph(AT91_PIN_PA17, 0); + if (test_bit(1, &data->channels_used)) + at91_set_A_periph(AT91_PIN_PA18, 0); + if (test_bit(2, &data->channels_used)) + at91_set_A_periph(AT91_PIN_PA19, 0); + if (test_bit(3, &data->channels_used)) + at91_set_A_periph(AT91_PIN_PA20, 0); + if (test_bit(4, &data->channels_used)) + at91_set_A_periph(AT91_PIN_PD6, 0); + if (test_bit(5, &data->channels_used)) + at91_set_A_periph(AT91_PIN_PD7, 0); + + if (data->use_external_triggers) + at91_set_A_periph(AT91_PIN_PB15, 0); + + data->startup_time = 40; + data->trigger_number = 4; + data->trigger_list = at91_adc_triggers; + + adc_data = *data; + platform_device_register(&at91_adc_device); } #else -void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data) {} +void __init at91_add_device_adc(struct at91_adc_data *data) {} #endif - /* -------------------------------------------------------------------- * RTC * -------------------------------------------------------------------- */ diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c index 9ad781d5ee7c..028268ff3722 100644 --- a/arch/arm/mach-at91/at91sam9x5.c +++ b/arch/arm/mach-at91/at91sam9x5.c @@ -19,9 +19,10 @@ #include "board.h" #include "soc.h" #include "generic.h" -#include "clock.h" #include "sam9_smc.h" +#if defined(CONFIG_OLD_CLK_AT91) +#include "clock.h" /* -------------------------------------------------------------------- * Clocks * -------------------------------------------------------------------- */ @@ -313,6 +314,9 @@ static void __init at91sam9x5_register_clocks(void) clk_register(&pck0); clk_register(&pck1); } +#else +#define at91sam9x5_register_clocks NULL +#endif /* -------------------------------------------------------------------- * AT91SAM9x5 processor initialization diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c index 35ab632bbf68..3f6dbcc34022 100644 --- a/arch/arm/mach-at91/board-1arm.c +++ b/arch/arm/mach-at91/board-1arm.c @@ -39,7 +39,7 @@ #include "at91_aic.h" #include "board.h" #include "generic.h" - +#include "gpio.h" static void __init onearm_init_early(void) { diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c index f95e31cda4b3..597c649170aa 100644 --- a/arch/arm/mach-at91/board-afeb-9260v1.c +++ b/arch/arm/mach-at91/board-afeb-9260v1.c @@ -46,6 +46,7 @@ #include "at91_aic.h" #include "board.h" #include "generic.h" +#include "gpio.h" static void __init afeb9260_init_early(void) diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c index 112e867c4abe..a30502c8d379 100644 --- a/arch/arm/mach-at91/board-cam60.c +++ b/arch/arm/mach-at91/board-cam60.c @@ -44,6 +44,7 @@ #include "board.h" #include "sam9_smc.h" #include "generic.h" +#include "gpio.h" static void __init cam60_init_early(void) diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c index 92983050a9bd..47313d3ee037 100644 --- a/arch/arm/mach-at91/board-carmeva.c +++ b/arch/arm/mach-at91/board-carmeva.c @@ -39,6 +39,7 @@ #include "at91_aic.h" #include "board.h" #include "generic.h" +#include "gpio.h" static void __init carmeva_init_early(void) diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c index 008527efdbcf..2037f78c84e7 100644 --- a/arch/arm/mach-at91/board-cpu9krea.c +++ b/arch/arm/mach-at91/board-cpu9krea.c @@ -48,6 +48,7 @@ #include "board.h" #include "sam9_smc.h" #include "generic.h" +#include "gpio.h" static void __init cpu9krea_init_early(void) { diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c index 42f1353a4baf..c094350c9314 100644 --- a/arch/arm/mach-at91/board-cpuat91.c +++ b/arch/arm/mach-at91/board-cpuat91.c @@ -43,6 +43,8 @@ #include "at91_aic.h" #include "board.h" #include "generic.h" +#include "gpio.h" + static struct gpio_led cpuat91_leds[] = { { diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c index e5fde215225b..0e35a45cf8d4 100644 --- a/arch/arm/mach-at91/board-csb337.c +++ b/arch/arm/mach-at91/board-csb337.c @@ -42,7 +42,7 @@ #include "at91_aic.h" #include "board.h" #include "generic.h" - +#include "gpio.h" static void __init csb337_init_early(void) { diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c index fdf11061c577..18d027f529a8 100644 --- a/arch/arm/mach-at91/board-csb637.c +++ b/arch/arm/mach-at91/board-csb637.c @@ -39,6 +39,7 @@ #include "at91_aic.h" #include "board.h" #include "generic.h" +#include "gpio.h" static void __init csb637_init_early(void) diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c index f9be8161bbfa..aa457a8b22f5 100644 --- a/arch/arm/mach-at91/board-eb9200.c +++ b/arch/arm/mach-at91/board-eb9200.c @@ -38,6 +38,7 @@ #include "at91_aic.h" #include "board.h" #include "generic.h" +#include "gpio.h" static void __init eb9200_init_early(void) diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c index b2fcd71262ba..ede1373ccaba 100644 --- a/arch/arm/mach-at91/board-ecbat91.c +++ b/arch/arm/mach-at91/board-ecbat91.c @@ -42,6 +42,7 @@ #include "at91_aic.h" #include "board.h" #include "generic.h" +#include "gpio.h" static void __init ecb_at91init_early(void) diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c index 77de410efc90..4e75321a8f2a 100644 --- a/arch/arm/mach-at91/board-eco920.c +++ b/arch/arm/mach-at91/board-eco920.c @@ -31,6 +31,8 @@ #include "at91_aic.h" #include "board.h" #include "generic.h" +#include "gpio.h" + static void __init eco920_init_early(void) { diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c index 737c08563628..68f1ab6bd08f 100644 --- a/arch/arm/mach-at91/board-flexibity.c +++ b/arch/arm/mach-at91/board-flexibity.c @@ -37,6 +37,7 @@ #include "at91_aic.h" #include "board.h" #include "generic.h" +#include "gpio.h" static void __init flexibity_init_early(void) { diff --git a/arch/arm/mach-at91/board-foxg20.c b/arch/arm/mach-at91/board-foxg20.c index c20a870ea9c9..8b22c60bb238 100644 --- a/arch/arm/mach-at91/board-foxg20.c +++ b/arch/arm/mach-at91/board-foxg20.c @@ -47,6 +47,7 @@ #include "board.h" #include "sam9_smc.h" #include "generic.h" +#include "gpio.h" /* * The FOX Board G20 hardware comes as the "Netus G20" board with diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c index 416bae8435ee..b729dd1271bf 100644 --- a/arch/arm/mach-at91/board-gsia18s.c +++ b/arch/arm/mach-at91/board-gsia18s.c @@ -39,6 +39,7 @@ #include "generic.h" #include "gsia18s.h" #include "stamp9g20.h" +#include "gpio.h" static void __init gsia18s_init_early(void) { diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c index 88e2f5d2d16d..93b1df42f639 100644 --- a/arch/arm/mach-at91/board-kafa.c +++ b/arch/arm/mach-at91/board-kafa.c @@ -39,6 +39,7 @@ #include "at91_aic.h" #include "board.h" #include "generic.h" +#include "gpio.h" static void __init kafa_init_early(void) diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c index 0c519d9ebffc..d58d36225e08 100644 --- a/arch/arm/mach-at91/board-kb9202.c +++ b/arch/arm/mach-at91/board-kb9202.c @@ -42,6 +42,7 @@ #include "at91_aic.h" #include "board.h" #include "generic.h" +#include "gpio.h" static void __init kb9202_init_early(void) diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c index 5f25fa54eb93..b48d95ec5152 100644 --- a/arch/arm/mach-at91/board-pcontrol-g20.c +++ b/arch/arm/mach-at91/board-pcontrol-g20.c @@ -37,6 +37,7 @@ #include "sam9_smc.h" #include "generic.h" #include "stamp9g20.h" +#include "gpio.h" static void __init pcontrol_g20_init_early(void) diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c index ab2b2ec36c14..2c0f2d554d84 100644 --- a/arch/arm/mach-at91/board-picotux200.c +++ b/arch/arm/mach-at91/board-picotux200.c @@ -43,6 +43,7 @@ #include "at91_aic.h" #include "board.h" #include "generic.h" +#include "gpio.h" static void __init picotux200_init_early(void) diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c index 8b17dadc1aba..953cea416754 100644 --- a/arch/arm/mach-at91/board-rm9200ek.c +++ b/arch/arm/mach-at91/board-rm9200ek.c @@ -45,6 +45,7 @@ #include "at91_aic.h" #include "board.h" #include "generic.h" +#include "gpio.h" static void __init ek_init_early(void) diff --git a/arch/arm/mach-at91/board-rsi-ews.c b/arch/arm/mach-at91/board-rsi-ews.c index f6d7f1958c7e..f28e8b74df4b 100644 --- a/arch/arm/mach-at91/board-rsi-ews.c +++ b/arch/arm/mach-at91/board-rsi-ews.c @@ -31,6 +31,7 @@ #include "at91_aic.h" #include "board.h" #include "generic.h" +#include "gpio.h" static void __init rsi_ews_init_early(void) { diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c index 43ee4dc43b50..d24dda67e2d3 100644 --- a/arch/arm/mach-at91/board-sam9-l9260.c +++ b/arch/arm/mach-at91/board-sam9-l9260.c @@ -43,6 +43,7 @@ #include "board.h" #include "sam9_smc.h" #include "generic.h" +#include "gpio.h" static void __init ek_init_early(void) diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c index f4f8735315da..65dea12d685e 100644 --- a/arch/arm/mach-at91/board-sam9260ek.c +++ b/arch/arm/mach-at91/board-sam9260ek.c @@ -49,6 +49,7 @@ #include "board.h" #include "sam9_smc.h" #include "generic.h" +#include "gpio.h" static void __init ek_init_early(void) diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c index 473546b9408b..4637432de08f 100644 --- a/arch/arm/mach-at91/board-sam9261ek.c +++ b/arch/arm/mach-at91/board-sam9261ek.c @@ -53,6 +53,7 @@ #include "board.h" #include "sam9_smc.h" #include "generic.h" +#include "gpio.h" static void __init ek_init_early(void) diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c index 2f931915c80c..cd2726ee5add 100644 --- a/arch/arm/mach-at91/board-sam9263ek.c +++ b/arch/arm/mach-at91/board-sam9263ek.c @@ -52,6 +52,7 @@ #include "board.h" #include "sam9_smc.h" #include "generic.h" +#include "gpio.h" static void __init ek_init_early(void) diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c index f9cd1f2c7146..e1be6e25b380 100644 --- a/arch/arm/mach-at91/board-sam9g20ek.c +++ b/arch/arm/mach-at91/board-sam9g20ek.c @@ -50,6 +50,7 @@ #include "board.h" #include "sam9_smc.h" #include "generic.h" +#include "gpio.h" /* * board revision encoding diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c index ef39078c8ce2..1ea61328f30d 100644 --- a/arch/arm/mach-at91/board-sam9m10g45ek.c +++ b/arch/arm/mach-at91/board-sam9m10g45ek.c @@ -50,6 +50,7 @@ #include "board.h" #include "sam9_smc.h" #include "generic.h" +#include "gpio.h" static void __init ek_init_early(void) @@ -300,21 +301,13 @@ static struct atmel_lcdfb_pdata __initdata ek_lcdc_data; /* - * Touchscreen - */ -static struct at91_tsadcc_data ek_tsadcc_data = { - .adc_clock = 300000, - .pendet_debounce = 0x0d, - .ts_sample_hold_time = 0x0a, -}; - -/* - * ADCs + * ADCs and touchscreen */ static struct at91_adc_data ek_adc_data = { .channels_used = BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6) | BIT(7), .use_external_triggers = true, .vref = 3300, + .touchscreen_type = ATMEL_ADC_TOUCHSCREEN_4WIRE, }; /* @@ -485,9 +478,7 @@ static void __init ek_board_init(void) at91_add_device_isi(&isi_data, true); /* LCD Controller */ at91_add_device_lcdc(&ek_lcdc_data); - /* Touch Screen */ - at91_add_device_tsadcc(&ek_tsadcc_data); - /* ADC */ + /* ADC and touchscreen */ at91_add_device_adc(&ek_adc_data); /* Push Buttons */ ek_add_device_buttons(); diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c index 604eecf6cd70..b64648b4a1fc 100644 --- a/arch/arm/mach-at91/board-sam9rlek.c +++ b/arch/arm/mach-at91/board-sam9rlek.c @@ -18,6 +18,7 @@ #include <linux/clk.h> #include <linux/input.h> #include <linux/gpio_keys.h> +#include <linux/platform_data/at91_adc.h> #include <video/atmel_lcdc.h> @@ -38,6 +39,7 @@ #include "board.h" #include "sam9_smc.h" #include "generic.h" +#include "gpio.h" static void __init ek_init_early(void) @@ -229,12 +231,13 @@ static struct gpio_led ek_leds[] = { /* - * Touchscreen + * ADC + Touchscreen */ -static struct at91_tsadcc_data ek_tsadcc_data = { - .adc_clock = 1000000, - .pendet_debounce = 0x0f, - .ts_sample_hold_time = 0x03, +static struct at91_adc_data ek_adc_data = { + .channels_used = BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5), + .use_external_triggers = true, + .vref = 3300, + .touchscreen_type = ATMEL_ADC_TOUCHSCREEN_4WIRE, }; @@ -310,8 +313,8 @@ static void __init ek_board_init(void) at91_add_device_lcdc(&ek_lcdc_data); /* AC97 */ at91_add_device_ac97(&ek_ac97_data); - /* Touch Screen Controller */ - at91_add_device_tsadcc(&ek_tsadcc_data); + /* Touch Screen Controller + ADC */ + at91_add_device_adc(&ek_adc_data); /* LEDs */ at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); /* Push Buttons */ diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c index f1d49e929ccb..1b870e6def0c 100644 --- a/arch/arm/mach-at91/board-snapper9260.c +++ b/arch/arm/mach-at91/board-snapper9260.c @@ -38,6 +38,7 @@ #include "board.h" #include "sam9_smc.h" #include "generic.h" +#include "gpio.h" #define SNAPPER9260_IO_EXP_GPIO(x) (NR_BUILTIN_GPIO + (x)) diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c index e4a5ac17cdbc..3b575036ff96 100644 --- a/arch/arm/mach-at91/board-stamp9g20.c +++ b/arch/arm/mach-at91/board-stamp9g20.c @@ -32,6 +32,7 @@ #include "board.h" #include "sam9_smc.h" #include "generic.h" +#include "gpio.h" void __init stamp9g20_init_early(void) diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c index be083771df2e..46fdb0c68a68 100644 --- a/arch/arm/mach-at91/board-yl-9200.c +++ b/arch/arm/mach-at91/board-yl-9200.c @@ -50,6 +50,7 @@ #include "at91_aic.h" #include "board.h" #include "generic.h" +#include "gpio.h" static void __init yl9200_init_early(void) diff --git a/arch/arm/mach-at91/board.h b/arch/arm/mach-at91/board.h index 6c08b341167d..4e773b55bc2d 100644 --- a/arch/arm/mach-at91/board.h +++ b/arch/arm/mach-at91/board.h @@ -118,9 +118,6 @@ struct isi_platform_data; extern void __init at91_add_device_isi(struct isi_platform_data *data, bool use_pck_as_mck); - /* Touchscreen Controller */ -extern void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data); - /* CAN */ extern void __init at91_add_device_can(struct at91_can_data *data); diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c index a5afcf76550e..12ed05bbdc5c 100644 --- a/arch/arm/mach-at91/gpio.c +++ b/arch/arm/mach-at91/gpio.c @@ -29,6 +29,7 @@ #include <mach/at91_pio.h> #include "generic.h" +#include "gpio.h" #define MAX_NB_GPIO_PER_BANK 32 diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/gpio.h index 5fc23771c154..eed465ab0dd7 100644 --- a/arch/arm/mach-at91/include/mach/gpio.h +++ b/arch/arm/mach-at91/gpio.h @@ -209,14 +209,6 @@ extern int at91_get_gpio_value(unsigned pin); extern void at91_gpio_suspend(void); extern void at91_gpio_resume(void); -#ifdef CONFIG_PINCTRL_AT91 -extern void at91_pinctrl_gpio_suspend(void); -extern void at91_pinctrl_gpio_resume(void); -#else -static inline void at91_pinctrl_gpio_suspend(void) {} -static inline void at91_pinctrl_gpio_resume(void) {} -#endif - #endif /* __ASSEMBLY__ */ #endif diff --git a/arch/arm/mach-at91/include/mach/at91_adc.h b/arch/arm/mach-at91/include/mach/at91_adc.h deleted file mode 100644 index c287307b9a3b..000000000000 --- a/arch/arm/mach-at91/include/mach/at91_adc.h +++ /dev/null @@ -1,107 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/at91_adc.h - * - * Copyright (C) SAN People - * - * Analog-to-Digital Converter (ADC) registers. - * Based on AT91SAM9260 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_ADC_H -#define AT91_ADC_H - -#define AT91_ADC_CR 0x00 /* Control Register */ -#define AT91_ADC_SWRST (1 << 0) /* Software Reset */ -#define AT91_ADC_START (1 << 1) /* Start Conversion */ - -#define AT91_ADC_MR 0x04 /* Mode Register */ -#define AT91_ADC_TRGEN (1 << 0) /* Trigger Enable */ -#define AT91_ADC_TRGSEL (7 << 1) /* Trigger Selection */ -#define AT91_ADC_TRGSEL_TC0 (0 << 1) -#define AT91_ADC_TRGSEL_TC1 (1 << 1) -#define AT91_ADC_TRGSEL_TC2 (2 << 1) -#define AT91_ADC_TRGSEL_EXTERNAL (6 << 1) -#define AT91_ADC_LOWRES (1 << 4) /* Low Resolution */ -#define AT91_ADC_SLEEP (1 << 5) /* Sleep Mode */ -#define AT91_ADC_PRESCAL_9260 (0x3f << 8) /* Prescalar Rate Selection */ -#define AT91_ADC_PRESCAL_9G45 (0xff << 8) -#define AT91_ADC_PRESCAL_(x) ((x) << 8) -#define AT91_ADC_STARTUP_9260 (0x1f << 16) /* Startup Up Time */ -#define AT91_ADC_STARTUP_9G45 (0x7f << 16) -#define AT91_ADC_STARTUP_9X5 (0xf << 16) -#define AT91_ADC_STARTUP_(x) ((x) << 16) -#define AT91_ADC_SHTIM (0xf << 24) /* Sample & Hold Time */ -#define AT91_ADC_SHTIM_(x) ((x) << 24) - -#define AT91_ADC_CHER 0x10 /* Channel Enable Register */ -#define AT91_ADC_CHDR 0x14 /* Channel Disable Register */ -#define AT91_ADC_CHSR 0x18 /* Channel Status Register */ -#define AT91_ADC_CH(n) (1 << (n)) /* Channel Number */ - -#define AT91_ADC_SR 0x1C /* Status Register */ -#define AT91_ADC_EOC(n) (1 << (n)) /* End of Conversion on Channel N */ -#define AT91_ADC_OVRE(n) (1 << ((n) + 8))/* Overrun Error on Channel N */ -#define AT91_ADC_DRDY (1 << 16) /* Data Ready */ -#define AT91_ADC_GOVRE (1 << 17) /* General Overrun Error */ -#define AT91_ADC_ENDRX (1 << 18) /* End of RX Buffer */ -#define AT91_ADC_RXFUFF (1 << 19) /* RX Buffer Full */ - -#define AT91_ADC_SR_9X5 0x30 /* Status Register for 9x5 */ -#define AT91_ADC_SR_DRDY_9X5 (1 << 24) /* Data Ready */ - -#define AT91_ADC_LCDR 0x20 /* Last Converted Data Register */ -#define AT91_ADC_LDATA (0x3ff) - -#define AT91_ADC_IER 0x24 /* Interrupt Enable Register */ -#define AT91_ADC_IDR 0x28 /* Interrupt Disable Register */ -#define AT91_ADC_IMR 0x2C /* Interrupt Mask Register */ -#define AT91_ADC_IER_PEN (1 << 29) -#define AT91_ADC_IER_NOPEN (1 << 30) -#define AT91_ADC_IER_XRDY (1 << 20) -#define AT91_ADC_IER_YRDY (1 << 21) -#define AT91_ADC_IER_PRDY (1 << 22) -#define AT91_ADC_ISR_PENS (1 << 31) - -#define AT91_ADC_CHR(n) (0x30 + ((n) * 4)) /* Channel Data Register N */ -#define AT91_ADC_DATA (0x3ff) - -#define AT91_ADC_CDR0_9X5 (0x50) /* Channel Data Register 0 for 9X5 */ - -#define AT91_ADC_ACR 0x94 /* Analog Control Register */ -#define AT91_ADC_ACR_PENDETSENS (0x3 << 0) /* pull-up resistor */ - -#define AT91_ADC_TSMR 0xB0 -#define AT91_ADC_TSMR_TSMODE (3 << 0) /* Touch Screen Mode */ -#define AT91_ADC_TSMR_TSMODE_NONE (0 << 0) -#define AT91_ADC_TSMR_TSMODE_4WIRE_NO_PRESS (1 << 0) -#define AT91_ADC_TSMR_TSMODE_4WIRE_PRESS (2 << 0) -#define AT91_ADC_TSMR_TSMODE_5WIRE (3 << 0) -#define AT91_ADC_TSMR_TSAV (3 << 4) /* Averages samples */ -#define AT91_ADC_TSMR_TSAV_(x) ((x) << 4) -#define AT91_ADC_TSMR_SCTIM (0x0f << 16) /* Switch closure time */ -#define AT91_ADC_TSMR_PENDBC (0x0f << 28) /* Pen Debounce time */ -#define AT91_ADC_TSMR_PENDBC_(x) ((x) << 28) -#define AT91_ADC_TSMR_NOTSDMA (1 << 22) /* No Touchscreen DMA */ -#define AT91_ADC_TSMR_PENDET_DIS (0 << 24) /* Pen contact detection disable */ -#define AT91_ADC_TSMR_PENDET_ENA (1 << 24) /* Pen contact detection enable */ - -#define AT91_ADC_TSXPOSR 0xB4 -#define AT91_ADC_TSYPOSR 0xB8 -#define AT91_ADC_TSPRESSR 0xBC - -#define AT91_ADC_TRGR_9260 AT91_ADC_MR -#define AT91_ADC_TRGR_9G45 0x08 -#define AT91_ADC_TRGR_9X5 0xC0 - -/* Trigger Register bit field */ -#define AT91_ADC_TRGR_TRGPER (0xffff << 16) -#define AT91_ADC_TRGR_TRGPER_(x) ((x) << 16) -#define AT91_ADC_TRGR_TRGMOD (0x7 << 0) -#define AT91_ADC_TRGR_MOD_PERIOD_TRIG (5 << 0) - -#endif diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h index f17aa3150019..56338245653a 100644 --- a/arch/arm/mach-at91/include/mach/hardware.h +++ b/arch/arm/mach-at91/include/mach/hardware.h @@ -104,5 +104,20 @@ /* Clocks */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ +/* + * FIXME: this is needed to communicate between the pinctrl driver and + * the PM implementation in the machine. Possibly part of the PM + * implementation should be moved down into the pinctrl driver and get + * called as part of the generic suspend/resume path. + */ +#ifndef __ASSEMBLY__ +#ifdef CONFIG_PINCTRL_AT91 +extern void at91_pinctrl_gpio_suspend(void); +extern void at91_pinctrl_gpio_resume(void); +#else +static inline void at91_pinctrl_gpio_suspend(void) {} +static inline void at91_pinctrl_gpio_resume(void) {} +#endif +#endif #endif diff --git a/arch/arm/mach-at91/leds.c b/arch/arm/mach-at91/leds.c index 3e22978b5547..77c4d8fd03fd 100644 --- a/arch/arm/mach-at91/leds.c +++ b/arch/arm/mach-at91/leds.c @@ -16,6 +16,7 @@ #include <linux/platform_device.h> #include "board.h" +#include "gpio.h" /* ------------------------------------------------------------------------- */ diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 8bda1cefdf96..e95554532987 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -32,6 +32,7 @@ #include "at91_aic.h" #include "generic.h" #include "pm.h" +#include "gpio.h" /* * Show the reason for the previous system reset. diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h index 9ef3f83efaff..963c51fb606c 100644 --- a/arch/arm/mach-exynos/common.h +++ b/arch/arm/mach-exynos/common.h @@ -18,6 +18,7 @@ void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1); struct map_desc; +extern void __iomem *sysram_ns_base_addr; void exynos_init_io(void); void exynos_restart(enum reboot_mode mode, const char *cmd); void exynos_cpuidle_init(void); diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c index b32a907d021d..e973ff5de7b3 100644 --- a/arch/arm/mach-exynos/exynos.c +++ b/arch/arm/mach-exynos/exynos.c @@ -114,51 +114,6 @@ static struct map_desc exynos4_iodesc[] __initdata = { }, }; -static struct map_desc exynos4_iodesc0[] __initdata = { - { - .virtual = (unsigned long)S5P_VA_SYSRAM, - .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM0), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - -static struct map_desc exynos4_iodesc1[] __initdata = { - { - .virtual = (unsigned long)S5P_VA_SYSRAM, - .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM1), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - -static struct map_desc exynos4210_iodesc[] __initdata = { - { - .virtual = (unsigned long)S5P_VA_SYSRAM_NS, - .pfn = __phys_to_pfn(EXYNOS4210_PA_SYSRAM_NS), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - -static struct map_desc exynos4x12_iodesc[] __initdata = { - { - .virtual = (unsigned long)S5P_VA_SYSRAM_NS, - .pfn = __phys_to_pfn(EXYNOS4x12_PA_SYSRAM_NS), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - -static struct map_desc exynos5250_iodesc[] __initdata = { - { - .virtual = (unsigned long)S5P_VA_SYSRAM_NS, - .pfn = __phys_to_pfn(EXYNOS5250_PA_SYSRAM_NS), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - static struct map_desc exynos5_iodesc[] __initdata = { { .virtual = (unsigned long)S3C_VA_SYS, @@ -181,11 +136,6 @@ static struct map_desc exynos5_iodesc[] __initdata = { .length = SZ_4K, .type = MT_DEVICE, }, { - .virtual = (unsigned long)S5P_VA_SYSRAM, - .pfn = __phys_to_pfn(EXYNOS5_PA_SYSRAM), - .length = SZ_4K, - .type = MT_DEVICE, - }, { .virtual = (unsigned long)S5P_VA_CMU, .pfn = __phys_to_pfn(EXYNOS5_PA_CMU), .length = 144 * SZ_1K, @@ -280,20 +230,6 @@ static void __init exynos_map_io(void) if (soc_is_exynos5()) iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc)); - - if (soc_is_exynos4210()) { - if (samsung_rev() == EXYNOS4210_REV_0) - iotable_init(exynos4_iodesc0, - ARRAY_SIZE(exynos4_iodesc0)); - else - iotable_init(exynos4_iodesc1, - ARRAY_SIZE(exynos4_iodesc1)); - iotable_init(exynos4210_iodesc, ARRAY_SIZE(exynos4210_iodesc)); - } - if (soc_is_exynos4212() || soc_is_exynos4412()) - iotable_init(exynos4x12_iodesc, ARRAY_SIZE(exynos4x12_iodesc)); - if (soc_is_exynos5250()) - iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc)); } void __init exynos_init_io(void) diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c index 932129ef26c6..4135edbc0270 100644 --- a/arch/arm/mach-exynos/firmware.c +++ b/arch/arm/mach-exynos/firmware.c @@ -18,6 +18,9 @@ #include <mach/map.h> +#include <plat/cpu.h> + +#include "common.h" #include "smc.h" static int exynos_do_idle(void) @@ -28,13 +31,29 @@ static int exynos_do_idle(void) static int exynos_cpu_boot(int cpu) { + /* + * The second parameter of SMC_CMD_CPU1BOOT command means CPU id. + * But, Exynos4212 has only one secondary CPU so second parameter + * isn't used for informing secure firmware about CPU id. + */ + if (soc_is_exynos4212()) + cpu = 0; + exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0); return 0; } static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr) { - void __iomem *boot_reg = S5P_VA_SYSRAM_NS + 0x1c + 4*cpu; + void __iomem *boot_reg; + + if (!sysram_ns_base_addr) + return -ENODEV; + + boot_reg = sysram_ns_base_addr + 0x1c; + + if (!soc_is_exynos4212()) + boot_reg += 4*cpu; __raw_writel(boot_addr, boot_reg); return 0; diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h index 7b046b59d9ec..548269a60634 100644 --- a/arch/arm/mach-exynos/include/mach/map.h +++ b/arch/arm/mach-exynos/include/mach/map.h @@ -23,13 +23,6 @@ #include <plat/map-s5p.h> -#define EXYNOS4_PA_SYSRAM0 0x02025000 -#define EXYNOS4_PA_SYSRAM1 0x02020000 -#define EXYNOS5_PA_SYSRAM 0x02020000 -#define EXYNOS4210_PA_SYSRAM_NS 0x0203F000 -#define EXYNOS4x12_PA_SYSRAM_NS 0x0204F000 -#define EXYNOS5250_PA_SYSRAM_NS 0x0204F000 - #define EXYNOS_PA_CHIPID 0x10000000 #define EXYNOS4_PA_SYSCON 0x10010000 diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index 03e5e9f94705..c11c5418e0fc 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c @@ -20,6 +20,7 @@ #include <linux/jiffies.h> #include <linux/smp.h> #include <linux/io.h> +#include <linux/of_address.h> #include <asm/cacheflush.h> #include <asm/smp_plat.h> @@ -33,11 +34,33 @@ extern void exynos4_secondary_startup(void); +static void __iomem *sysram_base_addr; +void __iomem *sysram_ns_base_addr; + +static void __init exynos_smp_prepare_sysram(void) +{ + struct device_node *node; + + for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") { + if (!of_device_is_available(node)) + continue; + sysram_base_addr = of_iomap(node, 0); + break; + } + + for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") { + if (!of_device_is_available(node)) + continue; + sysram_ns_base_addr = of_iomap(node, 0); + break; + } +} + static inline void __iomem *cpu_boot_reg_base(void) { if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1) return S5P_INFORM5; - return S5P_VA_SYSRAM; + return sysram_base_addr; } static inline void __iomem *cpu_boot_reg(int cpu) @@ -45,6 +68,8 @@ static inline void __iomem *cpu_boot_reg(int cpu) void __iomem *boot_reg; boot_reg = cpu_boot_reg_base(); + if (!boot_reg) + return ERR_PTR(-ENODEV); if (soc_is_exynos4412()) boot_reg += 4*cpu; else if (soc_is_exynos5420()) @@ -90,6 +115,7 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) { unsigned long timeout; unsigned long phys_cpu = cpu_logical_map(cpu); + int ret = -ENOSYS; /* * Set synchronisation state between this boot processor @@ -146,8 +172,18 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) * Try to set boot address using firmware first * and fall back to boot register if it fails. */ - if (call_firmware_op(set_cpu_boot_addr, phys_cpu, boot_addr)) + ret = call_firmware_op(set_cpu_boot_addr, phys_cpu, boot_addr); + if (ret && ret != -ENOSYS) + goto fail; + if (ret == -ENOSYS) { + void __iomem *boot_reg = cpu_boot_reg(phys_cpu); + + if (IS_ERR(boot_reg)) { + ret = PTR_ERR(boot_reg); + goto fail; + } __raw_writel(boot_addr, cpu_boot_reg(phys_cpu)); + } call_firmware_op(cpu_boot, phys_cpu); @@ -163,9 +199,10 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) * now the secondary core is starting up let it run its * calibrations, then wait for it to finish */ +fail: spin_unlock(&boot_lock); - return pen_release != -1 ? -ENOSYS : 0; + return pen_release != -1 ? ret : 0; } /* @@ -205,6 +242,8 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus) if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9) scu_enable(scu_base_addr()); + exynos_smp_prepare_sysram(); + /* * Write the address of secondary startup into the * system-wide flags register. The boot monitor waits @@ -217,12 +256,21 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus) for (i = 1; i < max_cpus; ++i) { unsigned long phys_cpu; unsigned long boot_addr; + int ret; phys_cpu = cpu_logical_map(i); boot_addr = virt_to_phys(exynos4_secondary_startup); - if (call_firmware_op(set_cpu_boot_addr, phys_cpu, boot_addr)) + ret = call_firmware_op(set_cpu_boot_addr, phys_cpu, boot_addr); + if (ret && ret != -ENOSYS) + break; + if (ret == -ENOSYS) { + void __iomem *boot_reg = cpu_boot_reg(phys_cpu); + + if (IS_ERR(boot_reg)) + break; __raw_writel(boot_addr, cpu_boot_reg(phys_cpu)); + } } } diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index b0e7f9d2c245..2b4d6acfa34a 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -208,8 +208,8 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) * the "output_enable" bit as a gate, even though it's really just * enabling clock output. */ - clk[lvds1_gate] = imx_clk_gate("lvds1_gate", "dummy", base + 0x160, 10); - clk[lvds2_gate] = imx_clk_gate("lvds2_gate", "dummy", base + 0x160, 11); + clk[lvds1_gate] = imx_clk_gate("lvds1_gate", "lvds1_sel", base + 0x160, 10); + clk[lvds2_gate] = imx_clk_gate("lvds2_gate", "lvds2_sel", base + 0x160, 11); /* name parent_name reg idx */ clk[pll2_pfd0_352m] = imx_clk_pfd("pll2_pfd0_352m", "pll2_bus", base + 0x100, 0); @@ -258,14 +258,14 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) clk[ipu2_sel] = imx_clk_mux("ipu2_sel", base + 0x3c, 14, 2, ipu_sels, ARRAY_SIZE(ipu_sels)); clk[ldb_di0_sel] = imx_clk_mux_flags("ldb_di0_sel", base + 0x2c, 9, 3, ldb_di_sels, ARRAY_SIZE(ldb_di_sels), CLK_SET_RATE_PARENT); clk[ldb_di1_sel] = imx_clk_mux_flags("ldb_di1_sel", base + 0x2c, 12, 3, ldb_di_sels, ARRAY_SIZE(ldb_di_sels), CLK_SET_RATE_PARENT); - clk[ipu1_di0_pre_sel] = imx_clk_mux("ipu1_di0_pre_sel", base + 0x34, 6, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels)); - clk[ipu1_di1_pre_sel] = imx_clk_mux("ipu1_di1_pre_sel", base + 0x34, 15, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels)); - clk[ipu2_di0_pre_sel] = imx_clk_mux("ipu2_di0_pre_sel", base + 0x38, 6, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels)); - clk[ipu2_di1_pre_sel] = imx_clk_mux("ipu2_di1_pre_sel", base + 0x38, 15, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels)); - clk[ipu1_di0_sel] = imx_clk_mux("ipu1_di0_sel", base + 0x34, 0, 3, ipu1_di0_sels, ARRAY_SIZE(ipu1_di0_sels)); - clk[ipu1_di1_sel] = imx_clk_mux("ipu1_di1_sel", base + 0x34, 9, 3, ipu1_di1_sels, ARRAY_SIZE(ipu1_di1_sels)); - clk[ipu2_di0_sel] = imx_clk_mux("ipu2_di0_sel", base + 0x38, 0, 3, ipu2_di0_sels, ARRAY_SIZE(ipu2_di0_sels)); - clk[ipu2_di1_sel] = imx_clk_mux("ipu2_di1_sel", base + 0x38, 9, 3, ipu2_di1_sels, ARRAY_SIZE(ipu2_di1_sels)); + clk[ipu1_di0_pre_sel] = imx_clk_mux_flags("ipu1_di0_pre_sel", base + 0x34, 6, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels), CLK_SET_RATE_PARENT); + clk[ipu1_di1_pre_sel] = imx_clk_mux_flags("ipu1_di1_pre_sel", base + 0x34, 15, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels), CLK_SET_RATE_PARENT); + clk[ipu2_di0_pre_sel] = imx_clk_mux_flags("ipu2_di0_pre_sel", base + 0x38, 6, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels), CLK_SET_RATE_PARENT); + clk[ipu2_di1_pre_sel] = imx_clk_mux_flags("ipu2_di1_pre_sel", base + 0x38, 15, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels), CLK_SET_RATE_PARENT); + clk[ipu1_di0_sel] = imx_clk_mux_flags("ipu1_di0_sel", base + 0x34, 0, 3, ipu1_di0_sels, ARRAY_SIZE(ipu1_di0_sels), CLK_SET_RATE_PARENT); + clk[ipu1_di1_sel] = imx_clk_mux_flags("ipu1_di1_sel", base + 0x34, 9, 3, ipu1_di1_sels, ARRAY_SIZE(ipu1_di1_sels), CLK_SET_RATE_PARENT); + clk[ipu2_di0_sel] = imx_clk_mux_flags("ipu2_di0_sel", base + 0x38, 0, 3, ipu2_di0_sels, ARRAY_SIZE(ipu2_di0_sels), CLK_SET_RATE_PARENT); + clk[ipu2_di1_sel] = imx_clk_mux_flags("ipu2_di1_sel", base + 0x38, 9, 3, ipu2_di1_sels, ARRAY_SIZE(ipu2_di1_sels), CLK_SET_RATE_PARENT); clk[hsi_tx_sel] = imx_clk_mux("hsi_tx_sel", base + 0x30, 28, 1, hsi_tx_sels, ARRAY_SIZE(hsi_tx_sels)); clk[pcie_axi_sel] = imx_clk_mux("pcie_axi_sel", base + 0x18, 10, 1, pcie_axi_sels, ARRAY_SIZE(pcie_axi_sels)); clk[ssi1_sel] = imx_clk_fixup_mux("ssi1_sel", base + 0x1c, 10, 2, ssi_sels, ARRAY_SIZE(ssi_sels), imx_cscmr1_fixup); @@ -445,6 +445,15 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) clk_set_parent(clk[ldb_di1_sel], clk[pll5_video_div]); } + clk_set_parent(clk[ipu1_di0_pre_sel], clk[pll5_video_div]); + clk_set_parent(clk[ipu1_di1_pre_sel], clk[pll5_video_div]); + clk_set_parent(clk[ipu2_di0_pre_sel], clk[pll5_video_div]); + clk_set_parent(clk[ipu2_di1_pre_sel], clk[pll5_video_div]); + clk_set_parent(clk[ipu1_di0_sel], clk[ipu1_di0_pre]); + clk_set_parent(clk[ipu1_di1_sel], clk[ipu1_di1_pre]); + clk_set_parent(clk[ipu2_di0_sel], clk[ipu2_di0_pre]); + clk_set_parent(clk[ipu2_di1_sel], clk[ipu2_di1_pre]); + /* * The gpmi needs 100MHz frequency in the EDO/Sync mode, * We can not get the 100MHz from the pll2_pfd0_352m. diff --git a/arch/arm/mach-omap2/board-rx51-video.c b/arch/arm/mach-omap2/board-rx51-video.c index 43a90c8d6837..9cfebc5c7455 100644 --- a/arch/arm/mach-omap2/board-rx51-video.c +++ b/arch/arm/mach-omap2/board-rx51-video.c @@ -48,7 +48,7 @@ static struct omap_dss_board_info rx51_dss_board_info = { static int __init rx51_video_init(void) { - if (!machine_is_nokia_rx51() && !of_machine_is_compatible("nokia,omap3-n900")) + if (!machine_is_nokia_rx51()) return 0; if (omap_mux_init_gpio(RX51_LCD_RESET_GPIO, OMAP_PIN_OUTPUT)) { diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c index 2649ce445845..332af927f4d3 100644 --- a/arch/arm/mach-omap2/clkt_dpll.c +++ b/arch/arm/mach-omap2/clkt_dpll.c @@ -209,7 +209,7 @@ u8 omap2_init_dpll_parent(struct clk_hw *hw) if (v == OMAP3XXX_EN_DPLL_LPBYPASS || v == OMAP3XXX_EN_DPLL_FRBYPASS) return 1; - } else if (soc_is_am33xx() || cpu_is_omap44xx()) { + } else if (soc_is_am33xx() || cpu_is_omap44xx() || soc_is_am43xx()) { if (v == OMAP4XXX_EN_DPLL_LPBYPASS || v == OMAP4XXX_EN_DPLL_FRBYPASS || v == OMAP4XXX_EN_DPLL_MNBYPASS) @@ -255,7 +255,7 @@ unsigned long omap2_get_dpll_rate(struct clk_hw_omap *clk) if (v == OMAP3XXX_EN_DPLL_LPBYPASS || v == OMAP3XXX_EN_DPLL_FRBYPASS) return __clk_get_rate(dd->clk_bypass); - } else if (soc_is_am33xx() || cpu_is_omap44xx()) { + } else if (soc_is_am33xx() || cpu_is_omap44xx() || soc_is_am43xx()) { if (v == OMAP4XXX_EN_DPLL_LPBYPASS || v == OMAP4XXX_EN_DPLL_FRBYPASS || v == OMAP4XXX_EN_DPLL_MNBYPASS) diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index ab43755364f5..9fe8c949305c 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -501,7 +501,7 @@ static int gpmc_cs_delete_mem(int cs) int r; spin_lock(&gpmc_mem_lock); - r = release_resource(&gpmc_cs_mem[cs]); + r = release_resource(res); res->start = 0; res->end = 0; spin_unlock(&gpmc_mem_lock); @@ -527,6 +527,14 @@ static int gpmc_cs_remap(int cs, u32 base) pr_err("%s: requested chip-select is disabled\n", __func__); return -ENODEV; } + + /* + * Make sure we ignore any device offsets from the GPMC partition + * allocated for the chip select and that the new base confirms + * to the GPMC 16MB minimum granularity. + */ + base &= ~(SZ_16M - 1); + gpmc_cs_get_memconf(cs, &old_base, &size); if (base == old_base) return 0; @@ -586,6 +594,8 @@ EXPORT_SYMBOL(gpmc_cs_request); void gpmc_cs_free(int cs) { + struct resource *res = &gpmc_cs_mem[cs]; + spin_lock(&gpmc_mem_lock); if (cs >= gpmc_cs_num || cs < 0 || !gpmc_cs_reserved(cs)) { printk(KERN_ERR "Trying to free non-reserved GPMC CS%d\n", cs); @@ -594,7 +604,8 @@ void gpmc_cs_free(int cs) return; } gpmc_cs_disable_mem(cs); - release_resource(&gpmc_cs_mem[cs]); + if (res->flags) + release_resource(res); gpmc_cs_set_reserved(cs, 0); spin_unlock(&gpmc_mem_lock); } diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 1f33f5db10d5..66c60fe1104c 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -2546,11 +2546,12 @@ static int __init _init(struct omap_hwmod *oh, void *data) return -EINVAL; } - if (np) + if (np) { if (of_find_property(np, "ti,no-reset-on-init", NULL)) oh->flags |= HWMOD_INIT_NO_RESET; if (of_find_property(np, "ti,no-idle-on-init", NULL)) oh->flags |= HWMOD_INIT_NO_IDLE; + } oh->_state = _HWMOD_STATE_INITIALIZED; diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index a123ff0070bd..71ac7d5f3385 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1964,7 +1964,7 @@ static struct omap_hwmod_irq_info omap3xxx_usb_host_hs_irqs[] = { static struct omap_hwmod omap3xxx_usb_host_hs_hwmod = { .name = "usb_host_hs", .class = &omap3xxx_usb_host_hs_hwmod_class, - .clkdm_name = "l3_init_clkdm", + .clkdm_name = "usbhost_clkdm", .mpu_irqs = omap3xxx_usb_host_hs_irqs, .main_clk = "usbhost_48m_fck", .prcm = { @@ -2047,7 +2047,7 @@ static struct omap_hwmod_irq_info omap3xxx_usb_tll_hs_irqs[] = { static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod = { .name = "usb_tll_hs", .class = &omap3xxx_usb_tll_hs_hwmod_class, - .clkdm_name = "l3_init_clkdm", + .clkdm_name = "core_l4_clkdm", .mpu_irqs = omap3xxx_usb_tll_hs_irqs, .main_clk = "usbtll_fck", .prcm = { diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 1f3770a8a728..87099bb6de69 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -330,10 +330,6 @@ void omap_sram_idle(void) omap3_sram_restore_context(); omap2_sms_restore_context(); } - if (core_next_state == PWRDM_POWER_OFF) - omap2_prm_clear_mod_reg_bits(OMAP3430_AUTO_OFF_MASK, - OMAP3430_GR_MOD, - OMAP3_PRM_VOLTCTRL_OFFSET); } omap3_intc_resume_idle(); diff --git a/arch/arm/mach-pxa/include/mach/hx4700.h b/arch/arm/mach-pxa/include/mach/hx4700.h index 8bc02913517c..0e1bb46264f9 100644 --- a/arch/arm/mach-pxa/include/mach/hx4700.h +++ b/arch/arm/mach-pxa/include/mach/hx4700.h @@ -14,6 +14,7 @@ #include <linux/gpio.h> #include <linux/mfd/asic3.h> +#include "irqs.h" /* PXA_NR_BUILTIN_GPIO */ #define HX4700_ASIC3_GPIO_BASE PXA_NR_BUILTIN_GPIO #define HX4700_EGPIO_BASE (HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS) diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c index dbfa5a26cfff..072842f6491b 100644 --- a/arch/arm/mach-rockchip/platsmp.c +++ b/arch/arm/mach-rockchip/platsmp.c @@ -152,7 +152,7 @@ static void __init rockchip_smp_prepare_cpus(unsigned int max_cpus) node = of_find_compatible_node(NULL, NULL, "rockchip,rk3066-pmu"); if (!node) { - pr_err("%s: could not find sram dt node\n", __func__); + pr_err("%s: could not find pmu dt node\n", __func__); return; } diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c index 2858f380beae..486063db2a2f 100644 --- a/arch/arm/mach-shmobile/board-armadillo800eva.c +++ b/arch/arm/mach-shmobile/board-armadillo800eva.c @@ -992,6 +992,7 @@ static struct asoc_simple_card_info fsi_wm8978_info = { .platform = "sh_fsi2", .daifmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM, .cpu_dai = { + .fmt = SND_SOC_DAIFMT_IB_NF, .name = "fsia-dai", }, .codec_dai = { diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c index f0104bfe544e..18c7e0311aa6 100644 --- a/arch/arm/mach-shmobile/board-lager.c +++ b/arch/arm/mach-shmobile/board-lager.c @@ -588,14 +588,12 @@ static struct asoc_simple_card_info rsnd_card_info = { .card = "SSI01-AK4643", .codec = "ak4642-codec.2-0012", .platform = "rcar_sound", - .daifmt = SND_SOC_DAIFMT_LEFT_J, + .daifmt = SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_CBM_CFM, .cpu_dai = { .name = "rcar_sound", - .fmt = SND_SOC_DAIFMT_CBS_CFS, }, .codec_dai = { .name = "ak4642-hifi", - .fmt = SND_SOC_DAIFMT_CBM_CFM, .sysclk = 11289600, }, }; diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c index 2009a9bc6356..9989b1b06ffd 100644 --- a/arch/arm/mach-shmobile/clock-r8a7778.c +++ b/arch/arm/mach-shmobile/clock-r8a7778.c @@ -170,7 +170,7 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP010] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 10, 0), /* SSI2 */ [MSTP009] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 9, 0), /* SSI3 */ [MSTP008] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 8, 0), /* SRU */ - [MSTP007] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 7, 0), /* HSPI */ + [MSTP007] = SH_CLK_MSTP32(&s_clk, MSTPCR0, 7, 0), /* HSPI */ }; static struct clk_lookup lookups[] = { diff --git a/arch/arm/mach-spear/time.c b/arch/arm/mach-spear/time.c index 64790353951f..26fda4ed4d51 100644 --- a/arch/arm/mach-spear/time.c +++ b/arch/arm/mach-spear/time.c @@ -71,7 +71,7 @@ static void clockevent_set_mode(enum clock_event_mode mode, static int clockevent_next_event(unsigned long evt, struct clock_event_device *clk_event_dev); -static void spear_clocksource_init(void) +static void __init spear_clocksource_init(void) { u32 tick_rate; u16 val; diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 92d660f9610f..55b305d51669 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -70,7 +70,4 @@ config TEGRA_AHB which controls AHB bus master arbitration and some performance parameters(priority, prefech size). -config TEGRA_EMC_SCALING_ENABLE - bool "Enable scaling the memory frequency" - endmenu diff --git a/arch/arm/mach-vexpress/dcscb.c b/arch/arm/mach-vexpress/dcscb.c index 788495d35cf9..30b993399ed7 100644 --- a/arch/arm/mach-vexpress/dcscb.c +++ b/arch/arm/mach-vexpress/dcscb.c @@ -51,12 +51,14 @@ static int dcscb_allcpus_mask[2]; static int dcscb_power_up(unsigned int cpu, unsigned int cluster) { unsigned int rst_hold, cpumask = (1 << cpu); - unsigned int all_mask = dcscb_allcpus_mask[cluster]; + unsigned int all_mask; pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster); if (cpu >= 4 || cluster >= 2) return -EINVAL; + all_mask = dcscb_allcpus_mask[cluster]; + /* * Since this is called with IRQs enabled, and no arch_spin_lock_irq * variant exists, we need to disable IRQs manually here. @@ -101,11 +103,12 @@ static void dcscb_power_down(void) cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); cpumask = (1 << cpu); - all_mask = dcscb_allcpus_mask[cluster]; pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster); BUG_ON(cpu >= 4 || cluster >= 2); + all_mask = dcscb_allcpus_mask[cluster]; + __mcpm_cpu_going_down(cpu, cluster); arch_spin_lock(&dcscb_lock); diff --git a/arch/arm/mach-vexpress/spc.c b/arch/arm/mach-vexpress/spc.c index c26ef5b92ca7..2c2754e79cb3 100644 --- a/arch/arm/mach-vexpress/spc.c +++ b/arch/arm/mach-vexpress/spc.c @@ -392,7 +392,7 @@ static irqreturn_t ve_spc_irq_handler(int irq, void *data) * +--------------------------+ * | 31 20 | 19 0 | * +--------------------------+ - * | u_volt | freq(kHz) | + * | m_volt | freq(kHz) | * +--------------------------+ */ #define MULT_FACTOR 20 @@ -414,7 +414,7 @@ static int ve_spc_populate_opps(uint32_t cluster) ret = ve_spc_read_sys_cfg(SYSCFG_SCC, off, &data); if (!ret) { opps->freq = (data & FREQ_MASK) * MULT_FACTOR; - opps->u_volt = data >> VOLT_SHIFT; + opps->u_volt = (data >> VOLT_SHIFT) * 1000; } else { break; } diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index f5ad9ee70426..5bf7c3c3b301 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -420,29 +420,29 @@ config CPU_32v3 bool select CPU_USE_DOMAINS if MMU select NEEDS_SYSCALL_FOR_CMPXCHG if SMP - select TLS_REG_EMUL if SMP || !MMU select NEED_KUSER_HELPERS + select TLS_REG_EMUL if SMP || !MMU config CPU_32v4 bool select CPU_USE_DOMAINS if MMU select NEEDS_SYSCALL_FOR_CMPXCHG if SMP - select TLS_REG_EMUL if SMP || !MMU select NEED_KUSER_HELPERS + select TLS_REG_EMUL if SMP || !MMU config CPU_32v4T bool select CPU_USE_DOMAINS if MMU select NEEDS_SYSCALL_FOR_CMPXCHG if SMP - select TLS_REG_EMUL if SMP || !MMU select NEED_KUSER_HELPERS + select TLS_REG_EMUL if SMP || !MMU config CPU_32v5 bool select CPU_USE_DOMAINS if MMU select NEEDS_SYSCALL_FOR_CMPXCHG if SMP - select TLS_REG_EMUL if SMP || !MMU select NEED_KUSER_HELPERS + select TLS_REG_EMUL if SMP || !MMU config CPU_32v6 bool diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index f62aa0677e5c..6b00be1f971e 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c @@ -1963,8 +1963,8 @@ arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, size_t size) mapping->nr_bitmaps = 1; mapping->extensions = extensions; mapping->base = base; - mapping->size = bitmap_size << PAGE_SHIFT; mapping->bits = BITS_PER_BYTE * bitmap_size; + mapping->size = mapping->bits << PAGE_SHIFT; spin_lock_init(&mapping->lock); diff --git a/arch/arm/vfp/vfpdouble.c b/arch/arm/vfp/vfpdouble.c index 6cac43bd1d86..423f56dd4028 100644 --- a/arch/arm/vfp/vfpdouble.c +++ b/arch/arm/vfp/vfpdouble.c @@ -866,6 +866,8 @@ vfp_double_multiply_accumulate(int dd, int dn, int dm, u32 fpscr, u32 negate, ch vdp.sign = vfp_sign_negate(vdp.sign); vfp_double_unpack(&vdn, vfp_get_double(dd)); + if (vdn.exponent == 0 && vdn.significand) + vfp_double_normalise_denormal(&vdn); if (negate & NEG_SUBTRACT) vdn.sign = vfp_sign_negate(vdn.sign); diff --git a/arch/arm/vfp/vfpsingle.c b/arch/arm/vfp/vfpsingle.c index b252631b406b..4f96c1617aae 100644 --- a/arch/arm/vfp/vfpsingle.c +++ b/arch/arm/vfp/vfpsingle.c @@ -915,6 +915,8 @@ vfp_single_multiply_accumulate(int sd, int sn, s32 m, u32 fpscr, u32 negate, cha v = vfp_get_float(sd); pr_debug("VFP: s%u = %08x\n", sd, v); vfp_single_unpack(&vsn, v); + if (vsn.exponent == 0 && vsn.significand) + vfp_single_normalise_denormal(&vsn); if (negate & NEG_SUBTRACT) vsn.sign = vfp_sign_negate(vsn.sign); diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index e6e4d3749a6e..e759af5d7098 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -323,8 +323,6 @@ menu "CPU Power Management" source "drivers/cpuidle/Kconfig" -source "kernel/power/Kconfig" - source "drivers/cpufreq/Kconfig" endmenu diff --git a/arch/arm64/boot/dts/apm-storm.dtsi b/arch/arm64/boot/dts/apm-storm.dtsi index 93f4b2dd9248..f8c40a66e65d 100644 --- a/arch/arm64/boot/dts/apm-storm.dtsi +++ b/arch/arm64/boot/dts/apm-storm.dtsi @@ -307,6 +307,7 @@ <0x0 0x1f21e000 0x0 0x1000>, <0x0 0x1f217000 0x0 0x1000>; interrupts = <0x0 0x86 0x4>; + dma-coherent; status = "disabled"; clocks = <&sata01clk 0>; phys = <&phy1 0>; @@ -321,6 +322,7 @@ <0x0 0x1f22e000 0x0 0x1000>, <0x0 0x1f227000 0x0 0x1000>; interrupts = <0x0 0x87 0x4>; + dma-coherent; status = "ok"; clocks = <&sata23clk 0>; phys = <&phy2 0>; @@ -334,6 +336,7 @@ <0x0 0x1f23d000 0x0 0x1000>, <0x0 0x1f23e000 0x0 0x1000>; interrupts = <0x0 0x88 0x4>; + dma-coherent; status = "ok"; clocks = <&sata45clk 0>; phys = <&phy3 0>; diff --git a/arch/arm64/include/asm/mmu.h b/arch/arm64/include/asm/mmu.h index f600d400c07d..aff0292c8f4d 100644 --- a/arch/arm64/include/asm/mmu.h +++ b/arch/arm64/include/asm/mmu.h @@ -22,6 +22,9 @@ typedef struct { void *vdso; } mm_context_t; +#define INIT_MM_CONTEXT(name) \ + .context.id_lock = __RAW_SPIN_LOCK_UNLOCKED(name.context.id_lock), + #define ASID(mm) ((mm)->context.id & 0xffff) extern void paging_init(void); diff --git a/arch/arm64/include/asm/tlb.h b/arch/arm64/include/asm/tlb.h index 72cadf52ca80..80e2c08900d6 100644 --- a/arch/arm64/include/asm/tlb.h +++ b/arch/arm64/include/asm/tlb.h @@ -19,6 +19,7 @@ #ifndef __ASM_TLB_H #define __ASM_TLB_H +#define __tlb_remove_pmd_tlb_entry __tlb_remove_pmd_tlb_entry #include <asm-generic/tlb.h> @@ -99,5 +100,10 @@ static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp, } #endif +static inline void __tlb_remove_pmd_tlb_entry(struct mmu_gather *tlb, pmd_t *pmdp, + unsigned long address) +{ + tlb_add_flush(tlb, address); +} #endif diff --git a/arch/arm64/include/asm/unistd32.h b/arch/arm64/include/asm/unistd32.h index bb8eb8a78e67..c8d8fc17bd5a 100644 --- a/arch/arm64/include/asm/unistd32.h +++ b/arch/arm64/include/asm/unistd32.h @@ -403,8 +403,9 @@ __SYSCALL(378, sys_kcmp) __SYSCALL(379, sys_finit_module) __SYSCALL(380, sys_sched_setattr) __SYSCALL(381, sys_sched_getattr) +__SYSCALL(382, sys_renameat2) -#define __NR_compat_syscalls 379 +#define __NR_compat_syscalls 383 /* * Compat syscall numbers used by the AArch64 kernel. diff --git a/arch/arm64/kernel/debug-monitors.c b/arch/arm64/kernel/debug-monitors.c index ed3955a95747..a7fb874b595e 100644 --- a/arch/arm64/kernel/debug-monitors.c +++ b/arch/arm64/kernel/debug-monitors.c @@ -318,9 +318,6 @@ static int brk_handler(unsigned long addr, unsigned int esr, if (call_break_hook(regs, esr) == DBG_HOOK_HANDLED) return 0; - pr_warn("unexpected brk exception at %lx, esr=0x%x\n", - (long)instruction_pointer(regs), esr); - if (!user_mode(regs)) return -EFAULT; diff --git a/arch/arm64/kernel/early_printk.c b/arch/arm64/kernel/early_printk.c index ffbbdde7aba1..2dc36d00addf 100644 --- a/arch/arm64/kernel/early_printk.c +++ b/arch/arm64/kernel/early_printk.c @@ -143,10 +143,8 @@ static int __init setup_early_printk(char *buf) } /* no options parsing yet */ - if (paddr) { - set_fixmap_io(FIX_EARLYCON_MEM_BASE, paddr); - early_base = (void __iomem *)fix_to_virt(FIX_EARLYCON_MEM_BASE); - } + if (paddr) + early_base = (void __iomem *)set_fixmap_offset_io(FIX_EARLYCON_MEM_BASE, paddr); printch = match->printch; early_console = &early_console_dev; diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c index 720853f70b6b..7ec784653b29 100644 --- a/arch/arm64/kernel/setup.c +++ b/arch/arm64/kernel/setup.c @@ -393,11 +393,10 @@ void __init setup_arch(char **cmdline_p) static int __init arm64_device_init(void) { - of_clk_init(NULL); of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); return 0; } -arch_initcall(arm64_device_init); +arch_initcall_sync(arm64_device_init); static DEFINE_PER_CPU(struct cpu, cpu_data); diff --git a/arch/arm64/kernel/time.c b/arch/arm64/kernel/time.c index 29c39d5d77e3..6815987b50f8 100644 --- a/arch/arm64/kernel/time.c +++ b/arch/arm64/kernel/time.c @@ -33,6 +33,7 @@ #include <linux/irq.h> #include <linux/delay.h> #include <linux/clocksource.h> +#include <linux/clk-provider.h> #include <clocksource/arm_arch_timer.h> @@ -65,6 +66,7 @@ void __init time_init(void) { u32 arch_timer_rate; + of_clk_init(NULL); clocksource_of_init(); arch_timer_rate = arch_timer_get_rate(); diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c index 0ba347e59f06..c851eb44dc50 100644 --- a/arch/arm64/mm/dma-mapping.c +++ b/arch/arm64/mm/dma-mapping.c @@ -22,8 +22,11 @@ #include <linux/slab.h> #include <linux/dma-mapping.h> #include <linux/dma-contiguous.h> +#include <linux/of.h> +#include <linux/platform_device.h> #include <linux/vmalloc.h> #include <linux/swiotlb.h> +#include <linux/amba/bus.h> #include <asm/cacheflush.h> @@ -305,17 +308,45 @@ struct dma_map_ops coherent_swiotlb_dma_ops = { }; EXPORT_SYMBOL(coherent_swiotlb_dma_ops); +static int dma_bus_notifier(struct notifier_block *nb, + unsigned long event, void *_dev) +{ + struct device *dev = _dev; + + if (event != BUS_NOTIFY_ADD_DEVICE) + return NOTIFY_DONE; + + if (of_property_read_bool(dev->of_node, "dma-coherent")) + set_dma_ops(dev, &coherent_swiotlb_dma_ops); + + return NOTIFY_OK; +} + +static struct notifier_block platform_bus_nb = { + .notifier_call = dma_bus_notifier, +}; + +static struct notifier_block amba_bus_nb = { + .notifier_call = dma_bus_notifier, +}; + extern int swiotlb_late_init_with_default_size(size_t default_size); static int __init swiotlb_late_init(void) { size_t swiotlb_size = min(SZ_64M, MAX_ORDER_NR_PAGES << PAGE_SHIFT); - dma_ops = &coherent_swiotlb_dma_ops; + /* + * These must be registered before of_platform_populate(). + */ + bus_register_notifier(&platform_bus_type, &platform_bus_nb); + bus_register_notifier(&amba_bustype, &amba_bus_nb); + + dma_ops = &noncoherent_swiotlb_dma_ops; return swiotlb_late_init_with_default_size(swiotlb_size); } -subsys_initcall(swiotlb_late_init); +arch_initcall(swiotlb_late_init); #define PREALLOC_DMA_DEBUG_ENTRIES 4096 diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index 6b7e89569a3a..0a472c41a67f 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -374,6 +374,9 @@ int kern_addr_valid(unsigned long addr) if (pmd_none(*pmd)) return 0; + if (pmd_sect(*pmd)) + return pfn_valid(pmd_pfn(*pmd)); + pte = pte_offset_kernel(pmd, addr); if (pte_none(*pte)) return 0; diff --git a/arch/hexagon/include/asm/barrier.h b/arch/hexagon/include/asm/barrier.h deleted file mode 100644 index 4e863daea25b..000000000000 --- a/arch/hexagon/include/asm/barrier.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Memory barrier definitions for the Hexagon architecture - * - * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ - -#ifndef _ASM_BARRIER_H -#define _ASM_BARRIER_H - -#define rmb() barrier() -#define read_barrier_depends() barrier() -#define wmb() barrier() -#define mb() barrier() -#define smp_rmb() barrier() -#define smp_read_barrier_depends() barrier() -#define smp_wmb() barrier() -#define smp_mb() barrier() - -/* Set a value and use a memory barrier. Used by the scheduler somewhere. */ -#define set_mb(var, value) \ - do { var = value; mb(); } while (0) - -#endif /* _ASM_BARRIER_H */ diff --git a/arch/ia64/include/asm/tlb.h b/arch/ia64/include/asm/tlb.h index bc5efc7c3f3f..39d64e0df1de 100644 --- a/arch/ia64/include/asm/tlb.h +++ b/arch/ia64/include/asm/tlb.h @@ -91,18 +91,9 @@ extern struct ia64_tr_entry *ia64_idtrs[NR_CPUS]; #define RR_RID_MASK 0x00000000ffffff00L #define RR_TO_RID(val) ((val >> 8) & 0xffffff) -/* - * Flush the TLB for address range START to END and, if not in fast mode, release the - * freed pages that where gathered up to this point. - */ static inline void -ia64_tlb_flush_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long end) +ia64_tlb_flush_mmu_tlbonly(struct mmu_gather *tlb, unsigned long start, unsigned long end) { - unsigned long i; - unsigned int nr; - - if (!tlb->need_flush) - return; tlb->need_flush = 0; if (tlb->fullmm) { @@ -135,6 +126,14 @@ ia64_tlb_flush_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long e flush_tlb_range(&vma, ia64_thash(start), ia64_thash(end)); } +} + +static inline void +ia64_tlb_flush_mmu_free(struct mmu_gather *tlb) +{ + unsigned long i; + unsigned int nr; + /* lastly, release the freed pages */ nr = tlb->nr; @@ -144,6 +143,19 @@ ia64_tlb_flush_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long e free_page_and_swap_cache(tlb->pages[i]); } +/* + * Flush the TLB for address range START to END and, if not in fast mode, release the + * freed pages that where gathered up to this point. + */ +static inline void +ia64_tlb_flush_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long end) +{ + if (!tlb->need_flush) + return; + ia64_tlb_flush_mmu_tlbonly(tlb, start, end); + ia64_tlb_flush_mmu_free(tlb); +} + static inline void __tlb_alloc_page(struct mmu_gather *tlb) { unsigned long addr = __get_free_pages(GFP_NOWAIT | __GFP_NOWARN, 0); @@ -206,6 +218,16 @@ static inline int __tlb_remove_page(struct mmu_gather *tlb, struct page *page) return tlb->max - tlb->nr; } +static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb) +{ + ia64_tlb_flush_mmu_tlbonly(tlb, tlb->start_addr, tlb->end_addr); +} + +static inline void tlb_flush_mmu_free(struct mmu_gather *tlb) +{ + ia64_tlb_flush_mmu_free(tlb); +} + static inline void tlb_flush_mmu(struct mmu_gather *tlb) { ia64_tlb_flush_mmu(tlb, tlb->start_addr, tlb->end_addr); diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c index c2bb4f896ce7..3aa5b46b2d40 100644 --- a/arch/mips/cavium-octeon/octeon-irq.c +++ b/arch/mips/cavium-octeon/octeon-irq.c @@ -635,7 +635,7 @@ static void octeon_irq_cpu_offline_ciu(struct irq_data *data) cpumask_clear(&new_affinity); cpumask_set_cpu(cpumask_first(cpu_online_mask), &new_affinity); } - __irq_set_affinity_locked(data, &new_affinity); + irq_set_affinity_locked(data, &new_affinity, false); } static int octeon_irq_ciu_set_affinity(struct irq_data *data, diff --git a/arch/parisc/include/uapi/asm/Kbuild b/arch/parisc/include/uapi/asm/Kbuild index a580642555b6..348356c99514 100644 --- a/arch/parisc/include/uapi/asm/Kbuild +++ b/arch/parisc/include/uapi/asm/Kbuild @@ -1,6 +1,8 @@ # UAPI Header export list include include/uapi/asm-generic/Kbuild.asm +generic-y += resource.h + header-y += bitsperlong.h header-y += byteorder.h header-y += errno.h @@ -13,7 +15,6 @@ header-y += msgbuf.h header-y += pdc.h header-y += posix_types.h header-y += ptrace.h -header-y += resource.h header-y += sembuf.h header-y += setup.h header-y += shmbuf.h diff --git a/arch/parisc/include/uapi/asm/resource.h b/arch/parisc/include/uapi/asm/resource.h deleted file mode 100644 index 8b06343b62ed..000000000000 --- a/arch/parisc/include/uapi/asm/resource.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef _ASM_PARISC_RESOURCE_H -#define _ASM_PARISC_RESOURCE_H - -#define _STK_LIM_MAX 10 * _STK_LIM -#include <asm-generic/resource.h> - -#endif diff --git a/arch/powerpc/boot/main.c b/arch/powerpc/boot/main.c index a28f02165e97..d367a0aece2a 100644 --- a/arch/powerpc/boot/main.c +++ b/arch/powerpc/boot/main.c @@ -139,18 +139,18 @@ static struct addr_range prep_initrd(struct addr_range vmlinux, void *chosen, * edit the command line passed to vmlinux (by setting /chosen/bootargs). * The buffer is put in it's own section so that tools may locate it easier. */ -static char cmdline[COMMAND_LINE_SIZE] +static char cmdline[BOOT_COMMAND_LINE_SIZE] __attribute__((__section__("__builtin_cmdline"))); static void prep_cmdline(void *chosen) { if (cmdline[0] == '\0') - getprop(chosen, "bootargs", cmdline, COMMAND_LINE_SIZE-1); + getprop(chosen, "bootargs", cmdline, BOOT_COMMAND_LINE_SIZE-1); printf("\n\rLinux/PowerPC load: %s", cmdline); /* If possible, edit the command line */ if (console_ops.edit_cmdline) - console_ops.edit_cmdline(cmdline, COMMAND_LINE_SIZE); + console_ops.edit_cmdline(cmdline, BOOT_COMMAND_LINE_SIZE); printf("\n\r"); /* Put the command line back into the devtree for the kernel */ @@ -174,7 +174,7 @@ void start(void) * built-in command line wasn't set by an external tool */ if ((loader_info.cmdline_len > 0) && (cmdline[0] == '\0')) memmove(cmdline, loader_info.cmdline, - min(loader_info.cmdline_len, COMMAND_LINE_SIZE-1)); + min(loader_info.cmdline_len, BOOT_COMMAND_LINE_SIZE-1)); if (console_ops.open && (console_ops.open() < 0)) exit(); diff --git a/arch/powerpc/boot/ops.h b/arch/powerpc/boot/ops.h index b3218ce451bb..8aad3c55aeda 100644 --- a/arch/powerpc/boot/ops.h +++ b/arch/powerpc/boot/ops.h @@ -15,7 +15,7 @@ #include "types.h" #include "string.h" -#define COMMAND_LINE_SIZE 512 +#define BOOT_COMMAND_LINE_SIZE 2048 #define MAX_PATH_LEN 256 #define MAX_PROP_LEN 256 /* What should this be? */ diff --git a/arch/powerpc/boot/ps3.c b/arch/powerpc/boot/ps3.c index 9954d98871d0..4ec2d86d3c50 100644 --- a/arch/powerpc/boot/ps3.c +++ b/arch/powerpc/boot/ps3.c @@ -47,13 +47,13 @@ BSS_STACK(4096); * The buffer is put in it's own section so that tools may locate it easier. */ -static char cmdline[COMMAND_LINE_SIZE] +static char cmdline[BOOT_COMMAND_LINE_SIZE] __attribute__((__section__("__builtin_cmdline"))); static void prep_cmdline(void *chosen) { if (cmdline[0] == '\0') - getprop(chosen, "bootargs", cmdline, COMMAND_LINE_SIZE-1); + getprop(chosen, "bootargs", cmdline, BOOT_COMMAND_LINE_SIZE-1); else setprop_str(chosen, "bootargs", cmdline); diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h index a2efdaa020b0..66ad7a74116f 100644 --- a/arch/powerpc/include/asm/opal.h +++ b/arch/powerpc/include/asm/opal.h @@ -41,14 +41,14 @@ struct opal_takeover_args { * size except the last one in the list to be as well. */ struct opal_sg_entry { - void *data; - long length; + __be64 data; + __be64 length; }; -/* sg list */ +/* SG list */ struct opal_sg_list { - unsigned long num_entries; - struct opal_sg_list *next; + __be64 length; + __be64 next; struct opal_sg_entry entry[]; }; @@ -858,8 +858,8 @@ int64_t opal_lpc_write(uint32_t chip_id, enum OpalLPCAddressType addr_type, int64_t opal_lpc_read(uint32_t chip_id, enum OpalLPCAddressType addr_type, uint32_t addr, __be32 *data, uint32_t sz); -int64_t opal_read_elog(uint64_t buffer, size_t size, uint64_t log_id); -int64_t opal_get_elog_size(uint64_t *log_id, size_t *size, uint64_t *elog_type); +int64_t opal_read_elog(uint64_t buffer, uint64_t size, uint64_t log_id); +int64_t opal_get_elog_size(__be64 *log_id, __be64 *size, __be64 *elog_type); int64_t opal_write_elog(uint64_t buffer, uint64_t size, uint64_t offset); int64_t opal_send_ack_elog(uint64_t log_id); void opal_resend_pending_logs(void); @@ -868,23 +868,24 @@ int64_t opal_validate_flash(uint64_t buffer, uint32_t *size, uint32_t *result); int64_t opal_manage_flash(uint8_t op); int64_t opal_update_flash(uint64_t blk_list); int64_t opal_dump_init(uint8_t dump_type); -int64_t opal_dump_info(uint32_t *dump_id, uint32_t *dump_size); -int64_t opal_dump_info2(uint32_t *dump_id, uint32_t *dump_size, uint32_t *dump_type); +int64_t opal_dump_info(__be32 *dump_id, __be32 *dump_size); +int64_t opal_dump_info2(__be32 *dump_id, __be32 *dump_size, __be32 *dump_type); int64_t opal_dump_read(uint32_t dump_id, uint64_t buffer); int64_t opal_dump_ack(uint32_t dump_id); int64_t opal_dump_resend_notification(void); -int64_t opal_get_msg(uint64_t buffer, size_t size); -int64_t opal_check_completion(uint64_t buffer, size_t size, uint64_t token); +int64_t opal_get_msg(uint64_t buffer, uint64_t size); +int64_t opal_check_completion(uint64_t buffer, uint64_t size, uint64_t token); int64_t opal_sync_host_reboot(void); int64_t opal_get_param(uint64_t token, uint32_t param_id, uint64_t buffer, - size_t length); + uint64_t length); int64_t opal_set_param(uint64_t token, uint32_t param_id, uint64_t buffer, - size_t length); + uint64_t length); int64_t opal_sensor_read(uint32_t sensor_hndl, int token, __be32 *sensor_data); /* Internal functions */ -extern int early_init_dt_scan_opal(unsigned long node, const char *uname, int depth, void *data); +extern int early_init_dt_scan_opal(unsigned long node, const char *uname, + int depth, void *data); extern int early_init_dt_scan_recoverable_ranges(unsigned long node, const char *uname, int depth, void *data); @@ -893,10 +894,6 @@ extern int opal_put_chars(uint32_t vtermno, const char *buf, int total_len); extern void hvc_opal_init_early(void); -/* Internal functions */ -extern int early_init_dt_scan_opal(unsigned long node, const char *uname, - int depth, void *data); - extern int opal_notifier_register(struct notifier_block *nb); extern int opal_notifier_unregister(struct notifier_block *nb); @@ -906,9 +903,6 @@ extern void opal_notifier_enable(void); extern void opal_notifier_disable(void); extern void opal_notifier_update_evt(uint64_t evt_mask, uint64_t evt_val); -extern int opal_get_chars(uint32_t vtermno, char *buf, int count); -extern int opal_put_chars(uint32_t vtermno, const char *buf, int total_len); - extern int __opal_async_get_token(void); extern int opal_async_get_token_interruptible(void); extern int __opal_async_release_token(int token); @@ -916,8 +910,6 @@ extern int opal_async_release_token(int token); extern int opal_async_wait_response(uint64_t token, struct opal_msg *msg); extern int opal_get_sensor_data(u32 sensor_hndl, u32 *sensor_data); -extern void hvc_opal_init_early(void); - struct rtc_time; extern int opal_set_rtc_time(struct rtc_time *tm); extern void opal_get_rtc_time(struct rtc_time *tm); @@ -937,6 +929,10 @@ extern int opal_resync_timebase(void); extern void opal_lpc_init(void); +struct opal_sg_list *opal_vmalloc_to_sg_list(void *vmalloc_addr, + unsigned long vmalloc_size); +void opal_free_sg_list(struct opal_sg_list *sg); + #endif /* __ASSEMBLY__ */ #endif /* __OPAL_H */ diff --git a/arch/powerpc/include/uapi/asm/setup.h b/arch/powerpc/include/uapi/asm/setup.h index 552df83f1a49..ae3fb68cb28e 100644 --- a/arch/powerpc/include/uapi/asm/setup.h +++ b/arch/powerpc/include/uapi/asm/setup.h @@ -1 +1,6 @@ -#include <asm-generic/setup.h> +#ifndef _UAPI_ASM_POWERPC_SETUP_H +#define _UAPI_ASM_POWERPC_SETUP_H + +#define COMMAND_LINE_SIZE 2048 + +#endif /* _UAPI_ASM_POWERPC_SETUP_H */ diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c index 3bd77edd7610..450850a49dce 100644 --- a/arch/powerpc/kernel/ppc_ksyms.c +++ b/arch/powerpc/kernel/ppc_ksyms.c @@ -120,6 +120,7 @@ EXPORT_SYMBOL(giveup_spe); EXPORT_SYMBOL(flush_instruction_cache); #endif EXPORT_SYMBOL(flush_dcache_range); +EXPORT_SYMBOL(flush_icache_range); #ifdef CONFIG_SMP #ifdef CONFIG_PPC32 diff --git a/arch/powerpc/kernel/rtas_flash.c b/arch/powerpc/kernel/rtas_flash.c index 2f3cdb01506d..658e89d2025b 100644 --- a/arch/powerpc/kernel/rtas_flash.c +++ b/arch/powerpc/kernel/rtas_flash.c @@ -705,7 +705,7 @@ static int __init rtas_flash_init(void) if (rtas_token("ibm,update-flash-64-and-reboot") == RTAS_UNKNOWN_SERVICE) { pr_info("rtas_flash: no firmware flash support\n"); - return 1; + return -EINVAL; } rtas_validate_flash_data.buf = kzalloc(VALIDATE_BUF_SIZE, GFP_KERNEL); diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S index ffbb871c2bd8..b031f932c0cc 100644 --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S @@ -242,6 +242,12 @@ kvm_novcpu_exit: */ .globl kvm_start_guest kvm_start_guest: + + /* Set runlatch bit the minute you wake up from nap */ + mfspr r1, SPRN_CTRLF + ori r1, r1, 1 + mtspr SPRN_CTRLT, r1 + ld r2,PACATOC(r13) li r0,KVM_HWTHREAD_IN_KVM @@ -309,6 +315,11 @@ kvm_no_guest: li r0, KVM_HWTHREAD_IN_NAP stb r0, HSTATE_HWTHREAD_STATE(r13) kvm_do_nap: + /* Clear the runlatch bit before napping */ + mfspr r2, SPRN_CTRLF + clrrdi r2, r2, 1 + mtspr SPRN_CTRLT, r2 + li r3, LPCR_PECE0 mfspr r4, SPRN_LPCR rlwimi r4, r3, 0, LPCR_PECE0 | LPCR_PECE1 @@ -1999,8 +2010,13 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_206) /* * Take a nap until a decrementer or external or doobell interrupt - * occurs, with PECE1, PECE0 and PECEDP set in LPCR + * occurs, with PECE1, PECE0 and PECEDP set in LPCR. Also clear the + * runlatch bit before napping. */ + mfspr r2, SPRN_CTRLF + clrrdi r2, r2, 1 + mtspr SPRN_CTRLT, r2 + li r0,1 stb r0,HSTATE_HWTHREAD_REQ(r13) mfspr r5,SPRN_LPCR diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c index 3ea26c25590b..cf1d325eae8b 100644 --- a/arch/powerpc/mm/hash_native_64.c +++ b/arch/powerpc/mm/hash_native_64.c @@ -82,17 +82,14 @@ static inline void __tlbie(unsigned long vpn, int psize, int apsize, int ssize) va &= ~((1ul << mmu_psize_defs[apsize].shift) - 1); va |= penc << 12; va |= ssize << 8; - /* Add AVAL part */ - if (psize != apsize) { - /* - * MPSS, 64K base page size and 16MB parge page size - * We don't need all the bits, but rest of the bits - * must be ignored by the processor. - * vpn cover upto 65 bits of va. (0...65) and we need - * 58..64 bits of va. - */ - va |= (vpn & 0xfe); - } + /* + * AVAL bits: + * We don't need all the bits, but rest of the bits + * must be ignored by the processor. + * vpn cover upto 65 bits of va. (0...65) and we need + * 58..64 bits of va. + */ + va |= (vpn & 0xfe); /* AVAL */ va |= 1; /* L */ asm volatile(ASM_FTR_IFCLR("tlbie %0,1", PPC_TLBIE(%1,%0), %2) : : "r" (va), "r"(0), "i" (CPU_FTR_ARCH_206) @@ -133,17 +130,14 @@ static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int ssize) va &= ~((1ul << mmu_psize_defs[apsize].shift) - 1); va |= penc << 12; va |= ssize << 8; - /* Add AVAL part */ - if (psize != apsize) { - /* - * MPSS, 64K base page size and 16MB parge page size - * We don't need all the bits, but rest of the bits - * must be ignored by the processor. - * vpn cover upto 65 bits of va. (0...65) and we need - * 58..64 bits of va. - */ - va |= (vpn & 0xfe); - } + /* + * AVAL bits: + * We don't need all the bits, but rest of the bits + * must be ignored by the processor. + * vpn cover upto 65 bits of va. (0...65) and we need + * 58..64 bits of va. + */ + va |= (vpn & 0xfe); va |= 1; /* L */ asm volatile(".long 0x7c000224 | (%0 << 11) | (1 << 21)" : : "r"(va) : "memory"); diff --git a/arch/powerpc/perf/hv-24x7.c b/arch/powerpc/perf/hv-24x7.c index 297c91051413..e0766b82e165 100644 --- a/arch/powerpc/perf/hv-24x7.c +++ b/arch/powerpc/perf/hv-24x7.c @@ -155,16 +155,28 @@ static ssize_t read_offset_data(void *dest, size_t dest_len, return copy_len; } -static unsigned long h_get_24x7_catalog_page(char page[static 4096], - u32 version, u32 index) +static unsigned long h_get_24x7_catalog_page_(unsigned long phys_4096, + unsigned long version, + unsigned long index) { - WARN_ON(!IS_ALIGNED((unsigned long)page, 4096)); + pr_devel("h_get_24x7_catalog_page(0x%lx, %lu, %lu)", + phys_4096, + version, + index); + WARN_ON(!IS_ALIGNED(phys_4096, 4096)); return plpar_hcall_norets(H_GET_24X7_CATALOG_PAGE, - virt_to_phys(page), + phys_4096, version, index); } +static unsigned long h_get_24x7_catalog_page(char page[], + u64 version, u32 index) +{ + return h_get_24x7_catalog_page_(virt_to_phys(page), + version, index); +} + static ssize_t catalog_read(struct file *filp, struct kobject *kobj, struct bin_attribute *bin_attr, char *buf, loff_t offset, size_t count) @@ -173,7 +185,7 @@ static ssize_t catalog_read(struct file *filp, struct kobject *kobj, ssize_t ret = 0; size_t catalog_len = 0, catalog_page_len = 0, page_count = 0; loff_t page_offset = 0; - uint32_t catalog_version_num = 0; + uint64_t catalog_version_num = 0; void *page = kmem_cache_alloc(hv_page_cache, GFP_USER); struct hv_24x7_catalog_page_0 *page_0 = page; if (!page) @@ -185,7 +197,7 @@ static ssize_t catalog_read(struct file *filp, struct kobject *kobj, goto e_free; } - catalog_version_num = be32_to_cpu(page_0->version); + catalog_version_num = be64_to_cpu(page_0->version); catalog_page_len = be32_to_cpu(page_0->length); catalog_len = catalog_page_len * 4096; @@ -208,8 +220,9 @@ static ssize_t catalog_read(struct file *filp, struct kobject *kobj, page, 4096, page_offset * 4096); e_free: if (hret) - pr_err("h_get_24x7_catalog_page(ver=%d, page=%lld) failed: rc=%ld\n", - catalog_version_num, page_offset, hret); + pr_err("h_get_24x7_catalog_page(ver=%lld, page=%lld) failed:" + " rc=%ld\n", + catalog_version_num, page_offset, hret); kfree(page); pr_devel("catalog_read: offset=%lld(%lld) count=%zu(%zu) catalog_len=%zu(%zu) => %zd\n", @@ -243,7 +256,7 @@ e_free: \ static DEVICE_ATTR_RO(_name) PAGE_0_ATTR(catalog_version, "%lld\n", - (unsigned long long)be32_to_cpu(page_0->version)); + (unsigned long long)be64_to_cpu(page_0->version)); PAGE_0_ATTR(catalog_len, "%lld\n", (unsigned long long)be32_to_cpu(page_0->length) * 4096); static BIN_ATTR_RO(catalog, 0/* real length varies */); @@ -485,13 +498,13 @@ static int hv_24x7_init(void) struct hv_perf_caps caps; if (!firmware_has_feature(FW_FEATURE_LPAR)) { - pr_info("not a virtualized system, not enabling\n"); + pr_debug("not a virtualized system, not enabling\n"); return -ENODEV; } hret = hv_perf_caps_get(&caps); if (hret) { - pr_info("could not obtain capabilities, error 0x%80lx, not enabling\n", + pr_debug("could not obtain capabilities, not enabling, rc=%ld\n", hret); return -ENODEV; } diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c index 278ba7b9c2b5..c9d399a2df82 100644 --- a/arch/powerpc/perf/hv-gpci.c +++ b/arch/powerpc/perf/hv-gpci.c @@ -78,7 +78,7 @@ static ssize_t kernel_version_show(struct device *dev, return sprintf(page, "0x%x\n", COUNTER_INFO_VERSION_CURRENT); } -DEVICE_ATTR_RO(kernel_version); +static DEVICE_ATTR_RO(kernel_version); HV_CAPS_ATTR(version, "0x%x\n"); HV_CAPS_ATTR(ga, "%d\n"); HV_CAPS_ATTR(expanded, "%d\n"); @@ -273,13 +273,13 @@ static int hv_gpci_init(void) struct hv_perf_caps caps; if (!firmware_has_feature(FW_FEATURE_LPAR)) { - pr_info("not a virtualized system, not enabling\n"); + pr_debug("not a virtualized system, not enabling\n"); return -ENODEV; } hret = hv_perf_caps_get(&caps); if (hret) { - pr_info("could not obtain capabilities, error 0x%80lx, not enabling\n", + pr_debug("could not obtain capabilities, not enabling, rc=%ld\n", hret); return -ENODEV; } diff --git a/arch/powerpc/platforms/powernv/opal-dump.c b/arch/powerpc/platforms/powernv/opal-dump.c index b9827b0d87e4..788a1977b9a5 100644 --- a/arch/powerpc/platforms/powernv/opal-dump.c +++ b/arch/powerpc/platforms/powernv/opal-dump.c @@ -209,89 +209,20 @@ static struct kobj_type dump_ktype = { .default_attrs = dump_default_attrs, }; -static void free_dump_sg_list(struct opal_sg_list *list) -{ - struct opal_sg_list *sg1; - while (list) { - sg1 = list->next; - kfree(list); - list = sg1; - } - list = NULL; -} - -static struct opal_sg_list *dump_data_to_sglist(struct dump_obj *dump) -{ - struct opal_sg_list *sg1, *list = NULL; - void *addr; - int64_t size; - - addr = dump->buffer; - size = dump->size; - - sg1 = kzalloc(PAGE_SIZE, GFP_KERNEL); - if (!sg1) - goto nomem; - - list = sg1; - sg1->num_entries = 0; - while (size > 0) { - /* Translate virtual address to physical address */ - sg1->entry[sg1->num_entries].data = - (void *)(vmalloc_to_pfn(addr) << PAGE_SHIFT); - - if (size > PAGE_SIZE) - sg1->entry[sg1->num_entries].length = PAGE_SIZE; - else - sg1->entry[sg1->num_entries].length = size; - - sg1->num_entries++; - if (sg1->num_entries >= SG_ENTRIES_PER_NODE) { - sg1->next = kzalloc(PAGE_SIZE, GFP_KERNEL); - if (!sg1->next) - goto nomem; - - sg1 = sg1->next; - sg1->num_entries = 0; - } - addr += PAGE_SIZE; - size -= PAGE_SIZE; - } - return list; - -nomem: - pr_err("%s : Failed to allocate memory\n", __func__); - free_dump_sg_list(list); - return NULL; -} - -static void sglist_to_phy_addr(struct opal_sg_list *list) -{ - struct opal_sg_list *sg, *next; - - for (sg = list; sg; sg = next) { - next = sg->next; - /* Don't translate NULL pointer for last entry */ - if (sg->next) - sg->next = (struct opal_sg_list *)__pa(sg->next); - else - sg->next = NULL; - - /* Convert num_entries to length */ - sg->num_entries = - sg->num_entries * sizeof(struct opal_sg_entry) + 16; - } -} - -static int64_t dump_read_info(uint32_t *id, uint32_t *size, uint32_t *type) +static int64_t dump_read_info(uint32_t *dump_id, uint32_t *dump_size, uint32_t *dump_type) { + __be32 id, size, type; int rc; - *type = 0xffffffff; - rc = opal_dump_info2(id, size, type); + type = cpu_to_be32(0xffffffff); + rc = opal_dump_info2(&id, &size, &type); if (rc == OPAL_PARAMETER) - rc = opal_dump_info(id, size); + rc = opal_dump_info(&id, &size); + + *dump_id = be32_to_cpu(id); + *dump_size = be32_to_cpu(size); + *dump_type = be32_to_cpu(type); if (rc) pr_warn("%s: Failed to get dump info (%d)\n", @@ -314,15 +245,12 @@ static int64_t dump_read_data(struct dump_obj *dump) } /* Generate SG list */ - list = dump_data_to_sglist(dump); + list = opal_vmalloc_to_sg_list(dump->buffer, dump->size); if (!list) { rc = -ENOMEM; goto out; } - /* Translate sg list addr to real address */ - sglist_to_phy_addr(list); - /* First entry address */ addr = __pa(list); @@ -341,7 +269,7 @@ static int64_t dump_read_data(struct dump_obj *dump) __func__, dump->id); /* Free SG list */ - free_dump_sg_list(list); + opal_free_sg_list(list); out: return rc; diff --git a/arch/powerpc/platforms/powernv/opal-elog.c b/arch/powerpc/platforms/powernv/opal-elog.c index ef7bc2a97862..10268c41d830 100644 --- a/arch/powerpc/platforms/powernv/opal-elog.c +++ b/arch/powerpc/platforms/powernv/opal-elog.c @@ -238,18 +238,25 @@ static struct elog_obj *create_elog_obj(uint64_t id, size_t size, uint64_t type) static void elog_work_fn(struct work_struct *work) { - size_t elog_size; + __be64 size; + __be64 id; + __be64 type; + uint64_t elog_size; uint64_t log_id; uint64_t elog_type; int rc; char name[2+16+1]; - rc = opal_get_elog_size(&log_id, &elog_size, &elog_type); + rc = opal_get_elog_size(&id, &size, &type); if (rc != OPAL_SUCCESS) { pr_err("ELOG: Opal log read failed\n"); return; } + elog_size = be64_to_cpu(size); + log_id = be64_to_cpu(id); + elog_type = be64_to_cpu(type); + BUG_ON(elog_size > OPAL_MAX_ERRLOG_SIZE); if (elog_size >= OPAL_MAX_ERRLOG_SIZE) diff --git a/arch/powerpc/platforms/powernv/opal-flash.c b/arch/powerpc/platforms/powernv/opal-flash.c index 714ef972406b..dc487ff04704 100644 --- a/arch/powerpc/platforms/powernv/opal-flash.c +++ b/arch/powerpc/platforms/powernv/opal-flash.c @@ -79,9 +79,6 @@ /* XXX: Assume candidate image size is <= 1GB */ #define MAX_IMAGE_SIZE 0x40000000 -/* Flash sg list version */ -#define SG_LIST_VERSION (1UL) - /* Image status */ enum { IMAGE_INVALID, @@ -131,11 +128,15 @@ static DEFINE_MUTEX(image_data_mutex); */ static inline void opal_flash_validate(void) { - struct validate_flash_t *args_buf = &validate_flash_data; + long ret; + void *buf = validate_flash_data.buf; + __be32 size, result; - args_buf->status = opal_validate_flash(__pa(args_buf->buf), - &(args_buf->buf_size), - &(args_buf->result)); + ret = opal_validate_flash(__pa(buf), &size, &result); + + validate_flash_data.status = ret; + validate_flash_data.buf_size = be32_to_cpu(size); + validate_flash_data.result = be32_to_cpu(result); } /* @@ -268,93 +269,11 @@ static ssize_t manage_store(struct kobject *kobj, } /* - * Free sg list - */ -static void free_sg_list(struct opal_sg_list *list) -{ - struct opal_sg_list *sg1; - while (list) { - sg1 = list->next; - kfree(list); - list = sg1; - } - list = NULL; -} - -/* - * Build candidate image scatter gather list - * - * list format: - * ----------------------------------- - * | VER (8) | Entry length in bytes | - * ----------------------------------- - * | Pointer to next entry | - * ----------------------------------- - * | Address of memory area 1 | - * ----------------------------------- - * | Length of memory area 1 | - * ----------------------------------- - * | ......... | - * ----------------------------------- - * | ......... | - * ----------------------------------- - * | Address of memory area N | - * ----------------------------------- - * | Length of memory area N | - * ----------------------------------- - */ -static struct opal_sg_list *image_data_to_sglist(void) -{ - struct opal_sg_list *sg1, *list = NULL; - void *addr; - int size; - - addr = image_data.data; - size = image_data.size; - - sg1 = kzalloc(PAGE_SIZE, GFP_KERNEL); - if (!sg1) - return NULL; - - list = sg1; - sg1->num_entries = 0; - while (size > 0) { - /* Translate virtual address to physical address */ - sg1->entry[sg1->num_entries].data = - (void *)(vmalloc_to_pfn(addr) << PAGE_SHIFT); - - if (size > PAGE_SIZE) - sg1->entry[sg1->num_entries].length = PAGE_SIZE; - else - sg1->entry[sg1->num_entries].length = size; - - sg1->num_entries++; - if (sg1->num_entries >= SG_ENTRIES_PER_NODE) { - sg1->next = kzalloc(PAGE_SIZE, GFP_KERNEL); - if (!sg1->next) { - pr_err("%s : Failed to allocate memory\n", - __func__); - goto nomem; - } - - sg1 = sg1->next; - sg1->num_entries = 0; - } - addr += PAGE_SIZE; - size -= PAGE_SIZE; - } - return list; -nomem: - free_sg_list(list); - return NULL; -} - -/* * OPAL update flash */ static int opal_flash_update(int op) { - struct opal_sg_list *sg, *list, *next; + struct opal_sg_list *list; unsigned long addr; int64_t rc = OPAL_PARAMETER; @@ -364,30 +283,13 @@ static int opal_flash_update(int op) goto flash; } - list = image_data_to_sglist(); + list = opal_vmalloc_to_sg_list(image_data.data, image_data.size); if (!list) goto invalid_img; /* First entry address */ addr = __pa(list); - /* Translate sg list address to absolute */ - for (sg = list; sg; sg = next) { - next = sg->next; - /* Don't translate NULL pointer for last entry */ - if (sg->next) - sg->next = (struct opal_sg_list *)__pa(sg->next); - else - sg->next = NULL; - - /* - * Convert num_entries to version/length format - * to satisfy OPAL. - */ - sg->num_entries = (SG_LIST_VERSION << 56) | - (sg->num_entries * sizeof(struct opal_sg_entry) + 16); - } - pr_alert("FLASH: Image is %u bytes\n", image_data.size); pr_alert("FLASH: Image update requested\n"); pr_alert("FLASH: Image will be updated during system reboot\n"); diff --git a/arch/powerpc/platforms/powernv/opal-sysparam.c b/arch/powerpc/platforms/powernv/opal-sysparam.c index 6b614726baf2..d202f9bc3683 100644 --- a/arch/powerpc/platforms/powernv/opal-sysparam.c +++ b/arch/powerpc/platforms/powernv/opal-sysparam.c @@ -39,10 +39,11 @@ struct param_attr { struct kobj_attribute kobj_attr; }; -static int opal_get_sys_param(u32 param_id, u32 length, void *buffer) +static ssize_t opal_get_sys_param(u32 param_id, u32 length, void *buffer) { struct opal_msg msg; - int ret, token; + ssize_t ret; + int token; token = opal_async_get_token_interruptible(); if (token < 0) { @@ -59,7 +60,7 @@ static int opal_get_sys_param(u32 param_id, u32 length, void *buffer) ret = opal_async_wait_response(token, &msg); if (ret) { - pr_err("%s: Failed to wait for the async response, %d\n", + pr_err("%s: Failed to wait for the async response, %zd\n", __func__, ret); goto out_token; } @@ -111,7 +112,7 @@ static ssize_t sys_param_show(struct kobject *kobj, { struct param_attr *attr = container_of(kobj_attr, struct param_attr, kobj_attr); - int ret; + ssize_t ret; mutex_lock(&opal_sysparam_mutex); ret = opal_get_sys_param(attr->param_id, attr->param_size, @@ -121,9 +122,10 @@ static ssize_t sys_param_show(struct kobject *kobj, memcpy(buf, param_data_buf, attr->param_size); + ret = attr->param_size; out: mutex_unlock(&opal_sysparam_mutex); - return ret ? ret : attr->param_size; + return ret; } static ssize_t sys_param_store(struct kobject *kobj, @@ -131,14 +133,20 @@ static ssize_t sys_param_store(struct kobject *kobj, { struct param_attr *attr = container_of(kobj_attr, struct param_attr, kobj_attr); - int ret; + ssize_t ret; + + /* MAX_PARAM_DATA_LEN is sizeof(param_data_buf) */ + if (count > MAX_PARAM_DATA_LEN) + count = MAX_PARAM_DATA_LEN; mutex_lock(&opal_sysparam_mutex); memcpy(param_data_buf, buf, count); ret = opal_set_sys_param(attr->param_id, attr->param_size, param_data_buf); mutex_unlock(&opal_sysparam_mutex); - return ret ? ret : count; + if (!ret) + ret = count; + return ret; } void __init opal_sys_param_init(void) @@ -214,13 +222,13 @@ void __init opal_sys_param_init(void) } if (of_property_read_u32_array(sysparam, "param-len", size, count)) { - pr_err("SYSPARAM: Missing propery param-len in the DT\n"); + pr_err("SYSPARAM: Missing property param-len in the DT\n"); goto out_free_perm; } if (of_property_read_u8_array(sysparam, "param-perm", perm, count)) { - pr_err("SYSPARAM: Missing propery param-perm in the DT\n"); + pr_err("SYSPARAM: Missing property param-perm in the DT\n"); goto out_free_perm; } @@ -233,6 +241,12 @@ void __init opal_sys_param_init(void) /* For each of the parameters, populate the parameter attributes */ for (i = 0; i < count; i++) { + if (size[i] > MAX_PARAM_DATA_LEN) { + pr_warn("SYSPARAM: Not creating parameter %d as size " + "exceeds buffer length\n", i); + continue; + } + sysfs_attr_init(&attr[i].kobj_attr.attr); attr[i].param_id = id[i]; attr[i].param_size = size[i]; diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platforms/powernv/opal.c index 49d2f00019e5..360ad80c754c 100644 --- a/arch/powerpc/platforms/powernv/opal.c +++ b/arch/powerpc/platforms/powernv/opal.c @@ -242,14 +242,14 @@ void opal_notifier_update_evt(uint64_t evt_mask, void opal_notifier_enable(void) { int64_t rc; - uint64_t evt = 0; + __be64 evt = 0; atomic_set(&opal_notifier_hold, 0); /* Process pending events */ rc = opal_poll_events(&evt); if (rc == OPAL_SUCCESS && evt) - opal_do_notifier(evt); + opal_do_notifier(be64_to_cpu(evt)); } void opal_notifier_disable(void) @@ -529,7 +529,7 @@ static irqreturn_t opal_interrupt(int irq, void *data) opal_handle_interrupt(virq_to_hw(irq), &events); - opal_do_notifier(events); + opal_do_notifier(be64_to_cpu(events)); return IRQ_HANDLED; } @@ -638,3 +638,66 @@ void opal_shutdown(void) /* Export this so that test modules can use it */ EXPORT_SYMBOL_GPL(opal_invalid_call); + +/* Convert a region of vmalloc memory to an opal sg list */ +struct opal_sg_list *opal_vmalloc_to_sg_list(void *vmalloc_addr, + unsigned long vmalloc_size) +{ + struct opal_sg_list *sg, *first = NULL; + unsigned long i = 0; + + sg = kzalloc(PAGE_SIZE, GFP_KERNEL); + if (!sg) + goto nomem; + + first = sg; + + while (vmalloc_size > 0) { + uint64_t data = vmalloc_to_pfn(vmalloc_addr) << PAGE_SHIFT; + uint64_t length = min(vmalloc_size, PAGE_SIZE); + + sg->entry[i].data = cpu_to_be64(data); + sg->entry[i].length = cpu_to_be64(length); + i++; + + if (i >= SG_ENTRIES_PER_NODE) { + struct opal_sg_list *next; + + next = kzalloc(PAGE_SIZE, GFP_KERNEL); + if (!next) + goto nomem; + + sg->length = cpu_to_be64( + i * sizeof(struct opal_sg_entry) + 16); + i = 0; + sg->next = cpu_to_be64(__pa(next)); + sg = next; + } + + vmalloc_addr += length; + vmalloc_size -= length; + } + + sg->length = cpu_to_be64(i * sizeof(struct opal_sg_entry) + 16); + + return first; + +nomem: + pr_err("%s : Failed to allocate memory\n", __func__); + opal_free_sg_list(first); + return NULL; +} + +void opal_free_sg_list(struct opal_sg_list *sg) +{ + while (sg) { + uint64_t next = be64_to_cpu(sg->next); + + kfree(sg); + + if (next) + sg = __va(next); + else + sg = NULL; + } +} diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c index 3b2b4fb3585b..98824aa99173 100644 --- a/arch/powerpc/platforms/powernv/pci-ioda.c +++ b/arch/powerpc/platforms/powernv/pci-ioda.c @@ -343,7 +343,6 @@ static void pnv_ioda_setup_same_PE(struct pci_bus *bus, struct pnv_ioda_pe *pe) pci_name(dev)); continue; } - pci_dev_get(dev); pdn->pcidev = dev; pdn->pe_number = pe->pe_number; pe->dma_weight += pnv_ioda_dma_weight(dev); @@ -462,7 +461,7 @@ static void pnv_pci_ioda_dma_dev_setup(struct pnv_phb *phb, struct pci_dev *pdev pe = &phb->ioda.pe_array[pdn->pe_number]; WARN_ON(get_dma_ops(&pdev->dev) != &dma_iommu_ops); - set_iommu_table_base_and_group(&pdev->dev, &pe->tce32_table); + set_iommu_table_base(&pdev->dev, &pe->tce32_table); } static int pnv_pci_ioda_dma_set_mask(struct pnv_phb *phb, diff --git a/arch/powerpc/platforms/powernv/setup.c b/arch/powerpc/platforms/powernv/setup.c index 61cf8fa9c61b..8723d32632f5 100644 --- a/arch/powerpc/platforms/powernv/setup.c +++ b/arch/powerpc/platforms/powernv/setup.c @@ -162,18 +162,62 @@ static void pnv_shutdown(void) } #ifdef CONFIG_KEXEC +static void pnv_kexec_wait_secondaries_down(void) +{ + int my_cpu, i, notified = -1; + + my_cpu = get_cpu(); + + for_each_online_cpu(i) { + uint8_t status; + int64_t rc; + + if (i == my_cpu) + continue; + + for (;;) { + rc = opal_query_cpu_status(get_hard_smp_processor_id(i), + &status); + if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED) + break; + barrier(); + if (i != notified) { + printk(KERN_INFO "kexec: waiting for cpu %d " + "(physical %d) to enter OPAL\n", + i, paca[i].hw_cpu_id); + notified = i; + } + } + } +} + static void pnv_kexec_cpu_down(int crash_shutdown, int secondary) { xics_kexec_teardown_cpu(secondary); - /* Return secondary CPUs to firmware on OPAL v3 */ - if (firmware_has_feature(FW_FEATURE_OPALv3) && secondary) { + /* On OPAL v3, we return all CPUs to firmware */ + + if (!firmware_has_feature(FW_FEATURE_OPALv3)) + return; + + if (secondary) { + /* Return secondary CPUs to firmware on OPAL v3 */ mb(); get_paca()->kexec_state = KEXEC_STATE_REAL_MODE; mb(); /* Return the CPU to OPAL */ opal_return_cpu(); + } else if (crash_shutdown) { + /* + * On crash, we don't wait for secondaries to go + * down as they might be unreachable or hung, so + * instead we just wait a bit and move on. + */ + mdelay(1); + } else { + /* Primary waits for the secondaries to have reached OPAL */ + pnv_kexec_wait_secondaries_down(); } } #endif /* CONFIG_KEXEC */ diff --git a/arch/powerpc/platforms/powernv/smp.c b/arch/powerpc/platforms/powernv/smp.c index 908672bdcea6..bf5fcd452168 100644 --- a/arch/powerpc/platforms/powernv/smp.c +++ b/arch/powerpc/platforms/powernv/smp.c @@ -30,6 +30,7 @@ #include <asm/cputhreads.h> #include <asm/xics.h> #include <asm/opal.h> +#include <asm/runlatch.h> #include "powernv.h" @@ -156,7 +157,9 @@ static void pnv_smp_cpu_kill_self(void) */ mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1); while (!generic_check_cpu_restart(cpu)) { + ppc64_runlatch_off(); power7_nap(); + ppc64_runlatch_on(); if (!generic_check_cpu_restart(cpu)) { DBG("CPU%d Unexpected exit while offline !\n", cpu); /* We may be getting an IPI, so we re-enable diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c index 9b8e05078a63..20d62975856f 100644 --- a/arch/powerpc/platforms/pseries/hotplug-cpu.c +++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c @@ -88,13 +88,14 @@ void set_default_offline_state(int cpu) static void rtas_stop_self(void) { - struct rtas_args args = { - .token = cpu_to_be32(rtas_stop_self_token), + static struct rtas_args args = { .nargs = 0, .nret = 1, .rets = &args.args[0], }; + args.token = cpu_to_be32(rtas_stop_self_token); + local_irq_disable(); BUG_ON(rtas_stop_self_token == RTAS_UNKNOWN_SERVICE); diff --git a/arch/powerpc/platforms/pseries/hotplug-memory.c b/arch/powerpc/platforms/pseries/hotplug-memory.c index 573b488fc48b..7f75c94af822 100644 --- a/arch/powerpc/platforms/pseries/hotplug-memory.c +++ b/arch/powerpc/platforms/pseries/hotplug-memory.c @@ -100,10 +100,10 @@ static int pseries_remove_memblock(unsigned long base, unsigned int memblock_siz start_pfn = base >> PAGE_SHIFT; - if (!pfn_valid(start_pfn)) { - memblock_remove(base, memblock_size); - return 0; - } + lock_device_hotplug(); + + if (!pfn_valid(start_pfn)) + goto out; block_sz = memory_block_size_bytes(); sections_per_block = block_sz / MIN_MEMORY_BLOCK_SIZE; @@ -114,8 +114,10 @@ static int pseries_remove_memblock(unsigned long base, unsigned int memblock_siz base += MIN_MEMORY_BLOCK_SIZE; } +out: /* Update memory regions for memory remove */ memblock_remove(base, memblock_size); + unlock_device_hotplug(); return 0; } diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c index 64603a10b863..4914fd3f41ec 100644 --- a/arch/powerpc/sysdev/ppc4xx_pci.c +++ b/arch/powerpc/sysdev/ppc4xx_pci.c @@ -1058,7 +1058,7 @@ static int __init apm821xx_pciex_core_init(struct device_node *np) return 1; } -static int apm821xx_pciex_init_port_hw(struct ppc4xx_pciex_port *port) +static int __init apm821xx_pciex_init_port_hw(struct ppc4xx_pciex_port *port) { u32 val; diff --git a/arch/s390/include/asm/ccwgroup.h b/arch/s390/include/asm/ccwgroup.h index 6e670f88d125..ebc2913f9ee0 100644 --- a/arch/s390/include/asm/ccwgroup.h +++ b/arch/s390/include/asm/ccwgroup.h @@ -22,8 +22,8 @@ struct ccwgroup_device { /* public: */ unsigned int count; struct device dev; - struct ccw_device *cdev[0]; struct work_struct ungroup_work; + struct ccw_device *cdev[0]; }; /** diff --git a/arch/s390/include/asm/tlb.h b/arch/s390/include/asm/tlb.h index c544b6f05d95..a25f09fbaf36 100644 --- a/arch/s390/include/asm/tlb.h +++ b/arch/s390/include/asm/tlb.h @@ -59,12 +59,23 @@ static inline void tlb_gather_mmu(struct mmu_gather *tlb, tlb->batch = NULL; } -static inline void tlb_flush_mmu(struct mmu_gather *tlb) +static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb) { __tlb_flush_mm_lazy(tlb->mm); +} + +static inline void tlb_flush_mmu_free(struct mmu_gather *tlb) +{ tlb_table_flush(tlb); } + +static inline void tlb_flush_mmu(struct mmu_gather *tlb) +{ + tlb_flush_mmu_tlbonly(tlb); + tlb_flush_mmu_free(tlb); +} + static inline void tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end) { diff --git a/arch/s390/net/bpf_jit_comp.c b/arch/s390/net/bpf_jit_comp.c index 9c36dc398f90..452d3ebd9d0f 100644 --- a/arch/s390/net/bpf_jit_comp.c +++ b/arch/s390/net/bpf_jit_comp.c @@ -276,7 +276,6 @@ static void bpf_jit_noleaks(struct bpf_jit *jit, struct sock_filter *filter) case BPF_S_LD_W_IND: case BPF_S_LD_H_IND: case BPF_S_LD_B_IND: - case BPF_S_LDX_B_MSH: case BPF_S_LD_IMM: case BPF_S_LD_MEM: case BPF_S_MISC_TXA: diff --git a/arch/sh/include/asm/tlb.h b/arch/sh/include/asm/tlb.h index 362192ed12fe..62f80d2a9df9 100644 --- a/arch/sh/include/asm/tlb.h +++ b/arch/sh/include/asm/tlb.h @@ -86,6 +86,14 @@ tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma) } } +static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb) +{ +} + +static inline void tlb_flush_mmu_free(struct mmu_gather *tlb) +{ +} + static inline void tlb_flush_mmu(struct mmu_gather *tlb) { } diff --git a/arch/um/include/asm/tlb.h b/arch/um/include/asm/tlb.h index 29b0301c18aa..16eb63fac57d 100644 --- a/arch/um/include/asm/tlb.h +++ b/arch/um/include/asm/tlb.h @@ -59,13 +59,25 @@ extern void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start, unsigned long end); static inline void +tlb_flush_mmu_tlbonly(struct mmu_gather *tlb) +{ + flush_tlb_mm_range(tlb->mm, tlb->start, tlb->end); +} + +static inline void +tlb_flush_mmu_free(struct mmu_gather *tlb) +{ + init_tlb_gather(tlb); +} + +static inline void tlb_flush_mmu(struct mmu_gather *tlb) { if (!tlb->need_flush) return; - flush_tlb_mm_range(tlb->mm, tlb->start, tlb->end); - init_tlb_gather(tlb); + tlb_flush_mmu_tlbonly(tlb); + tlb_flush_mmu_free(tlb); } /* tlb_finish_mmu diff --git a/arch/um/include/shared/os.h b/arch/um/include/shared/os.h index 75298d3358e7..08eec0b691b0 100644 --- a/arch/um/include/shared/os.h +++ b/arch/um/include/shared/os.h @@ -136,6 +136,7 @@ extern int os_ioctl_generic(int fd, unsigned int cmd, unsigned long arg); extern int os_get_ifname(int fd, char *namebuf); extern int os_set_slip(int fd); extern int os_mode_fd(int fd, int mode); +extern int os_fsync_file(int fd); extern int os_seek_file(int fd, unsigned long long offset); extern int os_open_file(const char *file, struct openflags flags, int mode); diff --git a/arch/um/kernel/physmem.c b/arch/um/kernel/physmem.c index f116db15d402..30fdd5d0067b 100644 --- a/arch/um/kernel/physmem.c +++ b/arch/um/kernel/physmem.c @@ -103,6 +103,7 @@ void __init setup_physmem(unsigned long start, unsigned long reserve_end, */ os_seek_file(physmem_fd, __pa(&__syscall_stub_start)); os_write_file(physmem_fd, &__syscall_stub_start, PAGE_SIZE); + os_fsync_file(physmem_fd); bootmap_size = init_bootmem(pfn, pfn + delta); free_bootmem(__pa(reserve_end) + bootmap_size, diff --git a/arch/um/os-Linux/file.c b/arch/um/os-Linux/file.c index 07a750197bb0..08d90fba952c 100644 --- a/arch/um/os-Linux/file.c +++ b/arch/um/os-Linux/file.c @@ -237,6 +237,12 @@ void os_close_file(int fd) { close(fd); } +int os_fsync_file(int fd) +{ + if (fsync(fd) < 0) + return -errno; + return 0; +} int os_seek_file(int fd, unsigned long long offset) { diff --git a/arch/um/os-Linux/main.c b/arch/um/os-Linux/main.c index e1704ff600ff..df9191acd926 100644 --- a/arch/um/os-Linux/main.c +++ b/arch/um/os-Linux/main.c @@ -151,6 +151,7 @@ int __init main(int argc, char **argv, char **envp) #endif do_uml_initcalls(); + change_sig(SIGPIPE, 0); ret = linux_main(argc, argv); /* diff --git a/arch/um/os-Linux/mem.c b/arch/um/os-Linux/mem.c index 3c4af77e51a2..897e9ad0c108 100644 --- a/arch/um/os-Linux/mem.c +++ b/arch/um/os-Linux/mem.c @@ -12,337 +12,117 @@ #include <string.h> #include <sys/stat.h> #include <sys/mman.h> -#include <sys/param.h> +#include <sys/vfs.h> +#include <linux/magic.h> #include <init.h> #include <os.h> -/* Modified by which_tmpdir, which is called during early boot */ -static char *default_tmpdir = "/tmp"; - -/* - * Modified when creating the physical memory file and when checking - * the tmp filesystem for usability, both happening during early boot. - */ +/* Set by make_tempfile() during early boot. */ static char *tempdir = NULL; -static void __init find_tempdir(void) +/* Check if dir is on tmpfs. Return 0 if yes, -1 if no or error. */ +static int __init check_tmpfs(const char *dir) { - const char *dirs[] = { "TMP", "TEMP", "TMPDIR", NULL }; - int i; - char *dir = NULL; - - if (tempdir != NULL) - /* We've already been called */ - return; - for (i = 0; dirs[i]; i++) { - dir = getenv(dirs[i]); - if ((dir != NULL) && (*dir != '\0')) - break; - } - if ((dir == NULL) || (*dir == '\0')) - dir = default_tmpdir; + struct statfs st; - tempdir = malloc(strlen(dir) + 2); - if (tempdir == NULL) { - fprintf(stderr, "Failed to malloc tempdir, " - "errno = %d\n", errno); - return; - } - strcpy(tempdir, dir); - strcat(tempdir, "/"); -} - -/* - * Remove bytes from the front of the buffer and refill it so that if there's a - * partial string that we care about, it will be completed, and we can recognize - * it. - */ -static int pop(int fd, char *buf, size_t size, size_t npop) -{ - ssize_t n; - size_t len = strlen(&buf[npop]); - - memmove(buf, &buf[npop], len + 1); - n = read(fd, &buf[len], size - len - 1); - if (n < 0) - return -errno; - - buf[len + n] = '\0'; - return 1; -} - -/* - * This will return 1, with the first character in buf being the - * character following the next instance of c in the file. This will - * read the file as needed. If there's an error, -errno is returned; - * if the end of the file is reached, 0 is returned. - */ -static int next(int fd, char *buf, size_t size, char c) -{ - ssize_t n; - char *ptr; - - while ((ptr = strchr(buf, c)) == NULL) { - n = read(fd, buf, size - 1); - if (n == 0) - return 0; - else if (n < 0) - return -errno; - - buf[n] = '\0'; + printf("Checking if %s is on tmpfs...", dir); + if (statfs(dir, &st) < 0) { + printf("%s\n", strerror(errno)); + } else if (st.f_type != TMPFS_MAGIC) { + printf("no\n"); + } else { + printf("OK\n"); + return 0; } - - return pop(fd, buf, size, ptr - buf + 1); + return -1; } /* - * Decode an octal-escaped and space-terminated path of the form used by - * /proc/mounts. May be used to decode a path in-place. "out" must be at least - * as large as the input. The output is always null-terminated. "len" gets the - * length of the output, excluding the trailing null. Returns 0 if a full path - * was successfully decoded, otherwise an error. + * Choose the tempdir to use. We want something on tmpfs so that our memory is + * not subject to the host's vm.dirty_ratio. If a tempdir is specified in the + * environment, we use that even if it's not on tmpfs, but we warn the user. + * Otherwise, we try common tmpfs locations, and if no tmpfs directory is found + * then we fall back to /tmp. */ -static int decode_path(const char *in, char *out, size_t *len) +static char * __init choose_tempdir(void) { - char *first = out; - int c; + static const char * const vars[] = { + "TMPDIR", + "TMP", + "TEMP", + NULL + }; + static const char fallback_dir[] = "/tmp"; + static const char * const tmpfs_dirs[] = { + "/dev/shm", + fallback_dir, + NULL + }; int i; - int ret = -EINVAL; - while (1) { - switch (*in) { - case '\0': - goto out; - - case ' ': - ret = 0; - goto out; - - case '\\': - in++; - c = 0; - for (i = 0; i < 3; i++) { - if (*in < '0' || *in > '7') - goto out; - c = (c << 3) | (*in++ - '0'); - } - *(unsigned char *)out++ = (unsigned char) c; - break; - - default: - *out++ = *in++; - break; + const char *dir; + + printf("Checking environment variables for a tempdir..."); + for (i = 0; vars[i]; i++) { + dir = getenv(vars[i]); + if ((dir != NULL) && (*dir != '\0')) { + printf("%s\n", dir); + if (check_tmpfs(dir) >= 0) + goto done; + else + goto warn; } } + printf("none found\n"); -out: - *out = '\0'; - *len = out - first; - return ret; -} - -/* - * Computes the length of s when encoded with three-digit octal escape sequences - * for the characters in chars. - */ -static size_t octal_encoded_length(const char *s, const char *chars) -{ - size_t len = strlen(s); - while ((s = strpbrk(s, chars)) != NULL) { - len += 3; - s++; - } - - return len; -} - -enum { - OUTCOME_NOTHING_MOUNTED, - OUTCOME_TMPFS_MOUNT, - OUTCOME_NON_TMPFS_MOUNT, -}; - -/* Read a line of /proc/mounts data looking for a tmpfs mount at "path". */ -static int read_mount(int fd, char *buf, size_t bufsize, const char *path, - int *outcome) -{ - int found; - int match; - char *space; - size_t len; - - enum { - MATCH_NONE, - MATCH_EXACT, - MATCH_PARENT, - }; - - found = next(fd, buf, bufsize, ' '); - if (found != 1) - return found; - - /* - * If there's no following space in the buffer, then this path is - * truncated, so it can't be the one we're looking for. - */ - space = strchr(buf, ' '); - if (space) { - match = MATCH_NONE; - if (!decode_path(buf, buf, &len)) { - if (!strcmp(buf, path)) - match = MATCH_EXACT; - else if (!strncmp(buf, path, len) - && (path[len] == '/' || !strcmp(buf, "/"))) - match = MATCH_PARENT; - } - - found = pop(fd, buf, bufsize, space - buf + 1); - if (found != 1) - return found; - - switch (match) { - case MATCH_EXACT: - if (!strncmp(buf, "tmpfs", strlen("tmpfs"))) - *outcome = OUTCOME_TMPFS_MOUNT; - else - *outcome = OUTCOME_NON_TMPFS_MOUNT; - break; - - case MATCH_PARENT: - /* This mount obscures any previous ones. */ - *outcome = OUTCOME_NOTHING_MOUNTED; - break; - } + for (i = 0; tmpfs_dirs[i]; i++) { + dir = tmpfs_dirs[i]; + if (check_tmpfs(dir) >= 0) + goto done; } - return next(fd, buf, bufsize, '\n'); + dir = fallback_dir; +warn: + printf("Warning: tempdir %s is not on tmpfs\n", dir); +done: + /* Make a copy since getenv results may not remain valid forever. */ + return strdup(dir); } -/* which_tmpdir is called only during early boot */ -static int checked_tmpdir = 0; - /* - * Look for a tmpfs mounted at /dev/shm. I couldn't find a cleaner - * way to do this than to parse /proc/mounts. statfs will return the - * same filesystem magic number and fs id for both /dev and /dev/shm - * when they are both tmpfs, so you can't tell if they are different - * filesystems. Also, there seems to be no other way of finding the - * mount point of a filesystem from within it. - * - * If a /dev/shm tmpfs entry is found, then we switch to using it. - * Otherwise, we stay with the default /tmp. + * Create an unlinked tempfile in a suitable tempdir. template must be the + * basename part of the template with a leading '/'. */ -static void which_tmpdir(void) +static int __init make_tempfile(const char *template) { + char *tempname; int fd; - int found; - int outcome; - char *path; - char *buf; - size_t bufsize; - if (checked_tmpdir) - return; - - checked_tmpdir = 1; - - printf("Checking for tmpfs mount on /dev/shm..."); - - path = realpath("/dev/shm", NULL); - if (!path) { - printf("failed to check real path, errno = %d\n", errno); - return; - } - printf("%s...", path); - - /* - * The buffer needs to be able to fit the full octal-escaped path, a - * space, and a trailing null in order to successfully decode it. - */ - bufsize = octal_encoded_length(path, " \t\n\\") + 2; - - if (bufsize < 128) - bufsize = 128; - - buf = malloc(bufsize); - if (!buf) { - printf("malloc failed, errno = %d\n", errno); - goto out; - } - buf[0] = '\0'; - - fd = open("/proc/mounts", O_RDONLY); - if (fd < 0) { - printf("failed to open /proc/mounts, errno = %d\n", errno); - goto out1; - } - - outcome = OUTCOME_NOTHING_MOUNTED; - while (1) { - found = read_mount(fd, buf, bufsize, path, &outcome); - if (found != 1) - break; - } - - if (found < 0) { - printf("read returned errno %d\n", -found); - } else { - switch (outcome) { - case OUTCOME_TMPFS_MOUNT: - printf("OK\n"); - default_tmpdir = "/dev/shm"; - break; - - case OUTCOME_NON_TMPFS_MOUNT: - printf("not tmpfs\n"); - break; - - default: - printf("nothing mounted on /dev/shm\n"); - break; + if (tempdir == NULL) { + tempdir = choose_tempdir(); + if (tempdir == NULL) { + fprintf(stderr, "Failed to choose tempdir: %s\n", + strerror(errno)); + return -1; } } - close(fd); -out1: - free(buf); -out: - free(path); -} - -static int __init make_tempfile(const char *template, char **out_tempname, - int do_unlink) -{ - char *tempname; - int fd; - - which_tmpdir(); - tempname = malloc(MAXPATHLEN); + tempname = malloc(strlen(tempdir) + strlen(template) + 1); if (tempname == NULL) return -1; - find_tempdir(); - if ((tempdir == NULL) || (strlen(tempdir) >= MAXPATHLEN)) - goto out; - - if (template[0] != '/') - strcpy(tempname, tempdir); - else - tempname[0] = '\0'; - strncat(tempname, template, MAXPATHLEN-1-strlen(tempname)); + strcpy(tempname, tempdir); + strcat(tempname, template); fd = mkstemp(tempname); if (fd < 0) { fprintf(stderr, "open - cannot create %s: %s\n", tempname, strerror(errno)); goto out; } - if (do_unlink && (unlink(tempname) < 0)) { + if (unlink(tempname) < 0) { perror("unlink"); goto close; } - if (out_tempname) { - *out_tempname = tempname; - } else - free(tempname); + free(tempname); return fd; close: close(fd); @@ -351,14 +131,14 @@ out: return -1; } -#define TEMPNAME_TEMPLATE "vm_file-XXXXXX" +#define TEMPNAME_TEMPLATE "/vm_file-XXXXXX" static int __init create_tmp_file(unsigned long long len) { int fd, err; char zero; - fd = make_tempfile(TEMPNAME_TEMPLATE, NULL, 1); + fd = make_tempfile(TEMPNAME_TEMPLATE); if (fd < 0) exit(1); @@ -402,7 +182,6 @@ int __init create_mem_file(unsigned long long len) return fd; } - void __init check_tmpexec(void) { void *addr; @@ -410,14 +189,13 @@ void __init check_tmpexec(void) addr = mmap(NULL, UM_KERN_PAGE_SIZE, PROT_READ | PROT_WRITE | PROT_EXEC, MAP_PRIVATE, fd, 0); - printf("Checking PROT_EXEC mmap in %s...",tempdir); - fflush(stdout); + printf("Checking PROT_EXEC mmap in %s...", tempdir); if (addr == MAP_FAILED) { err = errno; - perror("failed"); + printf("%s\n", strerror(err)); close(fd); if (err == EPERM) - printf("%s must be not mounted noexec\n",tempdir); + printf("%s must be not mounted noexec\n", tempdir); exit(1); } printf("OK\n"); diff --git a/arch/x86/Makefile b/arch/x86/Makefile index d1b7c377a234..ce6ad7e6a7d7 100644 --- a/arch/x86/Makefile +++ b/arch/x86/Makefile @@ -83,7 +83,9 @@ else KBUILD_CFLAGS += -m64 # Don't autogenerate traditional x87, MMX or SSE instructions - KBUILD_CFLAGS += -mno-mmx -mno-sse -mno-80387 -mno-fp-ret-in-387 + KBUILD_CFLAGS += -mno-mmx -mno-sse + KBUILD_CFLAGS += $(call cc-option,-mno-80387) + KBUILD_CFLAGS += $(call cc-option,-mno-fp-ret-in-387) # Use -mpreferred-stack-boundary=3 if supported. KBUILD_CFLAGS += $(call cc-option,-mpreferred-stack-boundary=3) diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index 6ad4658de705..d23aa82e7a7b 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c @@ -3425,6 +3425,11 @@ int get_nr_irqs_gsi(void) return nr_irqs_gsi; } +unsigned int arch_dynirq_lower_bound(unsigned int from) +{ + return from < nr_irqs_gsi ? nr_irqs_gsi : from; +} + int __init arch_probe_nr_irqs(void) { int nr; diff --git a/arch/x86/kernel/cpu/perf_event_intel_rapl.c b/arch/x86/kernel/cpu/perf_event_intel_rapl.c index 7c87424d4140..619f7699487a 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_rapl.c +++ b/arch/x86/kernel/cpu/perf_event_intel_rapl.c @@ -543,7 +543,8 @@ static int rapl_cpu_prepare(int cpu) if (phys_id < 0) return -1; - if (!rdmsrl_safe(MSR_RAPL_POWER_UNIT, &msr_rapl_power_unit_bits)) + /* protect rdmsrl() to handle virtualization */ + if (rdmsrl_safe(MSR_RAPL_POWER_UNIT, &msr_rapl_power_unit_bits)) return -1; pmu = kzalloc_node(sizeof(*pmu), GFP_KERNEL, cpu_to_node(cpu)); diff --git a/arch/x86/kernel/vsmp_64.c b/arch/x86/kernel/vsmp_64.c index f6584a90aba3..5edc34b5b951 100644 --- a/arch/x86/kernel/vsmp_64.c +++ b/arch/x86/kernel/vsmp_64.c @@ -26,6 +26,9 @@ #define TOPOLOGY_REGISTER_OFFSET 0x10 +/* Flag below is initialized once during vSMP PCI initialization. */ +static int irq_routing_comply = 1; + #if defined CONFIG_PCI && defined CONFIG_PARAVIRT /* * Interrupt control on vSMPowered systems: @@ -101,6 +104,10 @@ static void __init set_vsmp_pv_ops(void) #ifdef CONFIG_SMP if (cap & ctl & BIT(8)) { ctl &= ~BIT(8); + + /* Interrupt routing set to ignore */ + irq_routing_comply = 0; + #ifdef CONFIG_PROC_FS /* Don't let users change irq affinity via procfs */ no_irq_affinity = 1; @@ -218,7 +225,9 @@ static void vsmp_apic_post_init(void) { /* need to update phys_pkg_id */ apic->phys_pkg_id = apicid_phys_pkg_id; - apic->vector_allocation_domain = fill_vector_allocation_domain; + + if (!irq_routing_comply) + apic->vector_allocation_domain = fill_vector_allocation_domain; } void __init vsmp_init(void) diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 1f68c5831924..33e8c028842f 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -503,7 +503,7 @@ static inline struct vcpu_vmx *to_vmx(struct kvm_vcpu *vcpu) [number##_HIGH] = VMCS12_OFFSET(name)+4 -static const unsigned long shadow_read_only_fields[] = { +static unsigned long shadow_read_only_fields[] = { /* * We do NOT shadow fields that are modified when L0 * traps and emulates any vmx instruction (e.g. VMPTRLD, @@ -526,10 +526,10 @@ static const unsigned long shadow_read_only_fields[] = { GUEST_LINEAR_ADDRESS, GUEST_PHYSICAL_ADDRESS }; -static const int max_shadow_read_only_fields = +static int max_shadow_read_only_fields = ARRAY_SIZE(shadow_read_only_fields); -static const unsigned long shadow_read_write_fields[] = { +static unsigned long shadow_read_write_fields[] = { GUEST_RIP, GUEST_RSP, GUEST_CR0, @@ -558,7 +558,7 @@ static const unsigned long shadow_read_write_fields[] = { HOST_FS_SELECTOR, HOST_GS_SELECTOR }; -static const int max_shadow_read_write_fields = +static int max_shadow_read_write_fields = ARRAY_SIZE(shadow_read_write_fields); static const unsigned short vmcs_field_to_offset_table[] = { @@ -3009,6 +3009,41 @@ static void free_kvm_area(void) } } +static void init_vmcs_shadow_fields(void) +{ + int i, j; + + /* No checks for read only fields yet */ + + for (i = j = 0; i < max_shadow_read_write_fields; i++) { + switch (shadow_read_write_fields[i]) { + case GUEST_BNDCFGS: + if (!vmx_mpx_supported()) + continue; + break; + default: + break; + } + + if (j < i) + shadow_read_write_fields[j] = + shadow_read_write_fields[i]; + j++; + } + max_shadow_read_write_fields = j; + + /* shadowed fields guest access without vmexit */ + for (i = 0; i < max_shadow_read_write_fields; i++) { + clear_bit(shadow_read_write_fields[i], + vmx_vmwrite_bitmap); + clear_bit(shadow_read_write_fields[i], + vmx_vmread_bitmap); + } + for (i = 0; i < max_shadow_read_only_fields; i++) + clear_bit(shadow_read_only_fields[i], + vmx_vmread_bitmap); +} + static __init int alloc_kvm_area(void) { int cpu; @@ -3039,6 +3074,8 @@ static __init int hardware_setup(void) enable_vpid = 0; if (!cpu_has_vmx_shadow_vmcs()) enable_shadow_vmcs = 0; + if (enable_shadow_vmcs) + init_vmcs_shadow_fields(); if (!cpu_has_vmx_ept() || !cpu_has_vmx_ept_4levels()) { @@ -8803,14 +8840,6 @@ static int __init vmx_init(void) memset(vmx_vmread_bitmap, 0xff, PAGE_SIZE); memset(vmx_vmwrite_bitmap, 0xff, PAGE_SIZE); - /* shadowed read/write fields */ - for (i = 0; i < max_shadow_read_write_fields; i++) { - clear_bit(shadow_read_write_fields[i], vmx_vmwrite_bitmap); - clear_bit(shadow_read_write_fields[i], vmx_vmread_bitmap); - } - /* shadowed read only fields */ - for (i = 0; i < max_shadow_read_only_fields; i++) - clear_bit(shadow_read_only_fields[i], vmx_vmread_bitmap); /* * Allow direct access to the PC debug port (it is often used for I/O diff --git a/arch/x86/vdso/vdso-layout.lds.S b/arch/x86/vdso/vdso-layout.lds.S index 2e263f367b13..9df017ab2285 100644 --- a/arch/x86/vdso/vdso-layout.lds.S +++ b/arch/x86/vdso/vdso-layout.lds.S @@ -9,12 +9,9 @@ SECTIONS #ifdef BUILD_VDSO32 #include <asm/vdso32.h> - .hpet_sect : { - hpet_page = . - VDSO_OFFSET(VDSO_HPET_PAGE); - } :text :hpet_sect + hpet_page = . - VDSO_OFFSET(VDSO_HPET_PAGE); - .vvar_sect : { - vvar = . - VDSO_OFFSET(VDSO_VVAR_PAGE); + vvar = . - VDSO_OFFSET(VDSO_VVAR_PAGE); /* Place all vvars at the offsets in asm/vvar.h. */ #define EMIT_VVAR(name, offset) vvar_ ## name = vvar + offset; @@ -22,7 +19,6 @@ SECTIONS #include <asm/vvar.h> #undef __VVAR_KERNEL_LDS #undef EMIT_VVAR - } :text :vvar_sect #endif . = SIZEOF_HEADERS; @@ -61,7 +57,12 @@ SECTIONS */ . = ALIGN(0x100); - .text : { *(.text*) } :text =0x90909090 + .text : { *(.text*) } :text =0x90909090, + + /* + * The comma above works around a bug in gold: + * https://sourceware.org/bugzilla/show_bug.cgi?id=16804 + */ /DISCARD/ : { *(.discard) @@ -84,8 +85,4 @@ PHDRS dynamic PT_DYNAMIC FLAGS(4); /* PF_R */ note PT_NOTE FLAGS(4); /* PF_R */ eh_frame_hdr PT_GNU_EH_FRAME; -#ifdef BUILD_VDSO32 - vvar_sect PT_NULL FLAGS(4); /* PF_R */ - hpet_sect PT_NULL FLAGS(4); /* PF_R */ -#endif } diff --git a/drivers/acpi/acpi_processor.c b/drivers/acpi/acpi_processor.c index c29c2c3ec0ad..b06f5f55ada9 100644 --- a/drivers/acpi/acpi_processor.c +++ b/drivers/acpi/acpi_processor.c @@ -170,6 +170,9 @@ static int acpi_processor_hotadd_init(struct acpi_processor *pr) acpi_status status; int ret; + if (pr->apic_id == -1) + return -ENODEV; + status = acpi_evaluate_integer(pr->handle, "_STA", NULL, &sta); if (ACPI_FAILURE(status) || !(sta & ACPI_STA_DEVICE_PRESENT)) return -ENODEV; @@ -260,10 +263,8 @@ static int acpi_processor_get_info(struct acpi_device *device) } apic_id = acpi_get_apicid(pr->handle, device_declaration, pr->acpi_id); - if (apic_id < 0) { + if (apic_id < 0) acpi_handle_debug(pr->handle, "failed to get CPU APIC ID.\n"); - return -ENODEV; - } pr->apic_id = apic_id; cpu_index = acpi_map_cpuid(pr->apic_id, pr->acpi_id); diff --git a/drivers/acpi/acpica/exfield.c b/drivers/acpi/acpica/exfield.c index 68d97441432c..12878e1982f7 100644 --- a/drivers/acpi/acpica/exfield.c +++ b/drivers/acpi/acpica/exfield.c @@ -45,10 +45,71 @@ #include "accommon.h" #include "acdispat.h" #include "acinterp.h" +#include "amlcode.h" #define _COMPONENT ACPI_EXECUTER ACPI_MODULE_NAME("exfield") +/* Local prototypes */ +static u32 +acpi_ex_get_serial_access_length(u32 accessor_type, u32 access_length); + +/******************************************************************************* + * + * FUNCTION: acpi_get_serial_access_bytes + * + * PARAMETERS: accessor_type - The type of the protocol indicated by region + * field access attributes + * access_length - The access length of the region field + * + * RETURN: Decoded access length + * + * DESCRIPTION: This routine returns the length of the generic_serial_bus + * protocol bytes + * + ******************************************************************************/ + +static u32 +acpi_ex_get_serial_access_length(u32 accessor_type, u32 access_length) +{ + u32 length; + + switch (accessor_type) { + case AML_FIELD_ATTRIB_QUICK: + + length = 0; + break; + + case AML_FIELD_ATTRIB_SEND_RCV: + case AML_FIELD_ATTRIB_BYTE: + + length = 1; + break; + + case AML_FIELD_ATTRIB_WORD: + case AML_FIELD_ATTRIB_WORD_CALL: + + length = 2; + break; + + case AML_FIELD_ATTRIB_MULTIBYTE: + case AML_FIELD_ATTRIB_RAW_BYTES: + case AML_FIELD_ATTRIB_RAW_PROCESS: + + length = access_length; + break; + + case AML_FIELD_ATTRIB_BLOCK: + case AML_FIELD_ATTRIB_BLOCK_CALL: + default: + + length = ACPI_GSBUS_BUFFER_SIZE; + break; + } + + return (length); +} + /******************************************************************************* * * FUNCTION: acpi_ex_read_data_from_field @@ -63,8 +124,9 @@ ACPI_MODULE_NAME("exfield") * Buffer, depending on the size of the field. * ******************************************************************************/ + acpi_status -acpi_ex_read_data_from_field(struct acpi_walk_state *walk_state, +acpi_ex_read_data_from_field(struct acpi_walk_state * walk_state, union acpi_operand_object *obj_desc, union acpi_operand_object **ret_buffer_desc) { @@ -73,6 +135,7 @@ acpi_ex_read_data_from_field(struct acpi_walk_state *walk_state, acpi_size length; void *buffer; u32 function; + u16 accessor_type; ACPI_FUNCTION_TRACE_PTR(ex_read_data_from_field, obj_desc); @@ -116,9 +179,22 @@ acpi_ex_read_data_from_field(struct acpi_walk_state *walk_state, ACPI_READ | (obj_desc->field.attribute << 16); } else if (obj_desc->field.region_obj->region.space_id == ACPI_ADR_SPACE_GSBUS) { - length = ACPI_GSBUS_BUFFER_SIZE; - function = - ACPI_READ | (obj_desc->field.attribute << 16); + accessor_type = obj_desc->field.attribute; + length = acpi_ex_get_serial_access_length(accessor_type, + obj_desc-> + field. + access_length); + + /* + * Add additional 2 bytes for modeled generic_serial_bus data buffer: + * typedef struct { + * BYTEStatus; // Byte 0 of the data buffer + * BYTELength; // Byte 1 of the data buffer + * BYTE[x-1]Data; // Bytes 2-x of the arbitrary length data buffer, + * } + */ + length += 2; + function = ACPI_READ | (accessor_type << 16); } else { /* IPMI */ length = ACPI_IPMI_BUFFER_SIZE; @@ -231,6 +307,7 @@ acpi_ex_write_data_to_field(union acpi_operand_object *source_desc, void *buffer; union acpi_operand_object *buffer_desc; u32 function; + u16 accessor_type; ACPI_FUNCTION_TRACE_PTR(ex_write_data_to_field, obj_desc); @@ -284,9 +361,22 @@ acpi_ex_write_data_to_field(union acpi_operand_object *source_desc, ACPI_WRITE | (obj_desc->field.attribute << 16); } else if (obj_desc->field.region_obj->region.space_id == ACPI_ADR_SPACE_GSBUS) { - length = ACPI_GSBUS_BUFFER_SIZE; - function = - ACPI_WRITE | (obj_desc->field.attribute << 16); + accessor_type = obj_desc->field.attribute; + length = acpi_ex_get_serial_access_length(accessor_type, + obj_desc-> + field. + access_length); + + /* + * Add additional 2 bytes for modeled generic_serial_bus data buffer: + * typedef struct { + * BYTEStatus; // Byte 0 of the data buffer + * BYTELength; // Byte 1 of the data buffer + * BYTE[x-1]Data; // Bytes 2-x of the arbitrary length data buffer, + * } + */ + length += 2; + function = ACPI_WRITE | (accessor_type << 16); } else { /* IPMI */ length = ACPI_IPMI_BUFFER_SIZE; diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c index e7e5844c87d0..cf925c4f36b7 100644 --- a/drivers/acpi/bus.c +++ b/drivers/acpi/bus.c @@ -380,9 +380,8 @@ static void acpi_bus_notify(acpi_handle handle, u32 type, void *data) break; default: - acpi_handle_warn(handle, "Unsupported event type 0x%x\n", type); - ost_code = ACPI_OST_SC_UNRECOGNIZED_NOTIFY; - goto err; + acpi_handle_debug(handle, "Unknown event type 0x%x\n", type); + break; } adev = acpi_bus_get_acpi_device(handle); diff --git a/drivers/acpi/ec.c b/drivers/acpi/ec.c index d7d32c28829b..ad11ba4a412d 100644 --- a/drivers/acpi/ec.c +++ b/drivers/acpi/ec.c @@ -206,13 +206,13 @@ unlock: spin_unlock_irqrestore(&ec->lock, flags); } -static int acpi_ec_sync_query(struct acpi_ec *ec); +static int acpi_ec_sync_query(struct acpi_ec *ec, u8 *data); static int ec_check_sci_sync(struct acpi_ec *ec, u8 state) { if (state & ACPI_EC_FLAG_SCI) { if (!test_and_set_bit(EC_FLAGS_QUERY_PENDING, &ec->flags)) - return acpi_ec_sync_query(ec); + return acpi_ec_sync_query(ec, NULL); } return 0; } @@ -443,10 +443,8 @@ acpi_handle ec_get_handle(void) EXPORT_SYMBOL(ec_get_handle); -static int acpi_ec_query_unlocked(struct acpi_ec *ec, u8 *data); - /* - * Clears stale _Q events that might have accumulated in the EC. + * Process _Q events that might have accumulated in the EC. * Run with locked ec mutex. */ static void acpi_ec_clear(struct acpi_ec *ec) @@ -455,7 +453,7 @@ static void acpi_ec_clear(struct acpi_ec *ec) u8 value = 0; for (i = 0; i < ACPI_EC_CLEAR_MAX; i++) { - status = acpi_ec_query_unlocked(ec, &value); + status = acpi_ec_sync_query(ec, &value); if (status || !value) break; } @@ -582,13 +580,18 @@ static void acpi_ec_run(void *cxt) kfree(handler); } -static int acpi_ec_sync_query(struct acpi_ec *ec) +static int acpi_ec_sync_query(struct acpi_ec *ec, u8 *data) { u8 value = 0; int status; struct acpi_ec_query_handler *handler, *copy; - if ((status = acpi_ec_query_unlocked(ec, &value))) + + status = acpi_ec_query_unlocked(ec, &value); + if (data) + *data = value; + if (status) return status; + list_for_each_entry(handler, &ec->list, node) { if (value == handler->query_bit) { /* have custom handler for this bit */ @@ -612,7 +615,7 @@ static void acpi_ec_gpe_query(void *ec_cxt) if (!ec) return; mutex_lock(&ec->mutex); - acpi_ec_sync_query(ec); + acpi_ec_sync_query(ec, NULL); mutex_unlock(&ec->mutex); } diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index 20e03a7eb8b4..c2706047337f 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig @@ -116,7 +116,7 @@ config AHCI_ST config AHCI_IMX tristate "Freescale i.MX AHCI SATA support" - depends on MFD_SYSCON + depends on MFD_SYSCON && (ARCH_MXC || COMPILE_TEST) help This option enables support for the Freescale i.MX SoC's onboard AHCI SATA. @@ -134,8 +134,7 @@ config AHCI_SUNXI config AHCI_XGENE tristate "APM X-Gene 6.0Gbps AHCI SATA host controller support" - depends on ARM64 || COMPILE_TEST - select PHY_XGENE + depends on PHY_XGENE help This option enables support for APM X-Gene SoC SATA host controller. diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index 5a0bf8ed649b..71e15b73513d 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c @@ -1164,9 +1164,9 @@ static inline void ahci_gtf_filter_workaround(struct ata_host *host) #endif static int ahci_init_interrupts(struct pci_dev *pdev, unsigned int n_ports, - struct ahci_host_priv *hpriv) + struct ahci_host_priv *hpriv) { - int nvec; + int rc, nvec; if (hpriv->flags & AHCI_HFLAG_NO_MSI) goto intx; @@ -1183,12 +1183,19 @@ static int ahci_init_interrupts(struct pci_dev *pdev, unsigned int n_ports, if (nvec < n_ports) goto single_msi; - nvec = pci_enable_msi_range(pdev, nvec, nvec); - if (nvec == -ENOSPC) + rc = pci_enable_msi_exact(pdev, nvec); + if (rc == -ENOSPC) goto single_msi; - else if (nvec < 0) + else if (rc < 0) goto intx; + /* fallback to single MSI mode if the controller enforced MRSM mode */ + if (readl(hpriv->mmio + HOST_CTL) & HOST_MRSM) { + pci_disable_msi(pdev); + printk(KERN_INFO "ahci: MRSM is on, fallback to single MSI\n"); + goto single_msi; + } + return nvec; single_msi: @@ -1232,18 +1239,18 @@ int ahci_host_activate(struct ata_host *host, int irq, unsigned int n_msis) return rc; for (i = 0; i < host->n_ports; i++) { - const char* desc; struct ahci_port_priv *pp = host->ports[i]->private_data; - /* pp is NULL for dummy ports */ - if (pp) - desc = pp->irq_desc; - else - desc = dev_driver_string(host->dev); + /* Do not receive interrupts sent by dummy ports */ + if (!pp) { + disable_irq(irq + i); + continue; + } - rc = devm_request_threaded_irq(host->dev, - irq + i, ahci_hw_interrupt, ahci_thread_fn, IRQF_SHARED, - desc, host->ports[i]); + rc = devm_request_threaded_irq(host->dev, irq + i, + ahci_hw_interrupt, + ahci_thread_fn, IRQF_SHARED, + pp->irq_desc, host->ports[i]); if (rc) goto out_free_irqs; } diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h index 51af275b3388..b5eb886da226 100644 --- a/drivers/ata/ahci.h +++ b/drivers/ata/ahci.h @@ -94,6 +94,7 @@ enum { /* HOST_CTL bits */ HOST_RESET = (1 << 0), /* reset controller; self-clear */ HOST_IRQ_EN = (1 << 1), /* global IRQ enable */ + HOST_MRSM = (1 << 2), /* MSI Revert to Single Message */ HOST_AHCI_EN = (1 << 31), /* AHCI enabled */ /* HOST_CAP bits */ diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c index c19734d96d7e..943cc8b83e59 100644 --- a/drivers/ata/libata-core.c +++ b/drivers/ata/libata-core.c @@ -4224,8 +4224,10 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = { { "PIONEER DVD-RW DVR-216D", NULL, ATA_HORKAGE_NOSETXFER }, /* devices that don't properly handle queued TRIM commands */ - { "Micron_M500*", NULL, ATA_HORKAGE_NO_NCQ_TRIM, }, - { "Crucial_CT???M500SSD*", NULL, ATA_HORKAGE_NO_NCQ_TRIM, }, + { "Micron_M500*", "MU0[1-4]*", ATA_HORKAGE_NO_NCQ_TRIM, }, + { "Crucial_CT???M500SSD*", "MU0[1-4]*", ATA_HORKAGE_NO_NCQ_TRIM, }, + { "Micron_M550*", NULL, ATA_HORKAGE_NO_NCQ_TRIM, }, + { "Crucial_CT???M550SSD*", NULL, ATA_HORKAGE_NO_NCQ_TRIM, }, /* * Some WD SATA-I drives spin up and down erratically when the link @@ -4792,21 +4794,26 @@ void swap_buf_le16(u16 *buf, unsigned int buf_words) static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) { struct ata_queued_cmd *qc = NULL; - unsigned int i; + unsigned int i, tag; /* no command while frozen */ if (unlikely(ap->pflags & ATA_PFLAG_FROZEN)) return NULL; - /* the last tag is reserved for internal command. */ - for (i = 0; i < ATA_MAX_QUEUE - 1; i++) - if (!test_and_set_bit(i, &ap->qc_allocated)) { - qc = __ata_qc_from_tag(ap, i); + for (i = 0; i < ATA_MAX_QUEUE; i++) { + tag = (i + ap->last_tag + 1) % ATA_MAX_QUEUE; + + /* the last tag is reserved for internal command. */ + if (tag == ATA_TAG_INTERNAL) + continue; + + if (!test_and_set_bit(tag, &ap->qc_allocated)) { + qc = __ata_qc_from_tag(ap, tag); + qc->tag = tag; + ap->last_tag = tag; break; } - - if (qc) - qc->tag = i; + } return qc; } diff --git a/drivers/ata/pata_arasan_cf.c b/drivers/ata/pata_arasan_cf.c index 6fac524c2f50..4edb1a81f63f 100644 --- a/drivers/ata/pata_arasan_cf.c +++ b/drivers/ata/pata_arasan_cf.c @@ -898,9 +898,12 @@ static int arasan_cf_probe(struct platform_device *pdev) cf_card_detect(acdev, 0); - return ata_host_activate(host, acdev->irq, irq_handler, 0, - &arasan_cf_sht); + ret = ata_host_activate(host, acdev->irq, irq_handler, 0, + &arasan_cf_sht); + if (!ret) + return 0; + cf_exit(acdev); free_clk: clk_put(acdev->clk); return ret; diff --git a/drivers/ata/pata_at91.c b/drivers/ata/pata_at91.c index e9c87274a781..8a66f23af4c4 100644 --- a/drivers/ata/pata_at91.c +++ b/drivers/ata/pata_at91.c @@ -407,12 +407,13 @@ static int pata_at91_probe(struct platform_device *pdev) host->private_data = info; - return ata_host_activate(host, gpio_is_valid(irq) ? gpio_to_irq(irq) : 0, - gpio_is_valid(irq) ? ata_sff_interrupt : NULL, - irq_flags, &pata_at91_sht); + ret = ata_host_activate(host, gpio_is_valid(irq) ? gpio_to_irq(irq) : 0, + gpio_is_valid(irq) ? ata_sff_interrupt : NULL, + irq_flags, &pata_at91_sht); + if (ret) + goto err_put; - if (!ret) - return 0; + return 0; err_put: clk_put(info->mck); diff --git a/drivers/ata/pata_samsung_cf.c b/drivers/ata/pata_samsung_cf.c index a79566d05666..0610e78c8a2a 100644 --- a/drivers/ata/pata_samsung_cf.c +++ b/drivers/ata/pata_samsung_cf.c @@ -594,9 +594,13 @@ static int __init pata_s3c_probe(struct platform_device *pdev) platform_set_drvdata(pdev, host); - return ata_host_activate(host, info->irq, - info->irq ? pata_s3c_irq : NULL, - 0, &pata_s3c_sht); + ret = ata_host_activate(host, info->irq, + info->irq ? pata_s3c_irq : NULL, + 0, &pata_s3c_sht); + if (ret) + goto stop_clk; + + return 0; stop_clk: clk_disable(info->clk); diff --git a/drivers/base/dd.c b/drivers/base/dd.c index 8986b9f22781..62ec61e8f84a 100644 --- a/drivers/base/dd.c +++ b/drivers/base/dd.c @@ -52,6 +52,7 @@ static DEFINE_MUTEX(deferred_probe_mutex); static LIST_HEAD(deferred_probe_pending_list); static LIST_HEAD(deferred_probe_active_list); static struct workqueue_struct *deferred_wq; +static atomic_t deferred_trigger_count = ATOMIC_INIT(0); /** * deferred_probe_work_func() - Retry probing devices in the active list. @@ -135,6 +136,17 @@ static bool driver_deferred_probe_enable = false; * This functions moves all devices from the pending list to the active * list and schedules the deferred probe workqueue to process them. It * should be called anytime a driver is successfully bound to a device. + * + * Note, there is a race condition in multi-threaded probe. In the case where + * more than one device is probing at the same time, it is possible for one + * probe to complete successfully while another is about to defer. If the second + * depends on the first, then it will get put on the pending list after the + * trigger event has already occured and will be stuck there. + * + * The atomic 'deferred_trigger_count' is used to determine if a successful + * trigger has occurred in the midst of probing a driver. If the trigger count + * changes in the midst of a probe, then deferred processing should be triggered + * again. */ static void driver_deferred_probe_trigger(void) { @@ -147,6 +159,7 @@ static void driver_deferred_probe_trigger(void) * into the active list so they can be retried by the workqueue */ mutex_lock(&deferred_probe_mutex); + atomic_inc(&deferred_trigger_count); list_splice_tail_init(&deferred_probe_pending_list, &deferred_probe_active_list); mutex_unlock(&deferred_probe_mutex); @@ -265,6 +278,7 @@ static DECLARE_WAIT_QUEUE_HEAD(probe_waitqueue); static int really_probe(struct device *dev, struct device_driver *drv) { int ret = 0; + int local_trigger_count = atomic_read(&deferred_trigger_count); atomic_inc(&probe_count); pr_debug("bus: '%s': %s: probing driver %s with device %s\n", @@ -310,6 +324,9 @@ probe_failed: /* Driver requested deferred probing */ dev_info(dev, "Driver %s requests probe deferral\n", drv->name); driver_deferred_probe_add(dev); + /* Did a trigger occur while probing? Need to re-trigger if yes */ + if (local_trigger_count != atomic_read(&deferred_trigger_count)) + driver_deferred_probe_trigger(); } else if (ret != -ENODEV && ret != -ENXIO) { /* driver matched but the probe failed */ printk(KERN_WARNING diff --git a/drivers/base/platform.c b/drivers/base/platform.c index e714709704e4..5b47210889e0 100644 --- a/drivers/base/platform.c +++ b/drivers/base/platform.c @@ -13,6 +13,7 @@ #include <linux/string.h> #include <linux/platform_device.h> #include <linux/of_device.h> +#include <linux/of_irq.h> #include <linux/module.h> #include <linux/init.h> #include <linux/dma-mapping.h> @@ -87,7 +88,11 @@ int platform_get_irq(struct platform_device *dev, unsigned int num) return -ENXIO; return dev->archdata.irqs[num]; #else - struct resource *r = platform_get_resource(dev, IORESOURCE_IRQ, num); + struct resource *r; + if (IS_ENABLED(CONFIG_OF_IRQ) && dev->dev.of_node) + return of_irq_get(dev->dev.of_node, num); + + r = platform_get_resource(dev, IORESOURCE_IRQ, num); return r ? r->start : -ENXIO; #endif diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile index 46c1d3d0d66b..4998aee59267 100644 --- a/drivers/clk/at91/Makefile +++ b/drivers/clk/at91/Makefile @@ -2,8 +2,8 @@ # Makefile for at91 specific clk # -obj-y += pmc.o -obj-y += clk-main.o clk-pll.o clk-plldiv.o clk-master.o +obj-y += pmc.o sckc.o +obj-y += clk-slow.o clk-main.o clk-pll.o clk-plldiv.o clk-master.o obj-y += clk-system.o clk-peripheral.o clk-programmable.o obj-$(CONFIG_HAVE_AT91_UTMI) += clk-utmi.o diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c index 8e9e8cc0412d..733306131b99 100644 --- a/drivers/clk/at91/clk-main.c +++ b/drivers/clk/at91/clk-main.c @@ -30,99 +30,546 @@ #define MAINF_LOOP_MIN_WAIT (USEC_PER_SEC / SLOW_CLOCK_FREQ) #define MAINF_LOOP_MAX_WAIT MAINFRDY_TIMEOUT -struct clk_main { +#define MOR_KEY_MASK (0xff << 16) + +struct clk_main_osc { struct clk_hw hw; struct at91_pmc *pmc; - unsigned long rate; unsigned int irq; wait_queue_head_t wait; }; -#define to_clk_main(hw) container_of(hw, struct clk_main, hw) +#define to_clk_main_osc(hw) container_of(hw, struct clk_main_osc, hw) + +struct clk_main_rc_osc { + struct clk_hw hw; + struct at91_pmc *pmc; + unsigned int irq; + wait_queue_head_t wait; + unsigned long frequency; + unsigned long accuracy; +}; + +#define to_clk_main_rc_osc(hw) container_of(hw, struct clk_main_rc_osc, hw) + +struct clk_rm9200_main { + struct clk_hw hw; + struct at91_pmc *pmc; +}; + +#define to_clk_rm9200_main(hw) container_of(hw, struct clk_rm9200_main, hw) -static irqreturn_t clk_main_irq_handler(int irq, void *dev_id) +struct clk_sam9x5_main { + struct clk_hw hw; + struct at91_pmc *pmc; + unsigned int irq; + wait_queue_head_t wait; + u8 parent; +}; + +#define to_clk_sam9x5_main(hw) container_of(hw, struct clk_sam9x5_main, hw) + +static irqreturn_t clk_main_osc_irq_handler(int irq, void *dev_id) { - struct clk_main *clkmain = (struct clk_main *)dev_id; + struct clk_main_osc *osc = dev_id; - wake_up(&clkmain->wait); - disable_irq_nosync(clkmain->irq); + wake_up(&osc->wait); + disable_irq_nosync(osc->irq); return IRQ_HANDLED; } -static int clk_main_prepare(struct clk_hw *hw) +static int clk_main_osc_prepare(struct clk_hw *hw) { - struct clk_main *clkmain = to_clk_main(hw); - struct at91_pmc *pmc = clkmain->pmc; - unsigned long halt_time, timeout; + struct clk_main_osc *osc = to_clk_main_osc(hw); + struct at91_pmc *pmc = osc->pmc; u32 tmp; + tmp = pmc_read(pmc, AT91_CKGR_MOR) & ~MOR_KEY_MASK; + if (tmp & AT91_PMC_OSCBYPASS) + return 0; + + if (!(tmp & AT91_PMC_MOSCEN)) { + tmp |= AT91_PMC_MOSCEN | AT91_PMC_KEY; + pmc_write(pmc, AT91_CKGR_MOR, tmp); + } + while (!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCS)) { - enable_irq(clkmain->irq); - wait_event(clkmain->wait, + enable_irq(osc->irq); + wait_event(osc->wait, pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCS); } - if (clkmain->rate) - return 0; + return 0; +} + +static void clk_main_osc_unprepare(struct clk_hw *hw) +{ + struct clk_main_osc *osc = to_clk_main_osc(hw); + struct at91_pmc *pmc = osc->pmc; + u32 tmp = pmc_read(pmc, AT91_CKGR_MOR); + + if (tmp & AT91_PMC_OSCBYPASS) + return; + + if (!(tmp & AT91_PMC_MOSCEN)) + return; + + tmp &= ~(AT91_PMC_KEY | AT91_PMC_MOSCEN); + pmc_write(pmc, AT91_CKGR_MOR, tmp | AT91_PMC_KEY); +} + +static int clk_main_osc_is_prepared(struct clk_hw *hw) +{ + struct clk_main_osc *osc = to_clk_main_osc(hw); + struct at91_pmc *pmc = osc->pmc; + u32 tmp = pmc_read(pmc, AT91_CKGR_MOR); + + if (tmp & AT91_PMC_OSCBYPASS) + return 1; + + return !!((pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCS) && + (pmc_read(pmc, AT91_CKGR_MOR) & AT91_PMC_MOSCEN)); +} + +static const struct clk_ops main_osc_ops = { + .prepare = clk_main_osc_prepare, + .unprepare = clk_main_osc_unprepare, + .is_prepared = clk_main_osc_is_prepared, +}; + +static struct clk * __init +at91_clk_register_main_osc(struct at91_pmc *pmc, + unsigned int irq, + const char *name, + const char *parent_name, + bool bypass) +{ + int ret; + struct clk_main_osc *osc; + struct clk *clk = NULL; + struct clk_init_data init; + + if (!pmc || !irq || !name || !parent_name) + return ERR_PTR(-EINVAL); + + osc = kzalloc(sizeof(*osc), GFP_KERNEL); + if (!osc) + return ERR_PTR(-ENOMEM); + + init.name = name; + init.ops = &main_osc_ops; + init.parent_names = &parent_name; + init.num_parents = 1; + init.flags = CLK_IGNORE_UNUSED; + + osc->hw.init = &init; + osc->pmc = pmc; + osc->irq = irq; + + init_waitqueue_head(&osc->wait); + irq_set_status_flags(osc->irq, IRQ_NOAUTOEN); + ret = request_irq(osc->irq, clk_main_osc_irq_handler, + IRQF_TRIGGER_HIGH, name, osc); + if (ret) + return ERR_PTR(ret); + + if (bypass) + pmc_write(pmc, AT91_CKGR_MOR, + (pmc_read(pmc, AT91_CKGR_MOR) & + ~(MOR_KEY_MASK | AT91_PMC_MOSCEN)) | + AT91_PMC_OSCBYPASS | AT91_PMC_KEY); + + clk = clk_register(NULL, &osc->hw); + if (IS_ERR(clk)) { + free_irq(irq, osc); + kfree(osc); + } + + return clk; +} + +void __init of_at91rm9200_clk_main_osc_setup(struct device_node *np, + struct at91_pmc *pmc) +{ + struct clk *clk; + unsigned int irq; + const char *name = np->name; + const char *parent_name; + bool bypass; + + of_property_read_string(np, "clock-output-names", &name); + bypass = of_property_read_bool(np, "atmel,osc-bypass"); + parent_name = of_clk_get_parent_name(np, 0); + + irq = irq_of_parse_and_map(np, 0); + if (!irq) + return; + + clk = at91_clk_register_main_osc(pmc, irq, name, parent_name, bypass); + if (IS_ERR(clk)) + return; + + of_clk_add_provider(np, of_clk_src_simple_get, clk); +} + +static irqreturn_t clk_main_rc_osc_irq_handler(int irq, void *dev_id) +{ + struct clk_main_rc_osc *osc = dev_id; + + wake_up(&osc->wait); + disable_irq_nosync(osc->irq); + + return IRQ_HANDLED; +} + +static int clk_main_rc_osc_prepare(struct clk_hw *hw) +{ + struct clk_main_rc_osc *osc = to_clk_main_rc_osc(hw); + struct at91_pmc *pmc = osc->pmc; + u32 tmp; + + tmp = pmc_read(pmc, AT91_CKGR_MOR) & ~MOR_KEY_MASK; + + if (!(tmp & AT91_PMC_MOSCRCEN)) { + tmp |= AT91_PMC_MOSCRCEN | AT91_PMC_KEY; + pmc_write(pmc, AT91_CKGR_MOR, tmp); + } + + while (!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCRCS)) { + enable_irq(osc->irq); + wait_event(osc->wait, + pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCRCS); + } + + return 0; +} + +static void clk_main_rc_osc_unprepare(struct clk_hw *hw) +{ + struct clk_main_rc_osc *osc = to_clk_main_rc_osc(hw); + struct at91_pmc *pmc = osc->pmc; + u32 tmp = pmc_read(pmc, AT91_CKGR_MOR); + + if (!(tmp & AT91_PMC_MOSCRCEN)) + return; + + tmp &= ~(MOR_KEY_MASK | AT91_PMC_MOSCRCEN); + pmc_write(pmc, AT91_CKGR_MOR, tmp | AT91_PMC_KEY); +} + +static int clk_main_rc_osc_is_prepared(struct clk_hw *hw) +{ + struct clk_main_rc_osc *osc = to_clk_main_rc_osc(hw); + struct at91_pmc *pmc = osc->pmc; + + return !!((pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCRCS) && + (pmc_read(pmc, AT91_CKGR_MOR) & AT91_PMC_MOSCRCEN)); +} + +static unsigned long clk_main_rc_osc_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct clk_main_rc_osc *osc = to_clk_main_rc_osc(hw); + + return osc->frequency; +} + +static unsigned long clk_main_rc_osc_recalc_accuracy(struct clk_hw *hw, + unsigned long parent_acc) +{ + struct clk_main_rc_osc *osc = to_clk_main_rc_osc(hw); + + return osc->accuracy; +} + +static const struct clk_ops main_rc_osc_ops = { + .prepare = clk_main_rc_osc_prepare, + .unprepare = clk_main_rc_osc_unprepare, + .is_prepared = clk_main_rc_osc_is_prepared, + .recalc_rate = clk_main_rc_osc_recalc_rate, + .recalc_accuracy = clk_main_rc_osc_recalc_accuracy, +}; + +static struct clk * __init +at91_clk_register_main_rc_osc(struct at91_pmc *pmc, + unsigned int irq, + const char *name, + u32 frequency, u32 accuracy) +{ + int ret; + struct clk_main_rc_osc *osc; + struct clk *clk = NULL; + struct clk_init_data init; + + if (!pmc || !irq || !name || !frequency) + return ERR_PTR(-EINVAL); + + osc = kzalloc(sizeof(*osc), GFP_KERNEL); + if (!osc) + return ERR_PTR(-ENOMEM); + + init.name = name; + init.ops = &main_rc_osc_ops; + init.parent_names = NULL; + init.num_parents = 0; + init.flags = CLK_IS_ROOT | CLK_IGNORE_UNUSED; + + osc->hw.init = &init; + osc->pmc = pmc; + osc->irq = irq; + osc->frequency = frequency; + osc->accuracy = accuracy; + + init_waitqueue_head(&osc->wait); + irq_set_status_flags(osc->irq, IRQ_NOAUTOEN); + ret = request_irq(osc->irq, clk_main_rc_osc_irq_handler, + IRQF_TRIGGER_HIGH, name, osc); + if (ret) + return ERR_PTR(ret); + + clk = clk_register(NULL, &osc->hw); + if (IS_ERR(clk)) { + free_irq(irq, osc); + kfree(osc); + } + + return clk; +} + +void __init of_at91sam9x5_clk_main_rc_osc_setup(struct device_node *np, + struct at91_pmc *pmc) +{ + struct clk *clk; + unsigned int irq; + u32 frequency = 0; + u32 accuracy = 0; + const char *name = np->name; + + of_property_read_string(np, "clock-output-names", &name); + of_property_read_u32(np, "clock-frequency", &frequency); + of_property_read_u32(np, "clock-accuracy", &accuracy); + + irq = irq_of_parse_and_map(np, 0); + if (!irq) + return; + + clk = at91_clk_register_main_rc_osc(pmc, irq, name, frequency, + accuracy); + if (IS_ERR(clk)) + return; + + of_clk_add_provider(np, of_clk_src_simple_get, clk); +} + + +static int clk_main_probe_frequency(struct at91_pmc *pmc) +{ + unsigned long prep_time, timeout; + u32 tmp; timeout = jiffies + usecs_to_jiffies(MAINFRDY_TIMEOUT); do { - halt_time = jiffies; + prep_time = jiffies; tmp = pmc_read(pmc, AT91_CKGR_MCFR); if (tmp & AT91_PMC_MAINRDY) return 0; usleep_range(MAINF_LOOP_MIN_WAIT, MAINF_LOOP_MAX_WAIT); - } while (time_before(halt_time, timeout)); + } while (time_before(prep_time, timeout)); - return 0; + return -ETIMEDOUT; } -static int clk_main_is_prepared(struct clk_hw *hw) +static unsigned long clk_main_recalc_rate(struct at91_pmc *pmc, + unsigned long parent_rate) { - struct clk_main *clkmain = to_clk_main(hw); + u32 tmp; + + if (parent_rate) + return parent_rate; + + tmp = pmc_read(pmc, AT91_CKGR_MCFR); + if (!(tmp & AT91_PMC_MAINRDY)) + return 0; - return !!(pmc_read(clkmain->pmc, AT91_PMC_SR) & AT91_PMC_MOSCS); + return ((tmp & AT91_PMC_MAINF) * SLOW_CLOCK_FREQ) / MAINF_DIV; } -static unsigned long clk_main_recalc_rate(struct clk_hw *hw, - unsigned long parent_rate) +static int clk_rm9200_main_prepare(struct clk_hw *hw) { - u32 tmp; - struct clk_main *clkmain = to_clk_main(hw); + struct clk_rm9200_main *clkmain = to_clk_rm9200_main(hw); + + return clk_main_probe_frequency(clkmain->pmc); +} + +static int clk_rm9200_main_is_prepared(struct clk_hw *hw) +{ + struct clk_rm9200_main *clkmain = to_clk_rm9200_main(hw); + + return !!(pmc_read(clkmain->pmc, AT91_CKGR_MCFR) & AT91_PMC_MAINRDY); +} + +static unsigned long clk_rm9200_main_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct clk_rm9200_main *clkmain = to_clk_rm9200_main(hw); + + return clk_main_recalc_rate(clkmain->pmc, parent_rate); +} + +static const struct clk_ops rm9200_main_ops = { + .prepare = clk_rm9200_main_prepare, + .is_prepared = clk_rm9200_main_is_prepared, + .recalc_rate = clk_rm9200_main_recalc_rate, +}; + +static struct clk * __init +at91_clk_register_rm9200_main(struct at91_pmc *pmc, + const char *name, + const char *parent_name) +{ + struct clk_rm9200_main *clkmain; + struct clk *clk = NULL; + struct clk_init_data init; + + if (!pmc || !name) + return ERR_PTR(-EINVAL); + + if (!parent_name) + return ERR_PTR(-EINVAL); + + clkmain = kzalloc(sizeof(*clkmain), GFP_KERNEL); + if (!clkmain) + return ERR_PTR(-ENOMEM); + + init.name = name; + init.ops = &rm9200_main_ops; + init.parent_names = &parent_name; + init.num_parents = 1; + init.flags = 0; + + clkmain->hw.init = &init; + clkmain->pmc = pmc; + + clk = clk_register(NULL, &clkmain->hw); + if (IS_ERR(clk)) + kfree(clkmain); + + return clk; +} + +void __init of_at91rm9200_clk_main_setup(struct device_node *np, + struct at91_pmc *pmc) +{ + struct clk *clk; + const char *parent_name; + const char *name = np->name; + + parent_name = of_clk_get_parent_name(np, 0); + of_property_read_string(np, "clock-output-names", &name); + + clk = at91_clk_register_rm9200_main(pmc, name, parent_name); + if (IS_ERR(clk)) + return; + + of_clk_add_provider(np, of_clk_src_simple_get, clk); +} + +static irqreturn_t clk_sam9x5_main_irq_handler(int irq, void *dev_id) +{ + struct clk_sam9x5_main *clkmain = dev_id; + + wake_up(&clkmain->wait); + disable_irq_nosync(clkmain->irq); + + return IRQ_HANDLED; +} + +static int clk_sam9x5_main_prepare(struct clk_hw *hw) +{ + struct clk_sam9x5_main *clkmain = to_clk_sam9x5_main(hw); struct at91_pmc *pmc = clkmain->pmc; - if (clkmain->rate) - return clkmain->rate; + while (!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCSELS)) { + enable_irq(clkmain->irq); + wait_event(clkmain->wait, + pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCSELS); + } + + return clk_main_probe_frequency(pmc); +} - tmp = pmc_read(pmc, AT91_CKGR_MCFR) & AT91_PMC_MAINF; - clkmain->rate = (tmp * parent_rate) / MAINF_DIV; +static int clk_sam9x5_main_is_prepared(struct clk_hw *hw) +{ + struct clk_sam9x5_main *clkmain = to_clk_sam9x5_main(hw); - return clkmain->rate; + return !!(pmc_read(clkmain->pmc, AT91_PMC_SR) & AT91_PMC_MOSCSELS); } -static const struct clk_ops main_ops = { - .prepare = clk_main_prepare, - .is_prepared = clk_main_is_prepared, - .recalc_rate = clk_main_recalc_rate, +static unsigned long clk_sam9x5_main_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct clk_sam9x5_main *clkmain = to_clk_sam9x5_main(hw); + + return clk_main_recalc_rate(clkmain->pmc, parent_rate); +} + +static int clk_sam9x5_main_set_parent(struct clk_hw *hw, u8 index) +{ + struct clk_sam9x5_main *clkmain = to_clk_sam9x5_main(hw); + struct at91_pmc *pmc = clkmain->pmc; + u32 tmp; + + if (index > 1) + return -EINVAL; + + tmp = pmc_read(pmc, AT91_CKGR_MOR) & ~MOR_KEY_MASK; + + if (index && !(tmp & AT91_PMC_MOSCSEL)) + pmc_write(pmc, AT91_CKGR_MOR, tmp | AT91_PMC_MOSCSEL); + else if (!index && (tmp & AT91_PMC_MOSCSEL)) + pmc_write(pmc, AT91_CKGR_MOR, tmp & ~AT91_PMC_MOSCSEL); + + while (!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCSELS)) { + enable_irq(clkmain->irq); + wait_event(clkmain->wait, + pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_MOSCSELS); + } + + return 0; +} + +static u8 clk_sam9x5_main_get_parent(struct clk_hw *hw) +{ + struct clk_sam9x5_main *clkmain = to_clk_sam9x5_main(hw); + + return !!(pmc_read(clkmain->pmc, AT91_CKGR_MOR) & AT91_PMC_MOSCEN); +} + +static const struct clk_ops sam9x5_main_ops = { + .prepare = clk_sam9x5_main_prepare, + .is_prepared = clk_sam9x5_main_is_prepared, + .recalc_rate = clk_sam9x5_main_recalc_rate, + .set_parent = clk_sam9x5_main_set_parent, + .get_parent = clk_sam9x5_main_get_parent, }; static struct clk * __init -at91_clk_register_main(struct at91_pmc *pmc, - unsigned int irq, - const char *name, - const char *parent_name, - unsigned long rate) +at91_clk_register_sam9x5_main(struct at91_pmc *pmc, + unsigned int irq, + const char *name, + const char **parent_names, + int num_parents) { int ret; - struct clk_main *clkmain; + struct clk_sam9x5_main *clkmain; struct clk *clk = NULL; struct clk_init_data init; if (!pmc || !irq || !name) return ERR_PTR(-EINVAL); - if (!rate && !parent_name) + if (!parent_names || !num_parents) return ERR_PTR(-EINVAL); clkmain = kzalloc(sizeof(*clkmain), GFP_KERNEL); @@ -130,19 +577,20 @@ at91_clk_register_main(struct at91_pmc *pmc, return ERR_PTR(-ENOMEM); init.name = name; - init.ops = &main_ops; - init.parent_names = parent_name ? &parent_name : NULL; - init.num_parents = parent_name ? 1 : 0; - init.flags = parent_name ? 0 : CLK_IS_ROOT; + init.ops = &sam9x5_main_ops; + init.parent_names = parent_names; + init.num_parents = num_parents; + init.flags = CLK_SET_PARENT_GATE; clkmain->hw.init = &init; - clkmain->rate = rate; clkmain->pmc = pmc; clkmain->irq = irq; + clkmain->parent = !!(pmc_read(clkmain->pmc, AT91_CKGR_MOR) & + AT91_PMC_MOSCEN); init_waitqueue_head(&clkmain->wait); irq_set_status_flags(clkmain->irq, IRQ_NOAUTOEN); - ret = request_irq(clkmain->irq, clk_main_irq_handler, - IRQF_TRIGGER_HIGH, "clk-main", clkmain); + ret = request_irq(clkmain->irq, clk_sam9x5_main_irq_handler, + IRQF_TRIGGER_HIGH, name, clkmain); if (ret) return ERR_PTR(ret); @@ -155,33 +603,36 @@ at91_clk_register_main(struct at91_pmc *pmc, return clk; } - - -static void __init -of_at91_clk_main_setup(struct device_node *np, struct at91_pmc *pmc) +void __init of_at91sam9x5_clk_main_setup(struct device_node *np, + struct at91_pmc *pmc) { struct clk *clk; + const char *parent_names[2]; + int num_parents; unsigned int irq; - const char *parent_name; const char *name = np->name; - u32 rate = 0; + int i; + + num_parents = of_count_phandle_with_args(np, "clocks", "#clock-cells"); + if (num_parents <= 0 || num_parents > 2) + return; + + for (i = 0; i < num_parents; ++i) { + parent_names[i] = of_clk_get_parent_name(np, i); + if (!parent_names[i]) + return; + } - parent_name = of_clk_get_parent_name(np, 0); of_property_read_string(np, "clock-output-names", &name); - of_property_read_u32(np, "clock-frequency", &rate); + irq = irq_of_parse_and_map(np, 0); if (!irq) return; - clk = at91_clk_register_main(pmc, irq, name, parent_name, rate); + clk = at91_clk_register_sam9x5_main(pmc, irq, name, parent_names, + num_parents); if (IS_ERR(clk)) return; of_clk_add_provider(np, of_clk_src_simple_get, clk); } - -void __init of_at91rm9200_clk_main_setup(struct device_node *np, - struct at91_pmc *pmc) -{ - of_at91_clk_main_setup(np, pmc); -} diff --git a/drivers/clk/at91/clk-slow.c b/drivers/clk/at91/clk-slow.c new file mode 100644 index 000000000000..0300c46ee247 --- /dev/null +++ b/drivers/clk/at91/clk-slow.c @@ -0,0 +1,467 @@ +/* + * drivers/clk/at91/clk-slow.c + * + * Copyright (C) 2013 Boris BREZILLON <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ + +#include <linux/clk-provider.h> +#include <linux/clkdev.h> +#include <linux/clk/at91_pmc.h> +#include <linux/delay.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_irq.h> +#include <linux/io.h> +#include <linux/interrupt.h> +#include <linux/irq.h> +#include <linux/sched.h> +#include <linux/wait.h> + +#include "pmc.h" +#include "sckc.h" + +#define SLOW_CLOCK_FREQ 32768 +#define SLOWCK_SW_CYCLES 5 +#define SLOWCK_SW_TIME_USEC ((SLOWCK_SW_CYCLES * USEC_PER_SEC) / \ + SLOW_CLOCK_FREQ) + +#define AT91_SCKC_CR 0x00 +#define AT91_SCKC_RCEN (1 << 0) +#define AT91_SCKC_OSC32EN (1 << 1) +#define AT91_SCKC_OSC32BYP (1 << 2) +#define AT91_SCKC_OSCSEL (1 << 3) + +struct clk_slow_osc { + struct clk_hw hw; + void __iomem *sckcr; + unsigned long startup_usec; +}; + +#define to_clk_slow_osc(hw) container_of(hw, struct clk_slow_osc, hw) + +struct clk_slow_rc_osc { + struct clk_hw hw; + void __iomem *sckcr; + unsigned long frequency; + unsigned long accuracy; + unsigned long startup_usec; +}; + +#define to_clk_slow_rc_osc(hw) container_of(hw, struct clk_slow_rc_osc, hw) + +struct clk_sam9260_slow { + struct clk_hw hw; + struct at91_pmc *pmc; +}; + +#define to_clk_sam9260_slow(hw) container_of(hw, struct clk_sam9260_slow, hw) + +struct clk_sam9x5_slow { + struct clk_hw hw; + void __iomem *sckcr; + u8 parent; +}; + +#define to_clk_sam9x5_slow(hw) container_of(hw, struct clk_sam9x5_slow, hw) + + +static int clk_slow_osc_prepare(struct clk_hw *hw) +{ + struct clk_slow_osc *osc = to_clk_slow_osc(hw); + void __iomem *sckcr = osc->sckcr; + u32 tmp = readl(sckcr); + + if (tmp & AT91_SCKC_OSC32BYP) + return 0; + + writel(tmp | AT91_SCKC_OSC32EN, sckcr); + + usleep_range(osc->startup_usec, osc->startup_usec + 1); + + return 0; +} + +static void clk_slow_osc_unprepare(struct clk_hw *hw) +{ + struct clk_slow_osc *osc = to_clk_slow_osc(hw); + void __iomem *sckcr = osc->sckcr; + u32 tmp = readl(sckcr); + + if (tmp & AT91_SCKC_OSC32BYP) + return; + + writel(tmp & ~AT91_SCKC_OSC32EN, sckcr); +} + +static int clk_slow_osc_is_prepared(struct clk_hw *hw) +{ + struct clk_slow_osc *osc = to_clk_slow_osc(hw); + void __iomem *sckcr = osc->sckcr; + u32 tmp = readl(sckcr); + + if (tmp & AT91_SCKC_OSC32BYP) + return 1; + + return !!(tmp & AT91_SCKC_OSC32EN); +} + +static const struct clk_ops slow_osc_ops = { + .prepare = clk_slow_osc_prepare, + .unprepare = clk_slow_osc_unprepare, + .is_prepared = clk_slow_osc_is_prepared, +}; + +static struct clk * __init +at91_clk_register_slow_osc(void __iomem *sckcr, + const char *name, + const char *parent_name, + unsigned long startup, + bool bypass) +{ + struct clk_slow_osc *osc; + struct clk *clk = NULL; + struct clk_init_data init; + + if (!sckcr || !name || !parent_name) + return ERR_PTR(-EINVAL); + + osc = kzalloc(sizeof(*osc), GFP_KERNEL); + if (!osc) + return ERR_PTR(-ENOMEM); + + init.name = name; + init.ops = &slow_osc_ops; + init.parent_names = &parent_name; + init.num_parents = 1; + init.flags = CLK_IGNORE_UNUSED; + + osc->hw.init = &init; + osc->sckcr = sckcr; + osc->startup_usec = startup; + + if (bypass) + writel((readl(sckcr) & ~AT91_SCKC_OSC32EN) | AT91_SCKC_OSC32BYP, + sckcr); + + clk = clk_register(NULL, &osc->hw); + if (IS_ERR(clk)) + kfree(osc); + + return clk; +} + +void __init of_at91sam9x5_clk_slow_osc_setup(struct device_node *np, + void __iomem *sckcr) +{ + struct clk *clk; + const char *parent_name; + const char *name = np->name; + u32 startup; + bool bypass; + + parent_name = of_clk_get_parent_name(np, 0); + of_property_read_string(np, "clock-output-names", &name); + of_property_read_u32(np, "atmel,startup-time-usec", &startup); + bypass = of_property_read_bool(np, "atmel,osc-bypass"); + + clk = at91_clk_register_slow_osc(sckcr, name, parent_name, startup, + bypass); + if (IS_ERR(clk)) + return; + + of_clk_add_provider(np, of_clk_src_simple_get, clk); +} + +static unsigned long clk_slow_rc_osc_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw); + + return osc->frequency; +} + +static unsigned long clk_slow_rc_osc_recalc_accuracy(struct clk_hw *hw, + unsigned long parent_acc) +{ + struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw); + + return osc->accuracy; +} + +static int clk_slow_rc_osc_prepare(struct clk_hw *hw) +{ + struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw); + void __iomem *sckcr = osc->sckcr; + + writel(readl(sckcr) | AT91_SCKC_RCEN, sckcr); + + usleep_range(osc->startup_usec, osc->startup_usec + 1); + + return 0; +} + +static void clk_slow_rc_osc_unprepare(struct clk_hw *hw) +{ + struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw); + void __iomem *sckcr = osc->sckcr; + + writel(readl(sckcr) & ~AT91_SCKC_RCEN, sckcr); +} + +static int clk_slow_rc_osc_is_prepared(struct clk_hw *hw) +{ + struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw); + + return !!(readl(osc->sckcr) & AT91_SCKC_RCEN); +} + +static const struct clk_ops slow_rc_osc_ops = { + .prepare = clk_slow_rc_osc_prepare, + .unprepare = clk_slow_rc_osc_unprepare, + .is_prepared = clk_slow_rc_osc_is_prepared, + .recalc_rate = clk_slow_rc_osc_recalc_rate, + .recalc_accuracy = clk_slow_rc_osc_recalc_accuracy, +}; + +static struct clk * __init +at91_clk_register_slow_rc_osc(void __iomem *sckcr, + const char *name, + unsigned long frequency, + unsigned long accuracy, + unsigned long startup) +{ + struct clk_slow_rc_osc *osc; + struct clk *clk = NULL; + struct clk_init_data init; + + if (!sckcr || !name) + return ERR_PTR(-EINVAL); + + osc = kzalloc(sizeof(*osc), GFP_KERNEL); + if (!osc) + return ERR_PTR(-ENOMEM); + + init.name = name; + init.ops = &slow_rc_osc_ops; + init.parent_names = NULL; + init.num_parents = 0; + init.flags = CLK_IS_ROOT | CLK_IGNORE_UNUSED; + + osc->hw.init = &init; + osc->sckcr = sckcr; + osc->frequency = frequency; + osc->accuracy = accuracy; + osc->startup_usec = startup; + + clk = clk_register(NULL, &osc->hw); + if (IS_ERR(clk)) + kfree(osc); + + return clk; +} + +void __init of_at91sam9x5_clk_slow_rc_osc_setup(struct device_node *np, + void __iomem *sckcr) +{ + struct clk *clk; + u32 frequency = 0; + u32 accuracy = 0; + u32 startup = 0; + const char *name = np->name; + + of_property_read_string(np, "clock-output-names", &name); + of_property_read_u32(np, "clock-frequency", &frequency); + of_property_read_u32(np, "clock-accuracy", &accuracy); + of_property_read_u32(np, "atmel,startup-time-usec", &startup); + + clk = at91_clk_register_slow_rc_osc(sckcr, name, frequency, accuracy, + startup); + if (IS_ERR(clk)) + return; + + of_clk_add_provider(np, of_clk_src_simple_get, clk); +} + +static int clk_sam9x5_slow_set_parent(struct clk_hw *hw, u8 index) +{ + struct clk_sam9x5_slow *slowck = to_clk_sam9x5_slow(hw); + void __iomem *sckcr = slowck->sckcr; + u32 tmp; + + if (index > 1) + return -EINVAL; + + tmp = readl(sckcr); + + if ((!index && !(tmp & AT91_SCKC_OSCSEL)) || + (index && (tmp & AT91_SCKC_OSCSEL))) + return 0; + + if (index) + tmp |= AT91_SCKC_OSCSEL; + else + tmp &= ~AT91_SCKC_OSCSEL; + + writel(tmp, sckcr); + + usleep_range(SLOWCK_SW_TIME_USEC, SLOWCK_SW_TIME_USEC + 1); + + return 0; +} + +static u8 clk_sam9x5_slow_get_parent(struct clk_hw *hw) +{ + struct clk_sam9x5_slow *slowck = to_clk_sam9x5_slow(hw); + + return !!(readl(slowck->sckcr) & AT91_SCKC_OSCSEL); +} + +static const struct clk_ops sam9x5_slow_ops = { + .set_parent = clk_sam9x5_slow_set_parent, + .get_parent = clk_sam9x5_slow_get_parent, +}; + +static struct clk * __init +at91_clk_register_sam9x5_slow(void __iomem *sckcr, + const char *name, + const char **parent_names, + int num_parents) +{ + struct clk_sam9x5_slow *slowck; + struct clk *clk = NULL; + struct clk_init_data init; + + if (!sckcr || !name || !parent_names || !num_parents) + return ERR_PTR(-EINVAL); + + slowck = kzalloc(sizeof(*slowck), GFP_KERNEL); + if (!slowck) + return ERR_PTR(-ENOMEM); + + init.name = name; + init.ops = &sam9x5_slow_ops; + init.parent_names = parent_names; + init.num_parents = num_parents; + init.flags = 0; + + slowck->hw.init = &init; + slowck->sckcr = sckcr; + slowck->parent = !!(readl(sckcr) & AT91_SCKC_OSCSEL); + + clk = clk_register(NULL, &slowck->hw); + if (IS_ERR(clk)) + kfree(slowck); + + return clk; +} + +void __init of_at91sam9x5_clk_slow_setup(struct device_node *np, + void __iomem *sckcr) +{ + struct clk *clk; + const char *parent_names[2]; + int num_parents; + const char *name = np->name; + int i; + + num_parents = of_count_phandle_with_args(np, "clocks", "#clock-cells"); + if (num_parents <= 0 || num_parents > 2) + return; + + for (i = 0; i < num_parents; ++i) { + parent_names[i] = of_clk_get_parent_name(np, i); + if (!parent_names[i]) + return; + } + + of_property_read_string(np, "clock-output-names", &name); + + clk = at91_clk_register_sam9x5_slow(sckcr, name, parent_names, + num_parents); + if (IS_ERR(clk)) + return; + + of_clk_add_provider(np, of_clk_src_simple_get, clk); +} + +static u8 clk_sam9260_slow_get_parent(struct clk_hw *hw) +{ + struct clk_sam9260_slow *slowck = to_clk_sam9260_slow(hw); + + return !!(pmc_read(slowck->pmc, AT91_PMC_SR) & AT91_PMC_OSCSEL); +} + +static const struct clk_ops sam9260_slow_ops = { + .get_parent = clk_sam9260_slow_get_parent, +}; + +static struct clk * __init +at91_clk_register_sam9260_slow(struct at91_pmc *pmc, + const char *name, + const char **parent_names, + int num_parents) +{ + struct clk_sam9260_slow *slowck; + struct clk *clk = NULL; + struct clk_init_data init; + + if (!pmc || !name) + return ERR_PTR(-EINVAL); + + if (!parent_names || !num_parents) + return ERR_PTR(-EINVAL); + + slowck = kzalloc(sizeof(*slowck), GFP_KERNEL); + if (!slowck) + return ERR_PTR(-ENOMEM); + + init.name = name; + init.ops = &sam9260_slow_ops; + init.parent_names = parent_names; + init.num_parents = num_parents; + init.flags = 0; + + slowck->hw.init = &init; + slowck->pmc = pmc; + + clk = clk_register(NULL, &slowck->hw); + if (IS_ERR(clk)) + kfree(slowck); + + return clk; +} + +void __init of_at91sam9260_clk_slow_setup(struct device_node *np, + struct at91_pmc *pmc) +{ + struct clk *clk; + const char *parent_names[2]; + int num_parents; + const char *name = np->name; + int i; + + num_parents = of_count_phandle_with_args(np, "clocks", "#clock-cells"); + if (num_parents <= 0 || num_parents > 1) + return; + + for (i = 0; i < num_parents; ++i) { + parent_names[i] = of_clk_get_parent_name(np, i); + if (!parent_names[i]) + return; + } + + of_property_read_string(np, "clock-output-names", &name); + + clk = at91_clk_register_sam9260_slow(pmc, name, parent_names, + num_parents); + if (IS_ERR(clk)) + return; + + of_clk_add_provider(np, of_clk_src_simple_get, clk); +} diff --git a/drivers/clk/at91/pmc.c b/drivers/clk/at91/pmc.c index 6a61477a57e0..524196bb35a5 100644 --- a/drivers/clk/at91/pmc.c +++ b/drivers/clk/at91/pmc.c @@ -229,11 +229,28 @@ out_free_pmc: } static const struct of_device_id pmc_clk_ids[] __initconst = { + /* Slow oscillator */ + { + .compatible = "atmel,at91sam9260-clk-slow", + .data = of_at91sam9260_clk_slow_setup, + }, /* Main clock */ { + .compatible = "atmel,at91rm9200-clk-main-osc", + .data = of_at91rm9200_clk_main_osc_setup, + }, + { + .compatible = "atmel,at91sam9x5-clk-main-rc-osc", + .data = of_at91sam9x5_clk_main_rc_osc_setup, + }, + { .compatible = "atmel,at91rm9200-clk-main", .data = of_at91rm9200_clk_main_setup, }, + { + .compatible = "atmel,at91sam9x5-clk-main", + .data = of_at91sam9x5_clk_main_setup, + }, /* PLL clocks */ { .compatible = "atmel,at91rm9200-clk-pll", diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h index 441350983ccb..6c7625976113 100644 --- a/drivers/clk/at91/pmc.h +++ b/drivers/clk/at91/pmc.h @@ -58,8 +58,17 @@ static inline void pmc_write(struct at91_pmc *pmc, int offset, u32 value) int of_at91_get_clk_range(struct device_node *np, const char *propname, struct clk_range *range); +extern void __init of_at91sam9260_clk_slow_setup(struct device_node *np, + struct at91_pmc *pmc); + +extern void __init of_at91rm9200_clk_main_osc_setup(struct device_node *np, + struct at91_pmc *pmc); +extern void __init of_at91sam9x5_clk_main_rc_osc_setup(struct device_node *np, + struct at91_pmc *pmc); extern void __init of_at91rm9200_clk_main_setup(struct device_node *np, struct at91_pmc *pmc); +extern void __init of_at91sam9x5_clk_main_setup(struct device_node *np, + struct at91_pmc *pmc); extern void __init of_at91rm9200_clk_pll_setup(struct device_node *np, struct at91_pmc *pmc); diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c new file mode 100644 index 000000000000..1184d76a7ab7 --- /dev/null +++ b/drivers/clk/at91/sckc.c @@ -0,0 +1,57 @@ +/* + * drivers/clk/at91/sckc.c + * + * Copyright (C) 2013 Boris BREZILLON <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ + +#include <linux/clk-provider.h> +#include <linux/clkdev.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/io.h> + +#include "sckc.h" + +static const struct of_device_id sckc_clk_ids[] __initconst = { + /* Slow clock */ + { + .compatible = "atmel,at91sam9x5-clk-slow-osc", + .data = of_at91sam9x5_clk_slow_osc_setup, + }, + { + .compatible = "atmel,at91sam9x5-clk-slow-rc-osc", + .data = of_at91sam9x5_clk_slow_rc_osc_setup, + }, + { + .compatible = "atmel,at91sam9x5-clk-slow", + .data = of_at91sam9x5_clk_slow_setup, + }, + { /*sentinel*/ } +}; + +static void __init of_at91sam9x5_sckc_setup(struct device_node *np) +{ + struct device_node *childnp; + void (*clk_setup)(struct device_node *, void __iomem *); + const struct of_device_id *clk_id; + void __iomem *regbase = of_iomap(np, 0); + + if (!regbase) + return; + + for_each_child_of_node(np, childnp) { + clk_id = of_match_node(sckc_clk_ids, childnp); + if (!clk_id) + continue; + clk_setup = clk_id->data; + clk_setup(childnp, regbase); + } +} +CLK_OF_DECLARE(at91sam9x5_clk_sckc, "atmel,at91sam9x5-sckc", + of_at91sam9x5_sckc_setup); diff --git a/drivers/clk/at91/sckc.h b/drivers/clk/at91/sckc.h new file mode 100644 index 000000000000..836fcf59820f --- /dev/null +++ b/drivers/clk/at91/sckc.h @@ -0,0 +1,22 @@ +/* + * drivers/clk/at91/sckc.h + * + * Copyright (C) 2013 Boris BREZILLON <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __AT91_SCKC_H_ +#define __AT91_SCKC_H_ + +extern void __init of_at91sam9x5_clk_slow_osc_setup(struct device_node *np, + void __iomem *sckcr); +extern void __init of_at91sam9x5_clk_slow_rc_osc_setup(struct device_node *np, + void __iomem *sckcr); +extern void __init of_at91sam9x5_clk_slow_setup(struct device_node *np, + void __iomem *sckcr); + +#endif /* __AT91_SCKC_H_ */ diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c index 166e02f16c8a..cc37c342c4cb 100644 --- a/drivers/clk/tegra/clk-tegra124.c +++ b/drivers/clk/tegra/clk-tegra124.c @@ -764,7 +764,6 @@ static struct tegra_clk tegra124_clks[tegra_clk_max] __initdata = { [tegra_clk_sdmmc2_8] = { .dt_id = TEGRA124_CLK_SDMMC2, .present = true }, [tegra_clk_i2s1] = { .dt_id = TEGRA124_CLK_I2S1, .present = true }, [tegra_clk_i2c1] = { .dt_id = TEGRA124_CLK_I2C1, .present = true }, - [tegra_clk_ndflash] = { .dt_id = TEGRA124_CLK_NDFLASH, .present = true }, [tegra_clk_sdmmc1_8] = { .dt_id = TEGRA124_CLK_SDMMC1, .present = true }, [tegra_clk_sdmmc4_8] = { .dt_id = TEGRA124_CLK_SDMMC4, .present = true }, [tegra_clk_pwm] = { .dt_id = TEGRA124_CLK_PWM, .present = true }, @@ -809,7 +808,6 @@ static struct tegra_clk tegra124_clks[tegra_clk_max] __initdata = { [tegra_clk_trace] = { .dt_id = TEGRA124_CLK_TRACE, .present = true }, [tegra_clk_soc_therm] = { .dt_id = TEGRA124_CLK_SOC_THERM, .present = true }, [tegra_clk_dtv] = { .dt_id = TEGRA124_CLK_DTV, .present = true }, - [tegra_clk_ndspeed] = { .dt_id = TEGRA124_CLK_NDSPEED, .present = true }, [tegra_clk_i2cslow] = { .dt_id = TEGRA124_CLK_I2CSLOW, .present = true }, [tegra_clk_dsib] = { .dt_id = TEGRA124_CLK_DSIB, .present = true }, [tegra_clk_tsec] = { .dt_id = TEGRA124_CLK_TSEC, .present = true }, @@ -952,7 +950,6 @@ static struct tegra_clk tegra124_clks[tegra_clk_max] __initdata = { [tegra_clk_clk_out_3_mux] = { .dt_id = TEGRA124_CLK_CLK_OUT_3_MUX, .present = true }, [tegra_clk_dsia_mux] = { .dt_id = TEGRA124_CLK_DSIA_MUX, .present = true }, [tegra_clk_dsib_mux] = { .dt_id = TEGRA124_CLK_DSIB_MUX, .present = true }, - [tegra_clk_uarte] = { .dt_id = TEGRA124_CLK_UARTE, .present = true }, }; static struct tegra_devclk devclks[] __initdata = { diff --git a/drivers/clk/versatile/clk-vexpress-osc.c b/drivers/clk/versatile/clk-vexpress-osc.c index 2dc8b41a339d..422391242b39 100644 --- a/drivers/clk/versatile/clk-vexpress-osc.c +++ b/drivers/clk/versatile/clk-vexpress-osc.c @@ -100,9 +100,11 @@ void __init vexpress_osc_of_setup(struct device_node *node) struct clk *clk; u32 range[2]; + vexpress_sysreg_of_early_init(); + osc = kzalloc(sizeof(*osc), GFP_KERNEL); if (!osc) - goto error; + return; osc->func = vexpress_config_func_get_by_node(node); if (!osc->func) { diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 57e823c44d2a..5163ec13429d 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -66,6 +66,7 @@ static int arch_timer_ppi[MAX_TIMER_PPI]; static struct clock_event_device __percpu *arch_timer_evt; static bool arch_timer_use_virtual = true; +static bool arch_timer_c3stop; static bool arch_timer_mem_use_virtual; /* @@ -263,7 +264,8 @@ static void __arch_timer_setup(unsigned type, clk->features = CLOCK_EVT_FEAT_ONESHOT; if (type == ARCH_CP15_TIMER) { - clk->features |= CLOCK_EVT_FEAT_C3STOP; + if (arch_timer_c3stop) + clk->features |= CLOCK_EVT_FEAT_C3STOP; clk->name = "arch_sys_timer"; clk->rating = 450; clk->cpumask = cpumask_of(smp_processor_id()); @@ -665,6 +667,8 @@ static void __init arch_timer_init(struct device_node *np) } } + arch_timer_c3stop = !of_property_read_bool(np, "always-on"); + arch_timer_register(); arch_timer_common_init(); } diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index a6ee6d7cd63f..acf5a329d538 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -416,8 +416,6 @@ static int exynos4_local_timer_setup(struct clock_event_device *evt) evt->set_mode = exynos4_tick_set_mode; evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; evt->rating = 450; - clockevents_config_and_register(evt, clk_rate / (TICK_BASE_CNT + 1), - 0xf, 0x7fffffff); exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET); @@ -430,9 +428,12 @@ static int exynos4_local_timer_setup(struct clock_event_device *evt) evt->irq); return -EIO; } + irq_force_affinity(mct_irqs[MCT_L0_IRQ + cpu], cpumask_of(cpu)); } else { enable_percpu_irq(mct_irqs[MCT_L0_IRQ], 0); } + clockevents_config_and_register(evt, clk_rate / (TICK_BASE_CNT + 1), + 0xf, 0x7fffffff); return 0; } @@ -450,7 +451,6 @@ static int exynos4_mct_cpu_notify(struct notifier_block *self, unsigned long action, void *hcpu) { struct mct_clock_event_device *mevt; - unsigned int cpu; /* * Grab cpu pointer in each case to avoid spurious @@ -461,12 +461,6 @@ static int exynos4_mct_cpu_notify(struct notifier_block *self, mevt = this_cpu_ptr(&percpu_mct_tick); exynos4_local_timer_setup(&mevt->evt); break; - case CPU_ONLINE: - cpu = (unsigned long)hcpu; - if (mct_int_type == MCT_INT_SPI) - irq_set_affinity(mct_irqs[MCT_L0_IRQ + cpu], - cpumask_of(cpu)); - break; case CPU_DYING: mevt = this_cpu_ptr(&percpu_mct_tick); exynos4_local_timer_stop(&mevt->evt); diff --git a/drivers/clocksource/zevio-timer.c b/drivers/clocksource/zevio-timer.c index ca81809d159d..7ce442148c3f 100644 --- a/drivers/clocksource/zevio-timer.c +++ b/drivers/clocksource/zevio-timer.c @@ -212,4 +212,9 @@ error_free: return ret; } -CLOCKSOURCE_OF_DECLARE(zevio_timer, "lsi,zevio-timer", zevio_timer_add); +static void __init zevio_timer_init(struct device_node *node) +{ + BUG_ON(zevio_timer_add(node)); +} + +CLOCKSOURCE_OF_DECLARE(zevio_timer, "lsi,zevio-timer", zevio_timer_init); diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm index 0e9cce82844b..580503513f0f 100644 --- a/drivers/cpufreq/Kconfig.arm +++ b/drivers/cpufreq/Kconfig.arm @@ -92,11 +92,7 @@ config ARM_EXYNOS_CPU_FREQ_BOOST_SW config ARM_HIGHBANK_CPUFREQ tristate "Calxeda Highbank-based" - depends on ARCH_HIGHBANK - select GENERIC_CPUFREQ_CPU0 - select PM_OPP - select REGULATOR - + depends on ARCH_HIGHBANK && GENERIC_CPUFREQ_CPU0 && REGULATOR default m help This adds the CPUFreq driver for Calxeda Highbank SoC diff --git a/drivers/cpufreq/longhaul.c b/drivers/cpufreq/longhaul.c index d00e5d1abd25..5c4369b5d834 100644 --- a/drivers/cpufreq/longhaul.c +++ b/drivers/cpufreq/longhaul.c @@ -242,7 +242,7 @@ static void do_powersaver(int cx_address, unsigned int mults_index, * Sets a new clock ratio. */ -static void longhaul_setstate(struct cpufreq_policy *policy, +static int longhaul_setstate(struct cpufreq_policy *policy, unsigned int table_index) { unsigned int mults_index; @@ -258,10 +258,12 @@ static void longhaul_setstate(struct cpufreq_policy *policy, /* Safety precautions */ mult = mults[mults_index & 0x1f]; if (mult == -1) - return; + return -EINVAL; + speed = calc_speed(mult); if ((speed > highest_speed) || (speed < lowest_speed)) - return; + return -EINVAL; + /* Voltage transition before frequency transition? */ if (can_scale_voltage && longhaul_index < table_index) dir = 1; @@ -269,8 +271,6 @@ static void longhaul_setstate(struct cpufreq_policy *policy, freqs.old = calc_speed(longhaul_get_cpu_mult()); freqs.new = speed; - cpufreq_freq_transition_begin(policy, &freqs); - pr_debug("Setting to FSB:%dMHz Mult:%d.%dx (%s)\n", fsb, mult/10, mult%10, print_speed(speed/1000)); retry_loop: @@ -385,12 +385,14 @@ retry_loop: goto retry_loop; } } - /* Report true CPU frequency */ - cpufreq_freq_transition_end(policy, &freqs, 0); - if (!bm_timeout) + if (!bm_timeout) { printk(KERN_INFO PFX "Warning: Timeout while waiting for " "idle PCI bus.\n"); + return -EBUSY; + } + + return 0; } /* @@ -631,9 +633,10 @@ static int longhaul_target(struct cpufreq_policy *policy, unsigned int i; unsigned int dir = 0; u8 vid, current_vid; + int retval = 0; if (!can_scale_voltage) - longhaul_setstate(policy, table_index); + retval = longhaul_setstate(policy, table_index); else { /* On test system voltage transitions exceeding single * step up or down were turning motherboard off. Both @@ -648,7 +651,7 @@ static int longhaul_target(struct cpufreq_policy *policy, while (i != table_index) { vid = (longhaul_table[i].driver_data >> 8) & 0x1f; if (vid != current_vid) { - longhaul_setstate(policy, i); + retval = longhaul_setstate(policy, i); current_vid = vid; msleep(200); } @@ -657,10 +660,11 @@ static int longhaul_target(struct cpufreq_policy *policy, else i--; } - longhaul_setstate(policy, table_index); + retval = longhaul_setstate(policy, table_index); } + longhaul_index = table_index; - return 0; + return retval; } @@ -968,7 +972,15 @@ static void __exit longhaul_exit(void) for (i = 0; i < numscales; i++) { if (mults[i] == maxmult) { + struct cpufreq_freqs freqs; + + freqs.old = policy->cur; + freqs.new = longhaul_table[i].frequency; + freqs.flags = 0; + + cpufreq_freq_transition_begin(policy, &freqs); longhaul_setstate(policy, i); + cpufreq_freq_transition_end(policy, &freqs, 0); break; } } diff --git a/drivers/cpufreq/powernow-k6.c b/drivers/cpufreq/powernow-k6.c index 49f120e1bc7b..78904e6ca4a0 100644 --- a/drivers/cpufreq/powernow-k6.c +++ b/drivers/cpufreq/powernow-k6.c @@ -138,22 +138,14 @@ static void powernow_k6_set_cpu_multiplier(unsigned int best_i) static int powernow_k6_target(struct cpufreq_policy *policy, unsigned int best_i) { - struct cpufreq_freqs freqs; if (clock_ratio[best_i].driver_data > max_multiplier) { printk(KERN_ERR PFX "invalid target frequency\n"); return -EINVAL; } - freqs.old = busfreq * powernow_k6_get_cpu_multiplier(); - freqs.new = busfreq * clock_ratio[best_i].driver_data; - - cpufreq_freq_transition_begin(policy, &freqs); - powernow_k6_set_cpu_multiplier(best_i); - cpufreq_freq_transition_end(policy, &freqs, 0); - return 0; } @@ -227,9 +219,20 @@ have_busfreq: static int powernow_k6_cpu_exit(struct cpufreq_policy *policy) { unsigned int i; - for (i = 0; i < 8; i++) { - if (i == max_multiplier) + + for (i = 0; (clock_ratio[i].frequency != CPUFREQ_TABLE_END); i++) { + if (clock_ratio[i].driver_data == max_multiplier) { + struct cpufreq_freqs freqs; + + freqs.old = policy->cur; + freqs.new = clock_ratio[i].frequency; + freqs.flags = 0; + + cpufreq_freq_transition_begin(policy, &freqs); powernow_k6_target(policy, i); + cpufreq_freq_transition_end(policy, &freqs, 0); + break; + } } return 0; } diff --git a/drivers/cpufreq/powernow-k7.c b/drivers/cpufreq/powernow-k7.c index f911645c3f6d..e61e224475ad 100644 --- a/drivers/cpufreq/powernow-k7.c +++ b/drivers/cpufreq/powernow-k7.c @@ -269,8 +269,6 @@ static int powernow_target(struct cpufreq_policy *policy, unsigned int index) freqs.new = powernow_table[index].frequency; - cpufreq_freq_transition_begin(policy, &freqs); - /* Now do the magic poking into the MSRs. */ if (have_a0 == 1) /* A0 errata 5 */ @@ -290,8 +288,6 @@ static int powernow_target(struct cpufreq_policy *policy, unsigned int index) if (have_a0 == 1) local_irq_enable(); - cpufreq_freq_transition_end(policy, &freqs, 0); - return 0; } diff --git a/drivers/cpufreq/powernv-cpufreq.c b/drivers/cpufreq/powernv-cpufreq.c index 9edccc63245d..af4968813e76 100644 --- a/drivers/cpufreq/powernv-cpufreq.c +++ b/drivers/cpufreq/powernv-cpufreq.c @@ -29,6 +29,7 @@ #include <asm/cputhreads.h> #include <asm/reg.h> +#include <asm/smp.h> /* Required for cpu_sibling_mask() in UP configs */ #define POWERNV_MAX_PSTATES 256 diff --git a/drivers/cpufreq/ppc-corenet-cpufreq.c b/drivers/cpufreq/ppc-corenet-cpufreq.c index b7e677be1df0..0af618abebaf 100644 --- a/drivers/cpufreq/ppc-corenet-cpufreq.c +++ b/drivers/cpufreq/ppc-corenet-cpufreq.c @@ -138,6 +138,7 @@ static int corenet_cpufreq_cpu_init(struct cpufreq_policy *policy) struct cpufreq_frequency_table *table; struct cpu_data *data; unsigned int cpu = policy->cpu; + u64 transition_latency_hz; np = of_get_cpu_node(cpu, NULL); if (!np) @@ -205,8 +206,10 @@ static int corenet_cpufreq_cpu_init(struct cpufreq_policy *policy) for_each_cpu(i, per_cpu(cpu_mask, cpu)) per_cpu(cpu_data, i) = data; + transition_latency_hz = 12ULL * NSEC_PER_SEC; policy->cpuinfo.transition_latency = - (12 * NSEC_PER_SEC) / fsl_get_sys_freq(); + do_div(transition_latency_hz, fsl_get_sys_freq()); + of_node_put(np); return 0; diff --git a/drivers/cpufreq/unicore2-cpufreq.c b/drivers/cpufreq/unicore2-cpufreq.c index 8d045afa7fb4..6f9dfa80563a 100644 --- a/drivers/cpufreq/unicore2-cpufreq.c +++ b/drivers/cpufreq/unicore2-cpufreq.c @@ -60,9 +60,7 @@ static int __init ucv2_cpu_init(struct cpufreq_policy *policy) policy->max = policy->cpuinfo.max_freq = 1000000; policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; policy->clk = clk_get(NULL, "MAIN_CLK"); - if (IS_ERR(policy->clk)) - return PTR_ERR(policy->clk); - return 0; + return PTR_ERR_OR_ZERO(policy->clk); } static struct cpufreq_driver ucv2_driver = { diff --git a/drivers/gpio/gpiolib-acpi.c b/drivers/gpio/gpiolib-acpi.c index bf0f8b476696..401add28933f 100644 --- a/drivers/gpio/gpiolib-acpi.c +++ b/drivers/gpio/gpiolib-acpi.c @@ -233,7 +233,7 @@ static void acpi_gpiochip_request_interrupts(struct acpi_gpio_chip *acpi_gpio) { struct gpio_chip *chip = acpi_gpio->chip; - if (!chip->dev || !chip->to_irq) + if (!chip->to_irq) return; INIT_LIST_HEAD(&acpi_gpio->events); @@ -253,7 +253,7 @@ static void acpi_gpiochip_free_interrupts(struct acpi_gpio_chip *acpi_gpio) struct acpi_gpio_event *event, *ep; struct gpio_chip *chip = acpi_gpio->chip; - if (!chip->dev || !chip->to_irq) + if (!chip->to_irq) return; list_for_each_entry_safe_reverse(event, ep, &acpi_gpio->events, node) { @@ -451,7 +451,7 @@ acpi_gpio_adr_space_handler(u32 function, acpi_physical_address address, if (function == ACPI_WRITE) gpiod_set_raw_value(desc, !!((1 << i) & *value)); else - *value |= gpiod_get_raw_value(desc) << i; + *value |= (u64)gpiod_get_raw_value(desc) << i; } out: @@ -501,6 +501,9 @@ void acpi_gpiochip_add(struct gpio_chip *chip) acpi_handle handle; acpi_status status; + if (!chip || !chip->dev) + return; + handle = ACPI_HANDLE(chip->dev); if (!handle) return; @@ -531,6 +534,9 @@ void acpi_gpiochip_remove(struct gpio_chip *chip) acpi_handle handle; acpi_status status; + if (!chip || !chip->dev) + return; + handle = ACPI_HANDLE(chip->dev); if (!handle) return; diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 761013f8b82f..f48817d97480 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -1387,8 +1387,8 @@ static int gpiochip_irq_map(struct irq_domain *d, unsigned int irq, { struct gpio_chip *chip = d->host_data; - irq_set_chip_and_handler(irq, chip->irqchip, chip->irq_handler); irq_set_chip_data(irq, chip); + irq_set_chip_and_handler(irq, chip->irqchip, chip->irq_handler); #ifdef CONFIG_ARM set_irq_flags(irq, IRQF_VALID); #else diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c b/drivers/gpu/drm/exynos/exynos_drm_crtc.c index e930d4fe29c7..1ef5ab9c9d51 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c +++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c @@ -145,6 +145,7 @@ exynos_drm_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode, plane->crtc = crtc; plane->fb = crtc->primary->fb; + drm_framebuffer_reference(plane->fb); return 0; } diff --git a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c index c786cd4f457b..2a3ad24276f8 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c @@ -263,7 +263,7 @@ struct drm_gem_object *exynos_dmabuf_prime_import(struct drm_device *drm_dev, buffer->sgt = sgt; exynos_gem_obj->base.import_attach = attach; - DRM_DEBUG_PRIME("dma_addr = 0x%x, size = 0x%lx\n", buffer->dma_addr, + DRM_DEBUG_PRIME("dma_addr = %pad, size = 0x%lx\n", &buffer->dma_addr, buffer->size); return &exynos_gem_obj->base; diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index eb73e3bf2a0c..4ac438187568 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -1426,9 +1426,9 @@ static int exynos_dsi_probe(struct platform_device *pdev) res = platform_get_resource(pdev, IORESOURCE_MEM, 0); dsi->reg_base = devm_ioremap_resource(&pdev->dev, res); - if (!dsi->reg_base) { + if (IS_ERR(dsi->reg_base)) { dev_err(&pdev->dev, "failed to remap io region\n"); - return -EADDRNOTAVAIL; + return PTR_ERR(dsi->reg_base); } dsi->phy = devm_phy_get(&pdev->dev, "dsim"); diff --git a/drivers/gpu/drm/exynos/exynos_drm_vidi.c b/drivers/gpu/drm/exynos/exynos_drm_vidi.c index 7afead9c3f30..852f2dadaebd 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_vidi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_vidi.c @@ -220,7 +220,7 @@ static void vidi_win_commit(struct exynos_drm_manager *mgr, int zpos) win_data->enabled = true; - DRM_DEBUG_KMS("dma_addr = 0x%x\n", win_data->dma_addr); + DRM_DEBUG_KMS("dma_addr = %pad\n", &win_data->dma_addr); if (ctx->vblank_on) schedule_work(&ctx->work); diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index ab5e93c30aa2..62a5c3627b90 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -50,7 +50,7 @@ bool intel_enable_ppgtt(struct drm_device *dev, bool full) /* Full ppgtt disabled by default for now due to issues. */ if (full) - return false; /* HAS_PPGTT(dev) */ + return HAS_PPGTT(dev) && (i915.enable_ppgtt == 2); else return HAS_ALIASING_PPGTT(dev); } diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 7753249b3a95..f98ba4e6e70b 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -1362,10 +1362,20 @@ static inline void intel_hpd_irq_handler(struct drm_device *dev, spin_lock(&dev_priv->irq_lock); for (i = 1; i < HPD_NUM_PINS; i++) { - WARN_ONCE(hpd[i] & hotplug_trigger && - dev_priv->hpd_stats[i].hpd_mark == HPD_DISABLED, - "Received HPD interrupt (0x%08x) on pin %d (0x%08x) although disabled\n", - hotplug_trigger, i, hpd[i]); + if (hpd[i] & hotplug_trigger && + dev_priv->hpd_stats[i].hpd_mark == HPD_DISABLED) { + /* + * On GMCH platforms the interrupt mask bits only + * prevent irq generation, not the setting of the + * hotplug bits itself. So only WARN about unexpected + * interrupts on saner platforms. + */ + WARN_ONCE(INTEL_INFO(dev)->gen >= 5 && !IS_VALLEYVIEW(dev), + "Received HPD interrupt (0x%08x) on pin %d (0x%08x) although disabled\n", + hotplug_trigger, i, hpd[i]); + + continue; + } if (!(hpd[i] & hotplug_trigger) || dev_priv->hpd_stats[i].hpd_mark != HPD_ENABLED) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 9f5b18d9d885..c77af69c2d8f 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -827,6 +827,7 @@ enum punit_power_well { # define MI_FLUSH_ENABLE (1 << 12) # define ASYNC_FLIP_PERF_DISABLE (1 << 14) # define MODE_IDLE (1 << 9) +# define STOP_RING (1 << 8) #define GEN6_GT_MODE 0x20d0 #define GEN7_GT_MODE 0x7008 diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index dae976f51d83..69bcc42a0e44 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -9654,11 +9654,22 @@ intel_pipe_config_compare(struct drm_device *dev, PIPE_CONF_CHECK_I(pipe_src_w); PIPE_CONF_CHECK_I(pipe_src_h); - PIPE_CONF_CHECK_I(gmch_pfit.control); - /* pfit ratios are autocomputed by the hw on gen4+ */ - if (INTEL_INFO(dev)->gen < 4) - PIPE_CONF_CHECK_I(gmch_pfit.pgm_ratios); - PIPE_CONF_CHECK_I(gmch_pfit.lvds_border_bits); + /* + * FIXME: BIOS likes to set up a cloned config with lvds+external + * screen. Since we don't yet re-compute the pipe config when moving + * just the lvds port away to another pipe the sw tracking won't match. + * + * Proper atomic modesets with recomputed global state will fix this. + * Until then just don't check gmch state for inherited modes. + */ + if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_INHERITED_MODE)) { + PIPE_CONF_CHECK_I(gmch_pfit.control); + /* pfit ratios are autocomputed by the hw on gen4+ */ + if (INTEL_INFO(dev)->gen < 4) + PIPE_CONF_CHECK_I(gmch_pfit.pgm_ratios); + PIPE_CONF_CHECK_I(gmch_pfit.lvds_border_bits); + } + PIPE_CONF_CHECK_I(pch_pfit.enabled); if (current_config->pch_pfit.enabled) { PIPE_CONF_CHECK_I(pch_pfit.pos); @@ -11616,6 +11627,8 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) base.head) { memset(&crtc->config, 0, sizeof(crtc->config)); + crtc->config.quirks |= PIPE_CONFIG_QUIRK_INHERITED_MODE; + crtc->active = dev_priv->display.get_pipe_config(crtc, &crtc->config); diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index d2a55884ad52..dfa85289f28f 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -3619,7 +3619,8 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp, { struct drm_connector *connector = &intel_connector->base; struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); - struct drm_device *dev = intel_dig_port->base.base.dev; + struct intel_encoder *intel_encoder = &intel_dig_port->base; + struct drm_device *dev = intel_encoder->base.dev; struct drm_i915_private *dev_priv = dev->dev_private; struct drm_display_mode *fixed_mode = NULL; bool has_dpcd; @@ -3629,6 +3630,14 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp, if (!is_edp(intel_dp)) return true; + /* The VDD bit needs a power domain reference, so if the bit is already + * enabled when we boot, grab this reference. */ + if (edp_have_panel_vdd(intel_dp)) { + enum intel_display_power_domain power_domain; + power_domain = intel_display_port_power_domain(intel_encoder); + intel_display_power_get(dev_priv, power_domain); + } + /* Cache DPCD and EDID for edp. */ intel_edp_panel_vdd_on(intel_dp); has_dpcd = intel_dp_get_dpcd(intel_dp); diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 0542de982260..328b1a70264b 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -236,7 +236,8 @@ struct intel_crtc_config { * tracked with quirk flags so that fastboot and state checker can act * accordingly. */ -#define PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS (1<<0) /* unreliable sync mode.flags */ +#define PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS (1<<0) /* unreliable sync mode.flags */ +#define PIPE_CONFIG_QUIRK_INHERITED_MODE (1<<1) /* mode inherited from firmware */ unsigned long quirks; /* User requested mode, only valid as a starting point to diff --git a/drivers/gpu/drm/i915/intel_fbdev.c b/drivers/gpu/drm/i915/intel_fbdev.c index b4d44e62f0c7..fce4a0d93c0b 100644 --- a/drivers/gpu/drm/i915/intel_fbdev.c +++ b/drivers/gpu/drm/i915/intel_fbdev.c @@ -132,6 +132,16 @@ static int intelfb_create(struct drm_fb_helper *helper, mutex_lock(&dev->struct_mutex); + if (intel_fb && + (sizes->fb_width > intel_fb->base.width || + sizes->fb_height > intel_fb->base.height)) { + DRM_DEBUG_KMS("BIOS fb too small (%dx%d), we require (%dx%d)," + " releasing it\n", + intel_fb->base.width, intel_fb->base.height, + sizes->fb_width, sizes->fb_height); + drm_framebuffer_unreference(&intel_fb->base); + intel_fb = ifbdev->fb = NULL; + } if (!intel_fb || WARN_ON(!intel_fb->obj)) { DRM_DEBUG_KMS("no BIOS fb, allocating a new one\n"); ret = intelfb_alloc(helper, sizes); diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index b0413e190625..157267aa3561 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -821,11 +821,11 @@ static void intel_disable_hdmi(struct intel_encoder *encoder) } } -static int hdmi_portclock_limit(struct intel_hdmi *hdmi) +static int hdmi_portclock_limit(struct intel_hdmi *hdmi, bool respect_dvi_limit) { struct drm_device *dev = intel_hdmi_to_dev(hdmi); - if (!hdmi->has_hdmi_sink || IS_G4X(dev)) + if ((respect_dvi_limit && !hdmi->has_hdmi_sink) || IS_G4X(dev)) return 165000; else if (IS_HASWELL(dev) || INTEL_INFO(dev)->gen >= 8) return 300000; @@ -837,7 +837,8 @@ static enum drm_mode_status intel_hdmi_mode_valid(struct drm_connector *connector, struct drm_display_mode *mode) { - if (mode->clock > hdmi_portclock_limit(intel_attached_hdmi(connector))) + if (mode->clock > hdmi_portclock_limit(intel_attached_hdmi(connector), + true)) return MODE_CLOCK_HIGH; if (mode->clock < 20000) return MODE_CLOCK_LOW; @@ -879,7 +880,7 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder, struct drm_device *dev = encoder->base.dev; struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; int clock_12bpc = pipe_config->adjusted_mode.crtc_clock * 3 / 2; - int portclock_limit = hdmi_portclock_limit(intel_hdmi); + int portclock_limit = hdmi_portclock_limit(intel_hdmi, false); int desired_bpp; if (intel_hdmi->color_range_auto) { diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 6bc68bdcf433..79fb4cc2137c 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -437,32 +437,41 @@ static void ring_setup_phys_status_page(struct intel_ring_buffer *ring) I915_WRITE(HWS_PGA, addr); } -static int init_ring_common(struct intel_ring_buffer *ring) +static bool stop_ring(struct intel_ring_buffer *ring) { - struct drm_device *dev = ring->dev; - struct drm_i915_private *dev_priv = dev->dev_private; - struct drm_i915_gem_object *obj = ring->obj; - int ret = 0; - u32 head; + struct drm_i915_private *dev_priv = to_i915(ring->dev); - gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL); + if (!IS_GEN2(ring->dev)) { + I915_WRITE_MODE(ring, _MASKED_BIT_ENABLE(STOP_RING)); + if (wait_for_atomic((I915_READ_MODE(ring) & MODE_IDLE) != 0, 1000)) { + DRM_ERROR("%s :timed out trying to stop ring\n", ring->name); + return false; + } + } - /* Stop the ring if it's running. */ I915_WRITE_CTL(ring, 0); I915_WRITE_HEAD(ring, 0); ring->write_tail(ring, 0); - if (wait_for_atomic((I915_READ_MODE(ring) & MODE_IDLE) != 0, 1000)) - DRM_ERROR("%s :timed out trying to stop ring\n", ring->name); - if (I915_NEED_GFX_HWS(dev)) - intel_ring_setup_status_page(ring); - else - ring_setup_phys_status_page(ring); + if (!IS_GEN2(ring->dev)) { + (void)I915_READ_CTL(ring); + I915_WRITE_MODE(ring, _MASKED_BIT_DISABLE(STOP_RING)); + } - head = I915_READ_HEAD(ring) & HEAD_ADDR; + return (I915_READ_HEAD(ring) & HEAD_ADDR) == 0; +} - /* G45 ring initialization fails to reset head to zero */ - if (head != 0) { +static int init_ring_common(struct intel_ring_buffer *ring) +{ + struct drm_device *dev = ring->dev; + struct drm_i915_private *dev_priv = dev->dev_private; + struct drm_i915_gem_object *obj = ring->obj; + int ret = 0; + + gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL); + + if (!stop_ring(ring)) { + /* G45 ring initialization often fails to reset head to zero */ DRM_DEBUG_KMS("%s head not reset to zero " "ctl %08x head %08x tail %08x start %08x\n", ring->name, @@ -471,9 +480,7 @@ static int init_ring_common(struct intel_ring_buffer *ring) I915_READ_TAIL(ring), I915_READ_START(ring)); - I915_WRITE_HEAD(ring, 0); - - if (I915_READ_HEAD(ring) & HEAD_ADDR) { + if (!stop_ring(ring)) { DRM_ERROR("failed to set %s head to zero " "ctl %08x head %08x tail %08x start %08x\n", ring->name, @@ -481,9 +488,16 @@ static int init_ring_common(struct intel_ring_buffer *ring) I915_READ_HEAD(ring), I915_READ_TAIL(ring), I915_READ_START(ring)); + ret = -EIO; + goto out; } } + if (I915_NEED_GFX_HWS(dev)) + intel_ring_setup_status_page(ring); + else + ring_setup_phys_status_page(ring); + /* Initialize the ring. This must happen _after_ we've cleared the ring * registers with the above sequence (the readback of the HEAD registers * also enforces ordering), otherwise the hw might lose the new ring diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index 270a6a973438..2b91c4b4d34b 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -34,6 +34,7 @@ struct intel_hw_status_page { #define I915_WRITE_IMR(ring, val) I915_WRITE(RING_IMR((ring)->mmio_base), val) #define I915_READ_MODE(ring) I915_READ(RING_MI_MODE((ring)->mmio_base)) +#define I915_WRITE_MODE(ring, val) I915_WRITE(RING_MI_MODE((ring)->mmio_base), val) enum intel_ring_hangcheck_action { HANGCHECK_IDLE = 0, diff --git a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c index 3e6c0f3ed592..ef9957dbac94 100644 --- a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c +++ b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c @@ -510,9 +510,8 @@ static void update_cursor(struct drm_crtc *crtc) MDP4_DMA_CURSOR_BLEND_CONFIG_CURSOR_EN); } else { /* disable cursor: */ - mdp4_write(mdp4_kms, REG_MDP4_DMA_CURSOR_BASE(dma), 0); - mdp4_write(mdp4_kms, REG_MDP4_DMA_CURSOR_BLEND_CONFIG(dma), - MDP4_DMA_CURSOR_BLEND_CONFIG_FORMAT(CURSOR_ARGB)); + mdp4_write(mdp4_kms, REG_MDP4_DMA_CURSOR_BASE(dma), + mdp4_kms->blank_cursor_iova); } /* and drop the iova ref + obj rev when done scanning out: */ @@ -574,11 +573,9 @@ static int mdp4_crtc_cursor_set(struct drm_crtc *crtc, if (old_bo) { /* drop our previous reference: */ - msm_gem_put_iova(old_bo, mdp4_kms->id); - drm_gem_object_unreference_unlocked(old_bo); + drm_flip_work_queue(&mdp4_crtc->unref_cursor_work, old_bo); } - crtc_flush(crtc); request_pending(crtc, PENDING_CURSOR); return 0; diff --git a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_irq.c b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_irq.c index c740ccd1cc67..8edd531cb621 100644 --- a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_irq.c +++ b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_irq.c @@ -70,12 +70,12 @@ irqreturn_t mdp4_irq(struct msm_kms *kms) VERB("status=%08x", status); + mdp_dispatch_irqs(mdp_kms, status); + for (id = 0; id < priv->num_crtcs; id++) if (status & mdp4_crtc_vblank(priv->crtcs[id])) drm_handle_vblank(dev, id); - mdp_dispatch_irqs(mdp_kms, status); - return IRQ_HANDLED; } diff --git a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c index 272e707c9487..0bb4faa17523 100644 --- a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c +++ b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c @@ -144,6 +144,10 @@ static void mdp4_preclose(struct msm_kms *kms, struct drm_file *file) static void mdp4_destroy(struct msm_kms *kms) { struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms)); + if (mdp4_kms->blank_cursor_iova) + msm_gem_put_iova(mdp4_kms->blank_cursor_bo, mdp4_kms->id); + if (mdp4_kms->blank_cursor_bo) + drm_gem_object_unreference(mdp4_kms->blank_cursor_bo); kfree(mdp4_kms); } @@ -372,6 +376,23 @@ struct msm_kms *mdp4_kms_init(struct drm_device *dev) goto fail; } + mutex_lock(&dev->struct_mutex); + mdp4_kms->blank_cursor_bo = msm_gem_new(dev, SZ_16K, MSM_BO_WC); + mutex_unlock(&dev->struct_mutex); + if (IS_ERR(mdp4_kms->blank_cursor_bo)) { + ret = PTR_ERR(mdp4_kms->blank_cursor_bo); + dev_err(dev->dev, "could not allocate blank-cursor bo: %d\n", ret); + mdp4_kms->blank_cursor_bo = NULL; + goto fail; + } + + ret = msm_gem_get_iova(mdp4_kms->blank_cursor_bo, mdp4_kms->id, + &mdp4_kms->blank_cursor_iova); + if (ret) { + dev_err(dev->dev, "could not pin blank-cursor bo: %d\n", ret); + goto fail; + } + return kms; fail: diff --git a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.h b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.h index 66a4d31aec80..715520c54cde 100644 --- a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.h +++ b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.h @@ -44,6 +44,10 @@ struct mdp4_kms { struct clk *lut_clk; struct mdp_irq error_handler; + + /* empty/blank cursor bo to use when cursor is "disabled" */ + struct drm_gem_object *blank_cursor_bo; + uint32_t blank_cursor_iova; }; #define to_mdp4_kms(x) container_of(x, struct mdp4_kms, base) diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_irq.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_irq.c index 353d494a497f..f2b985bc2adf 100644 --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_irq.c +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_irq.c @@ -71,11 +71,11 @@ static void mdp5_irq_mdp(struct mdp_kms *mdp_kms) VERB("status=%08x", status); + mdp_dispatch_irqs(mdp_kms, status); + for (id = 0; id < priv->num_crtcs; id++) if (status & mdp5_crtc_vblank(priv->crtcs[id])) drm_handle_vblank(dev, id); - - mdp_dispatch_irqs(mdp_kms, status); } irqreturn_t mdp5_irq(struct msm_kms *kms) diff --git a/drivers/gpu/drm/msm/msm_fbdev.c b/drivers/gpu/drm/msm/msm_fbdev.c index 6c6d7d4c9b4e..a752ab83b810 100644 --- a/drivers/gpu/drm/msm/msm_fbdev.c +++ b/drivers/gpu/drm/msm/msm_fbdev.c @@ -62,11 +62,8 @@ static int msm_fbdev_create(struct drm_fb_helper *helper, dma_addr_t paddr; int ret, size; - /* only doing ARGB32 since this is what is needed to alpha-blend - * with video overlays: - */ sizes->surface_bpp = 32; - sizes->surface_depth = 32; + sizes->surface_depth = 24; DBG("create fbdev: %dx%d@%d (%dx%d)", sizes->surface_width, sizes->surface_height, sizes->surface_bpp, diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c index 3da8264d3039..bb8026daebc9 100644 --- a/drivers/gpu/drm/msm/msm_gem.c +++ b/drivers/gpu/drm/msm/msm_gem.c @@ -118,8 +118,10 @@ static void put_pages(struct drm_gem_object *obj) if (iommu_present(&platform_bus_type)) drm_gem_put_pages(obj, msm_obj->pages, true, false); - else + else { drm_mm_remove_node(msm_obj->vram_node); + drm_free_large(msm_obj->pages); + } msm_obj->pages = NULL; } diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c index 15936524f226..bc0119fb6c12 100644 --- a/drivers/gpu/drm/radeon/atombios_dp.c +++ b/drivers/gpu/drm/radeon/atombios_dp.c @@ -209,6 +209,7 @@ void radeon_dp_aux_init(struct radeon_connector *radeon_connector) { int ret; + radeon_connector->ddc_bus->rec.hpd = radeon_connector->hpd.hpd; radeon_connector->ddc_bus->aux.dev = radeon_connector->base.kdev; radeon_connector->ddc_bus->aux.transfer = radeon_dp_aux_transfer; ret = drm_dp_aux_register_i2c_bus(&radeon_connector->ddc_bus->aux); diff --git a/drivers/gpu/drm/radeon/cik_sdma.c b/drivers/gpu/drm/radeon/cik_sdma.c index 89b4afa5041c..f7e46cf682af 100644 --- a/drivers/gpu/drm/radeon/cik_sdma.c +++ b/drivers/gpu/drm/radeon/cik_sdma.c @@ -597,7 +597,7 @@ int cik_sdma_ring_test(struct radeon_device *rdev, tmp = 0xCAFEDEAD; writel(tmp, ptr); - r = radeon_ring_lock(rdev, ring, 4); + r = radeon_ring_lock(rdev, ring, 5); if (r) { DRM_ERROR("radeon: dma failed to lock ring %d (%d).\n", ring->idx, r); return r; diff --git a/drivers/gpu/drm/radeon/r600_dpm.c b/drivers/gpu/drm/radeon/r600_dpm.c index cbf7e3269f84..9c61b74ef441 100644 --- a/drivers/gpu/drm/radeon/r600_dpm.c +++ b/drivers/gpu/drm/radeon/r600_dpm.c @@ -158,16 +158,18 @@ u32 r600_dpm_get_vblank_time(struct radeon_device *rdev) u32 line_time_us, vblank_lines; u32 vblank_time_us = 0xffffffff; /* if the displays are off, vblank time is max */ - list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { - radeon_crtc = to_radeon_crtc(crtc); - if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) { - line_time_us = (radeon_crtc->hw_mode.crtc_htotal * 1000) / - radeon_crtc->hw_mode.clock; - vblank_lines = radeon_crtc->hw_mode.crtc_vblank_end - - radeon_crtc->hw_mode.crtc_vdisplay + - (radeon_crtc->v_border * 2); - vblank_time_us = vblank_lines * line_time_us; - break; + if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) { + list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { + radeon_crtc = to_radeon_crtc(crtc); + if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) { + line_time_us = (radeon_crtc->hw_mode.crtc_htotal * 1000) / + radeon_crtc->hw_mode.clock; + vblank_lines = radeon_crtc->hw_mode.crtc_vblank_end - + radeon_crtc->hw_mode.crtc_vdisplay + + (radeon_crtc->v_border * 2); + vblank_time_us = vblank_lines * line_time_us; + break; + } } } @@ -181,14 +183,15 @@ u32 r600_dpm_get_vrefresh(struct radeon_device *rdev) struct radeon_crtc *radeon_crtc; u32 vrefresh = 0; - list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { - radeon_crtc = to_radeon_crtc(crtc); - if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) { - vrefresh = radeon_crtc->hw_mode.vrefresh; - break; + if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) { + list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { + radeon_crtc = to_radeon_crtc(crtc); + if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) { + vrefresh = radeon_crtc->hw_mode.vrefresh; + break; + } } } - return vrefresh; } diff --git a/drivers/gpu/drm/radeon/radeon_atpx_handler.c b/drivers/gpu/drm/radeon/radeon_atpx_handler.c index dedea72f48c4..a9fb0d016d38 100644 --- a/drivers/gpu/drm/radeon/radeon_atpx_handler.c +++ b/drivers/gpu/drm/radeon/radeon_atpx_handler.c @@ -528,6 +528,13 @@ static bool radeon_atpx_detect(void) has_atpx |= (radeon_atpx_pci_probe_handle(pdev) == true); } + /* some newer PX laptops mark the dGPU as a non-VGA display device */ + while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_OTHER << 8, pdev)) != NULL) { + vga_count++; + + has_atpx |= (radeon_atpx_pci_probe_handle(pdev) == true); + } + if (has_atpx && vga_count == 2) { acpi_get_name(radeon_atpx_priv.atpx.handle, ACPI_FULL_PATHNAME, &buffer); printk(KERN_INFO "VGA switcheroo: detected switching method %s handle\n", diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index 2f7cbb901fb1..8d99d5ee8014 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c @@ -840,6 +840,38 @@ static void avivo_reduce_ratio(unsigned *nom, unsigned *den, } /** + * avivo_get_fb_ref_div - feedback and ref divider calculation + * + * @nom: nominator + * @den: denominator + * @post_div: post divider + * @fb_div_max: feedback divider maximum + * @ref_div_max: reference divider maximum + * @fb_div: resulting feedback divider + * @ref_div: resulting reference divider + * + * Calculate feedback and reference divider for a given post divider. Makes + * sure we stay within the limits. + */ +static void avivo_get_fb_ref_div(unsigned nom, unsigned den, unsigned post_div, + unsigned fb_div_max, unsigned ref_div_max, + unsigned *fb_div, unsigned *ref_div) +{ + /* limit reference * post divider to a maximum */ + ref_div_max = min(210 / post_div, ref_div_max); + + /* get matching reference and feedback divider */ + *ref_div = min(max(DIV_ROUND_CLOSEST(den, post_div), 1u), ref_div_max); + *fb_div = DIV_ROUND_CLOSEST(nom * *ref_div * post_div, den); + + /* limit fb divider to its maximum */ + if (*fb_div > fb_div_max) { + *ref_div = DIV_ROUND_CLOSEST(*ref_div * fb_div_max, *fb_div); + *fb_div = fb_div_max; + } +} + +/** * radeon_compute_pll_avivo - compute PLL paramaters * * @pll: information about the PLL @@ -860,6 +892,9 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll, u32 *ref_div_p, u32 *post_div_p) { + unsigned target_clock = pll->flags & RADEON_PLL_USE_FRAC_FB_DIV ? + freq : freq / 10; + unsigned fb_div_min, fb_div_max, fb_div; unsigned post_div_min, post_div_max, post_div; unsigned ref_div_min, ref_div_max, ref_div; @@ -880,14 +915,18 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll, ref_div_min = pll->reference_div; else ref_div_min = pll->min_ref_div; - ref_div_max = pll->max_ref_div; + + if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV && + pll->flags & RADEON_PLL_USE_REF_DIV) + ref_div_max = pll->reference_div; + else + ref_div_max = pll->max_ref_div; /* determine allowed post divider range */ if (pll->flags & RADEON_PLL_USE_POST_DIV) { post_div_min = pll->post_div; post_div_max = pll->post_div; } else { - unsigned target_clock = freq / 10; unsigned vco_min, vco_max; if (pll->flags & RADEON_PLL_IS_LCD) { @@ -898,6 +937,11 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll, vco_max = pll->pll_out_max; } + if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV) { + vco_min *= 10; + vco_max *= 10; + } + post_div_min = vco_min / target_clock; if ((target_clock * post_div_min) < vco_min) ++post_div_min; @@ -912,7 +956,7 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll, } /* represent the searched ratio as fractional number */ - nom = pll->flags & RADEON_PLL_USE_FRAC_FB_DIV ? freq : freq / 10; + nom = target_clock; den = pll->reference_freq; /* reduce the numbers to a simpler ratio */ @@ -926,7 +970,12 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll, diff_best = ~0; for (post_div = post_div_min; post_div <= post_div_max; ++post_div) { - unsigned diff = abs(den - den / post_div * post_div); + unsigned diff; + avivo_get_fb_ref_div(nom, den, post_div, fb_div_max, + ref_div_max, &fb_div, &ref_div); + diff = abs(target_clock - (pll->reference_freq * fb_div) / + (ref_div * post_div)); + if (diff < diff_best || (diff == diff_best && !(pll->flags & RADEON_PLL_PREFER_MINM_OVER_MAXP))) { @@ -936,28 +985,9 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll, } post_div = post_div_best; - /* limit reference * post divider to a maximum */ - ref_div_max = min(210 / post_div, ref_div_max); - - /* get matching reference and feedback divider */ - ref_div = max(DIV_ROUND_CLOSEST(den, post_div), 1u); - fb_div = DIV_ROUND_CLOSEST(nom * ref_div * post_div, den); - - /* we're almost done, but reference and feedback - divider might be to large now */ - - nom = fb_div; - den = ref_div; - - if (fb_div > fb_div_max) { - ref_div = DIV_ROUND_CLOSEST(den * fb_div_max, nom); - fb_div = fb_div_max; - } - - if (ref_div > ref_div_max) { - ref_div = ref_div_max; - fb_div = DIV_ROUND_CLOSEST(nom * ref_div_max, den); - } + /* get the feedback and reference divider for the optimal value */ + avivo_get_fb_ref_div(nom, den, post_div, fb_div_max, ref_div_max, + &fb_div, &ref_div); /* reduce the numbers to a simpler ratio once more */ /* this also makes sure that the reference divider is large enough */ @@ -979,7 +1009,7 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll, *post_div_p = post_div; DRM_DEBUG_KMS("%d - %d, pll dividers - fb: %d.%d ref: %d, post %d\n", - freq, *dot_clock_p, *fb_div_p, *frac_fb_div_p, + freq, *dot_clock_p * 10, *fb_div_p, *frac_fb_div_p, ref_div, post_div); } diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c index fb3d13f693dd..0cc47f12d995 100644 --- a/drivers/gpu/drm/radeon/radeon_kms.c +++ b/drivers/gpu/drm/radeon/radeon_kms.c @@ -107,11 +107,9 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags) flags |= RADEON_IS_PCI; } - if (radeon_runtime_pm == 1) - flags |= RADEON_IS_PX; - else if ((radeon_runtime_pm == -1) && - radeon_has_atpx() && - ((flags & RADEON_IS_IGP) == 0)) + if ((radeon_runtime_pm != 0) && + radeon_has_atpx() && + ((flags & RADEON_IS_IGP) == 0)) flags |= RADEON_IS_PX; /* radeon_device_init should report only fatal error diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c index ee738a524639..6fac8efe8340 100644 --- a/drivers/gpu/drm/radeon/radeon_pm.c +++ b/drivers/gpu/drm/radeon/radeon_pm.c @@ -603,7 +603,6 @@ static const struct attribute_group *hwmon_groups[] = { static int radeon_hwmon_init(struct radeon_device *rdev) { int err = 0; - struct device *hwmon_dev; switch (rdev->pm.int_thermal_type) { case THERMAL_TYPE_RV6XX: @@ -616,11 +615,11 @@ static int radeon_hwmon_init(struct radeon_device *rdev) case THERMAL_TYPE_KV: if (rdev->asic->pm.get_temperature == NULL) return err; - hwmon_dev = hwmon_device_register_with_groups(rdev->dev, - "radeon", rdev, - hwmon_groups); - if (IS_ERR(hwmon_dev)) { - err = PTR_ERR(hwmon_dev); + rdev->pm.int_hwmon_dev = hwmon_device_register_with_groups(rdev->dev, + "radeon", rdev, + hwmon_groups); + if (IS_ERR(rdev->pm.int_hwmon_dev)) { + err = PTR_ERR(rdev->pm.int_hwmon_dev); dev_err(rdev->dev, "Unable to register hwmon device: %d\n", err); } @@ -632,6 +631,12 @@ static int radeon_hwmon_init(struct radeon_device *rdev) return err; } +static void radeon_hwmon_fini(struct radeon_device *rdev) +{ + if (rdev->pm.int_hwmon_dev) + hwmon_device_unregister(rdev->pm.int_hwmon_dev); +} + static void radeon_dpm_thermal_work_handler(struct work_struct *work) { struct radeon_device *rdev = @@ -1257,6 +1262,7 @@ int radeon_pm_init(struct radeon_device *rdev) case CHIP_RV670: case CHIP_RS780: case CHIP_RS880: + case CHIP_RV770: case CHIP_BARTS: case CHIP_TURKS: case CHIP_CAICOS: @@ -1273,7 +1279,6 @@ int radeon_pm_init(struct radeon_device *rdev) else rdev->pm.pm_method = PM_METHOD_PROFILE; break; - case CHIP_RV770: case CHIP_RV730: case CHIP_RV710: case CHIP_RV740: @@ -1353,6 +1358,8 @@ static void radeon_pm_fini_old(struct radeon_device *rdev) device_remove_file(rdev->dev, &dev_attr_power_method); } + radeon_hwmon_fini(rdev); + if (rdev->pm.power_state) kfree(rdev->pm.power_state); } @@ -1372,6 +1379,8 @@ static void radeon_pm_fini_dpm(struct radeon_device *rdev) } radeon_dpm_fini(rdev); + radeon_hwmon_fini(rdev); + if (rdev->pm.power_state) kfree(rdev->pm.power_state); } @@ -1397,12 +1406,14 @@ static void radeon_pm_compute_clocks_old(struct radeon_device *rdev) rdev->pm.active_crtcs = 0; rdev->pm.active_crtc_count = 0; - list_for_each_entry(crtc, - &ddev->mode_config.crtc_list, head) { - radeon_crtc = to_radeon_crtc(crtc); - if (radeon_crtc->enabled) { - rdev->pm.active_crtcs |= (1 << radeon_crtc->crtc_id); - rdev->pm.active_crtc_count++; + if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) { + list_for_each_entry(crtc, + &ddev->mode_config.crtc_list, head) { + radeon_crtc = to_radeon_crtc(crtc); + if (radeon_crtc->enabled) { + rdev->pm.active_crtcs |= (1 << radeon_crtc->crtc_id); + rdev->pm.active_crtc_count++; + } } } @@ -1469,12 +1480,14 @@ static void radeon_pm_compute_clocks_dpm(struct radeon_device *rdev) /* update active crtc counts */ rdev->pm.dpm.new_active_crtcs = 0; rdev->pm.dpm.new_active_crtc_count = 0; - list_for_each_entry(crtc, - &ddev->mode_config.crtc_list, head) { - radeon_crtc = to_radeon_crtc(crtc); - if (crtc->enabled) { - rdev->pm.dpm.new_active_crtcs |= (1 << radeon_crtc->crtc_id); - rdev->pm.dpm.new_active_crtc_count++; + if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) { + list_for_each_entry(crtc, + &ddev->mode_config.crtc_list, head) { + radeon_crtc = to_radeon_crtc(crtc); + if (crtc->enabled) { + rdev->pm.dpm.new_active_crtcs |= (1 << radeon_crtc->crtc_id); + rdev->pm.dpm.new_active_crtc_count++; + } } } diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c index 36c717af6cf9..edb871d7d395 100644 --- a/drivers/gpu/drm/tegra/dc.c +++ b/drivers/gpu/drm/tegra/dc.c @@ -312,7 +312,7 @@ static void tegra_crtc_disable(struct drm_crtc *crtc) struct drm_device *drm = crtc->dev; struct drm_plane *plane; - list_for_each_entry(plane, &drm->mode_config.plane_list, head) { + drm_for_each_legacy_plane(plane, &drm->mode_config.plane_list) { if (plane->crtc == crtc) { tegra_plane_disable(plane); plane->crtc = NULL; diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c index 931490b9cfed..87df0b3674fd 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c @@ -1214,14 +1214,36 @@ static int vmw_cmd_dma(struct vmw_private *dev_priv, SVGA3dCmdSurfaceDMA dma; } *cmd; int ret; + SVGA3dCmdSurfaceDMASuffix *suffix; + uint32_t bo_size; cmd = container_of(header, struct vmw_dma_cmd, header); + suffix = (SVGA3dCmdSurfaceDMASuffix *)((unsigned long) &cmd->dma + + header->size - sizeof(*suffix)); + + /* Make sure device and verifier stays in sync. */ + if (unlikely(suffix->suffixSize != sizeof(*suffix))) { + DRM_ERROR("Invalid DMA suffix size.\n"); + return -EINVAL; + } + ret = vmw_translate_guest_ptr(dev_priv, sw_context, &cmd->dma.guest.ptr, &vmw_bo); if (unlikely(ret != 0)) return ret; + /* Make sure DMA doesn't cross BO boundaries. */ + bo_size = vmw_bo->base.num_pages * PAGE_SIZE; + if (unlikely(cmd->dma.guest.ptr.offset > bo_size)) { + DRM_ERROR("Invalid DMA offset.\n"); + return -EINVAL; + } + + bo_size -= cmd->dma.guest.ptr.offset; + if (unlikely(suffix->maximumOffset > bo_size)) + suffix->maximumOffset = bo_size; + ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, user_surface_converter, &cmd->dma.host.sid, NULL); diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c index 6d02e3b06375..d76f0b70c6e0 100644 --- a/drivers/hwmon/coretemp.c +++ b/drivers/hwmon/coretemp.c @@ -365,12 +365,12 @@ static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev) if (cpu_has_tjmax(c)) dev_warn(dev, "Unable to read TjMax from CPU %u\n", id); } else { - val = (eax >> 16) & 0x7f; + val = (eax >> 16) & 0xff; /* * If the TjMax is not plausible, an assumption * will be used */ - if (val >= 85) { + if (val) { dev_dbg(dev, "TjMax is %d degrees C\n", val); return val * 1000; } diff --git a/drivers/hwmon/ltc2945.c b/drivers/hwmon/ltc2945.c index c104cc32989d..c9cddf5f056b 100644 --- a/drivers/hwmon/ltc2945.c +++ b/drivers/hwmon/ltc2945.c @@ -1,4 +1,4 @@ -/* + /* * Driver for Linear Technology LTC2945 I2C Power Monitor * * Copyright (c) 2014 Guenter Roeck @@ -314,8 +314,8 @@ static ssize_t ltc2945_reset_history(struct device *dev, reg = LTC2945_MAX_ADIN_H; break; default: - BUG(); - break; + WARN_ONCE(1, "Bad register: 0x%x\n", reg); + return -EINVAL; } /* Reset maximum */ ret = regmap_bulk_write(regmap, reg, buf_max, num_regs); diff --git a/drivers/hwmon/vexpress.c b/drivers/hwmon/vexpress.c index d867e6bb2be1..8242b75d96c8 100644 --- a/drivers/hwmon/vexpress.c +++ b/drivers/hwmon/vexpress.c @@ -27,15 +27,15 @@ struct vexpress_hwmon_data { struct device *hwmon_dev; struct vexpress_config_func *func; + const char *name; }; static ssize_t vexpress_hwmon_name_show(struct device *dev, struct device_attribute *dev_attr, char *buffer) { - const char *compatible = of_get_property(dev->of_node, "compatible", - NULL); + struct vexpress_hwmon_data *data = dev_get_drvdata(dev); - return sprintf(buffer, "%s\n", compatible); + return sprintf(buffer, "%s\n", data->name); } static ssize_t vexpress_hwmon_label_show(struct device *dev, @@ -43,9 +43,6 @@ static ssize_t vexpress_hwmon_label_show(struct device *dev, { const char *label = of_get_property(dev->of_node, "label", NULL); - if (!label) - return -ENOENT; - return snprintf(buffer, PAGE_SIZE, "%s\n", label); } @@ -84,6 +81,20 @@ static ssize_t vexpress_hwmon_u64_show(struct device *dev, to_sensor_dev_attr(dev_attr)->index)); } +static umode_t vexpress_hwmon_attr_is_visible(struct kobject *kobj, + struct attribute *attr, int index) +{ + struct device *dev = kobj_to_dev(kobj); + struct device_attribute *dev_attr = container_of(attr, + struct device_attribute, attr); + + if (dev_attr->show == vexpress_hwmon_label_show && + !of_get_property(dev->of_node, "label", NULL)) + return 0; + + return attr->mode; +} + static DEVICE_ATTR(name, S_IRUGO, vexpress_hwmon_name_show, NULL); #define VEXPRESS_HWMON_ATTRS(_name, _label_attr, _input_attr) \ @@ -94,14 +105,27 @@ struct attribute *vexpress_hwmon_attrs_##_name[] = { \ NULL \ } +struct vexpress_hwmon_type { + const char *name; + const struct attribute_group **attr_groups; +}; + #if !defined(CONFIG_REGULATOR_VEXPRESS) static DEVICE_ATTR(in1_label, S_IRUGO, vexpress_hwmon_label_show, NULL); static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, vexpress_hwmon_u32_show, NULL, 1000); static VEXPRESS_HWMON_ATTRS(volt, in1_label, in1_input); static struct attribute_group vexpress_hwmon_group_volt = { + .is_visible = vexpress_hwmon_attr_is_visible, .attrs = vexpress_hwmon_attrs_volt, }; +static struct vexpress_hwmon_type vexpress_hwmon_volt = { + .name = "vexpress_volt", + .attr_groups = (const struct attribute_group *[]) { + &vexpress_hwmon_group_volt, + NULL, + }, +}; #endif static DEVICE_ATTR(curr1_label, S_IRUGO, vexpress_hwmon_label_show, NULL); @@ -109,52 +133,84 @@ static SENSOR_DEVICE_ATTR(curr1_input, S_IRUGO, vexpress_hwmon_u32_show, NULL, 1000); static VEXPRESS_HWMON_ATTRS(amp, curr1_label, curr1_input); static struct attribute_group vexpress_hwmon_group_amp = { + .is_visible = vexpress_hwmon_attr_is_visible, .attrs = vexpress_hwmon_attrs_amp, }; +static struct vexpress_hwmon_type vexpress_hwmon_amp = { + .name = "vexpress_amp", + .attr_groups = (const struct attribute_group *[]) { + &vexpress_hwmon_group_amp, + NULL + }, +}; static DEVICE_ATTR(temp1_label, S_IRUGO, vexpress_hwmon_label_show, NULL); static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, vexpress_hwmon_u32_show, NULL, 1000); static VEXPRESS_HWMON_ATTRS(temp, temp1_label, temp1_input); static struct attribute_group vexpress_hwmon_group_temp = { + .is_visible = vexpress_hwmon_attr_is_visible, .attrs = vexpress_hwmon_attrs_temp, }; +static struct vexpress_hwmon_type vexpress_hwmon_temp = { + .name = "vexpress_temp", + .attr_groups = (const struct attribute_group *[]) { + &vexpress_hwmon_group_temp, + NULL + }, +}; static DEVICE_ATTR(power1_label, S_IRUGO, vexpress_hwmon_label_show, NULL); static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO, vexpress_hwmon_u32_show, NULL, 1); static VEXPRESS_HWMON_ATTRS(power, power1_label, power1_input); static struct attribute_group vexpress_hwmon_group_power = { + .is_visible = vexpress_hwmon_attr_is_visible, .attrs = vexpress_hwmon_attrs_power, }; +static struct vexpress_hwmon_type vexpress_hwmon_power = { + .name = "vexpress_power", + .attr_groups = (const struct attribute_group *[]) { + &vexpress_hwmon_group_power, + NULL + }, +}; static DEVICE_ATTR(energy1_label, S_IRUGO, vexpress_hwmon_label_show, NULL); static SENSOR_DEVICE_ATTR(energy1_input, S_IRUGO, vexpress_hwmon_u64_show, NULL, 1); static VEXPRESS_HWMON_ATTRS(energy, energy1_label, energy1_input); static struct attribute_group vexpress_hwmon_group_energy = { + .is_visible = vexpress_hwmon_attr_is_visible, .attrs = vexpress_hwmon_attrs_energy, }; +static struct vexpress_hwmon_type vexpress_hwmon_energy = { + .name = "vexpress_energy", + .attr_groups = (const struct attribute_group *[]) { + &vexpress_hwmon_group_energy, + NULL + }, +}; static struct of_device_id vexpress_hwmon_of_match[] = { #if !defined(CONFIG_REGULATOR_VEXPRESS) { .compatible = "arm,vexpress-volt", - .data = &vexpress_hwmon_group_volt, + .data = &vexpress_hwmon_volt, }, #endif { .compatible = "arm,vexpress-amp", - .data = &vexpress_hwmon_group_amp, + .data = &vexpress_hwmon_amp, }, { .compatible = "arm,vexpress-temp", - .data = &vexpress_hwmon_group_temp, + .data = &vexpress_hwmon_temp, }, { .compatible = "arm,vexpress-power", - .data = &vexpress_hwmon_group_power, + .data = &vexpress_hwmon_power, }, { .compatible = "arm,vexpress-energy", - .data = &vexpress_hwmon_group_energy, + .data = &vexpress_hwmon_energy, }, {} }; @@ -165,6 +221,7 @@ static int vexpress_hwmon_probe(struct platform_device *pdev) int err; const struct of_device_id *match; struct vexpress_hwmon_data *data; + const struct vexpress_hwmon_type *type; data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); if (!data) @@ -174,12 +231,14 @@ static int vexpress_hwmon_probe(struct platform_device *pdev) match = of_match_device(vexpress_hwmon_of_match, &pdev->dev); if (!match) return -ENODEV; + type = match->data; + data->name = type->name; data->func = vexpress_config_func_get_by_dev(&pdev->dev); if (!data->func) return -ENODEV; - err = sysfs_create_group(&pdev->dev.kobj, match->data); + err = sysfs_create_groups(&pdev->dev.kobj, type->attr_groups); if (err) goto error; diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c index a43220c2e3d9..4d140bbbe100 100644 --- a/drivers/idle/intel_idle.c +++ b/drivers/idle/intel_idle.c @@ -750,9 +750,10 @@ void intel_idle_state_table_update(void) if (package_num + 1 > num_sockets) { num_sockets = package_num + 1; - if (num_sockets > 4) + if (num_sockets > 4) { cpuidle_state_table = ivt_cstates_8s; return; + } } } diff --git a/drivers/iio/adc/at91_adc.c b/drivers/iio/adc/at91_adc.c index 5b1aa027c034..3b5bacd4d8da 100644 --- a/drivers/iio/adc/at91_adc.c +++ b/drivers/iio/adc/at91_adc.c @@ -31,7 +31,108 @@ #include <linux/iio/trigger_consumer.h> #include <linux/iio/triggered_buffer.h> -#include <mach/at91_adc.h> +/* Registers */ +#define AT91_ADC_CR 0x00 /* Control Register */ +#define AT91_ADC_SWRST (1 << 0) /* Software Reset */ +#define AT91_ADC_START (1 << 1) /* Start Conversion */ + +#define AT91_ADC_MR 0x04 /* Mode Register */ +#define AT91_ADC_TSAMOD (3 << 0) /* ADC mode */ +#define AT91_ADC_TSAMOD_ADC_ONLY_MODE (0 << 0) /* ADC Mode */ +#define AT91_ADC_TSAMOD_TS_ONLY_MODE (1 << 0) /* Touch Screen Only Mode */ +#define AT91_ADC_TRGEN (1 << 0) /* Trigger Enable */ +#define AT91_ADC_TRGSEL (7 << 1) /* Trigger Selection */ +#define AT91_ADC_TRGSEL_TC0 (0 << 1) +#define AT91_ADC_TRGSEL_TC1 (1 << 1) +#define AT91_ADC_TRGSEL_TC2 (2 << 1) +#define AT91_ADC_TRGSEL_EXTERNAL (6 << 1) +#define AT91_ADC_LOWRES (1 << 4) /* Low Resolution */ +#define AT91_ADC_SLEEP (1 << 5) /* Sleep Mode */ +#define AT91_ADC_PENDET (1 << 6) /* Pen contact detection enable */ +#define AT91_ADC_PRESCAL_9260 (0x3f << 8) /* Prescalar Rate Selection */ +#define AT91_ADC_PRESCAL_9G45 (0xff << 8) +#define AT91_ADC_PRESCAL_(x) ((x) << 8) +#define AT91_ADC_STARTUP_9260 (0x1f << 16) /* Startup Up Time */ +#define AT91_ADC_STARTUP_9G45 (0x7f << 16) +#define AT91_ADC_STARTUP_9X5 (0xf << 16) +#define AT91_ADC_STARTUP_(x) ((x) << 16) +#define AT91_ADC_SHTIM (0xf << 24) /* Sample & Hold Time */ +#define AT91_ADC_SHTIM_(x) ((x) << 24) +#define AT91_ADC_PENDBC (0x0f << 28) /* Pen Debounce time */ +#define AT91_ADC_PENDBC_(x) ((x) << 28) + +#define AT91_ADC_TSR 0x0C +#define AT91_ADC_TSR_SHTIM (0xf << 24) /* Sample & Hold Time */ +#define AT91_ADC_TSR_SHTIM_(x) ((x) << 24) + +#define AT91_ADC_CHER 0x10 /* Channel Enable Register */ +#define AT91_ADC_CHDR 0x14 /* Channel Disable Register */ +#define AT91_ADC_CHSR 0x18 /* Channel Status Register */ +#define AT91_ADC_CH(n) (1 << (n)) /* Channel Number */ + +#define AT91_ADC_SR 0x1C /* Status Register */ +#define AT91_ADC_EOC(n) (1 << (n)) /* End of Conversion on Channel N */ +#define AT91_ADC_OVRE(n) (1 << ((n) + 8))/* Overrun Error on Channel N */ +#define AT91_ADC_DRDY (1 << 16) /* Data Ready */ +#define AT91_ADC_GOVRE (1 << 17) /* General Overrun Error */ +#define AT91_ADC_ENDRX (1 << 18) /* End of RX Buffer */ +#define AT91_ADC_RXFUFF (1 << 19) /* RX Buffer Full */ + +#define AT91_ADC_SR_9X5 0x30 /* Status Register for 9x5 */ +#define AT91_ADC_SR_DRDY_9X5 (1 << 24) /* Data Ready */ + +#define AT91_ADC_LCDR 0x20 /* Last Converted Data Register */ +#define AT91_ADC_LDATA (0x3ff) + +#define AT91_ADC_IER 0x24 /* Interrupt Enable Register */ +#define AT91_ADC_IDR 0x28 /* Interrupt Disable Register */ +#define AT91_ADC_IMR 0x2C /* Interrupt Mask Register */ +#define AT91RL_ADC_IER_PEN (1 << 20) +#define AT91RL_ADC_IER_NOPEN (1 << 21) +#define AT91_ADC_IER_PEN (1 << 29) +#define AT91_ADC_IER_NOPEN (1 << 30) +#define AT91_ADC_IER_XRDY (1 << 20) +#define AT91_ADC_IER_YRDY (1 << 21) +#define AT91_ADC_IER_PRDY (1 << 22) +#define AT91_ADC_ISR_PENS (1 << 31) + +#define AT91_ADC_CHR(n) (0x30 + ((n) * 4)) /* Channel Data Register N */ +#define AT91_ADC_DATA (0x3ff) + +#define AT91_ADC_CDR0_9X5 (0x50) /* Channel Data Register 0 for 9X5 */ + +#define AT91_ADC_ACR 0x94 /* Analog Control Register */ +#define AT91_ADC_ACR_PENDETSENS (0x3 << 0) /* pull-up resistor */ + +#define AT91_ADC_TSMR 0xB0 +#define AT91_ADC_TSMR_TSMODE (3 << 0) /* Touch Screen Mode */ +#define AT91_ADC_TSMR_TSMODE_NONE (0 << 0) +#define AT91_ADC_TSMR_TSMODE_4WIRE_NO_PRESS (1 << 0) +#define AT91_ADC_TSMR_TSMODE_4WIRE_PRESS (2 << 0) +#define AT91_ADC_TSMR_TSMODE_5WIRE (3 << 0) +#define AT91_ADC_TSMR_TSAV (3 << 4) /* Averages samples */ +#define AT91_ADC_TSMR_TSAV_(x) ((x) << 4) +#define AT91_ADC_TSMR_SCTIM (0x0f << 16) /* Switch closure time */ +#define AT91_ADC_TSMR_PENDBC (0x0f << 28) /* Pen Debounce time */ +#define AT91_ADC_TSMR_PENDBC_(x) ((x) << 28) +#define AT91_ADC_TSMR_NOTSDMA (1 << 22) /* No Touchscreen DMA */ +#define AT91_ADC_TSMR_PENDET_DIS (0 << 24) /* Pen contact detection disable */ +#define AT91_ADC_TSMR_PENDET_ENA (1 << 24) /* Pen contact detection enable */ + +#define AT91_ADC_TSXPOSR 0xB4 +#define AT91_ADC_TSYPOSR 0xB8 +#define AT91_ADC_TSPRESSR 0xBC + +#define AT91_ADC_TRGR_9260 AT91_ADC_MR +#define AT91_ADC_TRGR_9G45 0x08 +#define AT91_ADC_TRGR_9X5 0xC0 + +/* Trigger Register bit field */ +#define AT91_ADC_TRGR_TRGPER (0xffff << 16) +#define AT91_ADC_TRGR_TRGPER_(x) ((x) << 16) +#define AT91_ADC_TRGR_TRGMOD (0x7 << 0) +#define AT91_ADC_TRGR_NONE (0 << 0) +#define AT91_ADC_TRGR_MOD_PERIOD_TRIG (5 << 0) #define AT91_ADC_CHAN(st, ch) \ (st->registers->channel_base + (ch * 4)) @@ -46,6 +147,29 @@ #define TOUCH_SAMPLE_PERIOD_US 2000 /* 2ms */ #define TOUCH_PEN_DETECT_DEBOUNCE_US 200 +#define MAX_RLPOS_BITS 10 +#define TOUCH_SAMPLE_PERIOD_US_RL 10000 /* 10ms, the SoC can't keep up with 2ms */ +#define TOUCH_SHTIM 0xa + +/** + * struct at91_adc_reg_desc - Various informations relative to registers + * @channel_base: Base offset for the channel data registers + * @drdy_mask: Mask of the DRDY field in the relevant registers + (Interruptions registers mostly) + * @status_register: Offset of the Interrupt Status Register + * @trigger_register: Offset of the Trigger setup register + * @mr_prescal_mask: Mask of the PRESCAL field in the adc MR register + * @mr_startup_mask: Mask of the STARTUP field in the adc MR register + */ +struct at91_adc_reg_desc { + u8 channel_base; + u32 drdy_mask; + u8 status_register; + u8 trigger_register; + u32 mr_prescal_mask; + u32 mr_startup_mask; +}; + struct at91_adc_caps { bool has_ts; /* Support touch screen */ bool has_tsmr; /* only at91sam9x5, sama5d3 have TSMR reg */ @@ -64,12 +188,6 @@ struct at91_adc_caps { struct at91_adc_reg_desc registers; }; -enum atmel_adc_ts_type { - ATMEL_ADC_TOUCHSCREEN_NONE = 0, - ATMEL_ADC_TOUCHSCREEN_4WIRE = 4, - ATMEL_ADC_TOUCHSCREEN_5WIRE = 5, -}; - struct at91_adc_state { struct clk *adc_clk; u16 *buffer; @@ -114,6 +232,11 @@ struct at91_adc_state { u16 ts_sample_period_val; u32 ts_pressure_threshold; + u16 ts_pendbc; + + bool ts_bufferedmeasure; + u32 ts_prev_absx; + u32 ts_prev_absy; }; static irqreturn_t at91_adc_trigger_handler(int irq, void *p) @@ -220,7 +343,72 @@ static int at91_ts_sample(struct at91_adc_state *st) return 0; } -static irqreturn_t at91_adc_interrupt(int irq, void *private) +static irqreturn_t at91_adc_rl_interrupt(int irq, void *private) +{ + struct iio_dev *idev = private; + struct at91_adc_state *st = iio_priv(idev); + u32 status = at91_adc_readl(st, st->registers->status_register); + unsigned int reg; + + status &= at91_adc_readl(st, AT91_ADC_IMR); + if (status & st->registers->drdy_mask) + handle_adc_eoc_trigger(irq, idev); + + if (status & AT91RL_ADC_IER_PEN) { + /* Disabling pen debounce is required to get a NOPEN irq */ + reg = at91_adc_readl(st, AT91_ADC_MR); + reg &= ~AT91_ADC_PENDBC; + at91_adc_writel(st, AT91_ADC_MR, reg); + + at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_PEN); + at91_adc_writel(st, AT91_ADC_IER, AT91RL_ADC_IER_NOPEN + | AT91_ADC_EOC(3)); + /* Set up period trigger for sampling */ + at91_adc_writel(st, st->registers->trigger_register, + AT91_ADC_TRGR_MOD_PERIOD_TRIG | + AT91_ADC_TRGR_TRGPER_(st->ts_sample_period_val)); + } else if (status & AT91RL_ADC_IER_NOPEN) { + reg = at91_adc_readl(st, AT91_ADC_MR); + reg |= AT91_ADC_PENDBC_(st->ts_pendbc) & AT91_ADC_PENDBC; + at91_adc_writel(st, AT91_ADC_MR, reg); + at91_adc_writel(st, st->registers->trigger_register, + AT91_ADC_TRGR_NONE); + + at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_NOPEN + | AT91_ADC_EOC(3)); + at91_adc_writel(st, AT91_ADC_IER, AT91RL_ADC_IER_PEN); + st->ts_bufferedmeasure = false; + input_report_key(st->ts_input, BTN_TOUCH, 0); + input_sync(st->ts_input); + } else if (status & AT91_ADC_EOC(3)) { + /* Conversion finished */ + if (st->ts_bufferedmeasure) { + /* + * Last measurement is always discarded, since it can + * be erroneous. + * Always report previous measurement + */ + input_report_abs(st->ts_input, ABS_X, st->ts_prev_absx); + input_report_abs(st->ts_input, ABS_Y, st->ts_prev_absy); + input_report_key(st->ts_input, BTN_TOUCH, 1); + input_sync(st->ts_input); + } else + st->ts_bufferedmeasure = true; + + /* Now make new measurement */ + st->ts_prev_absx = at91_adc_readl(st, AT91_ADC_CHAN(st, 3)) + << MAX_RLPOS_BITS; + st->ts_prev_absx /= at91_adc_readl(st, AT91_ADC_CHAN(st, 2)); + + st->ts_prev_absy = at91_adc_readl(st, AT91_ADC_CHAN(st, 1)) + << MAX_RLPOS_BITS; + st->ts_prev_absy /= at91_adc_readl(st, AT91_ADC_CHAN(st, 0)); + } + + return IRQ_HANDLED; +} + +static irqreturn_t at91_adc_9x5_interrupt(int irq, void *private) { struct iio_dev *idev = private; struct at91_adc_state *st = iio_priv(idev); @@ -653,6 +841,8 @@ static int at91_adc_probe_dt_ts(struct device_node *node, return -EINVAL; } + if (!st->caps->has_tsmr) + return 0; prop = 0; of_property_read_u32(node, "atmel,adc-ts-pressure-threshold", &prop); st->ts_pressure_threshold = prop; @@ -765,14 +955,18 @@ static int at91_adc_probe_pdata(struct at91_adc_state *st, if (!pdata) return -EINVAL; + st->caps = (struct at91_adc_caps *) + platform_get_device_id(pdev)->driver_data; + st->use_external = pdata->use_external_triggers; st->vref_mv = pdata->vref; st->channels_mask = pdata->channels_used; - st->num_channels = pdata->num_channels; + st->num_channels = st->caps->num_channels; st->startup_time = pdata->startup_time; st->trigger_number = pdata->trigger_number; st->trigger_list = pdata->trigger_list; - st->registers = pdata->registers; + st->registers = &st->caps->registers; + st->touchscreen_type = pdata->touchscreen_type; return 0; } @@ -787,7 +981,10 @@ static int atmel_ts_open(struct input_dev *dev) { struct at91_adc_state *st = input_get_drvdata(dev); - at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_PEN); + if (st->caps->has_tsmr) + at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_PEN); + else + at91_adc_writel(st, AT91_ADC_IER, AT91RL_ADC_IER_PEN); return 0; } @@ -795,45 +992,61 @@ static void atmel_ts_close(struct input_dev *dev) { struct at91_adc_state *st = input_get_drvdata(dev); - at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_PEN); + if (st->caps->has_tsmr) + at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_PEN); + else + at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_PEN); } static int at91_ts_hw_init(struct at91_adc_state *st, u32 adc_clk_khz) { - u32 reg = 0, pendbc; + u32 reg = 0; int i = 0; - if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE) - reg = AT91_ADC_TSMR_TSMODE_4WIRE_PRESS; - else - reg = AT91_ADC_TSMR_TSMODE_5WIRE; - /* a Pen Detect Debounce Time is necessary for the ADC Touch to avoid * pen detect noise. * The formula is : Pen Detect Debounce Time = (2 ^ pendbc) / ADCClock */ - pendbc = round_up(TOUCH_PEN_DETECT_DEBOUNCE_US * adc_clk_khz / 1000, 1); + st->ts_pendbc = round_up(TOUCH_PEN_DETECT_DEBOUNCE_US * adc_clk_khz / + 1000, 1); - while (pendbc >> ++i) + while (st->ts_pendbc >> ++i) ; /* Empty! Find the shift offset */ - if (abs(pendbc - (1 << i)) < abs(pendbc - (1 << (i - 1)))) - pendbc = i; + if (abs(st->ts_pendbc - (1 << i)) < abs(st->ts_pendbc - (1 << (i - 1)))) + st->ts_pendbc = i; else - pendbc = i - 1; + st->ts_pendbc = i - 1; - if (st->caps->has_tsmr) { - reg |= AT91_ADC_TSMR_TSAV_(st->caps->ts_filter_average) - & AT91_ADC_TSMR_TSAV; - reg |= AT91_ADC_TSMR_PENDBC_(pendbc) & AT91_ADC_TSMR_PENDBC; - reg |= AT91_ADC_TSMR_NOTSDMA; - reg |= AT91_ADC_TSMR_PENDET_ENA; - reg |= 0x03 << 8; /* TSFREQ, need bigger than TSAV */ - - at91_adc_writel(st, AT91_ADC_TSMR, reg); - } else { - /* TODO: for 9g45 which has no TSMR */ + if (!st->caps->has_tsmr) { + reg = at91_adc_readl(st, AT91_ADC_MR); + reg |= AT91_ADC_TSAMOD_TS_ONLY_MODE | AT91_ADC_PENDET; + + reg |= AT91_ADC_PENDBC_(st->ts_pendbc) & AT91_ADC_PENDBC; + at91_adc_writel(st, AT91_ADC_MR, reg); + + reg = AT91_ADC_TSR_SHTIM_(TOUCH_SHTIM) & AT91_ADC_TSR_SHTIM; + at91_adc_writel(st, AT91_ADC_TSR, reg); + + st->ts_sample_period_val = round_up((TOUCH_SAMPLE_PERIOD_US_RL * + adc_clk_khz / 1000) - 1, 1); + + return 0; } + if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE) + reg = AT91_ADC_TSMR_TSMODE_4WIRE_PRESS; + else + reg = AT91_ADC_TSMR_TSMODE_5WIRE; + + reg |= AT91_ADC_TSMR_TSAV_(st->caps->ts_filter_average) + & AT91_ADC_TSMR_TSAV; + reg |= AT91_ADC_TSMR_PENDBC_(st->ts_pendbc) & AT91_ADC_TSMR_PENDBC; + reg |= AT91_ADC_TSMR_NOTSDMA; + reg |= AT91_ADC_TSMR_PENDET_ENA; + reg |= 0x03 << 8; /* TSFREQ, needs to be bigger than TSAV */ + + at91_adc_writel(st, AT91_ADC_TSMR, reg); + /* Change adc internal resistor value for better pen detection, * default value is 100 kOhm. * 0 = 200 kOhm, 1 = 150 kOhm, 2 = 100 kOhm, 3 = 50 kOhm @@ -842,7 +1055,7 @@ static int at91_ts_hw_init(struct at91_adc_state *st, u32 adc_clk_khz) at91_adc_writel(st, AT91_ADC_ACR, st->caps->ts_pen_detect_sensitivity & AT91_ADC_ACR_PENDETSENS); - /* Sample Peroid Time = (TRGPER + 1) / ADCClock */ + /* Sample Period Time = (TRGPER + 1) / ADCClock */ st->ts_sample_period_val = round_up((TOUCH_SAMPLE_PERIOD_US * adc_clk_khz / 1000) - 1, 1); @@ -871,17 +1084,37 @@ static int at91_ts_register(struct at91_adc_state *st, __set_bit(EV_ABS, input->evbit); __set_bit(EV_KEY, input->evbit); __set_bit(BTN_TOUCH, input->keybit); - input_set_abs_params(input, ABS_X, 0, (1 << MAX_POS_BITS) - 1, 0, 0); - input_set_abs_params(input, ABS_Y, 0, (1 << MAX_POS_BITS) - 1, 0, 0); - input_set_abs_params(input, ABS_PRESSURE, 0, 0xffffff, 0, 0); + if (st->caps->has_tsmr) { + input_set_abs_params(input, ABS_X, 0, (1 << MAX_POS_BITS) - 1, + 0, 0); + input_set_abs_params(input, ABS_Y, 0, (1 << MAX_POS_BITS) - 1, + 0, 0); + input_set_abs_params(input, ABS_PRESSURE, 0, 0xffffff, 0, 0); + } else { + if (st->touchscreen_type != ATMEL_ADC_TOUCHSCREEN_4WIRE) { + dev_err(&pdev->dev, + "This touchscreen controller only support 4 wires\n"); + ret = -EINVAL; + goto err; + } + + input_set_abs_params(input, ABS_X, 0, (1 << MAX_RLPOS_BITS) - 1, + 0, 0); + input_set_abs_params(input, ABS_Y, 0, (1 << MAX_RLPOS_BITS) - 1, + 0, 0); + } st->ts_input = input; input_set_drvdata(input, st); ret = input_register_device(input); if (ret) - input_free_device(st->ts_input); + goto err; + + return ret; +err: + input_free_device(st->ts_input); return ret; } @@ -940,11 +1173,13 @@ static int at91_adc_probe(struct platform_device *pdev) */ at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_SWRST); at91_adc_writel(st, AT91_ADC_IDR, 0xFFFFFFFF); - ret = request_irq(st->irq, - at91_adc_interrupt, - 0, - pdev->dev.driver->name, - idev); + + if (st->caps->has_tsmr) + ret = request_irq(st->irq, at91_adc_9x5_interrupt, 0, + pdev->dev.driver->name, idev); + else + ret = request_irq(st->irq, at91_adc_rl_interrupt, 0, + pdev->dev.driver->name, idev); if (ret) { dev_err(&pdev->dev, "Failed to allocate IRQ.\n"); return ret; @@ -1004,8 +1239,11 @@ static int at91_adc_probe(struct platform_device *pdev) * the best converted final value between two channels selection * The formula thus is : Sample and Hold Time = (shtim + 1) / ADCClock */ - shtim = round_up((st->sample_hold_time * adc_clk_khz / - 1000) - 1, 1); + if (st->sample_hold_time > 0) + shtim = round_up((st->sample_hold_time * adc_clk_khz / 1000) + - 1, 1); + else + shtim = 0; reg = AT91_ADC_PRESCAL_(prsc) & st->registers->mr_prescal_mask; reg |= AT91_ADC_STARTUP_(ticks) & st->registers->mr_startup_mask; @@ -1045,12 +1283,6 @@ static int at91_adc_probe(struct platform_device *pdev) goto error_disable_adc_clk; } } else { - if (!st->caps->has_tsmr) { - dev_err(&pdev->dev, "We don't support non-TSMR adc\n"); - ret = -ENODEV; - goto error_disable_adc_clk; - } - ret = at91_ts_register(st, pdev); if (ret) goto error_disable_adc_clk; @@ -1101,7 +1333,6 @@ static int at91_adc_remove(struct platform_device *pdev) return 0; } -#ifdef CONFIG_OF static struct at91_adc_caps at91sam9260_caps = { .calc_startup_ticks = calc_startup_ticks_9260, .num_channels = 4, @@ -1115,6 +1346,20 @@ static struct at91_adc_caps at91sam9260_caps = { }, }; +static struct at91_adc_caps at91sam9rl_caps = { + .has_ts = true, + .calc_startup_ticks = calc_startup_ticks_9260, /* same as 9260 */ + .num_channels = 6, + .registers = { + .channel_base = AT91_ADC_CHR(0), + .drdy_mask = AT91_ADC_DRDY, + .status_register = AT91_ADC_SR, + .trigger_register = AT91_ADC_TRGR_9G45, + .mr_prescal_mask = AT91_ADC_PRESCAL_9260, + .mr_startup_mask = AT91_ADC_STARTUP_9G45, + }, +}; + static struct at91_adc_caps at91sam9g45_caps = { .has_ts = true, .calc_startup_ticks = calc_startup_ticks_9260, /* same as 9260 */ @@ -1149,16 +1394,36 @@ static struct at91_adc_caps at91sam9x5_caps = { static const struct of_device_id at91_adc_dt_ids[] = { { .compatible = "atmel,at91sam9260-adc", .data = &at91sam9260_caps }, + { .compatible = "atmel,at91sam9rl-adc", .data = &at91sam9rl_caps }, { .compatible = "atmel,at91sam9g45-adc", .data = &at91sam9g45_caps }, { .compatible = "atmel,at91sam9x5-adc", .data = &at91sam9x5_caps }, {}, }; MODULE_DEVICE_TABLE(of, at91_adc_dt_ids); -#endif + +static const struct platform_device_id at91_adc_ids[] = { + { + .name = "at91sam9260-adc", + .driver_data = (unsigned long)&at91sam9260_caps, + }, { + .name = "at91sam9rl-adc", + .driver_data = (unsigned long)&at91sam9rl_caps, + }, { + .name = "at91sam9g45-adc", + .driver_data = (unsigned long)&at91sam9g45_caps, + }, { + .name = "at91sam9x5-adc", + .driver_data = (unsigned long)&at91sam9x5_caps, + }, { + /* terminator */ + } +}; +MODULE_DEVICE_TABLE(platform, at91_adc_ids); static struct platform_driver at91_adc_driver = { .probe = at91_adc_probe, .remove = at91_adc_remove, + .id_table = at91_adc_ids, .driver = { .name = DRIVER_NAME, .of_match_table = of_match_ptr(at91_adc_dt_ids), diff --git a/drivers/iio/industrialio-buffer.c b/drivers/iio/industrialio-buffer.c index e108f2a9d827..e472cff6eeae 100644 --- a/drivers/iio/industrialio-buffer.c +++ b/drivers/iio/industrialio-buffer.c @@ -165,7 +165,8 @@ static ssize_t iio_scan_el_show(struct device *dev, int ret; struct iio_dev *indio_dev = dev_to_iio_dev(dev); - ret = test_bit(to_iio_dev_attr(attr)->address, + /* Ensure ret is 0 or 1. */ + ret = !!test_bit(to_iio_dev_attr(attr)->address, indio_dev->buffer->scan_mask); return sprintf(buf, "%d\n", ret); @@ -862,7 +863,8 @@ int iio_scan_mask_query(struct iio_dev *indio_dev, if (!buffer->scan_mask) return 0; - return test_bit(bit, buffer->scan_mask); + /* Ensure return value is 0 or 1. */ + return !!test_bit(bit, buffer->scan_mask); }; EXPORT_SYMBOL_GPL(iio_scan_mask_query); diff --git a/drivers/iio/light/cm32181.c b/drivers/iio/light/cm32181.c index 47a6dbac2d0c..d976e6ce60db 100644 --- a/drivers/iio/light/cm32181.c +++ b/drivers/iio/light/cm32181.c @@ -221,6 +221,7 @@ static int cm32181_read_raw(struct iio_dev *indio_dev, *val = cm32181->calibscale; return IIO_VAL_INT; case IIO_CHAN_INFO_INT_TIME: + *val = 0; ret = cm32181_read_als_it(cm32181, val2); return ret; } diff --git a/drivers/iio/light/cm36651.c b/drivers/iio/light/cm36651.c index a45e07492db3..39fc67e82138 100644 --- a/drivers/iio/light/cm36651.c +++ b/drivers/iio/light/cm36651.c @@ -652,7 +652,19 @@ static int cm36651_probe(struct i2c_client *client, cm36651->client = client; cm36651->ps_client = i2c_new_dummy(client->adapter, CM36651_I2C_ADDR_PS); + if (!cm36651->ps_client) { + dev_err(&client->dev, "%s: new i2c device failed\n", __func__); + ret = -ENODEV; + goto error_disable_reg; + } + cm36651->ara_client = i2c_new_dummy(client->adapter, CM36651_ARA); + if (!cm36651->ara_client) { + dev_err(&client->dev, "%s: new i2c device failed\n", __func__); + ret = -ENODEV; + goto error_i2c_unregister_ps; + } + mutex_init(&cm36651->lock); indio_dev->dev.parent = &client->dev; indio_dev->channels = cm36651_channels; @@ -664,7 +676,7 @@ static int cm36651_probe(struct i2c_client *client, ret = cm36651_setup_reg(cm36651); if (ret) { dev_err(&client->dev, "%s: register setup failed\n", __func__); - goto error_disable_reg; + goto error_i2c_unregister_ara; } ret = request_threaded_irq(client->irq, NULL, cm36651_irq_handler, @@ -672,7 +684,7 @@ static int cm36651_probe(struct i2c_client *client, "cm36651", indio_dev); if (ret) { dev_err(&client->dev, "%s: request irq failed\n", __func__); - goto error_disable_reg; + goto error_i2c_unregister_ara; } ret = iio_device_register(indio_dev); @@ -685,6 +697,10 @@ static int cm36651_probe(struct i2c_client *client, error_free_irq: free_irq(client->irq, indio_dev); +error_i2c_unregister_ara: + i2c_unregister_device(cm36651->ara_client); +error_i2c_unregister_ps: + i2c_unregister_device(cm36651->ps_client); error_disable_reg: regulator_disable(cm36651->vled_reg); return ret; @@ -698,6 +714,8 @@ static int cm36651_remove(struct i2c_client *client) iio_device_unregister(indio_dev); regulator_disable(cm36651->vled_reg); free_irq(client->irq, indio_dev); + i2c_unregister_device(cm36651->ps_client); + i2c_unregister_device(cm36651->ara_client); return 0; } diff --git a/drivers/infiniband/hw/cxgb4/Kconfig b/drivers/infiniband/hw/cxgb4/Kconfig index d4e8983fba53..23f38cf2c5cd 100644 --- a/drivers/infiniband/hw/cxgb4/Kconfig +++ b/drivers/infiniband/hw/cxgb4/Kconfig @@ -1,10 +1,10 @@ config INFINIBAND_CXGB4 - tristate "Chelsio T4 RDMA Driver" + tristate "Chelsio T4/T5 RDMA Driver" depends on CHELSIO_T4 && INET && (IPV6 || IPV6=n) select GENERIC_ALLOCATOR ---help--- - This is an iWARP/RDMA driver for the Chelsio T4 1GbE and - 10GbE adapters. + This is an iWARP/RDMA driver for the Chelsio T4 and T5 + 1GbE, 10GbE adapters and T5 40GbE adapter. For general information about Chelsio and our products, visit our website at <http://www.chelsio.com>. diff --git a/drivers/infiniband/hw/cxgb4/cm.c b/drivers/infiniband/hw/cxgb4/cm.c index 185452abf32c..1f863a96a480 100644 --- a/drivers/infiniband/hw/cxgb4/cm.c +++ b/drivers/infiniband/hw/cxgb4/cm.c @@ -587,6 +587,10 @@ static int send_connect(struct c4iw_ep *ep) opt2 |= SACK_EN(1); if (wscale && enable_tcp_window_scaling) opt2 |= WND_SCALE_EN(1); + if (is_t5(ep->com.dev->rdev.lldi.adapter_type)) { + opt2 |= T5_OPT_2_VALID; + opt2 |= V_CONG_CNTRL(CONG_ALG_TAHOE); + } t4_set_arp_err_handler(skb, NULL, act_open_req_arp_failure); if (is_t4(ep->com.dev->rdev.lldi.adapter_type)) { @@ -996,7 +1000,7 @@ static void close_complete_upcall(struct c4iw_ep *ep, int status) static int abort_connection(struct c4iw_ep *ep, struct sk_buff *skb, gfp_t gfp) { PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid); - state_set(&ep->com, ABORTING); + __state_set(&ep->com, ABORTING); set_bit(ABORT_CONN, &ep->com.history); return send_abort(ep, skb, gfp); } @@ -1154,7 +1158,7 @@ static int update_rx_credits(struct c4iw_ep *ep, u32 credits) return credits; } -static void process_mpa_reply(struct c4iw_ep *ep, struct sk_buff *skb) +static int process_mpa_reply(struct c4iw_ep *ep, struct sk_buff *skb) { struct mpa_message *mpa; struct mpa_v2_conn_params *mpa_v2_params; @@ -1164,6 +1168,7 @@ static void process_mpa_reply(struct c4iw_ep *ep, struct sk_buff *skb) struct c4iw_qp_attributes attrs; enum c4iw_qp_attr_mask mask; int err; + int disconnect = 0; PDBG("%s ep %p tid %u\n", __func__, ep, ep->hwtid); @@ -1173,7 +1178,7 @@ static void process_mpa_reply(struct c4iw_ep *ep, struct sk_buff *skb) * will abort the connection. */ if (stop_ep_timer(ep)) - return; + return 0; /* * If we get more than the supported amount of private data @@ -1195,7 +1200,7 @@ static void process_mpa_reply(struct c4iw_ep *ep, struct sk_buff *skb) * if we don't even have the mpa message, then bail. */ if (ep->mpa_pkt_len < sizeof(*mpa)) - return; + return 0; mpa = (struct mpa_message *) ep->mpa_pkt; /* Validate MPA header. */ @@ -1235,7 +1240,7 @@ static void process_mpa_reply(struct c4iw_ep *ep, struct sk_buff *skb) * We'll continue process when more data arrives. */ if (ep->mpa_pkt_len < (sizeof(*mpa) + plen)) - return; + return 0; if (mpa->flags & MPA_REJECT) { err = -ECONNREFUSED; @@ -1337,9 +1342,11 @@ static void process_mpa_reply(struct c4iw_ep *ep, struct sk_buff *skb) attrs.layer_etype = LAYER_MPA | DDP_LLP; attrs.ecode = MPA_NOMATCH_RTR; attrs.next_state = C4IW_QP_STATE_TERMINATE; + attrs.send_term = 1; err = c4iw_modify_qp(ep->com.qp->rhp, ep->com.qp, - C4IW_QP_ATTR_NEXT_STATE, &attrs, 0); + C4IW_QP_ATTR_NEXT_STATE, &attrs, 1); err = -ENOMEM; + disconnect = 1; goto out; } @@ -1355,9 +1362,11 @@ static void process_mpa_reply(struct c4iw_ep *ep, struct sk_buff *skb) attrs.layer_etype = LAYER_MPA | DDP_LLP; attrs.ecode = MPA_INSUFF_IRD; attrs.next_state = C4IW_QP_STATE_TERMINATE; + attrs.send_term = 1; err = c4iw_modify_qp(ep->com.qp->rhp, ep->com.qp, - C4IW_QP_ATTR_NEXT_STATE, &attrs, 0); + C4IW_QP_ATTR_NEXT_STATE, &attrs, 1); err = -ENOMEM; + disconnect = 1; goto out; } goto out; @@ -1366,7 +1375,7 @@ err: send_abort(ep, skb, GFP_KERNEL); out: connect_reply_upcall(ep, err); - return; + return disconnect; } static void process_mpa_request(struct c4iw_ep *ep, struct sk_buff *skb) @@ -1524,6 +1533,7 @@ static int rx_data(struct c4iw_dev *dev, struct sk_buff *skb) unsigned int tid = GET_TID(hdr); struct tid_info *t = dev->rdev.lldi.tids; __u8 status = hdr->status; + int disconnect = 0; ep = lookup_tid(t, tid); if (!ep) @@ -1539,7 +1549,7 @@ static int rx_data(struct c4iw_dev *dev, struct sk_buff *skb) switch (ep->com.state) { case MPA_REQ_SENT: ep->rcv_seq += dlen; - process_mpa_reply(ep, skb); + disconnect = process_mpa_reply(ep, skb); break; case MPA_REQ_WAIT: ep->rcv_seq += dlen; @@ -1555,13 +1565,16 @@ static int rx_data(struct c4iw_dev *dev, struct sk_buff *skb) ep->com.state, ep->hwtid, status); attrs.next_state = C4IW_QP_STATE_TERMINATE; c4iw_modify_qp(ep->com.qp->rhp, ep->com.qp, - C4IW_QP_ATTR_NEXT_STATE, &attrs, 0); + C4IW_QP_ATTR_NEXT_STATE, &attrs, 1); + disconnect = 1; break; } default: break; } mutex_unlock(&ep->com.mutex); + if (disconnect) + c4iw_ep_disconnect(ep, 0, GFP_KERNEL); return 0; } @@ -2009,6 +2022,10 @@ static void accept_cr(struct c4iw_ep *ep, struct sk_buff *skb, if (tcph->ece && tcph->cwr) opt2 |= CCTRL_ECN(1); } + if (is_t5(ep->com.dev->rdev.lldi.adapter_type)) { + opt2 |= T5_OPT_2_VALID; + opt2 |= V_CONG_CNTRL(CONG_ALG_TAHOE); + } rpl = cplhdr(skb); INIT_TP_WR(rpl, ep->hwtid); @@ -3482,9 +3499,9 @@ static void process_timeout(struct c4iw_ep *ep) __func__, ep, ep->hwtid, ep->com.state); abort = 0; } - mutex_unlock(&ep->com.mutex); if (abort) abort_connection(ep, NULL, GFP_KERNEL); + mutex_unlock(&ep->com.mutex); c4iw_put_ep(&ep->com); } diff --git a/drivers/infiniband/hw/cxgb4/iw_cxgb4.h b/drivers/infiniband/hw/cxgb4/iw_cxgb4.h index 7b8c5806a09d..7474b490760a 100644 --- a/drivers/infiniband/hw/cxgb4/iw_cxgb4.h +++ b/drivers/infiniband/hw/cxgb4/iw_cxgb4.h @@ -435,6 +435,7 @@ struct c4iw_qp_attributes { u8 ecode; u16 sq_db_inc; u16 rq_db_inc; + u8 send_term; }; struct c4iw_qp { diff --git a/drivers/infiniband/hw/cxgb4/qp.c b/drivers/infiniband/hw/cxgb4/qp.c index 7b5114cb486f..086f62f5dc9e 100644 --- a/drivers/infiniband/hw/cxgb4/qp.c +++ b/drivers/infiniband/hw/cxgb4/qp.c @@ -1388,11 +1388,12 @@ int c4iw_modify_qp(struct c4iw_dev *rhp, struct c4iw_qp *qhp, qhp->attr.layer_etype = attrs->layer_etype; qhp->attr.ecode = attrs->ecode; ep = qhp->ep; - disconnect = 1; - c4iw_get_ep(&qhp->ep->com); - if (!internal) + if (!internal) { + c4iw_get_ep(&qhp->ep->com); terminate = 1; - else { + disconnect = 1; + } else { + terminate = qhp->attr.send_term; ret = rdma_fini(rhp, qhp, ep); if (ret) goto err; @@ -1776,11 +1777,15 @@ int c4iw_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, /* * Use SQ_PSN and RQ_PSN to pass in IDX_INC values for * ringing the queue db when we're in DB_FULL mode. + * Only allow this on T4 devices. */ attrs.sq_db_inc = attr->sq_psn; attrs.rq_db_inc = attr->rq_psn; mask |= (attr_mask & IB_QP_SQ_PSN) ? C4IW_QP_ATTR_SQ_DB : 0; mask |= (attr_mask & IB_QP_RQ_PSN) ? C4IW_QP_ATTR_RQ_DB : 0; + if (is_t5(to_c4iw_qp(ibqp)->rhp->rdev.lldi.adapter_type) && + (mask & (C4IW_QP_ATTR_SQ_DB|C4IW_QP_ATTR_RQ_DB))) + return -EINVAL; return c4iw_modify_qp(rhp, qhp, mask, &attrs, 0); } diff --git a/drivers/infiniband/hw/cxgb4/t4fw_ri_api.h b/drivers/infiniband/hw/cxgb4/t4fw_ri_api.h index dc193c292671..6121ca08fe58 100644 --- a/drivers/infiniband/hw/cxgb4/t4fw_ri_api.h +++ b/drivers/infiniband/hw/cxgb4/t4fw_ri_api.h @@ -836,4 +836,18 @@ struct ulptx_idata { #define V_RX_DACK_CHANGE(x) ((x) << S_RX_DACK_CHANGE) #define F_RX_DACK_CHANGE V_RX_DACK_CHANGE(1U) +enum { /* TCP congestion control algorithms */ + CONG_ALG_RENO, + CONG_ALG_TAHOE, + CONG_ALG_NEWRENO, + CONG_ALG_HIGHSPEED +}; + +#define S_CONG_CNTRL 14 +#define M_CONG_CNTRL 0x3 +#define V_CONG_CNTRL(x) ((x) << S_CONG_CNTRL) +#define G_CONG_CNTRL(x) (((x) >> S_CONG_CNTRL) & M_CONG_CNTRL) + +#define T5_OPT_2_VALID (1 << 31) + #endif /* _T4FW_RI_API_H_ */ diff --git a/drivers/input/misc/da9055_onkey.c b/drivers/input/misc/da9055_onkey.c index 4b11ede34950..4765799fef74 100644 --- a/drivers/input/misc/da9055_onkey.c +++ b/drivers/input/misc/da9055_onkey.c @@ -109,7 +109,6 @@ static int da9055_onkey_probe(struct platform_device *pdev) INIT_DELAYED_WORK(&onkey->work, da9055_onkey_work); - irq = regmap_irq_get_virq(da9055->irq_data, irq); err = request_threaded_irq(irq, NULL, da9055_onkey_irq, IRQF_TRIGGER_HIGH | IRQF_ONESHOT, "ONKEY", onkey); diff --git a/drivers/input/misc/soc_button_array.c b/drivers/input/misc/soc_button_array.c index 08ead2aaede5..20c80f543d5e 100644 --- a/drivers/input/misc/soc_button_array.c +++ b/drivers/input/misc/soc_button_array.c @@ -169,6 +169,7 @@ static int soc_button_pnp_probe(struct pnp_dev *pdev, soc_button_remove(pdev); return error; } + continue; } priv->children[i] = pd; diff --git a/drivers/input/mouse/elantech.c b/drivers/input/mouse/elantech.c index ef1cf52f8bb9..088d3541c7d3 100644 --- a/drivers/input/mouse/elantech.c +++ b/drivers/input/mouse/elantech.c @@ -1353,6 +1353,7 @@ static int elantech_set_properties(struct elantech_data *etd) case 6: case 7: case 8: + case 9: etd->hw_version = 4; break; default: diff --git a/drivers/input/mouse/synaptics.c b/drivers/input/mouse/synaptics.c index d8d49d10f9bb..ef9f4913450d 100644 --- a/drivers/input/mouse/synaptics.c +++ b/drivers/input/mouse/synaptics.c @@ -117,6 +117,44 @@ void synaptics_reset(struct psmouse *psmouse) } #ifdef CONFIG_MOUSE_PS2_SYNAPTICS +/* This list has been kindly provided by Synaptics. */ +static const char * const topbuttonpad_pnp_ids[] = { + "LEN0017", + "LEN0018", + "LEN0019", + "LEN0023", + "LEN002A", + "LEN002B", + "LEN002C", + "LEN002D", + "LEN002E", + "LEN0033", /* Helix */ + "LEN0034", /* T431s, T540, X1 Carbon 2nd */ + "LEN0035", /* X240 */ + "LEN0036", /* T440 */ + "LEN0037", + "LEN0038", + "LEN0041", + "LEN0042", /* Yoga */ + "LEN0045", + "LEN0046", + "LEN0047", + "LEN0048", + "LEN0049", + "LEN2000", + "LEN2001", + "LEN2002", + "LEN2003", + "LEN2004", /* L440 */ + "LEN2005", + "LEN2006", + "LEN2007", + "LEN2008", + "LEN2009", + "LEN200A", + "LEN200B", + NULL +}; /***************************************************************************** * Synaptics communications functions @@ -1255,8 +1293,10 @@ static void set_abs_position_params(struct input_dev *dev, input_abs_set_res(dev, y_code, priv->y_res); } -static void set_input_params(struct input_dev *dev, struct synaptics_data *priv) +static void set_input_params(struct psmouse *psmouse, + struct synaptics_data *priv) { + struct input_dev *dev = psmouse->dev; int i; /* Things that apply to both modes */ @@ -1325,6 +1365,17 @@ static void set_input_params(struct input_dev *dev, struct synaptics_data *priv) if (SYN_CAP_CLICKPAD(priv->ext_cap_0c)) { __set_bit(INPUT_PROP_BUTTONPAD, dev->propbit); + /* See if this buttonpad has a top button area */ + if (!strncmp(psmouse->ps2dev.serio->firmware_id, "PNP:", 4)) { + for (i = 0; topbuttonpad_pnp_ids[i]; i++) { + if (strstr(psmouse->ps2dev.serio->firmware_id, + topbuttonpad_pnp_ids[i])) { + __set_bit(INPUT_PROP_TOPBUTTONPAD, + dev->propbit); + break; + } + } + } /* Clickpads report only left button */ __clear_bit(BTN_RIGHT, dev->keybit); __clear_bit(BTN_MIDDLE, dev->keybit); @@ -1515,6 +1566,14 @@ static const struct dmi_system_id min_max_dmi_table[] __initconst = { .driver_data = (int []){1232, 5710, 1156, 4696}, }, { + /* Lenovo ThinkPad T431s */ + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), + DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad T431"), + }, + .driver_data = (int []){1024, 5112, 2024, 4832}, + }, + { /* Lenovo ThinkPad T440s */ .matches = { DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), @@ -1523,6 +1582,14 @@ static const struct dmi_system_id min_max_dmi_table[] __initconst = { .driver_data = (int []){1024, 5112, 2024, 4832}, }, { + /* Lenovo ThinkPad L440 */ + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), + DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad L440"), + }, + .driver_data = (int []){1024, 5112, 2024, 4832}, + }, + { /* Lenovo ThinkPad T540p */ .matches = { DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), @@ -1530,6 +1597,32 @@ static const struct dmi_system_id min_max_dmi_table[] __initconst = { }, .driver_data = (int []){1024, 5056, 2058, 4832}, }, + { + /* Lenovo ThinkPad L540 */ + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), + DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad L540"), + }, + .driver_data = (int []){1024, 5112, 2024, 4832}, + }, + { + /* Lenovo Yoga S1 */ + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), + DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, + "ThinkPad S1 Yoga"), + }, + .driver_data = (int []){1232, 5710, 1156, 4696}, + }, + { + /* Lenovo ThinkPad X1 Carbon Haswell (3rd generation) */ + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), + DMI_MATCH(DMI_PRODUCT_VERSION, + "ThinkPad X1 Carbon 2nd"), + }, + .driver_data = (int []){1024, 5112, 2024, 4832}, + }, #endif { } }; @@ -1593,7 +1686,7 @@ static int __synaptics_init(struct psmouse *psmouse, bool absolute_mode) priv->capabilities, priv->ext_cap, priv->ext_cap_0c, priv->board_id, priv->firmware_id); - set_input_params(psmouse->dev, priv); + set_input_params(psmouse, priv); /* * Encode touchpad model so that it can be used to set diff --git a/drivers/input/serio/i8042-x86ia64io.h b/drivers/input/serio/i8042-x86ia64io.h index 0ec9abbe31fe..381b20d4c561 100644 --- a/drivers/input/serio/i8042-x86ia64io.h +++ b/drivers/input/serio/i8042-x86ia64io.h @@ -702,6 +702,17 @@ static int i8042_pnp_aux_irq; static char i8042_pnp_kbd_name[32]; static char i8042_pnp_aux_name[32]; +static void i8042_pnp_id_to_string(struct pnp_id *id, char *dst, int dst_size) +{ + strlcpy(dst, "PNP:", dst_size); + + while (id) { + strlcat(dst, " ", dst_size); + strlcat(dst, id->id, dst_size); + id = id->next; + } +} + static int i8042_pnp_kbd_probe(struct pnp_dev *dev, const struct pnp_device_id *did) { if (pnp_port_valid(dev, 0) && pnp_port_len(dev, 0) == 1) @@ -718,6 +729,8 @@ static int i8042_pnp_kbd_probe(struct pnp_dev *dev, const struct pnp_device_id * strlcat(i8042_pnp_kbd_name, ":", sizeof(i8042_pnp_kbd_name)); strlcat(i8042_pnp_kbd_name, pnp_dev_name(dev), sizeof(i8042_pnp_kbd_name)); } + i8042_pnp_id_to_string(dev->id, i8042_kbd_firmware_id, + sizeof(i8042_kbd_firmware_id)); /* Keyboard ports are always supposed to be wakeup-enabled */ device_set_wakeup_enable(&dev->dev, true); @@ -742,6 +755,8 @@ static int i8042_pnp_aux_probe(struct pnp_dev *dev, const struct pnp_device_id * strlcat(i8042_pnp_aux_name, ":", sizeof(i8042_pnp_aux_name)); strlcat(i8042_pnp_aux_name, pnp_dev_name(dev), sizeof(i8042_pnp_aux_name)); } + i8042_pnp_id_to_string(dev->id, i8042_aux_firmware_id, + sizeof(i8042_aux_firmware_id)); i8042_pnp_aux_devices++; return 0; diff --git a/drivers/input/serio/i8042.c b/drivers/input/serio/i8042.c index 020053fa5aaa..3807c3e971cc 100644 --- a/drivers/input/serio/i8042.c +++ b/drivers/input/serio/i8042.c @@ -87,6 +87,8 @@ MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off"); #endif static bool i8042_bypass_aux_irq_test; +static char i8042_kbd_firmware_id[128]; +static char i8042_aux_firmware_id[128]; #include "i8042.h" @@ -1218,6 +1220,8 @@ static int __init i8042_create_kbd_port(void) serio->dev.parent = &i8042_platform_device->dev; strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name)); strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys)); + strlcpy(serio->firmware_id, i8042_kbd_firmware_id, + sizeof(serio->firmware_id)); port->serio = serio; port->irq = I8042_KBD_IRQ; @@ -1244,6 +1248,8 @@ static int __init i8042_create_aux_port(int idx) if (idx < 0) { strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name)); strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys)); + strlcpy(serio->firmware_id, i8042_aux_firmware_id, + sizeof(serio->firmware_id)); serio->close = i8042_port_close; } else { snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx); diff --git a/drivers/input/serio/serio.c b/drivers/input/serio/serio.c index 8f4c4ab04bc2..b29134de983b 100644 --- a/drivers/input/serio/serio.c +++ b/drivers/input/serio/serio.c @@ -451,6 +451,13 @@ static ssize_t serio_set_bind_mode(struct device *dev, struct device_attribute * return retval; } +static ssize_t firmware_id_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct serio *serio = to_serio_port(dev); + + return sprintf(buf, "%s\n", serio->firmware_id); +} + static DEVICE_ATTR_RO(type); static DEVICE_ATTR_RO(proto); static DEVICE_ATTR_RO(id); @@ -473,12 +480,14 @@ static DEVICE_ATTR_RO(modalias); static DEVICE_ATTR_WO(drvctl); static DEVICE_ATTR(description, S_IRUGO, serio_show_description, NULL); static DEVICE_ATTR(bind_mode, S_IWUSR | S_IRUGO, serio_show_bind_mode, serio_set_bind_mode); +static DEVICE_ATTR_RO(firmware_id); static struct attribute *serio_device_attrs[] = { &dev_attr_modalias.attr, &dev_attr_description.attr, &dev_attr_drvctl.attr, &dev_attr_bind_mode.attr, + &dev_attr_firmware_id.attr, NULL }; @@ -921,9 +930,14 @@ static int serio_uevent(struct device *dev, struct kobj_uevent_env *env) SERIO_ADD_UEVENT_VAR("SERIO_PROTO=%02x", serio->id.proto); SERIO_ADD_UEVENT_VAR("SERIO_ID=%02x", serio->id.id); SERIO_ADD_UEVENT_VAR("SERIO_EXTRA=%02x", serio->id.extra); + SERIO_ADD_UEVENT_VAR("MODALIAS=serio:ty%02Xpr%02Xid%02Xex%02X", serio->id.type, serio->id.proto, serio->id.id, serio->id.extra); + if (serio->firmware_id[0]) + SERIO_ADD_UEVENT_VAR("SERIO_FIRMWARE_ID=%s", + serio->firmware_id); + return 0; } #undef SERIO_ADD_UEVENT_VAR diff --git a/drivers/input/tablet/wacom_sys.c b/drivers/input/tablet/wacom_sys.c index b16ebef5b911..611fc3905d00 100644 --- a/drivers/input/tablet/wacom_sys.c +++ b/drivers/input/tablet/wacom_sys.c @@ -22,23 +22,18 @@ #define HID_USAGE_PAGE_DIGITIZER 0x0d #define HID_USAGE_PAGE_DESKTOP 0x01 #define HID_USAGE 0x09 -#define HID_USAGE_X 0x30 -#define HID_USAGE_Y 0x31 -#define HID_USAGE_X_TILT 0x3d -#define HID_USAGE_Y_TILT 0x3e -#define HID_USAGE_FINGER 0x22 -#define HID_USAGE_STYLUS 0x20 -#define HID_USAGE_CONTACTMAX 0x55 +#define HID_USAGE_X ((HID_USAGE_PAGE_DESKTOP << 16) | 0x30) +#define HID_USAGE_Y ((HID_USAGE_PAGE_DESKTOP << 16) | 0x31) +#define HID_USAGE_PRESSURE ((HID_USAGE_PAGE_DIGITIZER << 16) | 0x30) +#define HID_USAGE_X_TILT ((HID_USAGE_PAGE_DIGITIZER << 16) | 0x3d) +#define HID_USAGE_Y_TILT ((HID_USAGE_PAGE_DIGITIZER << 16) | 0x3e) +#define HID_USAGE_FINGER ((HID_USAGE_PAGE_DIGITIZER << 16) | 0x22) +#define HID_USAGE_STYLUS ((HID_USAGE_PAGE_DIGITIZER << 16) | 0x20) +#define HID_USAGE_CONTACTMAX ((HID_USAGE_PAGE_DIGITIZER << 16) | 0x55) #define HID_COLLECTION 0xa1 #define HID_COLLECTION_LOGICAL 0x02 #define HID_COLLECTION_END 0xc0 -enum { - WCM_UNDEFINED = 0, - WCM_DESKTOP, - WCM_DIGITIZER, -}; - struct hid_descriptor { struct usb_descriptor_header header; __le16 bcdHID; @@ -305,7 +300,7 @@ static int wacom_parse_hid(struct usb_interface *intf, char limit = 0; /* result has to be defined as int for some devices */ int result = 0, touch_max = 0; - int i = 0, usage = WCM_UNDEFINED, finger = 0, pen = 0; + int i = 0, page = 0, finger = 0, pen = 0; unsigned char *report; report = kzalloc(hid_desc->wDescriptorLength, GFP_KERNEL); @@ -332,134 +327,121 @@ static int wacom_parse_hid(struct usb_interface *intf, switch (report[i]) { case HID_USAGE_PAGE: - switch (report[i + 1]) { - case HID_USAGE_PAGE_DIGITIZER: - usage = WCM_DIGITIZER; - i++; - break; - - case HID_USAGE_PAGE_DESKTOP: - usage = WCM_DESKTOP; - i++; - break; - } + page = report[i + 1]; + i++; break; case HID_USAGE: - switch (report[i + 1]) { + switch (page << 16 | report[i + 1]) { case HID_USAGE_X: - if (usage == WCM_DESKTOP) { - if (finger) { - features->device_type = BTN_TOOL_FINGER; - /* touch device at least supports one touch point */ - touch_max = 1; - switch (features->type) { - case TABLETPC2FG: - features->pktlen = WACOM_PKGLEN_TPC2FG; - break; - - case MTSCREEN: - case WACOM_24HDT: - features->pktlen = WACOM_PKGLEN_MTOUCH; - break; - - case MTTPC: - features->pktlen = WACOM_PKGLEN_MTTPC; - break; - - case BAMBOO_PT: - features->pktlen = WACOM_PKGLEN_BBTOUCH; - break; - - default: - features->pktlen = WACOM_PKGLEN_GRAPHIRE; - break; - } - - switch (features->type) { - case BAMBOO_PT: - features->x_phy = - get_unaligned_le16(&report[i + 5]); - features->x_max = - get_unaligned_le16(&report[i + 8]); - i += 15; - break; - - case WACOM_24HDT: - features->x_max = - get_unaligned_le16(&report[i + 3]); - features->x_phy = - get_unaligned_le16(&report[i + 8]); - features->unit = report[i - 1]; - features->unitExpo = report[i - 3]; - i += 12; - break; - - default: - features->x_max = - get_unaligned_le16(&report[i + 3]); - features->x_phy = - get_unaligned_le16(&report[i + 6]); - features->unit = report[i + 9]; - features->unitExpo = report[i + 11]; - i += 12; - break; - } - } else if (pen) { - /* penabled only accepts exact bytes of data */ - if (features->type >= TABLETPC) - features->pktlen = WACOM_PKGLEN_GRAPHIRE; - features->device_type = BTN_TOOL_PEN; + if (finger) { + features->device_type = BTN_TOOL_FINGER; + /* touch device at least supports one touch point */ + touch_max = 1; + switch (features->type) { + case TABLETPC2FG: + features->pktlen = WACOM_PKGLEN_TPC2FG; + break; + + case MTSCREEN: + case WACOM_24HDT: + features->pktlen = WACOM_PKGLEN_MTOUCH; + break; + + case MTTPC: + features->pktlen = WACOM_PKGLEN_MTTPC; + break; + + case BAMBOO_PT: + features->pktlen = WACOM_PKGLEN_BBTOUCH; + break; + + default: + features->pktlen = WACOM_PKGLEN_GRAPHIRE; + break; + } + + switch (features->type) { + case BAMBOO_PT: + features->x_phy = + get_unaligned_le16(&report[i + 5]); + features->x_max = + get_unaligned_le16(&report[i + 8]); + i += 15; + break; + + case WACOM_24HDT: features->x_max = get_unaligned_le16(&report[i + 3]); - i += 4; + features->x_phy = + get_unaligned_le16(&report[i + 8]); + features->unit = report[i - 1]; + features->unitExpo = report[i - 3]; + i += 12; + break; + + default: + features->x_max = + get_unaligned_le16(&report[i + 3]); + features->x_phy = + get_unaligned_le16(&report[i + 6]); + features->unit = report[i + 9]; + features->unitExpo = report[i + 11]; + i += 12; + break; } + } else if (pen) { + /* penabled only accepts exact bytes of data */ + if (features->type >= TABLETPC) + features->pktlen = WACOM_PKGLEN_GRAPHIRE; + features->device_type = BTN_TOOL_PEN; + features->x_max = + get_unaligned_le16(&report[i + 3]); + i += 4; } break; case HID_USAGE_Y: - if (usage == WCM_DESKTOP) { - if (finger) { - switch (features->type) { - case TABLETPC2FG: - case MTSCREEN: - case MTTPC: - features->y_max = - get_unaligned_le16(&report[i + 3]); - features->y_phy = - get_unaligned_le16(&report[i + 6]); - i += 7; - break; - - case WACOM_24HDT: - features->y_max = - get_unaligned_le16(&report[i + 3]); - features->y_phy = - get_unaligned_le16(&report[i - 2]); - i += 7; - break; - - case BAMBOO_PT: - features->y_phy = - get_unaligned_le16(&report[i + 3]); - features->y_max = - get_unaligned_le16(&report[i + 6]); - i += 12; - break; - - default: - features->y_max = - features->x_max; - features->y_phy = - get_unaligned_le16(&report[i + 3]); - i += 4; - break; - } - } else if (pen) { + if (finger) { + switch (features->type) { + case TABLETPC2FG: + case MTSCREEN: + case MTTPC: + features->y_max = + get_unaligned_le16(&report[i + 3]); + features->y_phy = + get_unaligned_le16(&report[i + 6]); + i += 7; + break; + + case WACOM_24HDT: + features->y_max = + get_unaligned_le16(&report[i + 3]); + features->y_phy = + get_unaligned_le16(&report[i - 2]); + i += 7; + break; + + case BAMBOO_PT: + features->y_phy = + get_unaligned_le16(&report[i + 3]); + features->y_max = + get_unaligned_le16(&report[i + 6]); + i += 12; + break; + + default: features->y_max = + features->x_max; + features->y_phy = get_unaligned_le16(&report[i + 3]); i += 4; + break; } + } else if (pen) { + features->y_max = + get_unaligned_le16(&report[i + 3]); + i += 4; } break; @@ -484,12 +466,20 @@ static int wacom_parse_hid(struct usb_interface *intf, wacom_retrieve_report_data(intf, features); i++; break; + + case HID_USAGE_PRESSURE: + if (pen) { + features->pressure_max = + get_unaligned_le16(&report[i + 3]); + i += 4; + } + break; } break; case HID_COLLECTION_END: /* reset UsagePage and Finger */ - finger = usage = 0; + finger = page = 0; break; case HID_COLLECTION: diff --git a/drivers/input/tablet/wacom_wac.c b/drivers/input/tablet/wacom_wac.c index 05f371df6c40..4822c57a3756 100644 --- a/drivers/input/tablet/wacom_wac.c +++ b/drivers/input/tablet/wacom_wac.c @@ -178,10 +178,9 @@ static int wacom_ptu_irq(struct wacom_wac *wacom) static int wacom_dtu_irq(struct wacom_wac *wacom) { - struct wacom_features *features = &wacom->features; - char *data = wacom->data; + unsigned char *data = wacom->data; struct input_dev *input = wacom->input; - int prox = data[1] & 0x20, pressure; + int prox = data[1] & 0x20; dev_dbg(input->dev.parent, "%s: received report #%d", __func__, data[0]); @@ -198,10 +197,7 @@ static int wacom_dtu_irq(struct wacom_wac *wacom) input_report_key(input, BTN_STYLUS2, data[1] & 0x10); input_report_abs(input, ABS_X, le16_to_cpup((__le16 *)&data[2])); input_report_abs(input, ABS_Y, le16_to_cpup((__le16 *)&data[4])); - pressure = ((data[7] & 0x01) << 8) | data[6]; - if (pressure < 0) - pressure = features->pressure_max + pressure + 1; - input_report_abs(input, ABS_PRESSURE, pressure); + input_report_abs(input, ABS_PRESSURE, ((data[7] & 0x01) << 8) | data[6]); input_report_key(input, BTN_TOUCH, data[1] & 0x05); if (!prox) /* out-prox */ wacom->id[0] = 0; @@ -906,7 +902,7 @@ static int int_dist(int x1, int y1, int x2, int y2) static int wacom_24hdt_irq(struct wacom_wac *wacom) { struct input_dev *input = wacom->input; - char *data = wacom->data; + unsigned char *data = wacom->data; int i; int current_num_contacts = data[61]; int contacts_to_send = 0; @@ -959,7 +955,7 @@ static int wacom_24hdt_irq(struct wacom_wac *wacom) static int wacom_mt_touch(struct wacom_wac *wacom) { struct input_dev *input = wacom->input; - char *data = wacom->data; + unsigned char *data = wacom->data; int i; int current_num_contacts = data[2]; int contacts_to_send = 0; @@ -1038,7 +1034,7 @@ static int wacom_tpc_mt_touch(struct wacom_wac *wacom) static int wacom_tpc_single_touch(struct wacom_wac *wacom, size_t len) { - char *data = wacom->data; + unsigned char *data = wacom->data; struct input_dev *input = wacom->input; bool prox; int x = 0, y = 0; @@ -1074,10 +1070,8 @@ static int wacom_tpc_single_touch(struct wacom_wac *wacom, size_t len) static int wacom_tpc_pen(struct wacom_wac *wacom) { - struct wacom_features *features = &wacom->features; - char *data = wacom->data; + unsigned char *data = wacom->data; struct input_dev *input = wacom->input; - int pressure; bool prox = data[1] & 0x20; if (!wacom->shared->stylus_in_proximity) /* first in prox */ @@ -1093,10 +1087,7 @@ static int wacom_tpc_pen(struct wacom_wac *wacom) input_report_key(input, BTN_STYLUS2, data[1] & 0x10); input_report_abs(input, ABS_X, le16_to_cpup((__le16 *)&data[2])); input_report_abs(input, ABS_Y, le16_to_cpup((__le16 *)&data[4])); - pressure = ((data[7] & 0x01) << 8) | data[6]; - if (pressure < 0) - pressure = features->pressure_max + pressure + 1; - input_report_abs(input, ABS_PRESSURE, pressure); + input_report_abs(input, ABS_PRESSURE, ((data[7] & 0x03) << 8) | data[6]); input_report_key(input, BTN_TOUCH, data[1] & 0x05); input_report_key(input, wacom->tool[0], prox); return 1; @@ -1107,7 +1098,7 @@ static int wacom_tpc_pen(struct wacom_wac *wacom) static int wacom_tpc_irq(struct wacom_wac *wacom, size_t len) { - char *data = wacom->data; + unsigned char *data = wacom->data; dev_dbg(wacom->input->dev.parent, "%s: received report #%d\n", __func__, data[0]); @@ -1838,7 +1829,7 @@ int wacom_setup_input_capabilities(struct input_dev *input_dev, case DTU: if (features->type == DTUS) { input_set_capability(input_dev, EV_MSC, MSC_SERIAL); - for (i = 0; i < 3; i++) + for (i = 0; i < 4; i++) __set_bit(BTN_0 + i, input_dev->keybit); } __set_bit(BTN_TOOL_PEN, input_dev->keybit); diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig index 68edc9db2c64..0b5965ba51bc 100644 --- a/drivers/input/touchscreen/Kconfig +++ b/drivers/input/touchscreen/Kconfig @@ -550,18 +550,6 @@ config TOUCHSCREEN_TI_AM335X_TSC To compile this driver as a module, choose M here: the module will be called ti_am335x_tsc. -config TOUCHSCREEN_ATMEL_TSADCC - tristate "Atmel Touchscreen Interface" - depends on ARCH_AT91 - help - Say Y here if you have a 4-wire touchscreen connected to the - ADC Controller on your Atmel SoC. - - If unsure, say N. - - To compile this driver as a module, choose M here: the - module will be called atmel_tsadcc. - config TOUCHSCREEN_UCB1400 tristate "Philips UCB1400 touchscreen" depends on AC97_BUS diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile index 4bc954b7c7c3..03f12a1f2218 100644 --- a/drivers/input/touchscreen/Makefile +++ b/drivers/input/touchscreen/Makefile @@ -13,7 +13,6 @@ obj-$(CONFIG_TOUCHSCREEN_AD7879_I2C) += ad7879-i2c.o obj-$(CONFIG_TOUCHSCREEN_AD7879_SPI) += ad7879-spi.o obj-$(CONFIG_TOUCHSCREEN_ADS7846) += ads7846.o obj-$(CONFIG_TOUCHSCREEN_ATMEL_MXT) += atmel_mxt_ts.o -obj-$(CONFIG_TOUCHSCREEN_ATMEL_TSADCC) += atmel_tsadcc.o obj-$(CONFIG_TOUCHSCREEN_AUO_PIXCIR) += auo-pixcir-ts.o obj-$(CONFIG_TOUCHSCREEN_BU21013) += bu21013_ts.o obj-$(CONFIG_TOUCHSCREEN_CY8CTMG110) += cy8ctmg110_ts.o diff --git a/drivers/input/touchscreen/ads7846.c b/drivers/input/touchscreen/ads7846.c index 45a06e495ed2..7f8aa981500d 100644 --- a/drivers/input/touchscreen/ads7846.c +++ b/drivers/input/touchscreen/ads7846.c @@ -425,7 +425,7 @@ static int ads7845_read12_ser(struct device *dev, unsigned command) name ## _show(struct device *dev, struct device_attribute *attr, char *buf) \ { \ struct ads7846 *ts = dev_get_drvdata(dev); \ - ssize_t v = ads7846_read12_ser(dev, \ + ssize_t v = ads7846_read12_ser(&ts->spi->dev, \ READ_12BIT_SER(var)); \ if (v < 0) \ return v; \ diff --git a/drivers/input/touchscreen/atmel_tsadcc.c b/drivers/input/touchscreen/atmel_tsadcc.c deleted file mode 100644 index a7c9d6967d1e..000000000000 --- a/drivers/input/touchscreen/atmel_tsadcc.c +++ /dev/null @@ -1,358 +0,0 @@ -/* - * Atmel Touch Screen Driver - * - * Copyright (c) 2008 ATMEL - * Copyright (c) 2008 Dan Liang - * Copyright (c) 2008 TimeSys Corporation - * Copyright (c) 2008 Justin Waters - * - * Based on touchscreen code from Atmel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include <linux/err.h> -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/input.h> -#include <linux/slab.h> -#include <linux/interrupt.h> -#include <linux/clk.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/platform_data/atmel.h> -#include <mach/cpu.h> - -/* Register definitions based on AT91SAM9RL64 preliminary draft datasheet */ - -#define ATMEL_TSADCC_CR 0x00 /* Control register */ -#define ATMEL_TSADCC_SWRST (1 << 0) /* Software Reset*/ -#define ATMEL_TSADCC_START (1 << 1) /* Start conversion */ - -#define ATMEL_TSADCC_MR 0x04 /* Mode register */ -#define ATMEL_TSADCC_TSAMOD (3 << 0) /* ADC mode */ -#define ATMEL_TSADCC_TSAMOD_ADC_ONLY_MODE (0x0) /* ADC Mode */ -#define ATMEL_TSADCC_TSAMOD_TS_ONLY_MODE (0x1) /* Touch Screen Only Mode */ -#define ATMEL_TSADCC_LOWRES (1 << 4) /* Resolution selection */ -#define ATMEL_TSADCC_SLEEP (1 << 5) /* Sleep mode */ -#define ATMEL_TSADCC_PENDET (1 << 6) /* Pen Detect selection */ -#define ATMEL_TSADCC_PRES (1 << 7) /* Pressure Measurement Selection */ -#define ATMEL_TSADCC_PRESCAL (0x3f << 8) /* Prescalar Rate Selection */ -#define ATMEL_TSADCC_EPRESCAL (0xff << 8) /* Prescalar Rate Selection (Extended) */ -#define ATMEL_TSADCC_STARTUP (0x7f << 16) /* Start Up time */ -#define ATMEL_TSADCC_SHTIM (0xf << 24) /* Sample & Hold time */ -#define ATMEL_TSADCC_PENDBC (0xf << 28) /* Pen Detect debouncing time */ - -#define ATMEL_TSADCC_TRGR 0x08 /* Trigger register */ -#define ATMEL_TSADCC_TRGMOD (7 << 0) /* Trigger mode */ -#define ATMEL_TSADCC_TRGMOD_NONE (0 << 0) -#define ATMEL_TSADCC_TRGMOD_EXT_RISING (1 << 0) -#define ATMEL_TSADCC_TRGMOD_EXT_FALLING (2 << 0) -#define ATMEL_TSADCC_TRGMOD_EXT_ANY (3 << 0) -#define ATMEL_TSADCC_TRGMOD_PENDET (4 << 0) -#define ATMEL_TSADCC_TRGMOD_PERIOD (5 << 0) -#define ATMEL_TSADCC_TRGMOD_CONTINUOUS (6 << 0) -#define ATMEL_TSADCC_TRGPER (0xffff << 16) /* Trigger period */ - -#define ATMEL_TSADCC_TSR 0x0C /* Touch Screen register */ -#define ATMEL_TSADCC_TSFREQ (0xf << 0) /* TS Frequency in Interleaved mode */ -#define ATMEL_TSADCC_TSSHTIM (0xf << 24) /* Sample & Hold time */ - -#define ATMEL_TSADCC_CHER 0x10 /* Channel Enable register */ -#define ATMEL_TSADCC_CHDR 0x14 /* Channel Disable register */ -#define ATMEL_TSADCC_CHSR 0x18 /* Channel Status register */ -#define ATMEL_TSADCC_CH(n) (1 << (n)) /* Channel number */ - -#define ATMEL_TSADCC_SR 0x1C /* Status register */ -#define ATMEL_TSADCC_EOC(n) (1 << ((n)+0)) /* End of conversion for channel N */ -#define ATMEL_TSADCC_OVRE(n) (1 << ((n)+8)) /* Overrun error for channel N */ -#define ATMEL_TSADCC_DRDY (1 << 16) /* Data Ready */ -#define ATMEL_TSADCC_GOVRE (1 << 17) /* General Overrun Error */ -#define ATMEL_TSADCC_ENDRX (1 << 18) /* End of RX Buffer */ -#define ATMEL_TSADCC_RXBUFF (1 << 19) /* TX Buffer full */ -#define ATMEL_TSADCC_PENCNT (1 << 20) /* Pen contact */ -#define ATMEL_TSADCC_NOCNT (1 << 21) /* No contact */ - -#define ATMEL_TSADCC_LCDR 0x20 /* Last Converted Data register */ -#define ATMEL_TSADCC_DATA (0x3ff << 0) /* Channel data */ - -#define ATMEL_TSADCC_IER 0x24 /* Interrupt Enable register */ -#define ATMEL_TSADCC_IDR 0x28 /* Interrupt Disable register */ -#define ATMEL_TSADCC_IMR 0x2C /* Interrupt Mask register */ -#define ATMEL_TSADCC_CDR0 0x30 /* Channel Data 0 */ -#define ATMEL_TSADCC_CDR1 0x34 /* Channel Data 1 */ -#define ATMEL_TSADCC_CDR2 0x38 /* Channel Data 2 */ -#define ATMEL_TSADCC_CDR3 0x3C /* Channel Data 3 */ -#define ATMEL_TSADCC_CDR4 0x40 /* Channel Data 4 */ -#define ATMEL_TSADCC_CDR5 0x44 /* Channel Data 5 */ - -#define ATMEL_TSADCC_XPOS 0x50 -#define ATMEL_TSADCC_Z1DAT 0x54 -#define ATMEL_TSADCC_Z2DAT 0x58 - -#define PRESCALER_VAL(x) ((x) >> 8) - -#define ADC_DEFAULT_CLOCK 100000 - -struct atmel_tsadcc { - struct input_dev *input; - char phys[32]; - struct clk *clk; - int irq; - unsigned int prev_absx; - unsigned int prev_absy; - unsigned char bufferedmeasure; -}; - -static void __iomem *tsc_base; - -#define atmel_tsadcc_read(reg) __raw_readl(tsc_base + (reg)) -#define atmel_tsadcc_write(reg, val) __raw_writel((val), tsc_base + (reg)) - -static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) -{ - struct atmel_tsadcc *ts_dev = (struct atmel_tsadcc *)dev; - struct input_dev *input_dev = ts_dev->input; - - unsigned int status; - unsigned int reg; - - status = atmel_tsadcc_read(ATMEL_TSADCC_SR); - status &= atmel_tsadcc_read(ATMEL_TSADCC_IMR); - - if (status & ATMEL_TSADCC_NOCNT) { - /* Contact lost */ - reg = atmel_tsadcc_read(ATMEL_TSADCC_MR) | ATMEL_TSADCC_PENDBC; - - atmel_tsadcc_write(ATMEL_TSADCC_MR, reg); - atmel_tsadcc_write(ATMEL_TSADCC_TRGR, ATMEL_TSADCC_TRGMOD_NONE); - atmel_tsadcc_write(ATMEL_TSADCC_IDR, - ATMEL_TSADCC_EOC(3) | ATMEL_TSADCC_NOCNT); - atmel_tsadcc_write(ATMEL_TSADCC_IER, ATMEL_TSADCC_PENCNT); - - input_report_key(input_dev, BTN_TOUCH, 0); - ts_dev->bufferedmeasure = 0; - input_sync(input_dev); - - } else if (status & ATMEL_TSADCC_PENCNT) { - /* Pen detected */ - reg = atmel_tsadcc_read(ATMEL_TSADCC_MR); - reg &= ~ATMEL_TSADCC_PENDBC; - - atmel_tsadcc_write(ATMEL_TSADCC_IDR, ATMEL_TSADCC_PENCNT); - atmel_tsadcc_write(ATMEL_TSADCC_MR, reg); - atmel_tsadcc_write(ATMEL_TSADCC_IER, - ATMEL_TSADCC_EOC(3) | ATMEL_TSADCC_NOCNT); - atmel_tsadcc_write(ATMEL_TSADCC_TRGR, - ATMEL_TSADCC_TRGMOD_PERIOD | (0x0FFF << 16)); - - } else if (status & ATMEL_TSADCC_EOC(3)) { - /* Conversion finished */ - - if (ts_dev->bufferedmeasure) { - /* Last measurement is always discarded, since it can - * be erroneous. - * Always report previous measurement */ - input_report_abs(input_dev, ABS_X, ts_dev->prev_absx); - input_report_abs(input_dev, ABS_Y, ts_dev->prev_absy); - input_report_key(input_dev, BTN_TOUCH, 1); - input_sync(input_dev); - } else - ts_dev->bufferedmeasure = 1; - - /* Now make new measurement */ - ts_dev->prev_absx = atmel_tsadcc_read(ATMEL_TSADCC_CDR3) << 10; - ts_dev->prev_absx /= atmel_tsadcc_read(ATMEL_TSADCC_CDR2); - - ts_dev->prev_absy = atmel_tsadcc_read(ATMEL_TSADCC_CDR1) << 10; - ts_dev->prev_absy /= atmel_tsadcc_read(ATMEL_TSADCC_CDR0); - } - - return IRQ_HANDLED; -} - -/* - * The functions for inserting/removing us as a module. - */ - -static int atmel_tsadcc_probe(struct platform_device *pdev) -{ - struct atmel_tsadcc *ts_dev; - struct input_dev *input_dev; - struct resource *res; - struct at91_tsadcc_data *pdata = dev_get_platdata(&pdev->dev); - int err; - unsigned int prsc; - unsigned int reg; - - if (!pdata) - return -EINVAL; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) { - dev_err(&pdev->dev, "no mmio resource defined.\n"); - return -ENXIO; - } - - /* Allocate memory for device */ - ts_dev = kzalloc(sizeof(struct atmel_tsadcc), GFP_KERNEL); - if (!ts_dev) { - dev_err(&pdev->dev, "failed to allocate memory.\n"); - return -ENOMEM; - } - platform_set_drvdata(pdev, ts_dev); - - input_dev = input_allocate_device(); - if (!input_dev) { - dev_err(&pdev->dev, "failed to allocate input device.\n"); - err = -EBUSY; - goto err_free_mem; - } - - ts_dev->irq = platform_get_irq(pdev, 0); - if (ts_dev->irq < 0) { - dev_err(&pdev->dev, "no irq ID is designated.\n"); - err = -ENODEV; - goto err_free_dev; - } - - if (!request_mem_region(res->start, resource_size(res), - "atmel tsadcc regs")) { - dev_err(&pdev->dev, "resources is unavailable.\n"); - err = -EBUSY; - goto err_free_dev; - } - - tsc_base = ioremap(res->start, resource_size(res)); - if (!tsc_base) { - dev_err(&pdev->dev, "failed to map registers.\n"); - err = -ENOMEM; - goto err_release_mem; - } - - err = request_irq(ts_dev->irq, atmel_tsadcc_interrupt, 0, - pdev->dev.driver->name, ts_dev); - if (err) { - dev_err(&pdev->dev, "failed to allocate irq.\n"); - goto err_unmap_regs; - } - - ts_dev->clk = clk_get(&pdev->dev, "tsc_clk"); - if (IS_ERR(ts_dev->clk)) { - dev_err(&pdev->dev, "failed to get ts_clk\n"); - err = PTR_ERR(ts_dev->clk); - goto err_free_irq; - } - - ts_dev->input = input_dev; - ts_dev->bufferedmeasure = 0; - - snprintf(ts_dev->phys, sizeof(ts_dev->phys), - "%s/input0", dev_name(&pdev->dev)); - - input_dev->name = "atmel touch screen controller"; - input_dev->phys = ts_dev->phys; - input_dev->dev.parent = &pdev->dev; - - __set_bit(EV_ABS, input_dev->evbit); - input_set_abs_params(input_dev, ABS_X, 0, 0x3FF, 0, 0); - input_set_abs_params(input_dev, ABS_Y, 0, 0x3FF, 0, 0); - - input_set_capability(input_dev, EV_KEY, BTN_TOUCH); - - /* clk_enable() always returns 0, no need to check it */ - clk_enable(ts_dev->clk); - - prsc = clk_get_rate(ts_dev->clk); - dev_info(&pdev->dev, "Master clock is set at: %d Hz\n", prsc); - - if (!pdata->adc_clock) - pdata->adc_clock = ADC_DEFAULT_CLOCK; - - prsc = (prsc / (2 * pdata->adc_clock)) - 1; - - /* saturate if this value is too high */ - if (cpu_is_at91sam9rl()) { - if (prsc > PRESCALER_VAL(ATMEL_TSADCC_PRESCAL)) - prsc = PRESCALER_VAL(ATMEL_TSADCC_PRESCAL); - } else { - if (prsc > PRESCALER_VAL(ATMEL_TSADCC_EPRESCAL)) - prsc = PRESCALER_VAL(ATMEL_TSADCC_EPRESCAL); - } - - dev_info(&pdev->dev, "Prescaler is set at: %d\n", prsc); - - reg = ATMEL_TSADCC_TSAMOD_TS_ONLY_MODE | - ((0x00 << 5) & ATMEL_TSADCC_SLEEP) | /* Normal Mode */ - ((0x01 << 6) & ATMEL_TSADCC_PENDET) | /* Enable Pen Detect */ - (prsc << 8) | - ((0x26 << 16) & ATMEL_TSADCC_STARTUP) | - ((pdata->pendet_debounce << 28) & ATMEL_TSADCC_PENDBC); - - atmel_tsadcc_write(ATMEL_TSADCC_CR, ATMEL_TSADCC_SWRST); - atmel_tsadcc_write(ATMEL_TSADCC_MR, reg); - atmel_tsadcc_write(ATMEL_TSADCC_TRGR, ATMEL_TSADCC_TRGMOD_NONE); - atmel_tsadcc_write(ATMEL_TSADCC_TSR, - (pdata->ts_sample_hold_time << 24) & ATMEL_TSADCC_TSSHTIM); - - atmel_tsadcc_read(ATMEL_TSADCC_SR); - atmel_tsadcc_write(ATMEL_TSADCC_IER, ATMEL_TSADCC_PENCNT); - - /* All went ok, so register to the input system */ - err = input_register_device(input_dev); - if (err) - goto err_fail; - - return 0; - -err_fail: - clk_disable(ts_dev->clk); - clk_put(ts_dev->clk); -err_free_irq: - free_irq(ts_dev->irq, ts_dev); -err_unmap_regs: - iounmap(tsc_base); -err_release_mem: - release_mem_region(res->start, resource_size(res)); -err_free_dev: - input_free_device(input_dev); -err_free_mem: - kfree(ts_dev); - return err; -} - -static int atmel_tsadcc_remove(struct platform_device *pdev) -{ - struct atmel_tsadcc *ts_dev = platform_get_drvdata(pdev); - struct resource *res; - - free_irq(ts_dev->irq, ts_dev); - - input_unregister_device(ts_dev->input); - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - iounmap(tsc_base); - release_mem_region(res->start, resource_size(res)); - - clk_disable(ts_dev->clk); - clk_put(ts_dev->clk); - - kfree(ts_dev); - - return 0; -} - -static struct platform_driver atmel_tsadcc_driver = { - .probe = atmel_tsadcc_probe, - .remove = atmel_tsadcc_remove, - .driver = { - .name = "atmel_tsadcc", - }, -}; -module_platform_driver(atmel_tsadcc_driver); - -MODULE_LICENSE("GPL"); -MODULE_DESCRIPTION("Atmel TouchScreen Driver"); -MODULE_AUTHOR("Dan Liang <[email protected]>"); - diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 41be897df8d5..3899ba7821c5 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -41,6 +41,7 @@ #define ARMADA_370_XP_INT_SET_ENABLE_OFFS (0x30) #define ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS (0x34) #define ARMADA_370_XP_INT_SOURCE_CTL(irq) (0x100 + irq*4) +#define ARMADA_370_XP_INT_SOURCE_CPU_MASK 0xF #define ARMADA_370_XP_CPU_INTACK_OFFS (0x44) #define ARMADA_375_PPI_CAUSE (0x10) @@ -132,8 +133,7 @@ static int armada_370_xp_setup_msi_irq(struct msi_chip *chip, struct msi_desc *desc) { struct msi_msg msg; - irq_hw_number_t hwirq; - int virq; + int virq, hwirq; hwirq = armada_370_xp_alloc_msi(); if (hwirq < 0) @@ -159,8 +159,19 @@ static void armada_370_xp_teardown_msi_irq(struct msi_chip *chip, unsigned int irq) { struct irq_data *d = irq_get_irq_data(irq); + unsigned long hwirq = d->hwirq; + irq_dispose_mapping(irq); - armada_370_xp_free_msi(d->hwirq); + armada_370_xp_free_msi(hwirq); +} + +static int armada_370_xp_check_msi_device(struct msi_chip *chip, struct pci_dev *dev, + int nvec, int type) +{ + /* We support MSI, but not MSI-X */ + if (type == PCI_CAP_ID_MSI) + return 0; + return -EINVAL; } static struct irq_chip armada_370_xp_msi_irq_chip = { @@ -201,6 +212,7 @@ static int armada_370_xp_msi_init(struct device_node *node, msi_chip->setup_irq = armada_370_xp_setup_msi_irq; msi_chip->teardown_irq = armada_370_xp_teardown_msi_irq; + msi_chip->check_device = armada_370_xp_check_msi_device; msi_chip->of_node = node; armada_370_xp_msi_domain = @@ -244,35 +256,18 @@ static DEFINE_RAW_SPINLOCK(irq_controller_lock); static int armada_xp_set_affinity(struct irq_data *d, const struct cpumask *mask_val, bool force) { - unsigned long reg; - unsigned long new_mask = 0; - unsigned long online_mask = 0; - unsigned long count = 0; irq_hw_number_t hwirq = irqd_to_hwirq(d); + unsigned long reg, mask; int cpu; - for_each_cpu(cpu, mask_val) { - new_mask |= 1 << cpu_logical_map(cpu); - count++; - } - - /* - * Forbid mutlicore interrupt affinity - * This is required since the MPIC HW doesn't limit - * several CPUs from acknowledging the same interrupt. - */ - if (count > 1) - return -EINVAL; - - for_each_cpu(cpu, cpu_online_mask) - online_mask |= 1 << cpu_logical_map(cpu); + /* Select a single core from the affinity mask which is online */ + cpu = cpumask_any_and(mask_val, cpu_online_mask); + mask = 1UL << cpu_logical_map(cpu); raw_spin_lock(&irq_controller_lock); - reg = readl(main_int_base + ARMADA_370_XP_INT_SOURCE_CTL(hwirq)); - reg = (reg & (~online_mask)) | new_mask; + reg = (reg & (~ARMADA_370_XP_INT_SOURCE_CPU_MASK)) | mask; writel(reg, main_int_base + ARMADA_370_XP_INT_SOURCE_CTL(hwirq)); - raw_spin_unlock(&irq_controller_lock); return 0; @@ -494,15 +489,6 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node, #ifdef CONFIG_SMP armada_xp_mpic_smp_cpu_init(); - - /* - * Set the default affinity from all CPUs to the boot cpu. - * This is required since the MPIC doesn't limit several CPUs - * from acknowledging the same interrupt. - */ - cpumask_clear(irq_default_affinity); - cpumask_set_cpu(smp_processor_id(), irq_default_affinity); - #endif armada_370_xp_msi_init(node, main_int_res.start); diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c index fc817d28d1fe..3d15d16a7088 100644 --- a/drivers/irqchip/irq-crossbar.c +++ b/drivers/irqchip/irq-crossbar.c @@ -107,7 +107,7 @@ static int __init crossbar_of_init(struct device_node *node) int i, size, max, reserved = 0, entry; const __be32 *irqsr; - cb = kzalloc(sizeof(struct cb_device *), GFP_KERNEL); + cb = kzalloc(sizeof(*cb), GFP_KERNEL); if (!cb) return -ENOMEM; diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 4300b6606f5e..57d165e026f4 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -246,10 +246,14 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, bool force) { void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + (gic_irq(d) & ~3); - unsigned int shift = (gic_irq(d) % 4) * 8; - unsigned int cpu = cpumask_any_and(mask_val, cpu_online_mask); + unsigned int cpu, shift = (gic_irq(d) % 4) * 8; u32 val, mask, bit; + if (!force) + cpu = cpumask_any_and(mask_val, cpu_online_mask); + else + cpu = cpumask_first(mask_val); + if (cpu >= NR_GIC_CPU_IF || cpu >= nr_cpu_ids) return -EINVAL; diff --git a/drivers/md/dm-cache-target.c b/drivers/md/dm-cache-target.c index 1bf4a71919ec..9380be7b1895 100644 --- a/drivers/md/dm-cache-target.c +++ b/drivers/md/dm-cache-target.c @@ -2488,6 +2488,7 @@ static int cache_map(struct dm_target *ti, struct bio *bio) } else { inc_hit_counter(cache, bio); + pb->all_io_entry = dm_deferred_entry_inc(cache->all_io_ds); if (bio_data_dir(bio) == WRITE && writethrough_mode(&cache->features) && !is_dirty(cache, lookup_result.cblock)) diff --git a/drivers/md/dm-thin.c b/drivers/md/dm-thin.c index 53728be84dee..13abade76ad9 100644 --- a/drivers/md/dm-thin.c +++ b/drivers/md/dm-thin.c @@ -232,6 +232,13 @@ struct thin_c { struct bio_list deferred_bio_list; struct bio_list retry_on_resume_list; struct rb_root sort_bio_list; /* sorted list of deferred bios */ + + /* + * Ensures the thin is not destroyed until the worker has finished + * iterating the active_thins list. + */ + atomic_t refcount; + struct completion can_destroy; }; /*----------------------------------------------------------------*/ @@ -1486,6 +1493,45 @@ static void process_thin_deferred_bios(struct thin_c *tc) blk_finish_plug(&plug); } +static void thin_get(struct thin_c *tc); +static void thin_put(struct thin_c *tc); + +/* + * We can't hold rcu_read_lock() around code that can block. So we + * find a thin with the rcu lock held; bump a refcount; then drop + * the lock. + */ +static struct thin_c *get_first_thin(struct pool *pool) +{ + struct thin_c *tc = NULL; + + rcu_read_lock(); + if (!list_empty(&pool->active_thins)) { + tc = list_entry_rcu(pool->active_thins.next, struct thin_c, list); + thin_get(tc); + } + rcu_read_unlock(); + + return tc; +} + +static struct thin_c *get_next_thin(struct pool *pool, struct thin_c *tc) +{ + struct thin_c *old_tc = tc; + + rcu_read_lock(); + list_for_each_entry_continue_rcu(tc, &pool->active_thins, list) { + thin_get(tc); + thin_put(old_tc); + rcu_read_unlock(); + return tc; + } + thin_put(old_tc); + rcu_read_unlock(); + + return NULL; +} + static void process_deferred_bios(struct pool *pool) { unsigned long flags; @@ -1493,10 +1539,11 @@ static void process_deferred_bios(struct pool *pool) struct bio_list bios; struct thin_c *tc; - rcu_read_lock(); - list_for_each_entry_rcu(tc, &pool->active_thins, list) + tc = get_first_thin(pool); + while (tc) { process_thin_deferred_bios(tc); - rcu_read_unlock(); + tc = get_next_thin(pool, tc); + } /* * If there are any deferred flush bios, we must commit @@ -1578,7 +1625,7 @@ static void noflush_work(struct thin_c *tc, void (*fn)(struct work_struct *)) { struct noflush_work w; - INIT_WORK(&w.worker, fn); + INIT_WORK_ONSTACK(&w.worker, fn); w.tc = tc; atomic_set(&w.complete, 0); init_waitqueue_head(&w.wait); @@ -3061,11 +3108,25 @@ static struct target_type pool_target = { /*---------------------------------------------------------------- * Thin target methods *--------------------------------------------------------------*/ +static void thin_get(struct thin_c *tc) +{ + atomic_inc(&tc->refcount); +} + +static void thin_put(struct thin_c *tc) +{ + if (atomic_dec_and_test(&tc->refcount)) + complete(&tc->can_destroy); +} + static void thin_dtr(struct dm_target *ti) { struct thin_c *tc = ti->private; unsigned long flags; + thin_put(tc); + wait_for_completion(&tc->can_destroy); + spin_lock_irqsave(&tc->pool->lock, flags); list_del_rcu(&tc->list); spin_unlock_irqrestore(&tc->pool->lock, flags); @@ -3101,6 +3162,7 @@ static int thin_ctr(struct dm_target *ti, unsigned argc, char **argv) struct thin_c *tc; struct dm_dev *pool_dev, *origin_dev; struct mapped_device *pool_md; + unsigned long flags; mutex_lock(&dm_thin_pool_table.mutex); @@ -3191,9 +3253,12 @@ static int thin_ctr(struct dm_target *ti, unsigned argc, char **argv) mutex_unlock(&dm_thin_pool_table.mutex); - spin_lock(&tc->pool->lock); + atomic_set(&tc->refcount, 1); + init_completion(&tc->can_destroy); + + spin_lock_irqsave(&tc->pool->lock, flags); list_add_tail_rcu(&tc->list, &tc->pool->active_thins); - spin_unlock(&tc->pool->lock); + spin_unlock_irqrestore(&tc->pool->lock, flags); /* * This synchronize_rcu() call is needed here otherwise we risk a * wake_worker() call finding no bios to process (because the newly diff --git a/drivers/md/dm-verity.c b/drivers/md/dm-verity.c index 796007a5e0e1..7a7bab8947ae 100644 --- a/drivers/md/dm-verity.c +++ b/drivers/md/dm-verity.c @@ -330,15 +330,17 @@ test_block_hash: return r; } } - todo = 1 << v->data_dev_block_bits; - while (io->iter.bi_size) { + do { u8 *page; + unsigned len; struct bio_vec bv = bio_iter_iovec(bio, io->iter); page = kmap_atomic(bv.bv_page); - r = crypto_shash_update(desc, page + bv.bv_offset, - bv.bv_len); + len = bv.bv_len; + if (likely(len >= todo)) + len = todo; + r = crypto_shash_update(desc, page + bv.bv_offset, len); kunmap_atomic(page); if (r < 0) { @@ -346,8 +348,9 @@ test_block_hash: return r; } - bio_advance_iter(bio, &io->iter, bv.bv_len); - } + bio_advance_iter(bio, &io->iter, len); + todo -= len; + } while (todo); if (!v->version) { r = crypto_shash_update(desc, v->salt, v->salt_size); diff --git a/drivers/of/irq.c b/drivers/of/irq.c index 9bcf2cf19357..5aeb89411350 100644 --- a/drivers/of/irq.c +++ b/drivers/of/irq.c @@ -364,7 +364,7 @@ int of_irq_to_resource(struct device_node *dev, int index, struct resource *r) memset(r, 0, sizeof(*r)); /* - * Get optional "interrupts-names" property to add a name + * Get optional "interrupt-names" property to add a name * to the resource. */ of_property_read_string_index(dev, "interrupt-names", index, @@ -380,6 +380,32 @@ int of_irq_to_resource(struct device_node *dev, int index, struct resource *r) EXPORT_SYMBOL_GPL(of_irq_to_resource); /** + * of_irq_get - Decode a node's IRQ and return it as a Linux irq number + * @dev: pointer to device tree node + * @index: zero-based index of the irq + * + * Returns Linux irq number on success, or -EPROBE_DEFER if the irq domain + * is not yet created. + * + */ +int of_irq_get(struct device_node *dev, int index) +{ + int rc; + struct of_phandle_args oirq; + struct irq_domain *domain; + + rc = of_irq_parse_one(dev, index, &oirq); + if (rc) + return rc; + + domain = irq_find_host(oirq.np); + if (!domain) + return -EPROBE_DEFER; + + return irq_create_of_mapping(&oirq); +} + +/** * of_irq_count - Count the number of IRQs a node uses * @dev: pointer to device tree node */ diff --git a/drivers/of/platform.c b/drivers/of/platform.c index 404d1daebefa..bd47fbc53dc9 100644 --- a/drivers/of/platform.c +++ b/drivers/of/platform.c @@ -168,7 +168,9 @@ struct platform_device *of_device_alloc(struct device_node *np, rc = of_address_to_resource(np, i, res); WARN_ON(rc); } - WARN_ON(of_irq_to_resource_table(np, res, num_irq) != num_irq); + if (of_irq_to_resource_table(np, res, num_irq) != num_irq) + pr_debug("not all legacy IRQ resources mapped for %s\n", + np->name); } dev->dev.of_node = of_node_get(np); diff --git a/drivers/of/selftest.c b/drivers/of/selftest.c index ae4450070503..fe70b86bcffb 100644 --- a/drivers/of/selftest.c +++ b/drivers/of/selftest.c @@ -10,6 +10,7 @@ #include <linux/module.h> #include <linux/of.h> #include <linux/of_irq.h> +#include <linux/of_platform.h> #include <linux/list.h> #include <linux/mutex.h> #include <linux/slab.h> @@ -427,6 +428,36 @@ static void __init of_selftest_match_node(void) } } +static void __init of_selftest_platform_populate(void) +{ + int irq; + struct device_node *np; + struct platform_device *pdev; + + np = of_find_node_by_path("/testcase-data"); + of_platform_populate(np, of_default_bus_match_table, NULL, NULL); + + /* Test that a missing irq domain returns -EPROBE_DEFER */ + np = of_find_node_by_path("/testcase-data/testcase-device1"); + pdev = of_find_device_by_node(np); + if (!pdev) + selftest(0, "device 1 creation failed\n"); + irq = platform_get_irq(pdev, 0); + if (irq != -EPROBE_DEFER) + selftest(0, "device deferred probe failed - %d\n", irq); + + /* Test that a parsing failure does not return -EPROBE_DEFER */ + np = of_find_node_by_path("/testcase-data/testcase-device2"); + pdev = of_find_device_by_node(np); + if (!pdev) + selftest(0, "device 2 creation failed\n"); + irq = platform_get_irq(pdev, 0); + if (irq >= 0 || irq == -EPROBE_DEFER) + selftest(0, "device parsing error failed - %d\n", irq); + + selftest(1, "passed"); +} + static int __init of_selftest(void) { struct device_node *np; @@ -445,6 +476,7 @@ static int __init of_selftest(void) of_selftest_parse_interrupts(); of_selftest_parse_interrupts_extended(); of_selftest_match_node(); + of_selftest_platform_populate(); pr_info("end of selftest - %i passed, %i failed\n", selftest_results.passed, selftest_results.failed); return 0; diff --git a/drivers/of/testcase-data/tests-interrupts.dtsi b/drivers/of/testcase-data/tests-interrupts.dtsi index c843720bd3e5..da4695f60351 100644 --- a/drivers/of/testcase-data/tests-interrupts.dtsi +++ b/drivers/of/testcase-data/tests-interrupts.dtsi @@ -54,5 +54,18 @@ <&test_intmap1 1 2>; }; }; + + testcase-device1 { + compatible = "testcase-device"; + interrupt-parent = <&test_intc0>; + interrupts = <1>; + }; + + testcase-device2 { + compatible = "testcase-device"; + interrupt-parent = <&test_intc2>; + interrupts = <1>; /* invalid specifier - too short */ + }; }; + }; diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index 3bb05f17b9b4..4906c27fa3bd 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -33,6 +33,7 @@ config PHY_MVEBU_SATA config OMAP_CONTROL_PHY tristate "OMAP CONTROL PHY Driver" + depends on ARCH_OMAP2PLUS || COMPILE_TEST help Enable this to add support for the PHY part present in the control module. This driver has API to power on the USB2 PHY and to write to diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index 2faf78edc864..7728518572a4 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -13,8 +13,9 @@ obj-$(CONFIG_TI_PIPE3) += phy-ti-pipe3.o obj-$(CONFIG_TWL4030_USB) += phy-twl4030-usb.o obj-$(CONFIG_PHY_EXYNOS5250_SATA) += phy-exynos5250-sata.o obj-$(CONFIG_PHY_SUN4I_USB) += phy-sun4i-usb.o -obj-$(CONFIG_PHY_SAMSUNG_USB2) += phy-samsung-usb2.o -obj-$(CONFIG_PHY_EXYNOS4210_USB2) += phy-exynos4210-usb2.o -obj-$(CONFIG_PHY_EXYNOS4X12_USB2) += phy-exynos4x12-usb2.o -obj-$(CONFIG_PHY_EXYNOS5250_USB2) += phy-exynos5250-usb2.o +obj-$(CONFIG_PHY_SAMSUNG_USB2) += phy-exynos-usb2.o +phy-exynos-usb2-y += phy-samsung-usb2.o +phy-exynos-usb2-$(CONFIG_PHY_EXYNOS4210_USB2) += phy-exynos4210-usb2.o +phy-exynos-usb2-$(CONFIG_PHY_EXYNOS4X12_USB2) += phy-exynos4x12-usb2.o +phy-exynos-usb2-$(CONFIG_PHY_EXYNOS5250_USB2) += phy-exynos5250-usb2.o obj-$(CONFIG_PHY_XGENE) += phy-xgene.o diff --git a/drivers/phy/phy-core.c b/drivers/phy/phy-core.c index 623b71c54b3e..c64a2f3b2d62 100644 --- a/drivers/phy/phy-core.c +++ b/drivers/phy/phy-core.c @@ -64,6 +64,9 @@ static struct phy *phy_lookup(struct device *device, const char *port) class_dev_iter_init(&iter, phy_class, NULL, NULL); while ((dev = class_dev_iter_next(&iter))) { phy = to_phy(dev); + + if (!phy->init_data) + continue; count = phy->init_data->num_consumers; consumers = phy->init_data->consumers; while (count--) { diff --git a/drivers/pinctrl/pinctrl-as3722.c b/drivers/pinctrl/pinctrl-as3722.c index 92ed4b2e3c07..c862f9c0e9ce 100644 --- a/drivers/pinctrl/pinctrl-as3722.c +++ b/drivers/pinctrl/pinctrl-as3722.c @@ -64,7 +64,6 @@ struct as3722_pin_function { }; struct as3722_gpio_pin_control { - bool enable_gpio_invert; unsigned mode_prop; int io_function; }; @@ -320,10 +319,8 @@ static int as3722_pinctrl_gpio_set_direction(struct pinctrl_dev *pctldev, return mode; } - if (as_pci->gpio_control[offset].enable_gpio_invert) - mode |= AS3722_GPIO_INV; - - return as3722_write(as3722, AS3722_GPIOn_CONTROL_REG(offset), mode); + return as3722_update_bits(as3722, AS3722_GPIOn_CONTROL_REG(offset), + AS3722_GPIO_MODE_MASK, mode); } static const struct pinmux_ops as3722_pinmux_ops = { @@ -496,10 +493,18 @@ static void as3722_gpio_set(struct gpio_chip *chip, unsigned offset, { struct as3722_pctrl_info *as_pci = to_as_pci(chip); struct as3722 *as3722 = as_pci->as3722; - int en_invert = as_pci->gpio_control[offset].enable_gpio_invert; + int en_invert; u32 val; int ret; + ret = as3722_read(as3722, AS3722_GPIOn_CONTROL_REG(offset), &val); + if (ret < 0) { + dev_err(as_pci->dev, + "GPIO_CONTROL%d_REG read failed: %d\n", offset, ret); + return; + } + en_invert = !!(val & AS3722_GPIO_INV); + if (value) val = (en_invert) ? 0 : AS3722_GPIOn_SIGNAL(offset); else diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index 81075f2a1d3f..2960557bfed9 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -810,6 +810,7 @@ static const struct pinconf_ops pcs_pinconf_ops = { static int pcs_add_pin(struct pcs_device *pcs, unsigned offset, unsigned pin_pos) { + struct pcs_soc_data *pcs_soc = &pcs->socdata; struct pinctrl_pin_desc *pin; struct pcs_name *pn; int i; @@ -821,6 +822,18 @@ static int pcs_add_pin(struct pcs_device *pcs, unsigned offset, return -ENOMEM; } + if (pcs_soc->irq_enable_mask) { + unsigned val; + + val = pcs->read(pcs->base + offset); + if (val & pcs_soc->irq_enable_mask) { + dev_dbg(pcs->dev, "irq enabled at boot for pin at %lx (%x), clearing\n", + (unsigned long)pcs->res->start + offset, val); + val &= ~pcs_soc->irq_enable_mask; + pcs->write(val, pcs->base + offset); + } + } + pin = &pcs->pins.pa[i]; pn = &pcs->names[i]; sprintf(pn->name, "%lx.%d", diff --git a/drivers/pinctrl/pinctrl-tb10x.c b/drivers/pinctrl/pinctrl-tb10x.c index c5e0f6973a3b..26ca6855f478 100644 --- a/drivers/pinctrl/pinctrl-tb10x.c +++ b/drivers/pinctrl/pinctrl-tb10x.c @@ -629,9 +629,8 @@ static int tb10x_gpio_request_enable(struct pinctrl_dev *pctl, */ for (i = 0; i < state->pinfuncgrpcnt; i++) { const struct tb10x_pinfuncgrp *pfg = &state->pingroups[i]; - unsigned int port = pfg->port; unsigned int mode = pfg->mode; - int j; + int j, port = pfg->port; /* * Skip pin groups which are always mapped and don't need diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c index 48093719167a..f5cd3f961808 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c @@ -4794,8 +4794,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { FN_MSIOF0_SCK_B, 0, /* IP5_23_21 [3] */ FN_WE1_N, FN_IERX, FN_CAN1_RX, FN_VI1_G4, - FN_VI1_G4_B, FN_VI2_R6, FN_SCIFA0_CTS_N_B, - FN_IERX_C, 0, + FN_VI1_G4_B, FN_VI2_R6, FN_SCIFA0_CTS_N_B, FN_IERX_C, /* IP5_20_18 [3] */ FN_WE0_N, FN_IECLK, FN_CAN_CLK, FN_VI2_VSYNC_N, FN_SCIFA0_TXD_B, FN_VI2_VSYNC_N_B, 0, 0, diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c index 5186d70c49d4..7868bf3a0f91 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c @@ -5288,7 +5288,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { /* SEL_SCIF3 [2] */ FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3, /* SEL_IEB [2] */ - FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, + FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, 0, /* SEL_MMC [1] */ FN_SEL_MMC_0, FN_SEL_MMC_1, /* SEL_SCIF5 [1] */ diff --git a/drivers/pnp/pnpacpi/core.c b/drivers/pnp/pnpacpi/core.c index 9f611cbbc294..c31aa07b3ba5 100644 --- a/drivers/pnp/pnpacpi/core.c +++ b/drivers/pnp/pnpacpi/core.c @@ -83,8 +83,7 @@ static int pnpacpi_set_resources(struct pnp_dev *dev) { struct acpi_device *acpi_dev; acpi_handle handle; - struct acpi_buffer buffer; - int ret; + int ret = 0; pnp_dbg(&dev->dev, "set resources\n"); @@ -97,19 +96,26 @@ static int pnpacpi_set_resources(struct pnp_dev *dev) if (WARN_ON_ONCE(acpi_dev != dev->data)) dev->data = acpi_dev; - ret = pnpacpi_build_resource_template(dev, &buffer); - if (ret) - return ret; - ret = pnpacpi_encode_resources(dev, &buffer); - if (ret) { + if (acpi_has_method(handle, METHOD_NAME__SRS)) { + struct acpi_buffer buffer; + + ret = pnpacpi_build_resource_template(dev, &buffer); + if (ret) + return ret; + + ret = pnpacpi_encode_resources(dev, &buffer); + if (!ret) { + acpi_status status; + + status = acpi_set_current_resources(handle, &buffer); + if (ACPI_FAILURE(status)) + ret = -EIO; + } kfree(buffer.pointer); - return ret; } - if (ACPI_FAILURE(acpi_set_current_resources(handle, &buffer))) - ret = -EINVAL; - else if (acpi_bus_power_manageable(handle)) + if (!ret && acpi_bus_power_manageable(handle)) ret = acpi_bus_set_power(handle, ACPI_STATE_D0); - kfree(buffer.pointer); + return ret; } @@ -117,7 +123,7 @@ static int pnpacpi_disable_resources(struct pnp_dev *dev) { struct acpi_device *acpi_dev; acpi_handle handle; - int ret; + acpi_status status; dev_dbg(&dev->dev, "disable resources\n"); @@ -128,13 +134,15 @@ static int pnpacpi_disable_resources(struct pnp_dev *dev) } /* acpi_unregister_gsi(pnp_irq(dev, 0)); */ - ret = 0; if (acpi_bus_power_manageable(handle)) acpi_bus_set_power(handle, ACPI_STATE_D3_COLD); - /* continue even if acpi_bus_set_power() fails */ - if (ACPI_FAILURE(acpi_evaluate_object(handle, "_DIS", NULL, NULL))) - ret = -ENODEV; - return ret; + + /* continue even if acpi_bus_set_power() fails */ + status = acpi_evaluate_object(handle, "_DIS", NULL, NULL); + if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) + return -ENODEV; + + return 0; } #ifdef CONFIG_ACPI_SLEEP diff --git a/drivers/pnp/quirks.c b/drivers/pnp/quirks.c index 258fef272ea7..ebf0d6710b5a 100644 --- a/drivers/pnp/quirks.c +++ b/drivers/pnp/quirks.c @@ -15,6 +15,7 @@ #include <linux/types.h> #include <linux/kernel.h> +#include <linux/pci.h> #include <linux/string.h> #include <linux/slab.h> #include <linux/pnp.h> @@ -334,6 +335,81 @@ static void quirk_amd_mmconfig_area(struct pnp_dev *dev) } #endif +#ifdef CONFIG_PCI +/* Device IDs of parts that have 32KB MCH space */ +static const unsigned int mch_quirk_devices[] = { + 0x0154, /* Ivy Bridge */ + 0x0c00, /* Haswell */ +}; + +static struct pci_dev *get_intel_host(void) +{ + int i; + struct pci_dev *host; + + for (i = 0; i < ARRAY_SIZE(mch_quirk_devices); i++) { + host = pci_get_device(PCI_VENDOR_ID_INTEL, mch_quirk_devices[i], + NULL); + if (host) + return host; + } + return NULL; +} + +static void quirk_intel_mch(struct pnp_dev *dev) +{ + struct pci_dev *host; + u32 addr_lo, addr_hi; + struct pci_bus_region region; + struct resource mch; + struct pnp_resource *pnp_res; + struct resource *res; + + host = get_intel_host(); + if (!host) + return; + + /* + * MCHBAR is not an architected PCI BAR, so MCH space is usually + * reported as a PNP0C02 resource. The MCH space was originally + * 16KB, but is 32KB in newer parts. Some BIOSes still report a + * PNP0C02 resource that is only 16KB, which means the rest of the + * MCH space is consumed but unreported. + */ + + /* + * Read MCHBAR for Host Member Mapped Register Range Base + * https://www-ssl.intel.com/content/www/us/en/processors/core/4th-gen-core-family-desktop-vol-2-datasheet + * Sec 3.1.12. + */ + pci_read_config_dword(host, 0x48, &addr_lo); + region.start = addr_lo & ~0x7fff; + pci_read_config_dword(host, 0x4c, &addr_hi); + region.start |= (u64) addr_hi << 32; + region.end = region.start + 32*1024 - 1; + + memset(&mch, 0, sizeof(mch)); + mch.flags = IORESOURCE_MEM; + pcibios_bus_to_resource(host->bus, &mch, ®ion); + + list_for_each_entry(pnp_res, &dev->resources, list) { + res = &pnp_res->res; + if (res->end < mch.start || res->start > mch.end) + continue; /* no overlap */ + if (res->start == mch.start && res->end == mch.end) + continue; /* exact match */ + + dev_info(&dev->dev, FW_BUG "PNP resource %pR covers only part of %s Intel MCH; extending to %pR\n", + res, pci_name(host), &mch); + res->start = mch.start; + res->end = mch.end; + break; + } + + pci_dev_put(host); +} +#endif + /* * PnP Quirks * Cards or devices that need some tweaking due to incomplete resource info @@ -364,6 +440,9 @@ static struct pnp_fixup pnp_fixups[] = { #ifdef CONFIG_AMD_NB {"PNP0c01", quirk_amd_mmconfig_area}, #endif +#ifdef CONFIG_PCI + {"PNP0c02", quirk_intel_mch}, +#endif {""} }; diff --git a/drivers/power/reset/vexpress-poweroff.c b/drivers/power/reset/vexpress-poweroff.c index 476aa495c110..b95cf71ed695 100644 --- a/drivers/power/reset/vexpress-poweroff.c +++ b/drivers/power/reset/vexpress-poweroff.c @@ -11,7 +11,7 @@ * Copyright (C) 2012 ARM Limited */ -#include <linux/jiffies.h> +#include <linux/delay.h> #include <linux/of.h> #include <linux/of_device.h> #include <linux/platform_device.h> @@ -23,17 +23,12 @@ static void vexpress_reset_do(struct device *dev, const char *what) { int err = -ENOENT; - struct vexpress_config_func *func = - vexpress_config_func_get_by_dev(dev); + struct vexpress_config_func *func = dev_get_drvdata(dev); if (func) { - unsigned long timeout; - err = vexpress_config_write(func, 0, 0); - - timeout = jiffies + HZ; - while (time_before(jiffies, timeout)) - cpu_relax(); + if (!err) + mdelay(1000); } dev_emerg(dev, "Unable to %s (%d)\n", what, err); @@ -96,12 +91,18 @@ static int vexpress_reset_probe(struct platform_device *pdev) enum vexpress_reset_func func; const struct of_device_id *match = of_match_device(vexpress_reset_of_match, &pdev->dev); + struct vexpress_config_func *config_func; if (match) func = (enum vexpress_reset_func)match->data; else func = pdev->id_entry->driver_data; + config_func = vexpress_config_func_get_by_dev(&pdev->dev); + if (!config_func) + return -EINVAL; + dev_set_drvdata(&pdev->dev, config_func); + switch (func) { case FUNC_SHUTDOWN: vexpress_power_off_device = &pdev->dev; diff --git a/drivers/regulator/pbias-regulator.c b/drivers/regulator/pbias-regulator.c index ded3b3574209..6d38be3d970c 100644 --- a/drivers/regulator/pbias-regulator.c +++ b/drivers/regulator/pbias-regulator.c @@ -38,66 +38,24 @@ struct pbias_reg_info { struct pbias_regulator_data { struct regulator_desc desc; void __iomem *pbias_addr; - unsigned int pbias_reg; struct regulator_dev *dev; struct regmap *syscon; const struct pbias_reg_info *info; int voltage; }; -static int pbias_regulator_set_voltage(struct regulator_dev *dev, - int min_uV, int max_uV, unsigned *selector) -{ - struct pbias_regulator_data *data = rdev_get_drvdata(dev); - const struct pbias_reg_info *info = data->info; - int ret, vmode; - - if (min_uV <= 1800000) - vmode = 0; - else if (min_uV > 1800000) - vmode = info->vmode; - - ret = regmap_update_bits(data->syscon, data->pbias_reg, - info->vmode, vmode); - - return ret; -} - -static int pbias_regulator_get_voltage(struct regulator_dev *rdev) -{ - struct pbias_regulator_data *data = rdev_get_drvdata(rdev); - const struct pbias_reg_info *info = data->info; - int value, voltage; - - regmap_read(data->syscon, data->pbias_reg, &value); - value &= info->vmode; - - voltage = value ? 3000000 : 1800000; - - return voltage; -} +static const unsigned int pbias_volt_table[] = { + 1800000, + 3000000 +}; static int pbias_regulator_enable(struct regulator_dev *rdev) { struct pbias_regulator_data *data = rdev_get_drvdata(rdev); const struct pbias_reg_info *info = data->info; - int ret; - - ret = regmap_update_bits(data->syscon, data->pbias_reg, - info->enable_mask, info->enable); - - return ret; -} - -static int pbias_regulator_disable(struct regulator_dev *rdev) -{ - struct pbias_regulator_data *data = rdev_get_drvdata(rdev); - const struct pbias_reg_info *info = data->info; - int ret; - ret = regmap_update_bits(data->syscon, data->pbias_reg, - info->enable_mask, 0); - return ret; + return regmap_update_bits(data->syscon, rdev->desc->enable_reg, + info->enable_mask, info->enable); } static int pbias_regulator_is_enable(struct regulator_dev *rdev) @@ -106,17 +64,18 @@ static int pbias_regulator_is_enable(struct regulator_dev *rdev) const struct pbias_reg_info *info = data->info; int value; - regmap_read(data->syscon, data->pbias_reg, &value); + regmap_read(data->syscon, rdev->desc->enable_reg, &value); - return (value & info->enable_mask) == info->enable_mask; + return (value & info->enable_mask) == info->enable; } static struct regulator_ops pbias_regulator_voltage_ops = { - .set_voltage = pbias_regulator_set_voltage, - .get_voltage = pbias_regulator_get_voltage, - .enable = pbias_regulator_enable, - .disable = pbias_regulator_disable, - .is_enabled = pbias_regulator_is_enable, + .list_voltage = regulator_list_voltage_table, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .enable = pbias_regulator_enable, + .disable = regulator_disable_regmap, + .is_enabled = pbias_regulator_is_enable, }; static const struct pbias_reg_info pbias_mmc_omap2430 = { @@ -192,6 +151,7 @@ static int pbias_regulator_probe(struct platform_device *pdev) if (IS_ERR(syscon)) return PTR_ERR(syscon); + cfg.regmap = syscon; cfg.dev = &pdev->dev; for (idx = 0; idx < PBIAS_NUM_REGS && data_idx < count; idx++) { @@ -207,15 +167,19 @@ static int pbias_regulator_probe(struct platform_device *pdev) if (!res) return -EINVAL; - drvdata[data_idx].pbias_reg = res->start; drvdata[data_idx].syscon = syscon; drvdata[data_idx].info = info; drvdata[data_idx].desc.name = info->name; drvdata[data_idx].desc.owner = THIS_MODULE; drvdata[data_idx].desc.type = REGULATOR_VOLTAGE; drvdata[data_idx].desc.ops = &pbias_regulator_voltage_ops; + drvdata[data_idx].desc.volt_table = pbias_volt_table; drvdata[data_idx].desc.n_voltages = 2; drvdata[data_idx].desc.enable_time = info->enable_time; + drvdata[data_idx].desc.vsel_reg = res->start; + drvdata[data_idx].desc.vsel_mask = info->vmode; + drvdata[data_idx].desc.enable_reg = res->start; + drvdata[data_idx].desc.enable_mask = info->enable_mask; cfg.init_data = pbias_matches[idx].init_data; cfg.driver_data = &drvdata[data_idx]; diff --git a/drivers/reset/sti/reset-stih415.c b/drivers/reset/sti/reset-stih415.c index e6f6c41abe12..c93fd260447e 100644 --- a/drivers/reset/sti/reset-stih415.c +++ b/drivers/reset/sti/reset-stih415.c @@ -73,6 +73,7 @@ static const struct syscfg_reset_channel_data stih415_softresets[] = { [STIH415_USB0_SOFTRESET] = STIH415_SRST_REAR(SYSCFG_376, 9), [STIH415_USB1_SOFTRESET] = STIH415_SRST_REAR(SYSCFG_376, 10), [STIH415_USB2_SOFTRESET] = STIH415_SRST_REAR(SYSCFG_376, 11), + [STIH415_KEYSCAN_SOFTRESET] = STIH415_SRST_LPM(LPM_SYSCFG_1, 8), }; static struct syscfg_reset_controller_data stih415_powerdown_controller = { diff --git a/drivers/reset/sti/reset-stih416.c b/drivers/reset/sti/reset-stih416.c index fe3bf02bdc8c..5fc987076a90 100644 --- a/drivers/reset/sti/reset-stih416.c +++ b/drivers/reset/sti/reset-stih416.c @@ -104,6 +104,7 @@ static const struct syscfg_reset_channel_data stih416_softresets[] = { [STIH416_COMPO_A_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 4), [STIH416_VP8_DEC_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 10), [STIH416_VTG_MAIN_SOFTRESET] = STIH416_SRST_CPU(SYSCFG_7564, 16), + [STIH416_KEYSCAN_SOFTRESET] = STIH416_SRST_LPM(LPM_SYSCFG_1, 8), }; static struct syscfg_reset_controller_data stih416_powerdown_controller = { diff --git a/drivers/s390/cio/chsc.c b/drivers/s390/cio/chsc.c index 9f0ea6cb6922..e3bf885f4a6c 100644 --- a/drivers/s390/cio/chsc.c +++ b/drivers/s390/cio/chsc.c @@ -541,18 +541,27 @@ static void chsc_process_sei_nt0(struct chsc_sei_nt0_area *sei_area) static void chsc_process_event_information(struct chsc_sei *sei, u64 ntsm) { - do { + static int ntsm_unsupported; + + while (true) { memset(sei, 0, sizeof(*sei)); sei->request.length = 0x0010; sei->request.code = 0x000e; - sei->ntsm = ntsm; + if (!ntsm_unsupported) + sei->ntsm = ntsm; if (chsc(sei)) break; if (sei->response.code != 0x0001) { - CIO_CRW_EVENT(2, "chsc: sei failed (rc=%04x)\n", - sei->response.code); + CIO_CRW_EVENT(2, "chsc: sei failed (rc=%04x, ntsm=%llx)\n", + sei->response.code, sei->ntsm); + + if (sei->response.code == 3 && sei->ntsm) { + /* Fallback for old firmware. */ + ntsm_unsupported = 1; + continue; + } break; } @@ -568,7 +577,10 @@ static void chsc_process_event_information(struct chsc_sei *sei, u64 ntsm) CIO_CRW_EVENT(2, "chsc: unhandled nt: %d\n", sei->nt); break; } - } while (sei->u.nt0_area.flags & 0x80); + + if (!(sei->u.nt0_area.flags & 0x80)) + break; + } } /* diff --git a/drivers/scsi/hpsa.c b/drivers/scsi/hpsa.c index 8cf4a0c69baf..9a6e4a2cd072 100644 --- a/drivers/scsi/hpsa.c +++ b/drivers/scsi/hpsa.c @@ -7463,6 +7463,10 @@ static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) if (hpsa_simple_mode) return; + trans_support = readl(&(h->cfgtable->TransportSupport)); + if (!(trans_support & PERFORMANT_MODE)) + return; + /* Check for I/O accelerator mode support */ if (trans_support & CFGTBL_Trans_io_accel1) { transMethod |= CFGTBL_Trans_io_accel1 | @@ -7479,10 +7483,6 @@ static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) } /* TODO, check that this next line h->nreply_queues is correct */ - trans_support = readl(&(h->cfgtable->TransportSupport)); - if (!(trans_support & PERFORMANT_MODE)) - return; - h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1; hpsa_get_max_perf_mode_cmds(h); /* Performant mode ring buffer and supporting data structures */ diff --git a/drivers/scsi/mpt2sas/mpt2sas_scsih.c b/drivers/scsi/mpt2sas/mpt2sas_scsih.c index 7f0af4fcc001..6fd7d40b2c4d 100644 --- a/drivers/scsi/mpt2sas/mpt2sas_scsih.c +++ b/drivers/scsi/mpt2sas/mpt2sas_scsih.c @@ -8293,7 +8293,6 @@ _scsih_suspend(struct pci_dev *pdev, pm_message_t state) mpt2sas_base_free_resources(ioc); pci_save_state(pdev); - pci_disable_device(pdev); pci_set_power_state(pdev, device_state); return 0; } diff --git a/drivers/scsi/scsi_error.c b/drivers/scsi/scsi_error.c index 771c16bfdbac..f17aa7aa7879 100644 --- a/drivers/scsi/scsi_error.c +++ b/drivers/scsi/scsi_error.c @@ -189,6 +189,7 @@ scsi_abort_command(struct scsi_cmnd *scmd) /* * Retry after abort failed, escalate to next level. */ + scmd->eh_eflags &= ~SCSI_EH_ABORT_SCHEDULED; SCSI_LOG_ERROR_RECOVERY(3, scmd_printk(KERN_INFO, scmd, "scmd %p previous abort failed\n", scmd)); @@ -920,10 +921,12 @@ void scsi_eh_prep_cmnd(struct scsi_cmnd *scmd, struct scsi_eh_save *ses, ses->prot_op = scmd->prot_op; scmd->prot_op = SCSI_PROT_NORMAL; + scmd->eh_eflags = 0; scmd->cmnd = ses->eh_cmnd; memset(scmd->cmnd, 0, BLK_MAX_CDB); memset(&scmd->sdb, 0, sizeof(scmd->sdb)); scmd->request->next_rq = NULL; + scmd->result = 0; if (sense_bytes) { scmd->sdb.length = min_t(unsigned, SCSI_SENSE_BUFFERSIZE, @@ -1157,6 +1160,15 @@ int scsi_eh_get_sense(struct list_head *work_q, __func__)); break; } + if (status_byte(scmd->result) != CHECK_CONDITION) + /* + * don't request sense if there's no check condition + * status because the error we're processing isn't one + * that has a sense code (and some devices get + * confused by sense requests out of the blue) + */ + continue; + SCSI_LOG_ERROR_RECOVERY(2, scmd_printk(KERN_INFO, scmd, "%s: requesting sense\n", current->comm)); diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c index 65a123d9c676..9db097a28a74 100644 --- a/drivers/scsi/scsi_lib.c +++ b/drivers/scsi/scsi_lib.c @@ -137,6 +137,7 @@ static void __scsi_queue_insert(struct scsi_cmnd *cmd, int reason, int unbusy) * lock such that the kblockd_schedule_work() call happens * before blk_cleanup_queue() finishes. */ + cmd->result = 0; spin_lock_irqsave(q->queue_lock, flags); blk_requeue_request(q, cmd->request); kblockd_schedule_work(q, &device->requeue_work); @@ -1044,6 +1045,7 @@ static int scsi_init_sgtable(struct request *req, struct scsi_data_buffer *sdb, */ int scsi_init_io(struct scsi_cmnd *cmd, gfp_t gfp_mask) { + struct scsi_device *sdev = cmd->device; struct request *rq = cmd->request; int error = scsi_init_sgtable(rq, &cmd->sdb, gfp_mask); @@ -1091,7 +1093,7 @@ err_exit: scsi_release_buffers(cmd); cmd->request->special = NULL; scsi_put_command(cmd); - put_device(&cmd->device->sdev_gendev); + put_device(&sdev->sdev_gendev); return error; } EXPORT_SYMBOL(scsi_init_io); @@ -1273,7 +1275,7 @@ int scsi_prep_return(struct request_queue *q, struct request *req, int ret) struct scsi_cmnd *cmd = req->special; scsi_release_buffers(cmd); scsi_put_command(cmd); - put_device(&cmd->device->sdev_gendev); + put_device(&sdev->sdev_gendev); req->special = NULL; } break; diff --git a/drivers/scsi/virtio_scsi.c b/drivers/scsi/virtio_scsi.c index 16bfd50cd3fe..db3b494e5926 100644 --- a/drivers/scsi/virtio_scsi.c +++ b/drivers/scsi/virtio_scsi.c @@ -750,8 +750,12 @@ static void __virtscsi_set_affinity(struct virtio_scsi *vscsi, bool affinity) vscsi->affinity_hint_set = true; } else { - for (i = 0; i < vscsi->num_queues; i++) + for (i = 0; i < vscsi->num_queues; i++) { + if (!vscsi->req_vqs[i].vq) + continue; + virtqueue_set_affinity(vscsi->req_vqs[i].vq, -1); + } vscsi->affinity_hint_set = false; } diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index 8005f9869481..079e6b1b0cdb 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c @@ -1115,8 +1115,11 @@ static int atmel_spi_one_transfer(struct spi_master *master, atmel_spi_next_xfer_pio(master, xfer); } + /* interrupts are disabled, so free the lock for schedule */ + atmel_spi_unlock(as); ret = wait_for_completion_timeout(&as->xfer_completion, SPI_DMA_TIMEOUT); + atmel_spi_lock(as); if (WARN_ON(ret == 0)) { dev_err(&spi->dev, "spi trasfer timeout, err %d\n", ret); diff --git a/drivers/spi/spi-bfin5xx.c b/drivers/spi/spi-bfin5xx.c index 55e57c3eb9bd..ebf720b88a2a 100644 --- a/drivers/spi/spi-bfin5xx.c +++ b/drivers/spi/spi-bfin5xx.c @@ -12,6 +12,7 @@ #include <linux/module.h> #include <linux/delay.h> #include <linux/device.h> +#include <linux/gpio.h> #include <linux/slab.h> #include <linux/io.h> #include <linux/ioport.h> diff --git a/drivers/spi/spi-sh-hspi.c b/drivers/spi/spi-sh-hspi.c index 9009456bdf4d..c8e795ef2e13 100644 --- a/drivers/spi/spi-sh-hspi.c +++ b/drivers/spi/spi-sh-hspi.c @@ -244,9 +244,9 @@ static int hspi_probe(struct platform_device *pdev) return -ENOMEM; } - clk = clk_get(NULL, "shyway_clk"); + clk = clk_get(&pdev->dev, NULL); if (IS_ERR(clk)) { - dev_err(&pdev->dev, "shyway_clk is required\n"); + dev_err(&pdev->dev, "couldn't get clock\n"); ret = -EINVAL; goto error0; } diff --git a/drivers/spi/spi-sirf.c b/drivers/spi/spi-sirf.c index 1a77ad52812f..67d8909dcf39 100644 --- a/drivers/spi/spi-sirf.c +++ b/drivers/spi/spi-sirf.c @@ -287,8 +287,8 @@ static irqreturn_t spi_sirfsoc_irq(int irq, void *dev_id) sspi->left_rx_word) sspi->rx_word(sspi); - if (spi_stat & (SIRFSOC_SPI_FIFO_EMPTY - | SIRFSOC_SPI_TXFIFO_THD_REACH)) + if (spi_stat & (SIRFSOC_SPI_TXFIFO_EMPTY | + SIRFSOC_SPI_TXFIFO_THD_REACH)) while (!((readl(sspi->base + SIRFSOC_SPI_TXFIFO_STATUS) & SIRFSOC_SPI_FIFO_FULL)) && sspi->left_tx_word) @@ -470,7 +470,16 @@ static void spi_sirfsoc_chipselect(struct spi_device *spi, int value) writel(regval, sspi->base + SIRFSOC_SPI_CTRL); } else { int gpio = sspi->chipselect[spi->chip_select]; - gpio_direction_output(gpio, spi->mode & SPI_CS_HIGH ? 0 : 1); + switch (value) { + case BITBANG_CS_ACTIVE: + gpio_direction_output(gpio, + spi->mode & SPI_CS_HIGH ? 1 : 0); + break; + case BITBANG_CS_INACTIVE: + gpio_direction_output(gpio, + spi->mode & SPI_CS_HIGH ? 0 : 1); + break; + } } } @@ -559,6 +568,11 @@ spi_sirfsoc_setup_transfer(struct spi_device *spi, struct spi_transfer *t) regval &= ~SIRFSOC_SPI_CMD_MODE; sspi->tx_by_cmd = false; } + /* + * set spi controller in RISC chipselect mode, we are controlling CS by + * software BITBANG_CS_ACTIVE and BITBANG_CS_INACTIVE. + */ + regval |= SIRFSOC_SPI_CS_IO_MODE; writel(regval, sspi->base + SIRFSOC_SPI_CTRL); if (IS_DMA_VALID(t)) { diff --git a/drivers/staging/comedi/drivers/usbdux.c b/drivers/staging/comedi/drivers/usbdux.c index 71db683098d6..b59af0303581 100644 --- a/drivers/staging/comedi/drivers/usbdux.c +++ b/drivers/staging/comedi/drivers/usbdux.c @@ -493,7 +493,7 @@ static void usbduxsub_ao_isoc_irq(struct urb *urb) /* pointer to the DA */ *datap++ = val & 0xff; *datap++ = (val >> 8) & 0xff; - *datap++ = chan; + *datap++ = chan << 6; devpriv->ao_readback[chan] = val; s->async->events |= COMEDI_CB_BLOCK; @@ -1040,11 +1040,8 @@ static int usbdux_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s) /* set current channel of the running acquisition to zero */ s->async->cur_chan = 0; - for (i = 0; i < cmd->chanlist_len; ++i) { - unsigned int chan = CR_CHAN(cmd->chanlist[i]); - - devpriv->ao_chanlist[i] = chan << 6; - } + for (i = 0; i < cmd->chanlist_len; ++i) + devpriv->ao_chanlist[i] = CR_CHAN(cmd->chanlist[i]); /* we count in steps of 1ms (125us) */ /* 125us mode not used yet */ diff --git a/drivers/staging/iio/adc/mxs-lradc.c b/drivers/staging/iio/adc/mxs-lradc.c index 11fb95201545..dae8d1a9038e 100644 --- a/drivers/staging/iio/adc/mxs-lradc.c +++ b/drivers/staging/iio/adc/mxs-lradc.c @@ -1526,7 +1526,7 @@ static int mxs_lradc_probe(struct platform_device *pdev) struct resource *iores; int ret = 0, touch_ret; int i, s; - unsigned int scale_uv; + uint64_t scale_uv; /* Allocate the IIO device. */ iio = devm_iio_device_alloc(dev, sizeof(*lradc)); diff --git a/drivers/staging/iio/resolver/ad2s1200.c b/drivers/staging/iio/resolver/ad2s1200.c index 36eedd8a0ea9..e2b482045158 100644 --- a/drivers/staging/iio/resolver/ad2s1200.c +++ b/drivers/staging/iio/resolver/ad2s1200.c @@ -70,6 +70,7 @@ static int ad2s1200_read_raw(struct iio_dev *indio_dev, vel = (((s16)(st->rx[0])) << 4) | ((st->rx[1] & 0xF0) >> 4); vel = (vel << 4) >> 4; *val = vel; + break; default: mutex_unlock(&st->lock); return -EINVAL; diff --git a/drivers/tty/serial/8250/8250_core.c b/drivers/tty/serial/8250/8250_core.c index 81f909c2101f..0e1bf8858431 100644 --- a/drivers/tty/serial/8250/8250_core.c +++ b/drivers/tty/serial/8250/8250_core.c @@ -1520,7 +1520,7 @@ int serial8250_handle_irq(struct uart_port *port, unsigned int iir) status = serial8250_rx_chars(up, status); } serial8250_modem_status(up); - if (status & UART_LSR_THRE) + if (!up->dma && (status & UART_LSR_THRE)) serial8250_tx_chars(up); spin_unlock_irqrestore(&port->lock, flags); diff --git a/drivers/tty/serial/8250/8250_dma.c b/drivers/tty/serial/8250/8250_dma.c index 7046769608d4..ab9096dc3849 100644 --- a/drivers/tty/serial/8250/8250_dma.c +++ b/drivers/tty/serial/8250/8250_dma.c @@ -20,12 +20,15 @@ static void __dma_tx_complete(void *param) struct uart_8250_port *p = param; struct uart_8250_dma *dma = p->dma; struct circ_buf *xmit = &p->port.state->xmit; - - dma->tx_running = 0; + unsigned long flags; dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr, UART_XMIT_SIZE, DMA_TO_DEVICE); + spin_lock_irqsave(&p->port.lock, flags); + + dma->tx_running = 0; + xmit->tail += dma->tx_size; xmit->tail &= UART_XMIT_SIZE - 1; p->port.icount.tx += dma->tx_size; @@ -35,6 +38,8 @@ static void __dma_tx_complete(void *param) if (!uart_circ_empty(xmit) && !uart_tx_stopped(&p->port)) serial8250_tx_dma(p); + + spin_unlock_irqrestore(&p->port.lock, flags); } static void __dma_rx_complete(void *param) diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c index 23f459600738..1f5505e7f90d 100644 --- a/drivers/tty/serial/samsung.c +++ b/drivers/tty/serial/samsung.c @@ -1446,8 +1446,8 @@ static int s3c24xx_serial_get_poll_char(struct uart_port *port) static void s3c24xx_serial_put_poll_char(struct uart_port *port, unsigned char c) { - unsigned int ufcon = rd_regl(cons_uart, S3C2410_UFCON); - unsigned int ucon = rd_regl(cons_uart, S3C2410_UCON); + unsigned int ufcon = rd_regl(port, S3C2410_UFCON); + unsigned int ucon = rd_regl(port, S3C2410_UCON); /* not possible to xmit on unconfigured port */ if (!s3c24xx_port_configured(ucon)) @@ -1455,7 +1455,7 @@ static void s3c24xx_serial_put_poll_char(struct uart_port *port, while (!s3c24xx_serial_console_txrdy(port, ufcon)) cpu_relax(); - wr_regb(cons_uart, S3C2410_UTXH, c); + wr_regb(port, S3C2410_UTXH, c); } #endif /* CONFIG_CONSOLE_POLL */ @@ -1463,22 +1463,23 @@ static void s3c24xx_serial_put_poll_char(struct uart_port *port, static void s3c24xx_serial_console_putchar(struct uart_port *port, int ch) { - unsigned int ufcon = rd_regl(cons_uart, S3C2410_UFCON); - unsigned int ucon = rd_regl(cons_uart, S3C2410_UCON); - - /* not possible to xmit on unconfigured port */ - if (!s3c24xx_port_configured(ucon)) - return; + unsigned int ufcon = rd_regl(port, S3C2410_UFCON); while (!s3c24xx_serial_console_txrdy(port, ufcon)) - barrier(); - wr_regb(cons_uart, S3C2410_UTXH, ch); + cpu_relax(); + wr_regb(port, S3C2410_UTXH, ch); } static void s3c24xx_serial_console_write(struct console *co, const char *s, unsigned int count) { + unsigned int ucon = rd_regl(cons_uart, S3C2410_UCON); + + /* not possible to xmit on unconfigured port */ + if (!s3c24xx_port_configured(ucon)) + return; + uart_console_write(cons_uart, s, count, s3c24xx_serial_console_putchar); } diff --git a/drivers/tty/serial/serial_core.c b/drivers/tty/serial/serial_core.c index f26834d262b3..b68550d95a40 100644 --- a/drivers/tty/serial/serial_core.c +++ b/drivers/tty/serial/serial_core.c @@ -137,6 +137,11 @@ static int uart_port_startup(struct tty_struct *tty, struct uart_state *state, return 1; /* + * Make sure the device is in D0 state. + */ + uart_change_pm(state, UART_PM_STATE_ON); + + /* * Initialise and allocate the transmit and temporary * buffer. */ @@ -825,25 +830,29 @@ static int uart_set_info(struct tty_struct *tty, struct tty_port *port, * If we fail to request resources for the * new port, try to restore the old settings. */ - if (retval && old_type != PORT_UNKNOWN) { + if (retval) { uport->iobase = old_iobase; uport->type = old_type; uport->hub6 = old_hub6; uport->iotype = old_iotype; uport->regshift = old_shift; uport->mapbase = old_mapbase; - retval = uport->ops->request_port(uport); - /* - * If we failed to restore the old settings, - * we fail like this. - */ - if (retval) - uport->type = PORT_UNKNOWN; - /* - * We failed anyway. - */ - retval = -EBUSY; + if (old_type != PORT_UNKNOWN) { + retval = uport->ops->request_port(uport); + /* + * If we failed to restore the old settings, + * we fail like this. + */ + if (retval) + uport->type = PORT_UNKNOWN; + + /* + * We failed anyway. + */ + retval = -EBUSY; + } + /* Added to return the correct error -Ram Gupta */ goto exit; } @@ -1571,12 +1580,6 @@ static int uart_open(struct tty_struct *tty, struct file *filp) } /* - * Make sure the device is in D0 state. - */ - if (port->count == 1) - uart_change_pm(state, UART_PM_STATE_ON); - - /* * Start up the serial port. */ retval = uart_startup(tty, state, 0); diff --git a/drivers/tty/tty_buffer.c b/drivers/tty/tty_buffer.c index 8ebd9f88a6f6..f1d30f6945af 100644 --- a/drivers/tty/tty_buffer.c +++ b/drivers/tty/tty_buffer.c @@ -255,11 +255,16 @@ static int __tty_buffer_request_room(struct tty_port *port, size_t size, if (change || left < size) { /* This is the slow path - looking for new buffers to use */ if ((n = tty_buffer_alloc(port, size)) != NULL) { + unsigned long iflags; + n->flags = flags; buf->tail = n; + + spin_lock_irqsave(&buf->flush_lock, iflags); b->commit = b->used; - smp_mb(); b->next = n; + spin_unlock_irqrestore(&buf->flush_lock, iflags); + } else if (change) size = 0; else @@ -443,6 +448,7 @@ static void flush_to_ldisc(struct work_struct *work) mutex_lock(&buf->lock); while (1) { + unsigned long flags; struct tty_buffer *head = buf->head; int count; @@ -450,14 +456,19 @@ static void flush_to_ldisc(struct work_struct *work) if (atomic_read(&buf->priority)) break; + spin_lock_irqsave(&buf->flush_lock, flags); count = head->commit - head->read; if (!count) { - if (head->next == NULL) + if (head->next == NULL) { + spin_unlock_irqrestore(&buf->flush_lock, flags); break; + } buf->head = head->next; + spin_unlock_irqrestore(&buf->flush_lock, flags); tty_buffer_free(port, head); continue; } + spin_unlock_irqrestore(&buf->flush_lock, flags); count = receive_buf(tty, head, count); if (!count) @@ -512,6 +523,7 @@ void tty_buffer_init(struct tty_port *port) struct tty_bufhead *buf = &port->buf; mutex_init(&buf->lock); + spin_lock_init(&buf->flush_lock); tty_buffer_reset(&buf->sentinel, 0); buf->head = &buf->sentinel; buf->tail = &buf->sentinel; diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c index ca6831c5b763..1cd5d0ba587c 100644 --- a/drivers/usb/chipidea/core.c +++ b/drivers/usb/chipidea/core.c @@ -277,6 +277,39 @@ static void hw_phymode_configure(struct ci_hdrc *ci) } /** + * ci_usb_phy_init: initialize phy according to different phy type + * @ci: the controller + * + * This function returns an error code if usb_phy_init has failed + */ +static int ci_usb_phy_init(struct ci_hdrc *ci) +{ + int ret; + + switch (ci->platdata->phy_mode) { + case USBPHY_INTERFACE_MODE_UTMI: + case USBPHY_INTERFACE_MODE_UTMIW: + case USBPHY_INTERFACE_MODE_HSIC: + ret = usb_phy_init(ci->transceiver); + if (ret) + return ret; + hw_phymode_configure(ci); + break; + case USBPHY_INTERFACE_MODE_ULPI: + case USBPHY_INTERFACE_MODE_SERIAL: + hw_phymode_configure(ci); + ret = usb_phy_init(ci->transceiver); + if (ret) + return ret; + break; + default: + ret = usb_phy_init(ci->transceiver); + } + + return ret; +} + +/** * hw_device_reset: resets chip (execute without interruption) * @ci: the controller * @@ -543,8 +576,6 @@ static int ci_hdrc_probe(struct platform_device *pdev) return -ENODEV; } - hw_phymode_configure(ci); - if (ci->platdata->phy) ci->transceiver = ci->platdata->phy; else @@ -564,7 +595,7 @@ static int ci_hdrc_probe(struct platform_device *pdev) return -EPROBE_DEFER; } - ret = usb_phy_init(ci->transceiver); + ret = ci_usb_phy_init(ci); if (ret) { dev_err(dev, "unable to init phy: %d\n", ret); return ret; diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index d001417e8e37..10aaaae9af25 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -821,6 +821,7 @@ static void dwc3_complete(struct device *dev) spin_lock_irqsave(&dwc->lock, flags); + dwc3_event_buffers_setup(dwc); switch (dwc->dr_mode) { case USB_DR_MODE_PERIPHERAL: case USB_DR_MODE_OTG: @@ -828,7 +829,6 @@ static void dwc3_complete(struct device *dev) /* FALLTHROUGH */ case USB_DR_MODE_HOST: default: - dwc3_event_buffers_setup(dwc); break; } diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index a740eac74d56..70715eeededd 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -187,15 +187,12 @@ int dwc3_gadget_resize_tx_fifos(struct dwc3 *dwc) * improve this algorithm so that we better use the internal * FIFO space */ - for (num = 0; num < DWC3_ENDPOINTS_NUM; num++) { - struct dwc3_ep *dep = dwc->eps[num]; - int fifo_number = dep->number >> 1; + for (num = 0; num < dwc->num_in_eps; num++) { + /* bit0 indicates direction; 1 means IN ep */ + struct dwc3_ep *dep = dwc->eps[(num << 1) | 1]; int mult = 1; int tmp; - if (!(dep->number & 1)) - continue; - if (!(dep->flags & DWC3_EP_ENABLED)) continue; @@ -224,8 +221,7 @@ int dwc3_gadget_resize_tx_fifos(struct dwc3 *dwc) dev_vdbg(dwc->dev, "%s: Fifo Addr %04x Size %d\n", dep->name, last_fifo_depth, fifo_size & 0xffff); - dwc3_writel(dwc->regs, DWC3_GTXFIFOSIZ(fifo_number), - fifo_size); + dwc3_writel(dwc->regs, DWC3_GTXFIFOSIZ(num), fifo_size); last_fifo_depth += (fifo_size & 0xffff); } diff --git a/drivers/usb/gadget/f_fs.c b/drivers/usb/gadget/f_fs.c index 2e164dca08e8..1e12b3ee56fd 100644 --- a/drivers/usb/gadget/f_fs.c +++ b/drivers/usb/gadget/f_fs.c @@ -745,6 +745,12 @@ static ssize_t ffs_epfile_io(struct file *file, struct ffs_io_data *io_data) */ struct usb_gadget *gadget = epfile->ffs->gadget; + spin_lock_irq(&epfile->ffs->eps_lock); + /* In the meantime, endpoint got disabled or changed. */ + if (epfile->ep != ep) { + spin_unlock_irq(&epfile->ffs->eps_lock); + return -ESHUTDOWN; + } /* * Controller may require buffer size to be aligned to * maxpacketsize of an out endpoint. @@ -752,6 +758,7 @@ static ssize_t ffs_epfile_io(struct file *file, struct ffs_io_data *io_data) data_len = io_data->read ? usb_ep_align_maybe(gadget, ep->ep, io_data->len) : io_data->len; + spin_unlock_irq(&epfile->ffs->eps_lock); data = kmalloc(data_len, GFP_KERNEL); if (unlikely(!data)) diff --git a/drivers/usb/gadget/f_rndis.c b/drivers/usb/gadget/f_rndis.c index c11761ce5113..9a4f49dc6ac4 100644 --- a/drivers/usb/gadget/f_rndis.c +++ b/drivers/usb/gadget/f_rndis.c @@ -377,7 +377,7 @@ static struct sk_buff *rndis_add_header(struct gether *port, if (skb2) rndis_add_hdr(skb2); - dev_kfree_skb_any(skb); + dev_kfree_skb(skb); return skb2; } diff --git a/drivers/usb/gadget/fsl_udc_core.c b/drivers/usb/gadget/fsl_udc_core.c index 15960af0f67e..a2f26cdb56fe 100644 --- a/drivers/usb/gadget/fsl_udc_core.c +++ b/drivers/usb/gadget/fsl_udc_core.c @@ -1219,6 +1219,10 @@ static int fsl_pullup(struct usb_gadget *gadget, int is_on) struct fsl_udc *udc; udc = container_of(gadget, struct fsl_udc, gadget); + + if (!udc->vbus_active) + return -EOPNOTSUPP; + udc->softconnect = (is_on != 0); if (can_pullup(udc)) fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP), @@ -2532,8 +2536,8 @@ static int __exit fsl_udc_remove(struct platform_device *pdev) if (!udc_controller) return -ENODEV; - usb_del_gadget_udc(&udc_controller->gadget); udc_controller->done = &done; + usb_del_gadget_udc(&udc_controller->gadget); fsl_udc_clk_release(); diff --git a/drivers/usb/gadget/inode.c b/drivers/usb/gadget/inode.c index b5be6f0308c2..a925d0cbcd41 100644 --- a/drivers/usb/gadget/inode.c +++ b/drivers/usb/gadget/inode.c @@ -2043,6 +2043,7 @@ gadgetfs_fill_super (struct super_block *sb, void *opts, int silent) return -ESRCH; /* fake probe to determine $CHIP */ + CHIP = NULL; usb_gadget_probe_driver(&probe_driver); if (!CHIP) return -ENODEV; diff --git a/drivers/usb/gadget/rndis.c b/drivers/usb/gadget/rndis.c index d822d822efb3..7ed452d90f4d 100644 --- a/drivers/usb/gadget/rndis.c +++ b/drivers/usb/gadget/rndis.c @@ -35,6 +35,7 @@ #include <asm/byteorder.h> #include <asm/unaligned.h> +#include "u_rndis.h" #undef VERBOSE_DEBUG diff --git a/drivers/usb/gadget/u_ether.c b/drivers/usb/gadget/u_ether.c index 50d09c289137..b7d4f82872b7 100644 --- a/drivers/usb/gadget/u_ether.c +++ b/drivers/usb/gadget/u_ether.c @@ -48,8 +48,6 @@ #define UETH__VERSION "29-May-2008" -#define GETHER_NAPI_WEIGHT 32 - struct eth_dev { /* lock is held while accessing port_usb */ @@ -74,7 +72,6 @@ struct eth_dev { struct sk_buff_head *list); struct work_struct work; - struct napi_struct rx_napi; unsigned long todo; #define WORK_RX_MEMORY 0 @@ -256,16 +253,18 @@ enomem: DBG(dev, "rx submit --> %d\n", retval); if (skb) dev_kfree_skb_any(skb); + spin_lock_irqsave(&dev->req_lock, flags); + list_add(&req->list, &dev->rx_reqs); + spin_unlock_irqrestore(&dev->req_lock, flags); } return retval; } static void rx_complete(struct usb_ep *ep, struct usb_request *req) { - struct sk_buff *skb = req->context; + struct sk_buff *skb = req->context, *skb2; struct eth_dev *dev = ep->driver_data; int status = req->status; - bool rx_queue = 0; switch (status) { @@ -289,8 +288,30 @@ static void rx_complete(struct usb_ep *ep, struct usb_request *req) } else { skb_queue_tail(&dev->rx_frames, skb); } - if (!status) - rx_queue = 1; + skb = NULL; + + skb2 = skb_dequeue(&dev->rx_frames); + while (skb2) { + if (status < 0 + || ETH_HLEN > skb2->len + || skb2->len > VLAN_ETH_FRAME_LEN) { + dev->net->stats.rx_errors++; + dev->net->stats.rx_length_errors++; + DBG(dev, "rx length %d\n", skb2->len); + dev_kfree_skb_any(skb2); + goto next_frame; + } + skb2->protocol = eth_type_trans(skb2, dev->net); + dev->net->stats.rx_packets++; + dev->net->stats.rx_bytes += skb2->len; + + /* no buffer copies needed, unless hardware can't + * use skb buffers. + */ + status = netif_rx(skb2); +next_frame: + skb2 = skb_dequeue(&dev->rx_frames); + } break; /* software-driven interface shutdown */ @@ -313,20 +334,22 @@ quiesce: /* FALLTHROUGH */ default: - rx_queue = 1; - dev_kfree_skb_any(skb); dev->net->stats.rx_errors++; DBG(dev, "rx status %d\n", status); break; } + if (skb) + dev_kfree_skb_any(skb); + if (!netif_running(dev->net)) { clean: spin_lock(&dev->req_lock); list_add(&req->list, &dev->rx_reqs); spin_unlock(&dev->req_lock); - - if (rx_queue && likely(napi_schedule_prep(&dev->rx_napi))) - __napi_schedule(&dev->rx_napi); + req = NULL; + } + if (req) + rx_submit(dev, req, GFP_ATOMIC); } static int prealloc(struct list_head *list, struct usb_ep *ep, unsigned n) @@ -391,24 +414,16 @@ static void rx_fill(struct eth_dev *dev, gfp_t gfp_flags) { struct usb_request *req; unsigned long flags; - int rx_counts = 0; /* fill unused rxq slots with some skb */ spin_lock_irqsave(&dev->req_lock, flags); while (!list_empty(&dev->rx_reqs)) { - - if (++rx_counts > qlen(dev->gadget, dev->qmult)) - break; - req = container_of(dev->rx_reqs.next, struct usb_request, list); list_del_init(&req->list); spin_unlock_irqrestore(&dev->req_lock, flags); if (rx_submit(dev, req, gfp_flags) < 0) { - spin_lock_irqsave(&dev->req_lock, flags); - list_add(&req->list, &dev->rx_reqs); - spin_unlock_irqrestore(&dev->req_lock, flags); defer_kevent(dev, WORK_RX_MEMORY); return; } @@ -418,41 +433,6 @@ static void rx_fill(struct eth_dev *dev, gfp_t gfp_flags) spin_unlock_irqrestore(&dev->req_lock, flags); } -static int gether_poll(struct napi_struct *napi, int budget) -{ - struct eth_dev *dev = container_of(napi, struct eth_dev, rx_napi); - struct sk_buff *skb; - unsigned int work_done = 0; - int status = 0; - - while ((skb = skb_dequeue(&dev->rx_frames))) { - if (status < 0 - || ETH_HLEN > skb->len - || skb->len > VLAN_ETH_FRAME_LEN) { - dev->net->stats.rx_errors++; - dev->net->stats.rx_length_errors++; - DBG(dev, "rx length %d\n", skb->len); - dev_kfree_skb_any(skb); - continue; - } - skb->protocol = eth_type_trans(skb, dev->net); - dev->net->stats.rx_packets++; - dev->net->stats.rx_bytes += skb->len; - - status = netif_rx_ni(skb); - } - - if (netif_running(dev->net)) { - rx_fill(dev, GFP_KERNEL); - work_done++; - } - - if (work_done < budget) - napi_complete(&dev->rx_napi); - - return work_done; -} - static void eth_work(struct work_struct *work) { struct eth_dev *dev = container_of(work, struct eth_dev, work); @@ -645,7 +625,6 @@ static void eth_start(struct eth_dev *dev, gfp_t gfp_flags) /* and open the tx floodgates */ atomic_set(&dev->tx_qlen, 0); netif_wake_queue(dev->net); - napi_enable(&dev->rx_napi); } static int eth_open(struct net_device *net) @@ -672,7 +651,6 @@ static int eth_stop(struct net_device *net) unsigned long flags; VDBG(dev, "%s\n", __func__); - napi_disable(&dev->rx_napi); netif_stop_queue(net); DBG(dev, "stop stats: rx/tx %ld/%ld, errs %ld/%ld\n", @@ -790,7 +768,6 @@ struct eth_dev *gether_setup_name(struct usb_gadget *g, return ERR_PTR(-ENOMEM); dev = netdev_priv(net); - netif_napi_add(net, &dev->rx_napi, gether_poll, GETHER_NAPI_WEIGHT); spin_lock_init(&dev->lock); spin_lock_init(&dev->req_lock); INIT_WORK(&dev->work, eth_work); @@ -853,7 +830,6 @@ struct net_device *gether_setup_name_default(const char *netname) return ERR_PTR(-ENOMEM); dev = netdev_priv(net); - netif_napi_add(net, &dev->rx_napi, gether_poll, GETHER_NAPI_WEIGHT); spin_lock_init(&dev->lock); spin_lock_init(&dev->req_lock); INIT_WORK(&dev->work, eth_work); @@ -1137,7 +1113,6 @@ void gether_disconnect(struct gether *link) { struct eth_dev *dev = link->ioport; struct usb_request *req; - struct sk_buff *skb; WARN_ON(!dev); if (!dev) @@ -1164,12 +1139,6 @@ void gether_disconnect(struct gether *link) spin_lock(&dev->req_lock); } spin_unlock(&dev->req_lock); - - spin_lock(&dev->rx_frames.lock); - while ((skb = __skb_dequeue(&dev->rx_frames))) - dev_kfree_skb_any(skb); - spin_unlock(&dev->rx_frames.lock); - link->in_ep->driver_data = NULL; link->in_ep->desc = NULL; diff --git a/drivers/usb/gadget/zero.c b/drivers/usb/gadget/zero.c index 9f170c53e3d9..134f354ede62 100644 --- a/drivers/usb/gadget/zero.c +++ b/drivers/usb/gadget/zero.c @@ -300,7 +300,7 @@ static int __init zero_bind(struct usb_composite_dev *cdev) ss_opts->isoc_interval = gzero_options.isoc_interval; ss_opts->isoc_maxpacket = gzero_options.isoc_maxpacket; ss_opts->isoc_mult = gzero_options.isoc_mult; - ss_opts->isoc_maxburst = gzero_options.isoc_maxpacket; + ss_opts->isoc_maxburst = gzero_options.isoc_maxburst; ss_opts->bulk_buflen = gzero_options.bulk_buflen; func_ss = usb_get_function(func_inst_ss); diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c index 47390e369cd4..35d447780707 100644 --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c @@ -134,6 +134,8 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci) */ if (pdev->subsystem_vendor == PCI_VENDOR_ID_HP) xhci->quirks |= XHCI_SPURIOUS_WAKEUP; + + xhci->quirks |= XHCI_SPURIOUS_REBOOT; } if (pdev->vendor == PCI_VENDOR_ID_ETRON && pdev->device == PCI_DEVICE_ID_ASROCK_P67) { @@ -143,9 +145,7 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci) xhci->quirks |= XHCI_TRUST_TX_LENGTH; } if (pdev->vendor == PCI_VENDOR_ID_RENESAS && - pdev->device == 0x0015 && - pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG && - pdev->subsystem_device == 0xc0cd) + pdev->device == 0x0015) xhci->quirks |= XHCI_RESET_ON_RESUME; if (pdev->vendor == PCI_VENDOR_ID_VIA) xhci->quirks |= XHCI_RESET_ON_RESUME; diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c index 5f926bea5ab1..7a0e3c720c00 100644 --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c @@ -550,6 +550,7 @@ void xhci_find_new_dequeue_state(struct xhci_hcd *xhci, struct xhci_ring *ep_ring; struct xhci_generic_trb *trb; dma_addr_t addr; + u64 hw_dequeue; ep_ring = xhci_triad_to_transfer_ring(xhci, slot_id, ep_index, stream_id); @@ -559,16 +560,6 @@ void xhci_find_new_dequeue_state(struct xhci_hcd *xhci, stream_id); return; } - state->new_cycle_state = 0; - xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, - "Finding segment containing stopped TRB."); - state->new_deq_seg = find_trb_seg(cur_td->start_seg, - dev->eps[ep_index].stopped_trb, - &state->new_cycle_state); - if (!state->new_deq_seg) { - WARN_ON(1); - return; - } /* Dig out the cycle state saved by the xHC during the stop ep cmd */ xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, @@ -577,46 +568,57 @@ void xhci_find_new_dequeue_state(struct xhci_hcd *xhci, if (ep->ep_state & EP_HAS_STREAMS) { struct xhci_stream_ctx *ctx = &ep->stream_info->stream_ctx_array[stream_id]; - state->new_cycle_state = 0x1 & le64_to_cpu(ctx->stream_ring); + hw_dequeue = le64_to_cpu(ctx->stream_ring); } else { struct xhci_ep_ctx *ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index); - state->new_cycle_state = 0x1 & le64_to_cpu(ep_ctx->deq); + hw_dequeue = le64_to_cpu(ep_ctx->deq); } + /* Find virtual address and segment of hardware dequeue pointer */ + state->new_deq_seg = ep_ring->deq_seg; + state->new_deq_ptr = ep_ring->dequeue; + while (xhci_trb_virt_to_dma(state->new_deq_seg, state->new_deq_ptr) + != (dma_addr_t)(hw_dequeue & ~0xf)) { + next_trb(xhci, ep_ring, &state->new_deq_seg, + &state->new_deq_ptr); + if (state->new_deq_ptr == ep_ring->dequeue) { + WARN_ON(1); + return; + } + } + /* + * Find cycle state for last_trb, starting at old cycle state of + * hw_dequeue. If there is only one segment ring, find_trb_seg() will + * return immediately and cannot toggle the cycle state if this search + * wraps around, so add one more toggle manually in that case. + */ + state->new_cycle_state = hw_dequeue & 0x1; + if (ep_ring->first_seg == ep_ring->first_seg->next && + cur_td->last_trb < state->new_deq_ptr) + state->new_cycle_state ^= 0x1; + state->new_deq_ptr = cur_td->last_trb; xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, "Finding segment containing last TRB in TD."); state->new_deq_seg = find_trb_seg(state->new_deq_seg, - state->new_deq_ptr, - &state->new_cycle_state); + state->new_deq_ptr, &state->new_cycle_state); if (!state->new_deq_seg) { WARN_ON(1); return; } + /* Increment to find next TRB after last_trb. Cycle if appropriate. */ trb = &state->new_deq_ptr->generic; if (TRB_TYPE_LINK_LE32(trb->field[3]) && (trb->field[3] & cpu_to_le32(LINK_TOGGLE))) state->new_cycle_state ^= 0x1; next_trb(xhci, ep_ring, &state->new_deq_seg, &state->new_deq_ptr); - /* - * If there is only one segment in a ring, find_trb_seg()'s while loop - * will not run, and it will return before it has a chance to see if it - * needs to toggle the cycle bit. It can't tell if the stalled transfer - * ended just before the link TRB on a one-segment ring, or if the TD - * wrapped around the top of the ring, because it doesn't have the TD in - * question. Look for the one-segment case where stalled TRB's address - * is greater than the new dequeue pointer address. - */ - if (ep_ring->first_seg == ep_ring->first_seg->next && - state->new_deq_ptr < dev->eps[ep_index].stopped_trb) - state->new_cycle_state ^= 0x1; + /* Don't update the ring cycle state for the producer (us). */ xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, "Cycle state = 0x%x", state->new_cycle_state); - /* Don't update the ring cycle state for the producer (us). */ xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, "New dequeue segment = %p (virtual)", state->new_deq_seg); @@ -799,7 +801,6 @@ static void xhci_handle_cmd_stop_ep(struct xhci_hcd *xhci, int slot_id, if (list_empty(&ep->cancelled_td_list)) { xhci_stop_watchdog_timer_in_irq(xhci, ep); ep->stopped_td = NULL; - ep->stopped_trb = NULL; ring_doorbell_for_active_rings(xhci, slot_id, ep_index); return; } @@ -867,11 +868,9 @@ remove_finished_td: ring_doorbell_for_active_rings(xhci, slot_id, ep_index); } - /* Clear stopped_td and stopped_trb if endpoint is not halted */ - if (!(ep->ep_state & EP_HALTED)) { + /* Clear stopped_td if endpoint is not halted */ + if (!(ep->ep_state & EP_HALTED)) ep->stopped_td = NULL; - ep->stopped_trb = NULL; - } /* * Drop the lock and complete the URBs in the cancelled TD list. @@ -1941,14 +1940,12 @@ static void xhci_cleanup_halted_endpoint(struct xhci_hcd *xhci, struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index]; ep->ep_state |= EP_HALTED; ep->stopped_td = td; - ep->stopped_trb = event_trb; ep->stopped_stream = stream_id; xhci_queue_reset_ep(xhci, slot_id, ep_index); xhci_cleanup_stalled_ring(xhci, td->urb->dev, ep_index); ep->stopped_td = NULL; - ep->stopped_trb = NULL; ep->stopped_stream = 0; xhci_ring_cmd_db(xhci); @@ -2030,7 +2027,6 @@ static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td, * the ring dequeue pointer or take this TD off any lists yet. */ ep->stopped_td = td; - ep->stopped_trb = event_trb; return 0; } else { if (trb_comp_code == COMP_STALL) { @@ -2042,7 +2038,6 @@ static int finish_td(struct xhci_hcd *xhci, struct xhci_td *td, * USB class driver clear the stall later. */ ep->stopped_td = td; - ep->stopped_trb = event_trb; ep->stopped_stream = ep_ring->stream_id; } else if (xhci_requires_manual_halt_cleanup(xhci, ep_ctx, trb_comp_code)) { diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c index 8fe4e124ddd4..300836972faa 100644 --- a/drivers/usb/host/xhci.c +++ b/drivers/usb/host/xhci.c @@ -408,16 +408,16 @@ static int xhci_try_enable_msi(struct usb_hcd *hcd) #else -static int xhci_try_enable_msi(struct usb_hcd *hcd) +static inline int xhci_try_enable_msi(struct usb_hcd *hcd) { return 0; } -static void xhci_cleanup_msix(struct xhci_hcd *xhci) +static inline void xhci_cleanup_msix(struct xhci_hcd *xhci) { } -static void xhci_msix_sync_irqs(struct xhci_hcd *xhci) +static inline void xhci_msix_sync_irqs(struct xhci_hcd *xhci) { } @@ -2954,7 +2954,6 @@ void xhci_endpoint_reset(struct usb_hcd *hcd, xhci_ring_cmd_db(xhci); } virt_ep->stopped_td = NULL; - virt_ep->stopped_trb = NULL; virt_ep->stopped_stream = 0; spin_unlock_irqrestore(&xhci->lock, flags); diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h index d280e9213d08..4746816aed3e 100644 --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h @@ -865,8 +865,6 @@ struct xhci_virt_ep { #define EP_GETTING_NO_STREAMS (1 << 5) /* ---- Related to URB cancellation ---- */ struct list_head cancelled_td_list; - /* The TRB that was last reported in a stopped endpoint ring */ - union xhci_trb *stopped_trb; struct xhci_td *stopped_td; unsigned int stopped_stream; /* Watchdog timer for stop endpoint command to cancel URBs */ diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c index 3372ded5def7..e2fd263585de 100644 --- a/drivers/usb/musb/musb_dsps.c +++ b/drivers/usb/musb/musb_dsps.c @@ -470,8 +470,9 @@ static int dsps_musb_exit(struct musb *musb) struct dsps_glue *glue = dev_get_drvdata(dev->parent); del_timer_sync(&glue->timer); - usb_phy_shutdown(musb->xceiv); + debugfs_remove_recursive(glue->dbgfs_root); + return 0; } @@ -708,8 +709,6 @@ static int dsps_remove(struct platform_device *pdev) pm_runtime_put(&pdev->dev); pm_runtime_disable(&pdev->dev); - debugfs_remove_recursive(glue->dbgfs_root); - return 0; } diff --git a/drivers/usb/musb/omap2430.c b/drivers/usb/musb/omap2430.c index d341c149a2f9..d369bf1f3936 100644 --- a/drivers/usb/musb/omap2430.c +++ b/drivers/usb/musb/omap2430.c @@ -316,7 +316,13 @@ static void omap_musb_mailbox_work(struct work_struct *mailbox_work) { struct omap2430_glue *glue = container_of(mailbox_work, struct omap2430_glue, omap_musb_mailbox_work); + struct musb *musb = glue_to_musb(glue); + struct device *dev = musb->controller; + + pm_runtime_get_sync(dev); omap_musb_set_mailbox(glue); + pm_runtime_mark_last_busy(dev); + pm_runtime_put_autosuspend(dev); } static irqreturn_t omap2430_musb_interrupt(int irq, void *__hci) @@ -416,6 +422,7 @@ static int omap2430_musb_init(struct musb *musb) omap_musb_set_mailbox(glue); phy_init(musb->phy); + phy_power_on(musb->phy); pm_runtime_put_noidle(musb->controller); return 0; @@ -478,6 +485,7 @@ static int omap2430_musb_exit(struct musb *musb) del_timer_sync(&musb_idle_timer); omap2430_low_level_exit(musb); + phy_power_off(musb->phy); phy_exit(musb->phy); return 0; diff --git a/drivers/usb/phy/phy-am335x-control.c b/drivers/usb/phy/phy-am335x-control.c index d75196ad5f2f..35b6083b7999 100644 --- a/drivers/usb/phy/phy-am335x-control.c +++ b/drivers/usb/phy/phy-am335x-control.c @@ -3,6 +3,7 @@ #include <linux/err.h> #include <linux/of.h> #include <linux/io.h> +#include <linux/delay.h> #include "am35x-phy-control.h" struct am335x_control_usb { @@ -86,6 +87,14 @@ static void am335x_phy_power(struct phy_control *phy_ctrl, u32 id, bool on) } writel(val, usb_ctrl->phy_reg + reg); + + /* + * Give the PHY ~1ms to complete the power up operation. + * Tests have shown unstable behaviour if other USB PHY related + * registers are written too shortly after such a transition. + */ + if (on) + mdelay(1); } static const struct phy_control ctrl_am335x = { diff --git a/drivers/usb/phy/phy.c b/drivers/usb/phy/phy.c index 8afa813d690b..36b6bce33b20 100644 --- a/drivers/usb/phy/phy.c +++ b/drivers/usb/phy/phy.c @@ -132,6 +132,9 @@ struct usb_phy *usb_get_phy(enum usb_phy_type type) if (IS_ERR(phy) || !try_module_get(phy->dev->driver->owner)) { pr_debug("PHY: unable to find transceiver of type %s\n", usb_phy_type_string(type)); + if (!IS_ERR(phy)) + phy = ERR_PTR(-ENODEV); + goto err0; } diff --git a/drivers/usb/serial/io_ti.c b/drivers/usb/serial/io_ti.c index a2db5be9c305..df90dae53eb9 100644 --- a/drivers/usb/serial/io_ti.c +++ b/drivers/usb/serial/io_ti.c @@ -28,6 +28,7 @@ #include <linux/spinlock.h> #include <linux/mutex.h> #include <linux/serial.h> +#include <linux/swab.h> #include <linux/kfifo.h> #include <linux/ioctl.h> #include <linux/firmware.h> @@ -280,7 +281,7 @@ static int read_download_mem(struct usb_device *dev, int start_address, { int status = 0; __u8 read_length; - __be16 be_start_address; + u16 be_start_address; dev_dbg(&dev->dev, "%s - @ %x for %d\n", __func__, start_address, length); @@ -296,10 +297,14 @@ static int read_download_mem(struct usb_device *dev, int start_address, if (read_length > 1) { dev_dbg(&dev->dev, "%s - @ %x for %d\n", __func__, start_address, read_length); } - be_start_address = cpu_to_be16(start_address); + /* + * NOTE: Must use swab as wIndex is sent in little-endian + * byte order regardless of host byte order. + */ + be_start_address = swab16((u16)start_address); status = ti_vread_sync(dev, UMPC_MEMORY_READ, (__u16)address_type, - (__force __u16)be_start_address, + be_start_address, buffer, read_length); if (status) { @@ -394,7 +399,7 @@ static int write_i2c_mem(struct edgeport_serial *serial, struct device *dev = &serial->serial->dev->dev; int status = 0; int write_length; - __be16 be_start_address; + u16 be_start_address; /* We can only send a maximum of 1 aligned byte page at a time */ @@ -409,11 +414,16 @@ static int write_i2c_mem(struct edgeport_serial *serial, __func__, start_address, write_length); usb_serial_debug_data(dev, __func__, write_length, buffer); - /* Write first page */ - be_start_address = cpu_to_be16(start_address); + /* + * Write first page. + * + * NOTE: Must use swab as wIndex is sent in little-endian byte order + * regardless of host byte order. + */ + be_start_address = swab16((u16)start_address); status = ti_vsend_sync(serial->serial->dev, UMPC_MEMORY_WRITE, (__u16)address_type, - (__force __u16)be_start_address, + be_start_address, buffer, write_length); if (status) { dev_dbg(dev, "%s - ERROR %d\n", __func__, status); @@ -436,11 +446,16 @@ static int write_i2c_mem(struct edgeport_serial *serial, __func__, start_address, write_length); usb_serial_debug_data(dev, __func__, write_length, buffer); - /* Write next page */ - be_start_address = cpu_to_be16(start_address); + /* + * Write next page. + * + * NOTE: Must use swab as wIndex is sent in little-endian byte + * order regardless of host byte order. + */ + be_start_address = swab16((u16)start_address); status = ti_vsend_sync(serial->serial->dev, UMPC_MEMORY_WRITE, (__u16)address_type, - (__force __u16)be_start_address, + be_start_address, buffer, write_length); if (status) { dev_err(dev, "%s - ERROR %d\n", __func__, status); @@ -585,8 +600,8 @@ static int get_descriptor_addr(struct edgeport_serial *serial, if (rom_desc->Type == desc_type) return start_address; - start_address = start_address + sizeof(struct ti_i2c_desc) - + rom_desc->Size; + start_address = start_address + sizeof(struct ti_i2c_desc) + + le16_to_cpu(rom_desc->Size); } while ((start_address < TI_MAX_I2C_SIZE) && rom_desc->Type); @@ -599,7 +614,7 @@ static int valid_csum(struct ti_i2c_desc *rom_desc, __u8 *buffer) __u16 i; __u8 cs = 0; - for (i = 0; i < rom_desc->Size; i++) + for (i = 0; i < le16_to_cpu(rom_desc->Size); i++) cs = (__u8)(cs + buffer[i]); if (cs != rom_desc->CheckSum) { @@ -650,7 +665,7 @@ static int check_i2c_image(struct edgeport_serial *serial) break; if ((start_address + sizeof(struct ti_i2c_desc) + - rom_desc->Size) > TI_MAX_I2C_SIZE) { + le16_to_cpu(rom_desc->Size)) > TI_MAX_I2C_SIZE) { status = -ENODEV; dev_dbg(dev, "%s - structure too big, erroring out.\n", __func__); break; @@ -665,7 +680,8 @@ static int check_i2c_image(struct edgeport_serial *serial) /* Read the descriptor data */ status = read_rom(serial, start_address + sizeof(struct ti_i2c_desc), - rom_desc->Size, buffer); + le16_to_cpu(rom_desc->Size), + buffer); if (status) break; @@ -674,7 +690,7 @@ static int check_i2c_image(struct edgeport_serial *serial) break; } start_address = start_address + sizeof(struct ti_i2c_desc) + - rom_desc->Size; + le16_to_cpu(rom_desc->Size); } while ((rom_desc->Type != I2C_DESC_TYPE_ION) && (start_address < TI_MAX_I2C_SIZE)); @@ -712,7 +728,7 @@ static int get_manuf_info(struct edgeport_serial *serial, __u8 *buffer) /* Read the descriptor data */ status = read_rom(serial, start_address+sizeof(struct ti_i2c_desc), - rom_desc->Size, buffer); + le16_to_cpu(rom_desc->Size), buffer); if (status) goto exit; diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c index 367c7f08b27c..f213ee978516 100644 --- a/drivers/usb/serial/option.c +++ b/drivers/usb/serial/option.c @@ -234,8 +234,31 @@ static void option_instat_callback(struct urb *urb); #define QUALCOMM_VENDOR_ID 0x05C6 #define CMOTECH_VENDOR_ID 0x16d8 -#define CMOTECH_PRODUCT_6008 0x6008 -#define CMOTECH_PRODUCT_6280 0x6280 +#define CMOTECH_PRODUCT_6001 0x6001 +#define CMOTECH_PRODUCT_CMU_300 0x6002 +#define CMOTECH_PRODUCT_6003 0x6003 +#define CMOTECH_PRODUCT_6004 0x6004 +#define CMOTECH_PRODUCT_6005 0x6005 +#define CMOTECH_PRODUCT_CGU_628A 0x6006 +#define CMOTECH_PRODUCT_CHE_628S 0x6007 +#define CMOTECH_PRODUCT_CMU_301 0x6008 +#define CMOTECH_PRODUCT_CHU_628 0x6280 +#define CMOTECH_PRODUCT_CHU_628S 0x6281 +#define CMOTECH_PRODUCT_CDU_680 0x6803 +#define CMOTECH_PRODUCT_CDU_685A 0x6804 +#define CMOTECH_PRODUCT_CHU_720S 0x7001 +#define CMOTECH_PRODUCT_7002 0x7002 +#define CMOTECH_PRODUCT_CHU_629K 0x7003 +#define CMOTECH_PRODUCT_7004 0x7004 +#define CMOTECH_PRODUCT_7005 0x7005 +#define CMOTECH_PRODUCT_CGU_629 0x7006 +#define CMOTECH_PRODUCT_CHU_629S 0x700a +#define CMOTECH_PRODUCT_CHU_720I 0x7211 +#define CMOTECH_PRODUCT_7212 0x7212 +#define CMOTECH_PRODUCT_7213 0x7213 +#define CMOTECH_PRODUCT_7251 0x7251 +#define CMOTECH_PRODUCT_7252 0x7252 +#define CMOTECH_PRODUCT_7253 0x7253 #define TELIT_VENDOR_ID 0x1bc7 #define TELIT_PRODUCT_UC864E 0x1003 @@ -287,6 +310,7 @@ static void option_instat_callback(struct urb *urb); #define ALCATEL_PRODUCT_X060S_X200 0x0000 #define ALCATEL_PRODUCT_X220_X500D 0x0017 #define ALCATEL_PRODUCT_L100V 0x011e +#define ALCATEL_PRODUCT_L800MA 0x0203 #define PIRELLI_VENDOR_ID 0x1266 #define PIRELLI_PRODUCT_C100_1 0x1002 @@ -349,6 +373,7 @@ static void option_instat_callback(struct urb *urb); #define OLIVETTI_PRODUCT_OLICARD100 0xc000 #define OLIVETTI_PRODUCT_OLICARD145 0xc003 #define OLIVETTI_PRODUCT_OLICARD200 0xc005 +#define OLIVETTI_PRODUCT_OLICARD500 0xc00b /* Celot products */ #define CELOT_VENDOR_ID 0x211f @@ -502,6 +527,10 @@ static const struct option_blacklist_info huawei_cdc12_blacklist = { .reserved = BIT(1) | BIT(2), }; +static const struct option_blacklist_info net_intf0_blacklist = { + .reserved = BIT(0), +}; + static const struct option_blacklist_info net_intf1_blacklist = { .reserved = BIT(1), }; @@ -1035,8 +1064,47 @@ static const struct usb_device_id option_ids[] = { { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x6613)}, /* Onda H600/ZTE MF330 */ { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x0023)}, /* ONYX 3G device */ { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x9000)}, /* SIMCom SIM5218 */ - { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6280) }, /* BP3-USB & BP3-EXT HSDPA */ - { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6008) }, + { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6001) }, + { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CMU_300) }, + { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6003), + .driver_info = (kernel_ulong_t)&net_intf0_blacklist }, + { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6004) }, + { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6005) }, + { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CGU_628A) }, + { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CHE_628S), + .driver_info = (kernel_ulong_t)&net_intf0_blacklist }, + { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CMU_301), + .driver_info = (kernel_ulong_t)&net_intf0_blacklist }, + { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CHU_628), + .driver_info = (kernel_ulong_t)&net_intf0_blacklist }, + { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CHU_628S) }, + { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CDU_680) }, + { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CDU_685A) }, + { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CHU_720S), + .driver_info = (kernel_ulong_t)&net_intf0_blacklist }, + { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_7002), + .driver_info = (kernel_ulong_t)&net_intf0_blacklist }, + { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CHU_629K), + .driver_info = (kernel_ulong_t)&net_intf4_blacklist }, + { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_7004), + .driver_info = (kernel_ulong_t)&net_intf3_blacklist }, + { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_7005) }, + { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CGU_629), + .driver_info = (kernel_ulong_t)&net_intf5_blacklist }, + { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CHU_629S), + .driver_info = (kernel_ulong_t)&net_intf4_blacklist }, + { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CHU_720I), + .driver_info = (kernel_ulong_t)&net_intf0_blacklist }, + { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_7212), + .driver_info = (kernel_ulong_t)&net_intf0_blacklist }, + { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_7213), + .driver_info = (kernel_ulong_t)&net_intf0_blacklist }, + { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_7251), + .driver_info = (kernel_ulong_t)&net_intf1_blacklist }, + { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_7252), + .driver_info = (kernel_ulong_t)&net_intf1_blacklist }, + { USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_7253), + .driver_info = (kernel_ulong_t)&net_intf1_blacklist }, { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_UC864E) }, { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_UC864G) }, { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_CC864_DUAL) }, @@ -1500,6 +1568,8 @@ static const struct usb_device_id option_ids[] = { .driver_info = (kernel_ulong_t)&net_intf5_blacklist }, { USB_DEVICE(ALCATEL_VENDOR_ID, ALCATEL_PRODUCT_L100V), .driver_info = (kernel_ulong_t)&net_intf4_blacklist }, + { USB_DEVICE(ALCATEL_VENDOR_ID, ALCATEL_PRODUCT_L800MA), + .driver_info = (kernel_ulong_t)&net_intf2_blacklist }, { USB_DEVICE(AIRPLUS_VENDOR_ID, AIRPLUS_PRODUCT_MCD650) }, { USB_DEVICE(TLAYTECH_VENDOR_ID, TLAYTECH_PRODUCT_TEU800) }, { USB_DEVICE(LONGCHEER_VENDOR_ID, FOUR_G_SYSTEMS_PRODUCT_W14), @@ -1545,6 +1615,9 @@ static const struct usb_device_id option_ids[] = { { USB_DEVICE(OLIVETTI_VENDOR_ID, OLIVETTI_PRODUCT_OLICARD200), .driver_info = (kernel_ulong_t)&net_intf6_blacklist }, + { USB_DEVICE(OLIVETTI_VENDOR_ID, OLIVETTI_PRODUCT_OLICARD500), + .driver_info = (kernel_ulong_t)&net_intf4_blacklist + }, { USB_DEVICE(CELOT_VENDOR_ID, CELOT_PRODUCT_CT680M) }, /* CT-650 CDMA 450 1xEVDO modem */ { USB_DEVICE_AND_INTERFACE_INFO(SAMSUNG_VENDOR_ID, SAMSUNG_PRODUCT_GT_B3730, USB_CLASS_CDC_DATA, 0x00, 0x00) }, /* Samsung GT-B3730 LTE USB modem.*/ { USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CEM600) }, diff --git a/drivers/usb/serial/qcserial.c b/drivers/usb/serial/qcserial.c index 968a40201e5f..7ed681a714a5 100644 --- a/drivers/usb/serial/qcserial.c +++ b/drivers/usb/serial/qcserial.c @@ -136,9 +136,18 @@ static const struct usb_device_id id_table[] = { {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x68a2, 0)}, /* Sierra Wireless MC7710 Device Management */ {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x68a2, 2)}, /* Sierra Wireless MC7710 NMEA */ {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x68a2, 3)}, /* Sierra Wireless MC7710 Modem */ + {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x68c0, 0)}, /* Sierra Wireless MC73xx Device Management */ + {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x68c0, 2)}, /* Sierra Wireless MC73xx NMEA */ + {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x68c0, 3)}, /* Sierra Wireless MC73xx Modem */ {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x901c, 0)}, /* Sierra Wireless EM7700 Device Management */ {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x901c, 2)}, /* Sierra Wireless EM7700 NMEA */ {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x901c, 3)}, /* Sierra Wireless EM7700 Modem */ + {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x901f, 0)}, /* Sierra Wireless EM7355 Device Management */ + {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x901f, 2)}, /* Sierra Wireless EM7355 NMEA */ + {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x901f, 3)}, /* Sierra Wireless EM7355 Modem */ + {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x9041, 0)}, /* Sierra Wireless MC7305/MC7355 Device Management */ + {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x9041, 2)}, /* Sierra Wireless MC7305/MC7355 NMEA */ + {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x9041, 3)}, /* Sierra Wireless MC7305/MC7355 Modem */ {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x9051, 0)}, /* Netgear AirCard 340U Device Management */ {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x9051, 2)}, /* Netgear AirCard 340U NMEA */ {USB_DEVICE_INTERFACE_NUMBER(0x1199, 0x9051, 3)}, /* Netgear AirCard 340U Modem */ diff --git a/drivers/usb/serial/usb-serial.c b/drivers/usb/serial/usb-serial.c index 81fc0dfcfdcf..6d40d56378d7 100644 --- a/drivers/usb/serial/usb-serial.c +++ b/drivers/usb/serial/usb-serial.c @@ -1347,10 +1347,12 @@ static int usb_serial_register(struct usb_serial_driver *driver) static void usb_serial_deregister(struct usb_serial_driver *device) { pr_info("USB Serial deregistering driver %s\n", device->description); + mutex_lock(&table_lock); list_del(&device->driver_list); - usb_serial_bus_deregister(device); mutex_unlock(&table_lock); + + usb_serial_bus_deregister(device); } /** diff --git a/drivers/usb/wusbcore/mmc.c b/drivers/usb/wusbcore/mmc.c index 44741267c917..3f485df96226 100644 --- a/drivers/usb/wusbcore/mmc.c +++ b/drivers/usb/wusbcore/mmc.c @@ -301,7 +301,7 @@ int wusbhc_chid_set(struct wusbhc *wusbhc, const struct wusb_ckhdid *chid) if (chid) result = uwb_radio_start(&wusbhc->pal); - else + else if (wusbhc->uwb_rc) uwb_radio_stop(&wusbhc->pal); return result; diff --git a/drivers/usb/wusbcore/wa-xfer.c b/drivers/usb/wusbcore/wa-xfer.c index c8e2a47d62a7..3e2e4ed20157 100644 --- a/drivers/usb/wusbcore/wa-xfer.c +++ b/drivers/usb/wusbcore/wa-xfer.c @@ -2390,10 +2390,10 @@ error_complete: done) { dev_info(dev, "Control EP stall. Queue delayed work.\n"); - spin_lock_irq(&wa->xfer_list_lock); + spin_lock(&wa->xfer_list_lock); /* move xfer from xfer_list to xfer_errored_list. */ list_move_tail(&xfer->list_node, &wa->xfer_errored_list); - spin_unlock_irq(&wa->xfer_list_lock); + spin_unlock(&wa->xfer_list_lock); spin_unlock_irqrestore(&xfer->lock, flags); queue_work(wusbd, &wa->xfer_error_work); } else { diff --git a/drivers/uwb/drp.c b/drivers/uwb/drp.c index 1a2fd9795367..468c89fb6a16 100644 --- a/drivers/uwb/drp.c +++ b/drivers/uwb/drp.c @@ -59,6 +59,7 @@ static void uwb_rc_set_drp_cmd_done(struct uwb_rc *rc, void *arg, struct uwb_rceb *reply, ssize_t reply_size) { struct uwb_rc_evt_set_drp_ie *r = (struct uwb_rc_evt_set_drp_ie *)reply; + unsigned long flags; if (r != NULL) { if (r->bResultCode != UWB_RC_RES_SUCCESS) @@ -67,14 +68,14 @@ static void uwb_rc_set_drp_cmd_done(struct uwb_rc *rc, void *arg, } else dev_err(&rc->uwb_dev.dev, "SET-DRP-IE: timeout\n"); - spin_lock_irq(&rc->rsvs_lock); + spin_lock_irqsave(&rc->rsvs_lock, flags); if (rc->set_drp_ie_pending > 1) { rc->set_drp_ie_pending = 0; - uwb_rsv_queue_update(rc); + uwb_rsv_queue_update(rc); } else { - rc->set_drp_ie_pending = 0; + rc->set_drp_ie_pending = 0; } - spin_unlock_irq(&rc->rsvs_lock); + spin_unlock_irqrestore(&rc->rsvs_lock, flags); } /** @@ -112,6 +112,11 @@ struct kioctx { struct work_struct free_work; + /* + * signals when all in-flight requests are done + */ + struct completion *requests_done; + struct { /* * This counts the number of available slots in the ringbuffer, @@ -508,6 +513,10 @@ static void free_ioctx_reqs(struct percpu_ref *ref) { struct kioctx *ctx = container_of(ref, struct kioctx, reqs); + /* At this point we know that there are no any in-flight requests */ + if (ctx->requests_done) + complete(ctx->requests_done); + INIT_WORK(&ctx->free_work, free_ioctx); schedule_work(&ctx->free_work); } @@ -718,7 +727,8 @@ err: * when the processes owning a context have all exited to encourage * the rapid destruction of the kioctx. */ -static void kill_ioctx(struct mm_struct *mm, struct kioctx *ctx) +static void kill_ioctx(struct mm_struct *mm, struct kioctx *ctx, + struct completion *requests_done) { if (!atomic_xchg(&ctx->dead, 1)) { struct kioctx_table *table; @@ -747,7 +757,11 @@ static void kill_ioctx(struct mm_struct *mm, struct kioctx *ctx) if (ctx->mmap_size) vm_munmap(ctx->mmap_base, ctx->mmap_size); + ctx->requests_done = requests_done; percpu_ref_kill(&ctx->users); + } else { + if (requests_done) + complete(requests_done); } } @@ -809,7 +823,7 @@ void exit_aio(struct mm_struct *mm) */ ctx->mmap_size = 0; - kill_ioctx(mm, ctx); + kill_ioctx(mm, ctx, NULL); } } @@ -1185,7 +1199,7 @@ SYSCALL_DEFINE2(io_setup, unsigned, nr_events, aio_context_t __user *, ctxp) if (!IS_ERR(ioctx)) { ret = put_user(ioctx->user_id, ctxp); if (ret) - kill_ioctx(current->mm, ioctx); + kill_ioctx(current->mm, ioctx, NULL); percpu_ref_put(&ioctx->users); } @@ -1203,8 +1217,22 @@ SYSCALL_DEFINE1(io_destroy, aio_context_t, ctx) { struct kioctx *ioctx = lookup_ioctx(ctx); if (likely(NULL != ioctx)) { - kill_ioctx(current->mm, ioctx); + struct completion requests_done = + COMPLETION_INITIALIZER_ONSTACK(requests_done); + + /* Pass requests_done to kill_ioctx() where it can be set + * in a thread-safe way. If we try to set it here then we have + * a race condition if two io_destroy() called simultaneously. + */ + kill_ioctx(current->mm, ioctx, &requests_done); percpu_ref_put(&ioctx->users); + + /* Wait until all IO for the context are done. Otherwise kernel + * keep using user-space buffers even if user thinks the context + * is destroyed. + */ + wait_for_completion(&requests_done); + return 0; } pr_debug("EINVAL: io_destroy: invalid context id\n"); @@ -1299,10 +1327,8 @@ rw_common: &iovec, compat) : aio_setup_single_vector(req, rw, buf, &nr_segs, iovec); - if (ret) - return ret; - - ret = rw_verify_area(rw, file, &req->ki_pos, req->ki_nbytes); + if (!ret) + ret = rw_verify_area(rw, file, &req->ki_pos, req->ki_nbytes); if (ret < 0) { if (iovec != &inline_vec) kfree(iovec); diff --git a/fs/btrfs/ctree.h b/fs/btrfs/ctree.h index 4c48df572bd6..ba6b88528dc7 100644 --- a/fs/btrfs/ctree.h +++ b/fs/btrfs/ctree.h @@ -2058,6 +2058,20 @@ struct btrfs_ioctl_defrag_range_args { #define btrfs_raw_test_opt(o, opt) ((o) & BTRFS_MOUNT_##opt) #define btrfs_test_opt(root, opt) ((root)->fs_info->mount_opt & \ BTRFS_MOUNT_##opt) +#define btrfs_set_and_info(root, opt, fmt, args...) \ +{ \ + if (!btrfs_test_opt(root, opt)) \ + btrfs_info(root->fs_info, fmt, ##args); \ + btrfs_set_opt(root->fs_info->mount_opt, opt); \ +} + +#define btrfs_clear_and_info(root, opt, fmt, args...) \ +{ \ + if (btrfs_test_opt(root, opt)) \ + btrfs_info(root->fs_info, fmt, ##args); \ + btrfs_clear_opt(root->fs_info->mount_opt, opt); \ +} + /* * Inode flags */ diff --git a/fs/btrfs/disk-io.c b/fs/btrfs/disk-io.c index 029d46c2e170..983314932af3 100644 --- a/fs/btrfs/disk-io.c +++ b/fs/btrfs/disk-io.c @@ -2861,7 +2861,7 @@ retry_root_backup: printk(KERN_ERR "BTRFS: failed to read log tree\n"); free_extent_buffer(log_tree_root->node); kfree(log_tree_root); - goto fail_trans_kthread; + goto fail_qgroup; } /* returns with log_tree_root freed on success */ ret = btrfs_recover_log_trees(log_tree_root); @@ -2870,24 +2870,24 @@ retry_root_backup: "Failed to recover log tree"); free_extent_buffer(log_tree_root->node); kfree(log_tree_root); - goto fail_trans_kthread; + goto fail_qgroup; } if (sb->s_flags & MS_RDONLY) { ret = btrfs_commit_super(tree_root); if (ret) - goto fail_trans_kthread; + goto fail_qgroup; } } ret = btrfs_find_orphan_roots(tree_root); if (ret) - goto fail_trans_kthread; + goto fail_qgroup; if (!(sb->s_flags & MS_RDONLY)) { ret = btrfs_cleanup_fs_roots(fs_info); if (ret) - goto fail_trans_kthread; + goto fail_qgroup; ret = btrfs_recover_relocation(tree_root); if (ret < 0) { diff --git a/fs/btrfs/extent-tree.c b/fs/btrfs/extent-tree.c index 1306487c82cf..5590af92094b 100644 --- a/fs/btrfs/extent-tree.c +++ b/fs/btrfs/extent-tree.c @@ -1542,6 +1542,7 @@ again: ret = 0; } if (ret) { + key.objectid = bytenr; key.type = BTRFS_EXTENT_ITEM_KEY; key.offset = num_bytes; btrfs_release_path(path); @@ -3542,11 +3543,13 @@ static u64 btrfs_reduce_alloc_profile(struct btrfs_root *root, u64 flags) return extended_to_chunk(flags | tmp); } -static u64 get_alloc_profile(struct btrfs_root *root, u64 flags) +static u64 get_alloc_profile(struct btrfs_root *root, u64 orig_flags) { unsigned seq; + u64 flags; do { + flags = orig_flags; seq = read_seqbegin(&root->fs_info->profiles_lock); if (flags & BTRFS_BLOCK_GROUP_DATA) @@ -5719,6 +5722,7 @@ static int __btrfs_free_extent(struct btrfs_trans_handle *trans, if (ret > 0 && skinny_metadata) { skinny_metadata = false; + key.objectid = bytenr; key.type = BTRFS_EXTENT_ITEM_KEY; key.offset = num_bytes; btrfs_release_path(path); diff --git a/fs/btrfs/file.c b/fs/btrfs/file.c index eb742c07e7a4..ae6af072b635 100644 --- a/fs/btrfs/file.c +++ b/fs/btrfs/file.c @@ -800,7 +800,7 @@ next_slot: if (start > key.offset && end < extent_end) { BUG_ON(del_nr > 0); if (extent_type == BTRFS_FILE_EXTENT_INLINE) { - ret = -EINVAL; + ret = -EOPNOTSUPP; break; } @@ -846,7 +846,7 @@ next_slot: */ if (start <= key.offset && end < extent_end) { if (extent_type == BTRFS_FILE_EXTENT_INLINE) { - ret = -EINVAL; + ret = -EOPNOTSUPP; break; } @@ -872,7 +872,7 @@ next_slot: if (start > key.offset && end >= extent_end) { BUG_ON(del_nr > 0); if (extent_type == BTRFS_FILE_EXTENT_INLINE) { - ret = -EINVAL; + ret = -EOPNOTSUPP; break; } @@ -1777,7 +1777,7 @@ static ssize_t btrfs_file_aio_write(struct kiocb *iocb, start_pos = round_down(pos, root->sectorsize); if (start_pos > i_size_read(inode)) { /* Expand hole size to cover write data, preventing empty gap */ - end_pos = round_up(pos + iov->iov_len, root->sectorsize); + end_pos = round_up(pos + count, root->sectorsize); err = btrfs_cont_expand(inode, i_size_read(inode), end_pos); if (err) { mutex_unlock(&inode->i_mutex); diff --git a/fs/btrfs/inode-map.c b/fs/btrfs/inode-map.c index cc8ca193d830..86935f5ae291 100644 --- a/fs/btrfs/inode-map.c +++ b/fs/btrfs/inode-map.c @@ -176,7 +176,11 @@ static void start_caching(struct btrfs_root *root) tsk = kthread_run(caching_kthread, root, "btrfs-ino-cache-%llu\n", root->root_key.objectid); - BUG_ON(IS_ERR(tsk)); /* -ENOMEM */ + if (IS_ERR(tsk)) { + btrfs_warn(root->fs_info, "failed to start inode caching task"); + btrfs_clear_and_info(root, CHANGE_INODE_CACHE, + "disabling inode map caching"); + } } int btrfs_find_free_ino(struct btrfs_root *root, u64 *objectid) @@ -205,24 +209,14 @@ again: void btrfs_return_ino(struct btrfs_root *root, u64 objectid) { - struct btrfs_free_space_ctl *ctl = root->free_ino_ctl; struct btrfs_free_space_ctl *pinned = root->free_ino_pinned; if (!btrfs_test_opt(root, INODE_MAP_CACHE)) return; - again: if (root->cached == BTRFS_CACHE_FINISHED) { - __btrfs_add_free_space(ctl, objectid, 1); + __btrfs_add_free_space(pinned, objectid, 1); } else { - /* - * If we are in the process of caching free ino chunks, - * to avoid adding the same inode number to the free_ino - * tree twice due to cross transaction, we'll leave it - * in the pinned tree until a transaction is committed - * or the caching work is done. - */ - down_write(&root->fs_info->commit_root_sem); spin_lock(&root->cache_lock); if (root->cached == BTRFS_CACHE_FINISHED) { @@ -234,11 +228,7 @@ again: start_caching(root); - if (objectid <= root->cache_progress || - objectid >= root->highest_objectid) - __btrfs_add_free_space(ctl, objectid, 1); - else - __btrfs_add_free_space(pinned, objectid, 1); + __btrfs_add_free_space(pinned, objectid, 1); up_write(&root->fs_info->commit_root_sem); } diff --git a/fs/btrfs/ioctl.c b/fs/btrfs/ioctl.c index e79ff6b90cb7..2ad7de94efef 100644 --- a/fs/btrfs/ioctl.c +++ b/fs/btrfs/ioctl.c @@ -3066,7 +3066,7 @@ process_slot: new_key.offset + datal, 1); if (ret) { - if (ret != -EINVAL) + if (ret != -EOPNOTSUPP) btrfs_abort_transaction(trans, root, ret); btrfs_end_transaction(trans, root); @@ -3141,7 +3141,7 @@ process_slot: new_key.offset + datal, 1); if (ret) { - if (ret != -EINVAL) + if (ret != -EOPNOTSUPP) btrfs_abort_transaction(trans, root, ret); btrfs_end_transaction(trans, root); diff --git a/fs/btrfs/send.c b/fs/btrfs/send.c index 1ac3ca98c429..eb6537a08c1b 100644 --- a/fs/btrfs/send.c +++ b/fs/btrfs/send.c @@ -349,6 +349,11 @@ static int fs_path_ensure_buf(struct fs_path *p, int len) if (p->buf_len >= len) return 0; + if (len > PATH_MAX) { + WARN_ON(1); + return -ENOMEM; + } + path_len = p->end - p->start; old_buf_len = p->buf_len; diff --git a/fs/btrfs/super.c b/fs/btrfs/super.c index 5011aadacab8..9601d25a4607 100644 --- a/fs/btrfs/super.c +++ b/fs/btrfs/super.c @@ -385,20 +385,6 @@ static match_table_t tokens = { {Opt_err, NULL}, }; -#define btrfs_set_and_info(root, opt, fmt, args...) \ -{ \ - if (!btrfs_test_opt(root, opt)) \ - btrfs_info(root->fs_info, fmt, ##args); \ - btrfs_set_opt(root->fs_info->mount_opt, opt); \ -} - -#define btrfs_clear_and_info(root, opt, fmt, args...) \ -{ \ - if (btrfs_test_opt(root, opt)) \ - btrfs_info(root->fs_info, fmt, ##args); \ - btrfs_clear_opt(root->fs_info->mount_opt, opt); \ -} - /* * Regular mount options parser. Everything that is needed only when * reading in a new superblock is parsed here. @@ -1186,7 +1172,6 @@ static struct dentry *mount_subvol(const char *subvol_name, int flags, return ERR_PTR(-ENOMEM); mnt = vfs_kern_mount(&btrfs_fs_type, flags, device_name, newargs); - kfree(newargs); if (PTR_RET(mnt) == -EBUSY) { if (flags & MS_RDONLY) { @@ -1196,17 +1181,22 @@ static struct dentry *mount_subvol(const char *subvol_name, int flags, int r; mnt = vfs_kern_mount(&btrfs_fs_type, flags | MS_RDONLY, device_name, newargs); - if (IS_ERR(mnt)) + if (IS_ERR(mnt)) { + kfree(newargs); return ERR_CAST(mnt); + } r = btrfs_remount(mnt->mnt_sb, &flags, NULL); if (r < 0) { /* FIXME: release vfsmount mnt ??*/ + kfree(newargs); return ERR_PTR(r); } } } + kfree(newargs); + if (IS_ERR(mnt)) return ERR_CAST(mnt); diff --git a/fs/ceph/file.c b/fs/ceph/file.c index 39da1c2efa50..88a6df4cbe6d 100644 --- a/fs/ceph/file.c +++ b/fs/ceph/file.c @@ -1221,9 +1221,6 @@ static long ceph_fallocate(struct file *file, int mode, if (!S_ISREG(inode->i_mode)) return -EOPNOTSUPP; - if (IS_SWAPFILE(inode)) - return -ETXTBSY; - mutex_lock(&inode->i_mutex); if (ceph_snap(inode) != CEPH_NOSNAP) { diff --git a/fs/compat.c b/fs/compat.c index ca926ad0430c..66d3d3c6b4b2 100644 --- a/fs/compat.c +++ b/fs/compat.c @@ -457,9 +457,9 @@ COMPAT_SYSCALL_DEFINE3(fcntl64, unsigned int, fd, unsigned int, cmd, case F_GETLK64: case F_SETLK64: case F_SETLKW64: - case F_GETLKP: - case F_SETLKP: - case F_SETLKPW: + case F_OFD_GETLK: + case F_OFD_SETLK: + case F_OFD_SETLKW: ret = get_compat_flock64(&f, compat_ptr(arg)); if (ret != 0) break; @@ -468,7 +468,7 @@ COMPAT_SYSCALL_DEFINE3(fcntl64, unsigned int, fd, unsigned int, cmd, conv_cmd = convert_fcntl_cmd(cmd); ret = sys_fcntl(fd, conv_cmd, (unsigned long)&f); set_fs(old_fs); - if ((conv_cmd == F_GETLK || conv_cmd == F_GETLKP) && ret == 0) { + if ((conv_cmd == F_GETLK || conv_cmd == F_OFD_GETLK) && ret == 0) { /* need to return lock information - see above for commentary */ if (f.l_start > COMPAT_LOFF_T_MAX) ret = -EOVERFLOW; @@ -493,9 +493,9 @@ COMPAT_SYSCALL_DEFINE3(fcntl, unsigned int, fd, unsigned int, cmd, case F_GETLK64: case F_SETLK64: case F_SETLKW64: - case F_GETLKP: - case F_SETLKP: - case F_SETLKPW: + case F_OFD_GETLK: + case F_OFD_SETLK: + case F_OFD_SETLKW: return -EINVAL; } return compat_sys_fcntl64(fd, cmd, arg); diff --git a/fs/ext4/balloc.c b/fs/ext4/balloc.c index 6ea7b1436bbc..5c56785007e0 100644 --- a/fs/ext4/balloc.c +++ b/fs/ext4/balloc.c @@ -667,7 +667,7 @@ ext4_fsblk_t ext4_count_free_clusters(struct super_block *sb) continue; x = ext4_count_free(bitmap_bh->b_data, - EXT4_BLOCKS_PER_GROUP(sb) / 8); + EXT4_CLUSTERS_PER_GROUP(sb) / 8); printk(KERN_DEBUG "group %u: stored = %d, counted = %u\n", i, ext4_free_group_clusters(sb, gdp), x); bitmap_count += x; diff --git a/fs/ext4/ext4.h b/fs/ext4/ext4.h index f1c65dc7cc0a..66946aa62127 100644 --- a/fs/ext4/ext4.h +++ b/fs/ext4/ext4.h @@ -2466,23 +2466,6 @@ static inline void ext4_update_i_disksize(struct inode *inode, loff_t newsize) up_write(&EXT4_I(inode)->i_data_sem); } -/* - * Update i_disksize after writeback has been started. Races with truncate - * are avoided by checking i_size under i_data_sem. - */ -static inline void ext4_wb_update_i_disksize(struct inode *inode, loff_t newsize) -{ - loff_t i_size; - - down_write(&EXT4_I(inode)->i_data_sem); - i_size = i_size_read(inode); - if (newsize > i_size) - newsize = i_size; - if (newsize > EXT4_I(inode)->i_disksize) - EXT4_I(inode)->i_disksize = newsize; - up_write(&EXT4_I(inode)->i_data_sem); -} - struct ext4_group_info { unsigned long bb_state; struct rb_root bb_free_root; diff --git a/fs/ext4/extents.c b/fs/ext4/extents.c index 82df3ce9874a..01b0c208f625 100644 --- a/fs/ext4/extents.c +++ b/fs/ext4/extents.c @@ -3313,6 +3313,11 @@ static int ext4_split_extent(handle_t *handle, return PTR_ERR(path); depth = ext_depth(inode); ex = path[depth].p_ext; + if (!ex) { + EXT4_ERROR_INODE(inode, "unexpected hole at %lu", + (unsigned long) map->m_lblk); + return -EIO; + } uninitialized = ext4_ext_is_uninitialized(ex); split_flag1 = 0; @@ -3694,6 +3699,12 @@ static int ext4_convert_initialized_extents(handle_t *handle, } depth = ext_depth(inode); ex = path[depth].p_ext; + if (!ex) { + EXT4_ERROR_INODE(inode, "unexpected hole at %lu", + (unsigned long) map->m_lblk); + err = -EIO; + goto out; + } } err = ext4_ext_get_access(handle, inode, path + depth); @@ -4730,6 +4741,9 @@ static long ext4_zero_range(struct file *file, loff_t offset, trace_ext4_zero_range(inode, offset, len, mode); + if (!S_ISREG(inode->i_mode)) + return -EINVAL; + /* * Write out all dirty pages to avoid race conditions * Then release them. @@ -4878,9 +4892,6 @@ long ext4_fallocate(struct file *file, int mode, loff_t offset, loff_t len) if (mode & FALLOC_FL_PUNCH_HOLE) return ext4_punch_hole(inode, offset, len); - if (mode & FALLOC_FL_COLLAPSE_RANGE) - return ext4_collapse_range(inode, offset, len); - ret = ext4_convert_inline_data(inode); if (ret) return ret; @@ -4892,6 +4903,9 @@ long ext4_fallocate(struct file *file, int mode, loff_t offset, loff_t len) if (!(ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS))) return -EOPNOTSUPP; + if (mode & FALLOC_FL_COLLAPSE_RANGE) + return ext4_collapse_range(inode, offset, len); + if (mode & FALLOC_FL_ZERO_RANGE) return ext4_zero_range(file, offset, len, mode); @@ -5229,18 +5243,19 @@ ext4_ext_shift_path_extents(struct ext4_ext_path *path, ext4_lblk_t shift, if (ex_start == EXT_FIRST_EXTENT(path[depth].p_hdr)) update = 1; - *start = ex_last->ee_block + + *start = le32_to_cpu(ex_last->ee_block) + ext4_ext_get_actual_len(ex_last); while (ex_start <= ex_last) { - ex_start->ee_block -= shift; - if (ex_start > - EXT_FIRST_EXTENT(path[depth].p_hdr)) { - if (ext4_ext_try_to_merge_right(inode, - path, ex_start - 1)) - ex_last--; - } - ex_start++; + le32_add_cpu(&ex_start->ee_block, -shift); + /* Try to merge to the left. */ + if ((ex_start > + EXT_FIRST_EXTENT(path[depth].p_hdr)) && + ext4_ext_try_to_merge_right(inode, + path, ex_start - 1)) + ex_last--; + else + ex_start++; } err = ext4_ext_dirty(handle, inode, path + depth); if (err) @@ -5255,7 +5270,7 @@ ext4_ext_shift_path_extents(struct ext4_ext_path *path, ext4_lblk_t shift, if (err) goto out; - path[depth].p_idx->ei_block -= shift; + le32_add_cpu(&path[depth].p_idx->ei_block, -shift); err = ext4_ext_dirty(handle, inode, path + depth); if (err) goto out; @@ -5300,7 +5315,8 @@ ext4_ext_shift_extents(struct inode *inode, handle_t *handle, return ret; } - stop_block = extent->ee_block + ext4_ext_get_actual_len(extent); + stop_block = le32_to_cpu(extent->ee_block) + + ext4_ext_get_actual_len(extent); ext4_ext_drop_refs(path); kfree(path); @@ -5313,10 +5329,18 @@ ext4_ext_shift_extents(struct inode *inode, handle_t *handle, * enough to accomodate the shift. */ path = ext4_ext_find_extent(inode, start - 1, NULL, 0); + if (IS_ERR(path)) + return PTR_ERR(path); depth = path->p_depth; extent = path[depth].p_ext; - ex_start = extent->ee_block; - ex_end = extent->ee_block + ext4_ext_get_actual_len(extent); + if (extent) { + ex_start = le32_to_cpu(extent->ee_block); + ex_end = le32_to_cpu(extent->ee_block) + + ext4_ext_get_actual_len(extent); + } else { + ex_start = 0; + ex_end = 0; + } ext4_ext_drop_refs(path); kfree(path); @@ -5331,7 +5355,13 @@ ext4_ext_shift_extents(struct inode *inode, handle_t *handle, return PTR_ERR(path); depth = path->p_depth; extent = path[depth].p_ext; - current_block = extent->ee_block; + if (!extent) { + EXT4_ERROR_INODE(inode, "unexpected hole at %lu", + (unsigned long) start); + return -EIO; + } + + current_block = le32_to_cpu(extent->ee_block); if (start > current_block) { /* Hole, move to the next extent */ ret = mext_next_extent(inode, path, &extent); @@ -5365,17 +5395,18 @@ int ext4_collapse_range(struct inode *inode, loff_t offset, loff_t len) ext4_lblk_t punch_start, punch_stop; handle_t *handle; unsigned int credits; - loff_t new_size; + loff_t new_size, ioffset; int ret; - BUG_ON(offset + len > i_size_read(inode)); - /* Collapse range works only on fs block size aligned offsets. */ if (offset & (EXT4_BLOCK_SIZE(sb) - 1) || len & (EXT4_BLOCK_SIZE(sb) - 1)) return -EINVAL; if (!S_ISREG(inode->i_mode)) + return -EINVAL; + + if (EXT4_SB(inode->i_sb)->s_cluster_ratio > 1) return -EOPNOTSUPP; trace_ext4_collapse_range(inode, offset, len); @@ -5383,22 +5414,34 @@ int ext4_collapse_range(struct inode *inode, loff_t offset, loff_t len) punch_start = offset >> EXT4_BLOCK_SIZE_BITS(sb); punch_stop = (offset + len) >> EXT4_BLOCK_SIZE_BITS(sb); + /* Call ext4_force_commit to flush all data in case of data=journal. */ + if (ext4_should_journal_data(inode)) { + ret = ext4_force_commit(inode->i_sb); + if (ret) + return ret; + } + + /* + * Need to round down offset to be aligned with page size boundary + * for page size > block size. + */ + ioffset = round_down(offset, PAGE_SIZE); + /* Write out all dirty pages */ - ret = filemap_write_and_wait_range(inode->i_mapping, offset, -1); + ret = filemap_write_and_wait_range(inode->i_mapping, ioffset, + LLONG_MAX); if (ret) return ret; /* Take mutex lock */ mutex_lock(&inode->i_mutex); - /* It's not possible punch hole on append only file */ - if (IS_APPEND(inode) || IS_IMMUTABLE(inode)) { - ret = -EPERM; - goto out_mutex; - } - - if (IS_SWAPFILE(inode)) { - ret = -ETXTBSY; + /* + * There is no need to overlap collapse range with EOF, in which case + * it is effectively a truncate operation + */ + if (offset + len >= i_size_read(inode)) { + ret = -EINVAL; goto out_mutex; } @@ -5408,7 +5451,7 @@ int ext4_collapse_range(struct inode *inode, loff_t offset, loff_t len) goto out_mutex; } - truncate_pagecache_range(inode, offset, -1); + truncate_pagecache(inode, ioffset); /* Wait for existing dio to complete */ ext4_inode_block_unlocked_dio(inode); @@ -5425,7 +5468,7 @@ int ext4_collapse_range(struct inode *inode, loff_t offset, loff_t len) ext4_discard_preallocations(inode); ret = ext4_es_remove_extent(inode, punch_start, - EXT_MAX_BLOCKS - punch_start - 1); + EXT_MAX_BLOCKS - punch_start); if (ret) { up_write(&EXT4_I(inode)->i_data_sem); goto out_stop; @@ -5436,6 +5479,7 @@ int ext4_collapse_range(struct inode *inode, loff_t offset, loff_t len) up_write(&EXT4_I(inode)->i_data_sem); goto out_stop; } + ext4_discard_preallocations(inode); ret = ext4_ext_shift_extents(inode, handle, punch_stop, punch_stop - punch_start); @@ -5445,10 +5489,9 @@ int ext4_collapse_range(struct inode *inode, loff_t offset, loff_t len) } new_size = i_size_read(inode) - len; - truncate_setsize(inode, new_size); + i_size_write(inode, new_size); EXT4_I(inode)->i_disksize = new_size; - ext4_discard_preallocations(inode); up_write(&EXT4_I(inode)->i_data_sem); if (IS_SYNC(inode)) ext4_handle_sync(handle); diff --git a/fs/ext4/extents_status.c b/fs/ext4/extents_status.c index 0a014a7194b2..0ebc21204b51 100644 --- a/fs/ext4/extents_status.c +++ b/fs/ext4/extents_status.c @@ -810,7 +810,7 @@ retry: newes.es_lblk = end + 1; newes.es_len = len2; - block = 0x7FDEADBEEF; + block = 0x7FDEADBEEFULL; if (ext4_es_is_written(&orig_es) || ext4_es_is_unwritten(&orig_es)) block = ext4_es_pblock(&orig_es) + diff --git a/fs/ext4/file.c b/fs/ext4/file.c index ca7502d89fde..063fc1538355 100644 --- a/fs/ext4/file.c +++ b/fs/ext4/file.c @@ -82,7 +82,7 @@ ext4_unaligned_aio(struct inode *inode, const struct iovec *iov, size_t count = iov_length(iov, nr_segs); loff_t final_size = pos + count; - if (pos >= inode->i_size) + if (pos >= i_size_read(inode)) return 0; if ((pos & blockmask) || (final_size & blockmask)) diff --git a/fs/ext4/inode.c b/fs/ext4/inode.c index 5b0d2c7d5408..d7b7462a0e13 100644 --- a/fs/ext4/inode.c +++ b/fs/ext4/inode.c @@ -522,6 +522,10 @@ int ext4_map_blocks(handle_t *handle, struct inode *inode, if (unlikely(map->m_len > INT_MAX)) map->m_len = INT_MAX; + /* We can handle the block number less than EXT_MAX_BLOCKS */ + if (unlikely(map->m_lblk >= EXT_MAX_BLOCKS)) + return -EIO; + /* Lookup extent status tree firstly */ if (ext4_es_lookup_extent(inode, map->m_lblk, &es)) { ext4_es_lru_add(inode); @@ -2243,13 +2247,23 @@ static int mpage_map_and_submit_extent(handle_t *handle, return err; } while (map->m_len); - /* Update on-disk size after IO is submitted */ + /* + * Update on-disk size after IO is submitted. Races with + * truncate are avoided by checking i_size under i_data_sem. + */ disksize = ((loff_t)mpd->first_page) << PAGE_CACHE_SHIFT; if (disksize > EXT4_I(inode)->i_disksize) { int err2; - - ext4_wb_update_i_disksize(inode, disksize); + loff_t i_size; + + down_write(&EXT4_I(inode)->i_data_sem); + i_size = i_size_read(inode); + if (disksize > i_size) + disksize = i_size; + if (disksize > EXT4_I(inode)->i_disksize) + EXT4_I(inode)->i_disksize = disksize; err2 = ext4_mark_inode_dirty(handle, inode); + up_write(&EXT4_I(inode)->i_data_sem); if (err2) ext4_error(inode->i_sb, "Failed to mark inode %lu dirty", @@ -3527,15 +3541,6 @@ int ext4_punch_hole(struct inode *inode, loff_t offset, loff_t length) } mutex_lock(&inode->i_mutex); - /* It's not possible punch hole on append only file */ - if (IS_APPEND(inode) || IS_IMMUTABLE(inode)) { - ret = -EPERM; - goto out_mutex; - } - if (IS_SWAPFILE(inode)) { - ret = -ETXTBSY; - goto out_mutex; - } /* No need to punch hole beyond i_size */ if (offset >= inode->i_size) @@ -3616,7 +3621,6 @@ int ext4_punch_hole(struct inode *inode, loff_t offset, loff_t length) ret = ext4_free_hole_blocks(handle, inode, first_block, stop_block); - ext4_discard_preallocations(inode); up_write(&EXT4_I(inode)->i_data_sem); if (IS_SYNC(inode)) ext4_handle_sync(handle); @@ -4423,21 +4427,20 @@ out_brelse: * * We are called from a few places: * - * - Within generic_file_write() for O_SYNC files. + * - Within generic_file_aio_write() -> generic_write_sync() for O_SYNC files. * Here, there will be no transaction running. We wait for any running * transaction to commit. * - * - Within sys_sync(), kupdate and such. - * We wait on commit, if tol to. + * - Within flush work (sys_sync(), kupdate and such). + * We wait on commit, if told to. * - * - Within prune_icache() (PF_MEMALLOC == true) - * Here we simply return. We can't afford to block kswapd on the - * journal commit. + * - Within iput_final() -> write_inode_now() + * We wait on commit, if told to. * * In all cases it is actually safe for us to return without doing anything, * because the inode has been copied into a raw inode buffer in - * ext4_mark_inode_dirty(). This is a correctness thing for O_SYNC and for - * knfsd. + * ext4_mark_inode_dirty(). This is a correctness thing for WB_SYNC_ALL + * writeback. * * Note that we are absolutely dependent upon all inode dirtiers doing the * right thing: they *must* call mark_inode_dirty() after dirtying info in @@ -4449,15 +4452,15 @@ out_brelse: * stuff(); * inode->i_size = expr; * - * is in error because a kswapd-driven write_inode() could occur while - * `stuff()' is running, and the new i_size will be lost. Plus the inode - * will no longer be on the superblock's dirty inode list. + * is in error because write_inode() could occur while `stuff()' is running, + * and the new i_size will be lost. Plus the inode will no longer be on the + * superblock's dirty inode list. */ int ext4_write_inode(struct inode *inode, struct writeback_control *wbc) { int err; - if (current->flags & PF_MEMALLOC) + if (WARN_ON_ONCE(current->flags & PF_MEMALLOC)) return 0; if (EXT4_SB(inode->i_sb)->s_journal) { diff --git a/fs/ext4/mballoc.c b/fs/ext4/mballoc.c index a888cac76e9c..c8238a26818c 100644 --- a/fs/ext4/mballoc.c +++ b/fs/ext4/mballoc.c @@ -989,7 +989,7 @@ static int ext4_mb_get_buddy_page_lock(struct super_block *sb, poff = block % blocks_per_page; page = find_or_create_page(inode->i_mapping, pnum, GFP_NOFS); if (!page) - return -EIO; + return -ENOMEM; BUG_ON(page->mapping != inode->i_mapping); e4b->bd_bitmap_page = page; e4b->bd_bitmap = page_address(page) + (poff * sb->s_blocksize); @@ -1003,7 +1003,7 @@ static int ext4_mb_get_buddy_page_lock(struct super_block *sb, pnum = block / blocks_per_page; page = find_or_create_page(inode->i_mapping, pnum, GFP_NOFS); if (!page) - return -EIO; + return -ENOMEM; BUG_ON(page->mapping != inode->i_mapping); e4b->bd_buddy_page = page; return 0; @@ -1168,7 +1168,11 @@ ext4_mb_load_buddy(struct super_block *sb, ext4_group_t group, unlock_page(page); } } - if (page == NULL || !PageUptodate(page)) { + if (page == NULL) { + ret = -ENOMEM; + goto err; + } + if (!PageUptodate(page)) { ret = -EIO; goto err; } @@ -1197,7 +1201,11 @@ ext4_mb_load_buddy(struct super_block *sb, ext4_group_t group, unlock_page(page); } } - if (page == NULL || !PageUptodate(page)) { + if (page == NULL) { + ret = -ENOMEM; + goto err; + } + if (!PageUptodate(page)) { ret = -EIO; goto err; } @@ -5008,6 +5016,8 @@ error_return: */ static int ext4_trim_extent(struct super_block *sb, int start, int count, ext4_group_t group, struct ext4_buddy *e4b) +__releases(bitlock) +__acquires(bitlock) { struct ext4_free_extent ex; int ret = 0; diff --git a/fs/ext4/page-io.c b/fs/ext4/page-io.c index ab95508e3d40..c18d95b50540 100644 --- a/fs/ext4/page-io.c +++ b/fs/ext4/page-io.c @@ -308,13 +308,14 @@ static void ext4_end_bio(struct bio *bio, int error) if (error) { struct inode *inode = io_end->inode; - ext4_warning(inode->i_sb, "I/O error writing to inode %lu " + ext4_warning(inode->i_sb, "I/O error %d writing to inode %lu " "(offset %llu size %ld starting block %llu)", - inode->i_ino, + error, inode->i_ino, (unsigned long long) io_end->offset, (long) io_end->size, (unsigned long long) bi_sector >> (inode->i_blkbits - 9)); + mapping_set_error(inode->i_mapping, error); } if (io_end->flag & EXT4_IO_END_UNWRITTEN) { diff --git a/fs/ext4/super.c b/fs/ext4/super.c index f3c667091618..6f9e6fadac04 100644 --- a/fs/ext4/super.c +++ b/fs/ext4/super.c @@ -3869,19 +3869,38 @@ static int ext4_fill_super(struct super_block *sb, void *data, int silent) goto failed_mount2; } } + + /* + * set up enough so that it can read an inode, + * and create new inode for buddy allocator + */ + sbi->s_gdb_count = db_count; + if (!test_opt(sb, NOLOAD) && + EXT4_HAS_COMPAT_FEATURE(sb, EXT4_FEATURE_COMPAT_HAS_JOURNAL)) + sb->s_op = &ext4_sops; + else + sb->s_op = &ext4_nojournal_sops; + + ext4_ext_init(sb); + err = ext4_mb_init(sb); + if (err) { + ext4_msg(sb, KERN_ERR, "failed to initialize mballoc (%d)", + err); + goto failed_mount2; + } + if (!ext4_check_descriptors(sb, &first_not_zeroed)) { ext4_msg(sb, KERN_ERR, "group descriptors corrupted!"); - goto failed_mount2; + goto failed_mount2a; } if (EXT4_HAS_INCOMPAT_FEATURE(sb, EXT4_FEATURE_INCOMPAT_FLEX_BG)) if (!ext4_fill_flex_info(sb)) { ext4_msg(sb, KERN_ERR, "unable to initialize " "flex_bg meta info!"); - goto failed_mount2; + goto failed_mount2a; } - sbi->s_gdb_count = db_count; get_random_bytes(&sbi->s_next_generation, sizeof(u32)); spin_lock_init(&sbi->s_next_gen_lock); @@ -3916,14 +3935,6 @@ static int ext4_fill_super(struct super_block *sb, void *data, int silent) sbi->s_stripe = ext4_get_stripe_size(sbi); sbi->s_extent_max_zeroout_kb = 32; - /* - * set up enough so that it can read an inode - */ - if (!test_opt(sb, NOLOAD) && - EXT4_HAS_COMPAT_FEATURE(sb, EXT4_FEATURE_COMPAT_HAS_JOURNAL)) - sb->s_op = &ext4_sops; - else - sb->s_op = &ext4_nojournal_sops; sb->s_export_op = &ext4_export_ops; sb->s_xattr = ext4_xattr_handlers; #ifdef CONFIG_QUOTA @@ -4113,21 +4124,13 @@ no_journal: if (err) { ext4_msg(sb, KERN_ERR, "failed to reserve %llu clusters for " "reserved pool", ext4_calculate_resv_clusters(sb)); - goto failed_mount4a; + goto failed_mount5; } err = ext4_setup_system_zone(sb); if (err) { ext4_msg(sb, KERN_ERR, "failed to initialize system " "zone (%d)", err); - goto failed_mount4a; - } - - ext4_ext_init(sb); - err = ext4_mb_init(sb); - if (err) { - ext4_msg(sb, KERN_ERR, "failed to initialize mballoc (%d)", - err); goto failed_mount5; } @@ -4204,11 +4207,8 @@ failed_mount8: failed_mount7: ext4_unregister_li_request(sb); failed_mount6: - ext4_mb_release(sb); -failed_mount5: - ext4_ext_release(sb); ext4_release_system_zone(sb); -failed_mount4a: +failed_mount5: dput(sb->s_root); sb->s_root = NULL; failed_mount4: @@ -4232,11 +4232,14 @@ failed_mount3: percpu_counter_destroy(&sbi->s_extent_cache_cnt); if (sbi->s_mmp_tsk) kthread_stop(sbi->s_mmp_tsk); +failed_mount2a: + ext4_mb_release(sb); failed_mount2: for (i = 0; i < db_count; i++) brelse(sbi->s_group_desc[i]); ext4_kvfree(sbi->s_group_desc); failed_mount: + ext4_ext_release(sb); if (sbi->s_chksum_driver) crypto_free_shash(sbi->s_chksum_driver); if (sbi->s_proc) { diff --git a/fs/ext4/xattr.c b/fs/ext4/xattr.c index 1f5cf5880718..4eec399ec807 100644 --- a/fs/ext4/xattr.c +++ b/fs/ext4/xattr.c @@ -520,8 +520,8 @@ static void ext4_xattr_update_super_block(handle_t *handle, } /* - * Release the xattr block BH: If the reference count is > 1, decrement - * it; otherwise free the block. + * Release the xattr block BH: If the reference count is > 1, decrement it; + * otherwise free the block. */ static void ext4_xattr_release_block(handle_t *handle, struct inode *inode, @@ -542,16 +542,31 @@ ext4_xattr_release_block(handle_t *handle, struct inode *inode, if (ce) mb_cache_entry_free(ce); get_bh(bh); + unlock_buffer(bh); ext4_free_blocks(handle, inode, bh, 0, 1, EXT4_FREE_BLOCKS_METADATA | EXT4_FREE_BLOCKS_FORGET); - unlock_buffer(bh); } else { le32_add_cpu(&BHDR(bh)->h_refcount, -1); if (ce) mb_cache_entry_release(ce); + /* + * Beware of this ugliness: Releasing of xattr block references + * from different inodes can race and so we have to protect + * from a race where someone else frees the block (and releases + * its journal_head) before we are done dirtying the buffer. In + * nojournal mode this race is harmless and we actually cannot + * call ext4_handle_dirty_xattr_block() with locked buffer as + * that function can call sync_dirty_buffer() so for that case + * we handle the dirtying after unlocking the buffer. + */ + if (ext4_handle_valid(handle)) + error = ext4_handle_dirty_xattr_block(handle, inode, + bh); unlock_buffer(bh); - error = ext4_handle_dirty_xattr_block(handle, inode, bh); + if (!ext4_handle_valid(handle)) + error = ext4_handle_dirty_xattr_block(handle, inode, + bh); if (IS_SYNC(inode)) ext4_handle_sync(handle); dquot_free_block(inode, EXT4_C2B(EXT4_SB(inode->i_sb), 1)); diff --git a/fs/fcntl.c b/fs/fcntl.c index 9ead1596399a..72c82f69b01b 100644 --- a/fs/fcntl.c +++ b/fs/fcntl.c @@ -274,15 +274,15 @@ static long do_fcntl(int fd, unsigned int cmd, unsigned long arg, break; #if BITS_PER_LONG != 32 /* 32-bit arches must use fcntl64() */ - case F_GETLKP: + case F_OFD_GETLK: #endif case F_GETLK: err = fcntl_getlk(filp, cmd, (struct flock __user *) arg); break; #if BITS_PER_LONG != 32 /* 32-bit arches must use fcntl64() */ - case F_SETLKP: - case F_SETLKPW: + case F_OFD_SETLK: + case F_OFD_SETLKW: #endif /* Fallthrough */ case F_SETLK: @@ -399,13 +399,13 @@ SYSCALL_DEFINE3(fcntl64, unsigned int, fd, unsigned int, cmd, switch (cmd) { case F_GETLK64: - case F_GETLKP: + case F_OFD_GETLK: err = fcntl_getlk64(f.file, cmd, (struct flock64 __user *) arg); break; case F_SETLK64: case F_SETLKW64: - case F_SETLKP: - case F_SETLKPW: + case F_OFD_SETLK: + case F_OFD_SETLKW: err = fcntl_setlk64(fd, f.file, cmd, (struct flock64 __user *) arg); break; diff --git a/fs/kernfs/dir.c b/fs/kernfs/dir.c index 78f3403300af..ac127cd008bf 100644 --- a/fs/kernfs/dir.c +++ b/fs/kernfs/dir.c @@ -232,9 +232,6 @@ static int kernfs_link_sibling(struct kernfs_node *kn) struct rb_node **node = &kn->parent->dir.children.rb_node; struct rb_node *parent = NULL; - if (kernfs_type(kn) == KERNFS_DIR) - kn->parent->dir.subdirs++; - while (*node) { struct kernfs_node *pos; int result; @@ -249,9 +246,15 @@ static int kernfs_link_sibling(struct kernfs_node *kn) else return -EEXIST; } + /* add new node and rebalance the tree */ rb_link_node(&kn->rb, parent, node); rb_insert_color(&kn->rb, &kn->parent->dir.children); + + /* successfully added, account subdir number */ + if (kernfs_type(kn) == KERNFS_DIR) + kn->parent->dir.subdirs++; + return 0; } diff --git a/fs/kernfs/file.c b/fs/kernfs/file.c index 8034706a7af8..e01ea4a14a01 100644 --- a/fs/kernfs/file.c +++ b/fs/kernfs/file.c @@ -484,6 +484,8 @@ static int kernfs_fop_mmap(struct file *file, struct vm_area_struct *vma) ops = kernfs_ops(of->kn); rc = ops->mmap(of, vma); + if (rc) + goto out_put; /* * PowerPC's pci_mmap of legacy_mem uses shmem_zero_setup() diff --git a/fs/locks.c b/fs/locks.c index 13fc7a6d380a..e663aeac579e 100644 --- a/fs/locks.c +++ b/fs/locks.c @@ -135,7 +135,7 @@ #define IS_POSIX(fl) (fl->fl_flags & FL_POSIX) #define IS_FLOCK(fl) (fl->fl_flags & FL_FLOCK) #define IS_LEASE(fl) (fl->fl_flags & (FL_LEASE|FL_DELEG)) -#define IS_FILE_PVT(fl) (fl->fl_flags & FL_FILE_PVT) +#define IS_OFDLCK(fl) (fl->fl_flags & FL_OFDLCK) static bool lease_breaking(struct file_lock *fl) { @@ -564,7 +564,7 @@ static void __locks_insert_block(struct file_lock *blocker, BUG_ON(!list_empty(&waiter->fl_block)); waiter->fl_next = blocker; list_add_tail(&waiter->fl_block, &blocker->fl_block); - if (IS_POSIX(blocker) && !IS_FILE_PVT(blocker)) + if (IS_POSIX(blocker) && !IS_OFDLCK(blocker)) locks_insert_global_blocked(waiter); } @@ -759,12 +759,12 @@ EXPORT_SYMBOL(posix_test_lock); * of tasks (such as posix threads) sharing the same open file table. * To handle those cases, we just bail out after a few iterations. * - * For FL_FILE_PVT locks, the owner is the filp, not the files_struct. + * For FL_OFDLCK locks, the owner is the filp, not the files_struct. * Because the owner is not even nominally tied to a thread of * execution, the deadlock detection below can't reasonably work well. Just * skip it for those. * - * In principle, we could do a more limited deadlock detection on FL_FILE_PVT + * In principle, we could do a more limited deadlock detection on FL_OFDLCK * locks that just checks for the case where two tasks are attempting to * upgrade from read to write locks on the same inode. */ @@ -791,9 +791,9 @@ static int posix_locks_deadlock(struct file_lock *caller_fl, /* * This deadlock detector can't reasonably detect deadlocks with - * FL_FILE_PVT locks, since they aren't owned by a process, per-se. + * FL_OFDLCK locks, since they aren't owned by a process, per-se. */ - if (IS_FILE_PVT(caller_fl)) + if (IS_OFDLCK(caller_fl)) return 0; while ((block_fl = what_owner_is_waiting_for(block_fl))) { @@ -1391,11 +1391,10 @@ int __break_lease(struct inode *inode, unsigned int mode, unsigned int type) restart: break_time = flock->fl_break_time; - if (break_time != 0) { + if (break_time != 0) break_time -= jiffies; - if (break_time == 0) - break_time++; - } + if (break_time == 0) + break_time++; locks_insert_block(flock, new_fl); spin_unlock(&inode->i_lock); error = wait_event_interruptible_timeout(new_fl->fl_wait, @@ -1891,7 +1890,7 @@ EXPORT_SYMBOL_GPL(vfs_test_lock); static int posix_lock_to_flock(struct flock *flock, struct file_lock *fl) { - flock->l_pid = IS_FILE_PVT(fl) ? -1 : fl->fl_pid; + flock->l_pid = IS_OFDLCK(fl) ? -1 : fl->fl_pid; #if BITS_PER_LONG == 32 /* * Make sure we can represent the posix lock via @@ -1913,7 +1912,7 @@ static int posix_lock_to_flock(struct flock *flock, struct file_lock *fl) #if BITS_PER_LONG == 32 static void posix_lock_to_flock64(struct flock64 *flock, struct file_lock *fl) { - flock->l_pid = IS_FILE_PVT(fl) ? -1 : fl->fl_pid; + flock->l_pid = IS_OFDLCK(fl) ? -1 : fl->fl_pid; flock->l_start = fl->fl_start; flock->l_len = fl->fl_end == OFFSET_MAX ? 0 : fl->fl_end - fl->fl_start + 1; @@ -1942,13 +1941,13 @@ int fcntl_getlk(struct file *filp, unsigned int cmd, struct flock __user *l) if (error) goto out; - if (cmd == F_GETLKP) { + if (cmd == F_OFD_GETLK) { error = -EINVAL; if (flock.l_pid != 0) goto out; cmd = F_GETLK; - file_lock.fl_flags |= FL_FILE_PVT; + file_lock.fl_flags |= FL_OFDLCK; file_lock.fl_owner = (fl_owner_t)filp; } @@ -2074,25 +2073,25 @@ again: /* * If the cmd is requesting file-private locks, then set the - * FL_FILE_PVT flag and override the owner. + * FL_OFDLCK flag and override the owner. */ switch (cmd) { - case F_SETLKP: + case F_OFD_SETLK: error = -EINVAL; if (flock.l_pid != 0) goto out; cmd = F_SETLK; - file_lock->fl_flags |= FL_FILE_PVT; + file_lock->fl_flags |= FL_OFDLCK; file_lock->fl_owner = (fl_owner_t)filp; break; - case F_SETLKPW: + case F_OFD_SETLKW: error = -EINVAL; if (flock.l_pid != 0) goto out; cmd = F_SETLKW; - file_lock->fl_flags |= FL_FILE_PVT; + file_lock->fl_flags |= FL_OFDLCK; file_lock->fl_owner = (fl_owner_t)filp; /* Fallthrough */ case F_SETLKW: @@ -2144,13 +2143,13 @@ int fcntl_getlk64(struct file *filp, unsigned int cmd, struct flock64 __user *l) if (error) goto out; - if (cmd == F_GETLKP) { + if (cmd == F_OFD_GETLK) { error = -EINVAL; if (flock.l_pid != 0) goto out; cmd = F_GETLK64; - file_lock.fl_flags |= FL_FILE_PVT; + file_lock.fl_flags |= FL_OFDLCK; file_lock.fl_owner = (fl_owner_t)filp; } @@ -2209,25 +2208,25 @@ again: /* * If the cmd is requesting file-private locks, then set the - * FL_FILE_PVT flag and override the owner. + * FL_OFDLCK flag and override the owner. */ switch (cmd) { - case F_SETLKP: + case F_OFD_SETLK: error = -EINVAL; if (flock.l_pid != 0) goto out; cmd = F_SETLK64; - file_lock->fl_flags |= FL_FILE_PVT; + file_lock->fl_flags |= FL_OFDLCK; file_lock->fl_owner = (fl_owner_t)filp; break; - case F_SETLKPW: + case F_OFD_SETLKW: error = -EINVAL; if (flock.l_pid != 0) goto out; cmd = F_SETLKW64; - file_lock->fl_flags |= FL_FILE_PVT; + file_lock->fl_flags |= FL_OFDLCK; file_lock->fl_owner = (fl_owner_t)filp; /* Fallthrough */ case F_SETLKW64: @@ -2413,8 +2412,8 @@ static void lock_get_status(struct seq_file *f, struct file_lock *fl, if (IS_POSIX(fl)) { if (fl->fl_flags & FL_ACCESS) seq_printf(f, "ACCESS"); - else if (IS_FILE_PVT(fl)) - seq_printf(f, "FLPVT "); + else if (IS_OFDLCK(fl)) + seq_printf(f, "OFDLCK"); else seq_printf(f, "POSIX "); diff --git a/fs/nfsd/nfs4callback.c b/fs/nfsd/nfs4callback.c index 39c8ef875f91..2c73cae9899d 100644 --- a/fs/nfsd/nfs4callback.c +++ b/fs/nfsd/nfs4callback.c @@ -654,9 +654,11 @@ static struct rpc_clnt *create_backchannel_client(struct rpc_create_args *args) static int setup_callback_client(struct nfs4_client *clp, struct nfs4_cb_conn *conn, struct nfsd4_session *ses) { + int maxtime = max_cb_time(clp->net); struct rpc_timeout timeparms = { - .to_initval = max_cb_time(clp->net), + .to_initval = maxtime, .to_retries = 0, + .to_maxval = maxtime, }; struct rpc_create_args args = { .net = clp->net, diff --git a/fs/nfsd/nfs4xdr.c b/fs/nfsd/nfs4xdr.c index 2723c1badd01..18881f34737a 100644 --- a/fs/nfsd/nfs4xdr.c +++ b/fs/nfsd/nfs4xdr.c @@ -3627,14 +3627,6 @@ nfsd4_encode_operation(struct nfsd4_compoundres *resp, struct nfsd4_op *op) /* nfsd4_check_resp_size guarantees enough room for error status */ if (!op->status) op->status = nfsd4_check_resp_size(resp, 0); - if (op->status == nfserr_resource && nfsd4_has_session(&resp->cstate)) { - struct nfsd4_slot *slot = resp->cstate.slot; - - if (slot->sl_flags & NFSD4_SLOT_CACHETHIS) - op->status = nfserr_rep_too_big_to_cache; - else - op->status = nfserr_rep_too_big; - } if (so) { so->so_replay.rp_status = op->status; so->so_replay.rp_buflen = (char *)resp->p - (char *)(statp+1); diff --git a/fs/open.c b/fs/open.c index 3d30eb1fc95e..9d64679cec73 100644 --- a/fs/open.c +++ b/fs/open.c @@ -254,17 +254,22 @@ int do_fallocate(struct file *file, int mode, loff_t offset, loff_t len) return -EBADF; /* - * It's not possible to punch hole or perform collapse range - * on append only file + * We can only allow pure fallocate on append only files */ - if (mode & (FALLOC_FL_PUNCH_HOLE | FALLOC_FL_COLLAPSE_RANGE) - && IS_APPEND(inode)) + if ((mode & ~FALLOC_FL_KEEP_SIZE) && IS_APPEND(inode)) return -EPERM; if (IS_IMMUTABLE(inode)) return -EPERM; /* + * We can not allow to do any fallocate operation on an active + * swapfile + */ + if (IS_SWAPFILE(inode)) + ret = -ETXTBSY; + + /* * Revalidate the write permissions, in case security policy has * changed since the files were opened. */ @@ -286,14 +291,6 @@ int do_fallocate(struct file *file, int mode, loff_t offset, loff_t len) if (((offset + len) > inode->i_sb->s_maxbytes) || ((offset + len) < 0)) return -EFBIG; - /* - * There is no need to overlap collapse range with EOF, in which case - * it is effectively a truncate operation - */ - if ((mode & FALLOC_FL_COLLAPSE_RANGE) && - (offset + len >= i_size_read(inode))) - return -EINVAL; - if (!file->f_op->fallocate) return -EOPNOTSUPP; diff --git a/fs/xfs/xfs_file.c b/fs/xfs/xfs_file.c index 82afdcb33183..951a2321ee01 100644 --- a/fs/xfs/xfs_file.c +++ b/fs/xfs/xfs_file.c @@ -841,7 +841,15 @@ xfs_file_fallocate( goto out_unlock; } - ASSERT(offset + len < i_size_read(inode)); + /* + * There is no need to overlap collapse range with EOF, + * in which case it is effectively a truncate operation + */ + if (offset + len >= i_size_read(inode)) { + error = -EINVAL; + goto out_unlock; + } + new_size = i_size_read(inode) - len; error = xfs_collapse_file_space(ip, offset, len); diff --git a/include/asm-generic/fixmap.h b/include/asm-generic/fixmap.h index 5a64ca4621f3..f23174fb9ec4 100644 --- a/include/asm-generic/fixmap.h +++ b/include/asm-generic/fixmap.h @@ -93,5 +93,8 @@ static inline unsigned long virt_to_fix(const unsigned long vaddr) #define set_fixmap_io(idx, phys) \ __set_fixmap(idx, phys, FIXMAP_PAGE_IO) +#define set_fixmap_offset_io(idx, phys) \ + __set_fixmap_offset(idx, phys, FIXMAP_PAGE_IO) + #endif /* __ASSEMBLY__ */ #endif /* __ASM_GENERIC_FIXMAP_H */ diff --git a/include/asm-generic/word-at-a-time.h b/include/asm-generic/word-at-a-time.h index d3909effd725..94f9ea8abcae 100644 --- a/include/asm-generic/word-at-a-time.h +++ b/include/asm-generic/word-at-a-time.h @@ -50,11 +50,7 @@ static inline bool has_zero(unsigned long val, unsigned long *data, const struct } #ifndef zero_bytemask -#ifdef CONFIG_64BIT -#define zero_bytemask(mask) (~0ul << fls64(mask)) -#else -#define zero_bytemask(mask) (~0ul << fls(mask)) -#endif /* CONFIG_64BIT */ -#endif /* zero_bytemask */ +#define zero_bytemask(mask) (~1ul << __fls(mask)) +#endif #endif /* _ASM_WORD_AT_A_TIME_H */ diff --git a/include/dt-bindings/clk/at91.h b/include/dt-bindings/clock/at91.h index 0b4cb999a3f7..0b4cb999a3f7 100644 --- a/include/dt-bindings/clk/at91.h +++ b/include/dt-bindings/clock/at91.h diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h index 6548a5fbcf4a..4d3e935b3f1b 100644 --- a/include/dt-bindings/clock/r8a7790-clock.h +++ b/include/dt-bindings/clock/r8a7790-clock.h @@ -50,6 +50,7 @@ #define R8A7790_CLK_SYS_DMAC0 19 /* MSTP3 */ +#define R8A7790_CLK_IIC2 0 #define R8A7790_CLK_TPU0 4 #define R8A7790_CLK_MMCIF1 5 #define R8A7790_CLK_SDHI3 11 @@ -57,6 +58,8 @@ #define R8A7790_CLK_SDHI1 13 #define R8A7790_CLK_SDHI0 14 #define R8A7790_CLK_MMCIF0 15 +#define R8A7790_CLK_IIC0 18 +#define R8A7790_CLK_IIC1 23 #define R8A7790_CLK_SSUSB 28 #define R8A7790_CLK_CMT1 29 #define R8A7790_CLK_USBDMAC0 30 diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h index 30f82f286e29..602354365819 100644 --- a/include/dt-bindings/clock/r8a7791-clock.h +++ b/include/dt-bindings/clock/r8a7791-clock.h @@ -51,6 +51,8 @@ #define R8A7791_CLK_SDHI1 12 #define R8A7791_CLK_SDHI0 14 #define R8A7791_CLK_MMCIF0 15 +#define R8A7791_CLK_IIC0 18 +#define R8A7791_CLK_IIC1 23 #define R8A7791_CLK_SSUSB 28 #define R8A7791_CLK_CMT1 29 #define R8A7791_CLK_USBDMAC0 30 @@ -61,6 +63,7 @@ #define R8A7791_CLK_PWM 23 /* MSTP7 */ +#define R8A7791_CLK_EHCI 3 #define R8A7791_CLK_HSUSB 4 #define R8A7791_CLK_HSCIF2 13 #define R8A7791_CLK_SCIF5 14 diff --git a/include/dt-bindings/clock/stih415-clks.h b/include/dt-bindings/clock/stih415-clks.h new file mode 100644 index 000000000000..0d2c7397e028 --- /dev/null +++ b/include/dt-bindings/clock/stih415-clks.h @@ -0,0 +1,15 @@ +/* + * This header provides constants clk index STMicroelectronics + * STiH415 SoC. + */ +#ifndef _CLK_STIH415 +#define _CLK_STIH415 + +/* CLOCKGEN A0 */ +#define CLK_ICN_REG 0 +#define CLK_ETH1_PHY 4 + +/* CLOCKGEN A1 */ +#define CLK_GMAC0_PHY 3 + +#endif diff --git a/include/dt-bindings/clock/stih416-clks.h b/include/dt-bindings/clock/stih416-clks.h new file mode 100644 index 000000000000..552c779eb6af --- /dev/null +++ b/include/dt-bindings/clock/stih416-clks.h @@ -0,0 +1,15 @@ +/* + * This header provides constants clk index STMicroelectronics + * STiH416 SoC. + */ +#ifndef _CLK_STIH416 +#define _CLK_STIH416 + +/* CLOCKGEN A0 */ +#define CLK_ICN_REG 0 +#define CLK_ETH1_PHY 4 + +/* CLOCKGEN A1 */ +#define CLK_GMAC0_PHY 3 + +#endif diff --git a/include/dt-bindings/clock/tegra124-car.h b/include/dt-bindings/clock/tegra124-car.h index 8c1603b10665..433528ab5161 100644 --- a/include/dt-bindings/clock/tegra124-car.h +++ b/include/dt-bindings/clock/tegra124-car.h @@ -29,7 +29,7 @@ /* 10 (register bit affects spdif_in and spdif_out) */ #define TEGRA124_CLK_I2S1 11 #define TEGRA124_CLK_I2C1 12 -#define TEGRA124_CLK_NDFLASH 13 +/* 13 */ #define TEGRA124_CLK_SDMMC1 14 #define TEGRA124_CLK_SDMMC4 15 /* 16 */ @@ -83,7 +83,7 @@ /* 64 */ #define TEGRA124_CLK_UARTD 65 -#define TEGRA124_CLK_UARTE 66 +/* 66 */ #define TEGRA124_CLK_I2C3 67 #define TEGRA124_CLK_SBC4 68 #define TEGRA124_CLK_SDMMC3 69 @@ -97,7 +97,7 @@ #define TEGRA124_CLK_TRACE 77 #define TEGRA124_CLK_SOC_THERM 78 #define TEGRA124_CLK_DTV 79 -#define TEGRA124_CLK_NDSPEED 80 +/* 80 */ #define TEGRA124_CLK_I2CSLOW 81 #define TEGRA124_CLK_DSIB 82 #define TEGRA124_CLK_TSEC 83 diff --git a/include/dt-bindings/reset-controller/stih415-resets.h b/include/dt-bindings/reset-controller/stih415-resets.h index c2f8a66913c5..c2329fe29cf6 100644 --- a/include/dt-bindings/reset-controller/stih415-resets.h +++ b/include/dt-bindings/reset-controller/stih415-resets.h @@ -22,5 +22,6 @@ #define STIH415_USB0_SOFTRESET 3 #define STIH415_USB1_SOFTRESET 4 #define STIH415_USB2_SOFTRESET 5 +#define STIH415_KEYSCAN_SOFTRESET 6 #endif /* _DT_BINDINGS_RESET_CONTROLLER_STIH415 */ diff --git a/include/dt-bindings/reset-controller/stih416-resets.h b/include/dt-bindings/reset-controller/stih416-resets.h index 2127743f23e3..fcf9af1ac0b2 100644 --- a/include/dt-bindings/reset-controller/stih416-resets.h +++ b/include/dt-bindings/reset-controller/stih416-resets.h @@ -46,5 +46,6 @@ #define STIH416_COMPO_A_SOFTRESET 25 #define STIH416_VP8_DEC_SOFTRESET 26 #define STIH416_VTG_MAIN_SOFTRESET 27 +#define STIH416_KEYSCAN_SOFTRESET 28 #endif /* _DT_BINDINGS_RESET_CONTROLLER_STIH416 */ diff --git a/include/dt-bindings/reset/altr,rst-mgr.h b/include/dt-bindings/reset/altr,rst-mgr.h new file mode 100644 index 000000000000..3f04908fb87c --- /dev/null +++ b/include/dt-bindings/reset/altr,rst-mgr.h @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2014, Steffen Trumtrar <[email protected]> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_H +#define _DT_BINDINGS_RESET_ALTR_RST_MGR_H + +/* MPUMODRST */ +#define CPU0_RESET 0 +#define CPU1_RESET 1 +#define WDS_RESET 2 +#define SCUPER_RESET 3 +#define L2_RESET 4 + +/* PERMODRST */ +#define EMAC0_RESET 32 +#define EMAC1_RESET 33 +#define USB0_RESET 34 +#define USB1_RESET 35 +#define NAND_RESET 36 +#define QSPI_RESET 37 +#define L4WD0_RESET 38 +#define L4WD1_RESET 39 +#define OSC1TIMER0_RESET 40 +#define OSC1TIMER1_RESET 41 +#define SPTIMER0_RESET 42 +#define SPTIMER1_RESET 43 +#define I2C0_RESET 44 +#define I2C1_RESET 45 +#define I2C2_RESET 46 +#define I2C3_RESET 47 +#define UART0_RESET 48 +#define UART1_RESET 49 +#define SPIM0_RESET 50 +#define SPIM1_RESET 51 +#define SPIS0_RESET 52 +#define SPIS1_RESET 53 +#define SDMMC_RESET 54 +#define CAN0_RESET 55 +#define CAN1_RESET 56 +#define GPIO0_RESET 57 +#define GPIO1_RESET 58 +#define GPIO2_RESET 59 +#define DMA_RESET 60 +#define SDR_RESET 61 + +/* PER2MODRST */ +#define DMAIF0_RESET 64 +#define DMAIF1_RESET 65 +#define DMAIF2_RESET 66 +#define DMAIF3_RESET 67 +#define DMAIF4_RESET 68 +#define DMAIF5_RESET 69 +#define DMAIF6_RESET 70 +#define DMAIF7_RESET 71 + +/* BRGMODRST */ +#define HPS2FPGA_RESET 96 +#define LWHPS2FPGA_RESET 97 +#define FPGA2HPS_RESET 98 + +/* MISCMODRST*/ +#define ROM_RESET 128 +#define OCRAM_RESET 129 +#define SYSMGR_RESET 130 +#define SYSMGRCOLD_RESET 131 +#define FPGAMGR_RESET 132 +#define ACPIDMAP_RESET 133 +#define S2F_RESET 134 +#define S2FCOLD_RESET 135 +#define NRSTPIN_RESET 136 +#define TIMESTAMPCOLD_RESET 137 +#define CLKMGRCOLD_RESET 138 +#define SCANMGR_RESET 139 +#define FRZCTRLCOLD_RESET 140 +#define SYSDBG_RESET 141 +#define DBG_RESET 142 +#define TAPCOLD_RESET 143 +#define SDRCOLD_RESET 144 + +#endif diff --git a/include/dt-bindings/soc/qcom,gsbi.h b/include/dt-bindings/soc/qcom,gsbi.h new file mode 100644 index 000000000000..7ac4292333aa --- /dev/null +++ b/include/dt-bindings/soc/qcom,gsbi.h @@ -0,0 +1,26 @@ +/* Copyright (c) 2013, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#ifndef __DT_BINDINGS_QCOM_GSBI_H +#define __DT_BINDINGS_QCOM_GSBI_H + +#define GSBI_PROT_IDLE 0 +#define GSBI_PROT_I2C_UIM 1 +#define GSBI_PROT_I2C 2 +#define GSBI_PROT_SPI 3 +#define GSBI_PROT_UART_W_FC 4 +#define GSBI_PROT_UIM 5 +#define GSBI_PROT_I2C_UART 6 + +#define GSBI_CRCI_QUP 0 +#define GSBI_CRCI_UART 1 + +#endif diff --git a/include/linux/clk/at91_pmc.h b/include/linux/clk/at91_pmc.h index a6911ebbd02a..de4268d4987a 100644 --- a/include/linux/clk/at91_pmc.h +++ b/include/linux/clk/at91_pmc.h @@ -155,6 +155,7 @@ extern void __iomem *at91_pmc_base; #define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */ #define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */ #define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock [some SAM9] */ +#define AT91_PMC_OSCSEL (1 << 7) /* Slow Oscillator Selection [some SAM9] */ #define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */ #define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */ #define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */ diff --git a/include/linux/fs.h b/include/linux/fs.h index 7a9c5bca2b76..878031227c57 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -815,7 +815,7 @@ static inline struct file *get_file(struct file *f) #define FL_SLEEP 128 /* A blocking lock */ #define FL_DOWNGRADE_PENDING 256 /* Lease is being downgraded */ #define FL_UNLOCK_PENDING 512 /* Lease is being broken */ -#define FL_FILE_PVT 1024 /* lock is private to the file */ +#define FL_OFDLCK 1024 /* lock is "owned" by struct file */ /* * Special return value from posix_lock_file() and vfs_lock_file() for diff --git a/include/linux/ftrace.h b/include/linux/ftrace.h index 9212b017bc72..ae9504b4b67d 100644 --- a/include/linux/ftrace.h +++ b/include/linux/ftrace.h @@ -535,6 +535,7 @@ static inline int ftrace_modify_call(struct dyn_ftrace *rec, unsigned long old_a extern int ftrace_arch_read_dyn_info(char *buf, int size); extern int skip_trace(unsigned long ip); +extern void ftrace_module_init(struct module *mod); extern void ftrace_disable_daemon(void); extern void ftrace_enable_daemon(void); @@ -544,6 +545,7 @@ static inline int ftrace_force_update(void) { return 0; } static inline void ftrace_disable_daemon(void) { } static inline void ftrace_enable_daemon(void) { } static inline void ftrace_release_mod(struct module *mod) {} +static inline void ftrace_module_init(struct module *mod) {} static inline __init int register_ftrace_command(struct ftrace_func_command *cmd) { return -EINVAL; diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h index c7bfac1c4a7b..97ac926c78a7 100644 --- a/include/linux/interrupt.h +++ b/include/linux/interrupt.h @@ -203,7 +203,40 @@ static inline int check_wakeup_irqs(void) { return 0; } extern cpumask_var_t irq_default_affinity; -extern int irq_set_affinity(unsigned int irq, const struct cpumask *cpumask); +/* Internal implementation. Use the helpers below */ +extern int __irq_set_affinity(unsigned int irq, const struct cpumask *cpumask, + bool force); + +/** + * irq_set_affinity - Set the irq affinity of a given irq + * @irq: Interrupt to set affinity + * @cpumask: cpumask + * + * Fails if cpumask does not contain an online CPU + */ +static inline int +irq_set_affinity(unsigned int irq, const struct cpumask *cpumask) +{ + return __irq_set_affinity(irq, cpumask, false); +} + +/** + * irq_force_affinity - Force the irq affinity of a given irq + * @irq: Interrupt to set affinity + * @cpumask: cpumask + * + * Same as irq_set_affinity, but without checking the mask against + * online cpus. + * + * Solely for low level cpu hotplug code, where we need to make per + * cpu interrupts affine before the cpu becomes online. + */ +static inline int +irq_force_affinity(unsigned int irq, const struct cpumask *cpumask) +{ + return __irq_set_affinity(irq, cpumask, true); +} + extern int irq_can_set_affinity(unsigned int irq); extern int irq_select_affinity(unsigned int irq); diff --git a/include/linux/irq.h b/include/linux/irq.h index d278838908cb..5c57efb863d0 100644 --- a/include/linux/irq.h +++ b/include/linux/irq.h @@ -394,7 +394,8 @@ extern void remove_percpu_irq(unsigned int irq, struct irqaction *act); extern void irq_cpu_online(void); extern void irq_cpu_offline(void); -extern int __irq_set_affinity_locked(struct irq_data *data, const struct cpumask *cpumask); +extern int irq_set_affinity_locked(struct irq_data *data, + const struct cpumask *cpumask, bool force); #if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_PENDING_IRQ) void irq_move_irq(struct irq_data *data); @@ -602,6 +603,8 @@ static inline u32 irq_get_trigger_type(unsigned int irq) return d ? irqd_get_trigger_type(d) : 0; } +unsigned int arch_dynirq_lower_bound(unsigned int from); + int __irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node, struct module *owner); diff --git a/include/linux/libata.h b/include/linux/libata.h index 1de36be64df4..5ab4e3a76721 100644 --- a/include/linux/libata.h +++ b/include/linux/libata.h @@ -822,6 +822,7 @@ struct ata_port { unsigned long qc_allocated; unsigned int qc_active; int nr_active_links; /* #links with active qcs */ + unsigned int last_tag; /* track next tag hw expects */ struct ata_link link; /* host default link */ struct ata_link *slave_link; /* see ata_slave_link_init() */ diff --git a/include/linux/of_irq.h b/include/linux/of_irq.h index 3f23b4472c31..6404253d810d 100644 --- a/include/linux/of_irq.h +++ b/include/linux/of_irq.h @@ -44,11 +44,16 @@ extern void of_irq_init(const struct of_device_id *matches); #ifdef CONFIG_OF_IRQ extern int of_irq_count(struct device_node *dev); +extern int of_irq_get(struct device_node *dev, int index); #else static inline int of_irq_count(struct device_node *dev) { return 0; } +static inline int of_irq_get(struct device_node *dev, int index) +{ + return 0; +} #endif #if defined(CONFIG_OF) diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h index e2f5ca96cddc..2760744cb2a7 100644 --- a/include/linux/phy/phy.h +++ b/include/linux/phy/phy.h @@ -174,21 +174,29 @@ void devm_of_phy_provider_unregister(struct device *dev, #else static inline int phy_pm_runtime_get(struct phy *phy) { + if (!phy) + return 0; return -ENOSYS; } static inline int phy_pm_runtime_get_sync(struct phy *phy) { + if (!phy) + return 0; return -ENOSYS; } static inline int phy_pm_runtime_put(struct phy *phy) { + if (!phy) + return 0; return -ENOSYS; } static inline int phy_pm_runtime_put_sync(struct phy *phy) { + if (!phy) + return 0; return -ENOSYS; } @@ -204,21 +212,29 @@ static inline void phy_pm_runtime_forbid(struct phy *phy) static inline int phy_init(struct phy *phy) { + if (!phy) + return 0; return -ENOSYS; } static inline int phy_exit(struct phy *phy) { + if (!phy) + return 0; return -ENOSYS; } static inline int phy_power_on(struct phy *phy) { + if (!phy) + return 0; return -ENOSYS; } static inline int phy_power_off(struct phy *phy) { + if (!phy) + return 0; return -ENOSYS; } diff --git a/include/linux/platform_data/at91_adc.h b/include/linux/platform_data/at91_adc.h index b3ca1e94e0c8..7819fc787731 100644 --- a/include/linux/platform_data/at91_adc.h +++ b/include/linux/platform_data/at91_adc.h @@ -7,23 +7,10 @@ #ifndef _AT91_ADC_H_ #define _AT91_ADC_H_ -/** - * struct at91_adc_reg_desc - Various informations relative to registers - * @channel_base: Base offset for the channel data registers - * @drdy_mask: Mask of the DRDY field in the relevant registers - (Interruptions registers mostly) - * @status_register: Offset of the Interrupt Status Register - * @trigger_register: Offset of the Trigger setup register - * @mr_prescal_mask: Mask of the PRESCAL field in the adc MR register - * @mr_startup_mask: Mask of the STARTUP field in the adc MR register - */ -struct at91_adc_reg_desc { - u8 channel_base; - u32 drdy_mask; - u8 status_register; - u8 trigger_register; - u32 mr_prescal_mask; - u32 mr_startup_mask; +enum atmel_adc_ts_type { + ATMEL_ADC_TOUCHSCREEN_NONE = 0, + ATMEL_ADC_TOUCHSCREEN_4WIRE = 4, + ATMEL_ADC_TOUCHSCREEN_5WIRE = 5, }; /** @@ -42,23 +29,21 @@ struct at91_adc_trigger { /** * struct at91_adc_data - platform data for ADC driver * @channels_used: channels in use on the board as a bitmask - * @num_channels: global number of channels available on the board - * @registers: Registers definition on the board * @startup_time: startup time of the ADC in microseconds * @trigger_list: Triggers available in the ADC * @trigger_number: Number of triggers available in the ADC * @use_external_triggers: does the board has external triggers availables * @vref: Reference voltage for the ADC in millivolts + * @touchscreen_type: If a touchscreen is connected, its type (4 or 5 wires) */ struct at91_adc_data { unsigned long channels_used; - u8 num_channels; - struct at91_adc_reg_desc *registers; u8 startup_time; struct at91_adc_trigger *trigger_list; u8 trigger_number; bool use_external_triggers; u16 vref; + enum atmel_adc_ts_type touchscreen_type; }; extern void __init at91_add_device_adc(struct at91_adc_data *data); diff --git a/include/linux/platform_data/atmel.h b/include/linux/platform_data/atmel.h index e26b0c14edea..1466443797d7 100644 --- a/include/linux/platform_data/atmel.h +++ b/include/linux/platform_data/atmel.h @@ -87,13 +87,6 @@ struct atmel_uart_data { int rts_gpio; /* optional RTS GPIO */ }; - /* Touchscreen Controller */ -struct at91_tsadcc_data { - unsigned int adc_clock; - u8 pendet_debounce; - u8 ts_sample_hold_time; -}; - /* CAN */ struct at91_can_data { void (*transceiver_switch)(int on); diff --git a/include/linux/regulator/consumer.h b/include/linux/regulator/consumer.h index e530681bea70..1a4a8c157b31 100644 --- a/include/linux/regulator/consumer.h +++ b/include/linux/regulator/consumer.h @@ -258,14 +258,14 @@ regulator_get_exclusive(struct device *dev, const char *id) static inline struct regulator *__must_check regulator_get_optional(struct device *dev, const char *id) { - return NULL; + return ERR_PTR(-ENODEV); } static inline struct regulator *__must_check devm_regulator_get_optional(struct device *dev, const char *id) { - return NULL; + return ERR_PTR(-ENODEV); } static inline void regulator_put(struct regulator *regulator) diff --git a/include/linux/serio.h b/include/linux/serio.h index 36aac733840a..9f779c7a2da4 100644 --- a/include/linux/serio.h +++ b/include/linux/serio.h @@ -23,6 +23,7 @@ struct serio { char name[32]; char phys[32]; + char firmware_id[128]; bool manual_bind; diff --git a/include/linux/tty.h b/include/linux/tty.h index 1c3316a47d7e..036cccd80d9f 100644 --- a/include/linux/tty.h +++ b/include/linux/tty.h @@ -61,6 +61,7 @@ struct tty_bufhead { struct tty_buffer *head; /* Queue head */ struct work_struct work; struct mutex lock; + spinlock_t flush_lock; atomic_t priority; struct tty_buffer sentinel; struct llist_head free; /* Free queue head */ diff --git a/include/trace/events/ext4.h b/include/trace/events/ext4.h index 010ea89eeb0e..6a1a0245474f 100644 --- a/include/trace/events/ext4.h +++ b/include/trace/events/ext4.h @@ -16,15 +16,6 @@ struct mpage_da_data; struct ext4_map_blocks; struct extent_status; -/* shim until we merge in the xfs_collapse_range branch */ -#ifndef FALLOC_FL_COLLAPSE_RANGE -#define FALLOC_FL_COLLAPSE_RANGE 0x08 -#endif - -#ifndef FALLOC_FL_ZERO_RANGE -#define FALLOC_FL_ZERO_RANGE 0x10 -#endif - #define EXT4_I(inode) (container_of(inode, struct ext4_inode_info, vfs_inode)) #define show_mballoc_flags(flags) __print_flags(flags, "|", \ diff --git a/include/trace/events/module.h b/include/trace/events/module.h index 11fd51b413de..ed0b2c599a64 100644 --- a/include/trace/events/module.h +++ b/include/trace/events/module.h @@ -25,7 +25,7 @@ struct module; { (1UL << TAINT_OOT_MODULE), "O" }, \ { (1UL << TAINT_FORCED_MODULE), "F" }, \ { (1UL << TAINT_CRAP), "C" }, \ - { (1UL << TAINT_UNSIGNED_MODULE), "X" }) + { (1UL << TAINT_UNSIGNED_MODULE), "E" }) TRACE_EVENT(module_load, diff --git a/include/uapi/asm-generic/fcntl.h b/include/uapi/asm-generic/fcntl.h index a9b13f8b3595..7543b3e51331 100644 --- a/include/uapi/asm-generic/fcntl.h +++ b/include/uapi/asm-generic/fcntl.h @@ -133,20 +133,20 @@ #endif /* - * fd "private" POSIX locks. + * Open File Description Locks * - * Usually POSIX locks held by a process are released on *any* close and are + * Usually record locks held by a process are released on *any* close and are * not inherited across a fork(). * - * These cmd values will set locks that conflict with normal POSIX locks, but - * are "owned" by the opened file, not the process. This means that they are - * inherited across fork() like BSD (flock) locks, and they are only released - * automatically when the last reference to the the open file against which - * they were acquired is put. + * These cmd values will set locks that conflict with process-associated + * record locks, but are "owned" by the open file description, not the + * process. This means that they are inherited across fork() like BSD (flock) + * locks, and they are only released automatically when the last reference to + * the the open file against which they were acquired is put. */ -#define F_GETLKP 36 -#define F_SETLKP 37 -#define F_SETLKPW 38 +#define F_OFD_GETLK 36 +#define F_OFD_SETLK 37 +#define F_OFD_SETLKW 38 #define F_OWNER_TID 0 #define F_OWNER_PID 1 diff --git a/include/uapi/linux/input.h b/include/uapi/linux/input.h index bd24470d24a2..f4849525519c 100644 --- a/include/uapi/linux/input.h +++ b/include/uapi/linux/input.h @@ -164,6 +164,7 @@ struct input_keymap_entry { #define INPUT_PROP_DIRECT 0x01 /* direct input devices */ #define INPUT_PROP_BUTTONPAD 0x02 /* has button(s) under pad */ #define INPUT_PROP_SEMI_MT 0x03 /* touch rectangle only */ +#define INPUT_PROP_TOPBUTTONPAD 0x04 /* softbuttons at top of pad */ #define INPUT_PROP_MAX 0x1f #define INPUT_PROP_CNT (INPUT_PROP_MAX + 1) diff --git a/kernel/hrtimer.c b/kernel/hrtimer.c index d55092ceee29..6b715c0af1b1 100644 --- a/kernel/hrtimer.c +++ b/kernel/hrtimer.c @@ -234,6 +234,11 @@ again: goto again; } timer->base = new_base; + } else { + if (cpu != this_cpu && hrtimer_check_target(timer, new_base)) { + cpu = this_cpu; + goto again; + } } return new_base; } @@ -569,6 +574,23 @@ hrtimer_force_reprogram(struct hrtimer_cpu_base *cpu_base, int skip_equal) cpu_base->expires_next.tv64 = expires_next.tv64; + /* + * If a hang was detected in the last timer interrupt then we + * leave the hang delay active in the hardware. We want the + * system to make progress. That also prevents the following + * scenario: + * T1 expires 50ms from now + * T2 expires 5s from now + * + * T1 is removed, so this code is called and would reprogram + * the hardware to 5s from now. Any hrtimer_start after that + * will not reprogram the hardware due to hang_detected being + * set. So we'd effectivly block all timers until the T2 event + * fires. + */ + if (cpu_base->hang_detected) + return; + if (cpu_base->expires_next.tv64 != KTIME_MAX) tick_program_event(cpu_base->expires_next, 1); } diff --git a/kernel/irq/irqdesc.c b/kernel/irq/irqdesc.c index a7174617616b..bb07f2928f4b 100644 --- a/kernel/irq/irqdesc.c +++ b/kernel/irq/irqdesc.c @@ -363,6 +363,13 @@ __irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node, if (from > irq) return -EINVAL; from = irq; + } else { + /* + * For interrupts which are freely allocated the + * architecture can force a lower bound to the @from + * argument. x86 uses this to exclude the GSI space. + */ + from = arch_dynirq_lower_bound(from); } mutex_lock(&sparse_irq_lock); diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c index 2486a4c1a710..d34131ca372b 100644 --- a/kernel/irq/manage.c +++ b/kernel/irq/manage.c @@ -180,7 +180,7 @@ int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask, struct irq_chip *chip = irq_data_get_irq_chip(data); int ret; - ret = chip->irq_set_affinity(data, mask, false); + ret = chip->irq_set_affinity(data, mask, force); switch (ret) { case IRQ_SET_MASK_OK: cpumask_copy(data->affinity, mask); @@ -192,7 +192,8 @@ int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask, return ret; } -int __irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask) +int irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask, + bool force) { struct irq_chip *chip = irq_data_get_irq_chip(data); struct irq_desc *desc = irq_data_to_desc(data); @@ -202,7 +203,7 @@ int __irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask) return -EINVAL; if (irq_can_move_pcntxt(data)) { - ret = irq_do_set_affinity(data, mask, false); + ret = irq_do_set_affinity(data, mask, force); } else { irqd_set_move_pending(data); irq_copy_pending(desc, mask); @@ -217,13 +218,7 @@ int __irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask) return ret; } -/** - * irq_set_affinity - Set the irq affinity of a given irq - * @irq: Interrupt to set affinity - * @mask: cpumask - * - */ -int irq_set_affinity(unsigned int irq, const struct cpumask *mask) +int __irq_set_affinity(unsigned int irq, const struct cpumask *mask, bool force) { struct irq_desc *desc = irq_to_desc(irq); unsigned long flags; @@ -233,7 +228,7 @@ int irq_set_affinity(unsigned int irq, const struct cpumask *mask) return -EINVAL; raw_spin_lock_irqsave(&desc->lock, flags); - ret = __irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask); + ret = irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask, force); raw_spin_unlock_irqrestore(&desc->lock, flags); return ret; } diff --git a/kernel/module.c b/kernel/module.c index 11869408f79b..079c4615607d 100644 --- a/kernel/module.c +++ b/kernel/module.c @@ -815,9 +815,6 @@ SYSCALL_DEFINE2(delete_module, const char __user *, name_user, return -EFAULT; name[MODULE_NAME_LEN-1] = '\0'; - if (!(flags & O_NONBLOCK)) - pr_warn("waiting module removal not supported: please upgrade\n"); - if (mutex_lock_interruptible(&module_mutex) != 0) return -EINTR; @@ -3271,6 +3268,9 @@ static int load_module(struct load_info *info, const char __user *uargs, dynamic_debug_setup(info->debug, info->num_debug); + /* Ftrace init must be called in the MODULE_STATE_UNFORMED state */ + ftrace_module_init(mod); + /* Finally it's fully formed, ready to start executing. */ err = complete_formation(mod, info); if (err) diff --git a/kernel/power/suspend.c b/kernel/power/suspend.c index c3ad9cafe930..8233cd4047d7 100644 --- a/kernel/power/suspend.c +++ b/kernel/power/suspend.c @@ -14,6 +14,7 @@ #include <linux/init.h> #include <linux/console.h> #include <linux/cpu.h> +#include <linux/cpuidle.h> #include <linux/syscalls.h> #include <linux/gfp.h> #include <linux/io.h> @@ -53,7 +54,9 @@ static void freeze_begin(void) static void freeze_enter(void) { + cpuidle_resume(); wait_event(suspend_freeze_wait_head, suspend_freeze_wake); + cpuidle_pause(); } void freeze_wake(void) diff --git a/kernel/softirq.c b/kernel/softirq.c index b50990a5bea0..33e4648ae0e7 100644 --- a/kernel/softirq.c +++ b/kernel/softirq.c @@ -779,3 +779,8 @@ int __init __weak arch_early_irq_init(void) { return 0; } + +unsigned int __weak arch_dynirq_lower_bound(unsigned int from) +{ + return from; +} diff --git a/kernel/timer.c b/kernel/timer.c index 87bd529879c2..3bb01a323b2a 100644 --- a/kernel/timer.c +++ b/kernel/timer.c @@ -838,7 +838,7 @@ unsigned long apply_slack(struct timer_list *timer, unsigned long expires) bit = find_last_bit(&mask, BITS_PER_LONG); - mask = (1 << bit) - 1; + mask = (1UL << bit) - 1; expires_limit = expires_limit & ~(mask); diff --git a/kernel/trace/ftrace.c b/kernel/trace/ftrace.c index 1fd4b9479210..4a54a25afa2f 100644 --- a/kernel/trace/ftrace.c +++ b/kernel/trace/ftrace.c @@ -4330,16 +4330,11 @@ static void ftrace_init_module(struct module *mod, ftrace_process_locs(mod, start, end); } -static int ftrace_module_notify_enter(struct notifier_block *self, - unsigned long val, void *data) +void ftrace_module_init(struct module *mod) { - struct module *mod = data; - - if (val == MODULE_STATE_COMING) - ftrace_init_module(mod, mod->ftrace_callsites, - mod->ftrace_callsites + - mod->num_ftrace_callsites); - return 0; + ftrace_init_module(mod, mod->ftrace_callsites, + mod->ftrace_callsites + + mod->num_ftrace_callsites); } static int ftrace_module_notify_exit(struct notifier_block *self, @@ -4353,11 +4348,6 @@ static int ftrace_module_notify_exit(struct notifier_block *self, return 0; } #else -static int ftrace_module_notify_enter(struct notifier_block *self, - unsigned long val, void *data) -{ - return 0; -} static int ftrace_module_notify_exit(struct notifier_block *self, unsigned long val, void *data) { @@ -4365,11 +4355,6 @@ static int ftrace_module_notify_exit(struct notifier_block *self, } #endif /* CONFIG_MODULES */ -struct notifier_block ftrace_module_enter_nb = { - .notifier_call = ftrace_module_notify_enter, - .priority = INT_MAX, /* Run before anything that can use kprobes */ -}; - struct notifier_block ftrace_module_exit_nb = { .notifier_call = ftrace_module_notify_exit, .priority = INT_MIN, /* Run after anything that can remove kprobes */ @@ -4403,10 +4388,6 @@ void __init ftrace_init(void) __start_mcount_loc, __stop_mcount_loc); - ret = register_module_notifier(&ftrace_module_enter_nb); - if (ret) - pr_warning("Failed to register trace ftrace module enter notifier\n"); - ret = register_module_notifier(&ftrace_module_exit_nb); if (ret) pr_warning("Failed to register trace ftrace module exit notifier\n"); diff --git a/kernel/trace/trace_events_trigger.c b/kernel/trace/trace_events_trigger.c index 925f537f07d1..4747b476a030 100644 --- a/kernel/trace/trace_events_trigger.c +++ b/kernel/trace/trace_events_trigger.c @@ -77,7 +77,7 @@ event_triggers_call(struct ftrace_event_file *file, void *rec) data->ops->func(data); continue; } - filter = rcu_dereference(data->filter); + filter = rcu_dereference_sched(data->filter); if (filter && !filter_match_preds(filter, rec)) continue; if (data->cmd_ops->post_trigger) { diff --git a/mm/memory.c b/mm/memory.c index d0f0bef3be48..037b812a9531 100644 --- a/mm/memory.c +++ b/mm/memory.c @@ -232,17 +232,18 @@ void tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, unsigned long #endif } -void tlb_flush_mmu(struct mmu_gather *tlb) +static void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb) { - struct mmu_gather_batch *batch; - - if (!tlb->need_flush) - return; tlb->need_flush = 0; tlb_flush(tlb); #ifdef CONFIG_HAVE_RCU_TABLE_FREE tlb_table_flush(tlb); #endif +} + +static void tlb_flush_mmu_free(struct mmu_gather *tlb) +{ + struct mmu_gather_batch *batch; for (batch = &tlb->local; batch; batch = batch->next) { free_pages_and_swap_cache(batch->pages, batch->nr); @@ -251,6 +252,14 @@ void tlb_flush_mmu(struct mmu_gather *tlb) tlb->active = &tlb->local; } +void tlb_flush_mmu(struct mmu_gather *tlb) +{ + if (!tlb->need_flush) + return; + tlb_flush_mmu_tlbonly(tlb); + tlb_flush_mmu_free(tlb); +} + /* tlb_finish_mmu * Called at the end of the shootdown operation to free up any resources * that were required. @@ -1127,8 +1136,10 @@ again: if (PageAnon(page)) rss[MM_ANONPAGES]--; else { - if (pte_dirty(ptent)) + if (pte_dirty(ptent)) { + force_flush = 1; set_page_dirty(page); + } if (pte_young(ptent) && likely(!(vma->vm_flags & VM_SEQ_READ))) mark_page_accessed(page); @@ -1137,9 +1148,10 @@ again: page_remove_rmap(page); if (unlikely(page_mapcount(page) < 0)) print_bad_pte(vma, addr, ptent, page); - force_flush = !__tlb_remove_page(tlb, page); - if (force_flush) + if (unlikely(!__tlb_remove_page(tlb, page))) { + force_flush = 1; break; + } continue; } /* @@ -1174,18 +1186,11 @@ again: add_mm_rss_vec(mm, rss); arch_leave_lazy_mmu_mode(); - pte_unmap_unlock(start_pte, ptl); - /* - * mmu_gather ran out of room to batch pages, we break out of - * the PTE lock to avoid doing the potential expensive TLB invalidate - * and page-free while holding it. - */ + /* Do the actual TLB flush before dropping ptl */ if (force_flush) { unsigned long old_end; - force_flush = 0; - /* * Flush the TLB just for the previous segment, * then update the range to be the remaining @@ -1193,11 +1198,21 @@ again: */ old_end = tlb->end; tlb->end = addr; - - tlb_flush_mmu(tlb); - + tlb_flush_mmu_tlbonly(tlb); tlb->start = addr; tlb->end = old_end; + } + pte_unmap_unlock(start_pte, ptl); + + /* + * If we forced a TLB flush (either due to running out of + * batch buffers or because we needed to flush dirty TLB + * entries before releasing the ptl), free the batched + * memory too. Restart if we didn't do everything. + */ + if (force_flush) { + force_flush = 0; + tlb_flush_mmu_free(tlb); if (addr != end) goto again; @@ -1955,12 +1970,17 @@ int fixup_user_fault(struct task_struct *tsk, struct mm_struct *mm, unsigned long address, unsigned int fault_flags) { struct vm_area_struct *vma; + vm_flags_t vm_flags; int ret; vma = find_extend_vma(mm, address); if (!vma || address < vma->vm_start) return -EFAULT; + vm_flags = (fault_flags & FAULT_FLAG_WRITE) ? VM_WRITE : VM_READ; + if (!(vm_flags & vma->vm_flags)) + return -EFAULT; + ret = handle_mm_fault(mm, vma, address, fault_flags); if (ret & VM_FAULT_ERROR) { if (ret & VM_FAULT_OOM) diff --git a/mm/vmacache.c b/mm/vmacache.c index d4224b397c0e..1037a3bab505 100644 --- a/mm/vmacache.c +++ b/mm/vmacache.c @@ -81,10 +81,12 @@ struct vm_area_struct *vmacache_find(struct mm_struct *mm, unsigned long addr) for (i = 0; i < VMACACHE_SIZE; i++) { struct vm_area_struct *vma = current->vmacache[i]; - if (vma && vma->vm_start <= addr && vma->vm_end > addr) { - BUG_ON(vma->vm_mm != mm); + if (!vma) + continue; + if (WARN_ON_ONCE(vma->vm_mm != mm)) + break; + if (vma->vm_start <= addr && vma->vm_end > addr) return vma; - } } return NULL; diff --git a/security/selinux/hooks.c b/security/selinux/hooks.c index b4beb77967b1..2c7341dbc5d6 100644 --- a/security/selinux/hooks.c +++ b/security/selinux/hooks.c @@ -3317,9 +3317,9 @@ static int selinux_file_fcntl(struct file *file, unsigned int cmd, case F_GETLK: case F_SETLK: case F_SETLKW: - case F_GETLKP: - case F_SETLKP: - case F_SETLKPW: + case F_OFD_GETLK: + case F_OFD_SETLK: + case F_OFD_SETLKW: #if BITS_PER_LONG == 32 case F_GETLK64: case F_SETLK64: diff --git a/sound/pci/hda/hda_controller.c b/sound/pci/hda/hda_controller.c index 248b90abb882..480bbddbd801 100644 --- a/sound/pci/hda/hda_controller.c +++ b/sound/pci/hda/hda_controller.c @@ -1059,24 +1059,26 @@ static void azx_init_cmd_io(struct azx *chip) /* reset the corb hw read pointer */ azx_writew(chip, CORBRP, ICH6_CORBRP_RST); - for (timeout = 1000; timeout > 0; timeout--) { - if ((azx_readw(chip, CORBRP) & ICH6_CORBRP_RST) == ICH6_CORBRP_RST) - break; - udelay(1); - } - if (timeout <= 0) - dev_err(chip->card->dev, "CORB reset timeout#1, CORBRP = %d\n", - azx_readw(chip, CORBRP)); + if (!(chip->driver_caps & AZX_DCAPS_CORBRP_SELF_CLEAR)) { + for (timeout = 1000; timeout > 0; timeout--) { + if ((azx_readw(chip, CORBRP) & ICH6_CORBRP_RST) == ICH6_CORBRP_RST) + break; + udelay(1); + } + if (timeout <= 0) + dev_err(chip->card->dev, "CORB reset timeout#1, CORBRP = %d\n", + azx_readw(chip, CORBRP)); - azx_writew(chip, CORBRP, 0); - for (timeout = 1000; timeout > 0; timeout--) { - if (azx_readw(chip, CORBRP) == 0) - break; - udelay(1); + azx_writew(chip, CORBRP, 0); + for (timeout = 1000; timeout > 0; timeout--) { + if (azx_readw(chip, CORBRP) == 0) + break; + udelay(1); + } + if (timeout <= 0) + dev_err(chip->card->dev, "CORB reset timeout#2, CORBRP = %d\n", + azx_readw(chip, CORBRP)); } - if (timeout <= 0) - dev_err(chip->card->dev, "CORB reset timeout#2, CORBRP = %d\n", - azx_readw(chip, CORBRP)); /* enable corb dma */ azx_writeb(chip, CORBCTL, ICH6_CORBCTL_RUN); diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index d6bca62ef387..b540ad71eb0d 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -249,7 +249,8 @@ enum { /* quirks for Nvidia */ #define AZX_DCAPS_PRESET_NVIDIA \ (AZX_DCAPS_NVIDIA_SNOOP | AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI |\ - AZX_DCAPS_ALIGN_BUFSIZE | AZX_DCAPS_NO_64BIT) + AZX_DCAPS_ALIGN_BUFSIZE | AZX_DCAPS_NO_64BIT |\ + AZX_DCAPS_CORBRP_SELF_CLEAR) #define AZX_DCAPS_PRESET_CTHDA \ (AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_4K_BDLE_BOUNDARY) diff --git a/sound/pci/hda/hda_priv.h b/sound/pci/hda/hda_priv.h index ba38b819f984..4a7cb01fa912 100644 --- a/sound/pci/hda/hda_priv.h +++ b/sound/pci/hda/hda_priv.h @@ -189,6 +189,7 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 }; #define AZX_DCAPS_COUNT_LPIB_DELAY (1 << 25) /* Take LPIB as delay */ #define AZX_DCAPS_PM_RUNTIME (1 << 26) /* runtime PM support */ #define AZX_DCAPS_I915_POWERWELL (1 << 27) /* HSW i915 powerwell support */ +#define AZX_DCAPS_CORBRP_SELF_CLEAR (1 << 28) /* CORBRP clears itself after reset */ /* position fix mode */ enum { diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index c643dfc0a826..c1952c910339 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -4621,6 +4621,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { SND_PCI_QUIRK(0x1028, 0x0667, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x1028, 0x0668, "Dell", ALC255_FIXUP_DELL2_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x1028, 0x0669, "Dell", ALC255_FIXUP_DELL2_MIC_NO_PRESENCE), + SND_PCI_QUIRK(0x1028, 0x0674, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x1028, 0x067f, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x1028, 0x15cc, "Dell X5 Precision", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE), SND_PCI_QUIRK(0x1028, 0x15cd, "Dell X5 Precision", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE), diff --git a/sound/soc/atmel/sam9g20_wm8731.c b/sound/soc/atmel/sam9g20_wm8731.c index 174bd546c08b..bb1149126c54 100644 --- a/sound/soc/atmel/sam9g20_wm8731.c +++ b/sound/soc/atmel/sam9g20_wm8731.c @@ -48,7 +48,6 @@ #include <asm/mach-types.h> #include <mach/hardware.h> -#include <mach/gpio.h> #include "../codecs/wm8731.h" #include "atmel-pcm.h" diff --git a/sound/soc/codecs/alc5623.c b/sound/soc/codecs/alc5623.c index f500905e9373..2acf82f4a08a 100644 --- a/sound/soc/codecs/alc5623.c +++ b/sound/soc/codecs/alc5623.c @@ -1018,13 +1018,13 @@ static int alc5623_i2c_probe(struct i2c_client *client, dev_err(&client->dev, "failed to read vendor ID1: %d\n", ret); return ret; } - vid1 = ((vid1 & 0xff) << 8) | (vid1 >> 8); ret = regmap_read(alc5623->regmap, ALC5623_VENDOR_ID2, &vid2); if (ret < 0) { dev_err(&client->dev, "failed to read vendor ID2: %d\n", ret); return ret; } + vid2 >>= 8; if ((vid1 != 0x10ec) || (vid2 != id->driver_data)) { dev_err(&client->dev, "unknown or wrong codec\n"); diff --git a/sound/soc/codecs/cs42l52.c b/sound/soc/codecs/cs42l52.c index 460d35547a68..2213a037c893 100644 --- a/sound/soc/codecs/cs42l52.c +++ b/sound/soc/codecs/cs42l52.c @@ -1229,8 +1229,10 @@ static int cs42l52_i2c_probe(struct i2c_client *i2c_client, } if (cs42l52->pdata.reset_gpio) { - ret = gpio_request_one(cs42l52->pdata.reset_gpio, - GPIOF_OUT_INIT_HIGH, "CS42L52 /RST"); + ret = devm_gpio_request_one(&i2c_client->dev, + cs42l52->pdata.reset_gpio, + GPIOF_OUT_INIT_HIGH, + "CS42L52 /RST"); if (ret < 0) { dev_err(&i2c_client->dev, "Failed to request /RST %d: %d\n", cs42l52->pdata.reset_gpio, ret); diff --git a/sound/soc/codecs/cs42l73.c b/sound/soc/codecs/cs42l73.c index 0ee60a19a263..ae3717992d56 100644 --- a/sound/soc/codecs/cs42l73.c +++ b/sound/soc/codecs/cs42l73.c @@ -1443,8 +1443,10 @@ static int cs42l73_i2c_probe(struct i2c_client *i2c_client, i2c_set_clientdata(i2c_client, cs42l73); if (cs42l73->pdata.reset_gpio) { - ret = gpio_request_one(cs42l73->pdata.reset_gpio, - GPIOF_OUT_INIT_HIGH, "CS42L73 /RST"); + ret = devm_gpio_request_one(&i2c_client->dev, + cs42l73->pdata.reset_gpio, + GPIOF_OUT_INIT_HIGH, + "CS42L73 /RST"); if (ret < 0) { dev_err(&i2c_client->dev, "Failed to request /RST %d: %d\n", cs42l73->pdata.reset_gpio, ret); diff --git a/sound/soc/codecs/tlv320aic3x.c b/sound/soc/codecs/tlv320aic3x.c index b1835103e9b4..d7349bc89ad3 100644 --- a/sound/soc/codecs/tlv320aic3x.c +++ b/sound/soc/codecs/tlv320aic3x.c @@ -1399,7 +1399,6 @@ static int aic3x_probe(struct snd_soc_codec *codec) } aic3x_add_widgets(codec); - list_add(&aic3x->list, &reset_list); return 0; @@ -1569,7 +1568,13 @@ static int aic3x_i2c_probe(struct i2c_client *i2c, ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_aic3x, &aic3x_dai, 1); - return ret; + + if (ret != 0) + goto err_gpio; + + list_add(&aic3x->list, &reset_list); + + return 0; err_gpio: if (gpio_is_valid(aic3x->gpio_reset) && diff --git a/sound/soc/fsl/fsl_spdif.h b/sound/soc/fsl/fsl_spdif.h index b1266790d117..605a10b2112b 100644 --- a/sound/soc/fsl/fsl_spdif.h +++ b/sound/soc/fsl/fsl_spdif.h @@ -144,8 +144,8 @@ enum spdif_gainsel { /* SPDIF Clock register */ #define STC_SYSCLK_DIV_OFFSET 11 -#define STC_SYSCLK_DIV_MASK (0x1ff << STC_TXCLK_SRC_OFFSET) -#define STC_SYSCLK_DIV(x) ((((x) - 1) << STC_TXCLK_DIV_OFFSET) & STC_SYSCLK_DIV_MASK) +#define STC_SYSCLK_DIV_MASK (0x1ff << STC_SYSCLK_DIV_OFFSET) +#define STC_SYSCLK_DIV(x) ((((x) - 1) << STC_SYSCLK_DIV_OFFSET) & STC_SYSCLK_DIV_MASK) #define STC_TXCLK_SRC_OFFSET 8 #define STC_TXCLK_SRC_MASK (0x7 << STC_TXCLK_SRC_OFFSET) #define STC_TXCLK_SRC_SET(x) ((x << STC_TXCLK_SRC_OFFSET) & STC_TXCLK_SRC_MASK) diff --git a/sound/soc/intel/sst-dsp-priv.h b/sound/soc/intel/sst-dsp-priv.h index fe8e81aad646..30ca14a6a835 100644 --- a/sound/soc/intel/sst-dsp-priv.h +++ b/sound/soc/intel/sst-dsp-priv.h @@ -136,7 +136,7 @@ struct sst_module_data { enum sst_data_type data_type; /* type of module data */ u32 size; /* size in bytes */ - u32 offset; /* offset in FW file */ + int32_t offset; /* offset in FW file */ u32 data_offset; /* offset in ADSP memory space */ void *data; /* module data */ }; diff --git a/sound/soc/intel/sst-haswell-ipc.c b/sound/soc/intel/sst-haswell-ipc.c index f46bb4ddde6f..50e4246d4b57 100644 --- a/sound/soc/intel/sst-haswell-ipc.c +++ b/sound/soc/intel/sst-haswell-ipc.c @@ -617,7 +617,7 @@ static void hsw_notification_work(struct work_struct *work) case IPC_POSITION_CHANGED: trace_ipc_notification("DSP stream position changed for", stream->reply.stream_hw_id); - sst_dsp_inbox_read(hsw->dsp, pos, sizeof(pos)); + sst_dsp_inbox_read(hsw->dsp, pos, sizeof(*pos)); if (stream->notify_position) stream->notify_position(stream, stream->pdata); @@ -991,7 +991,8 @@ int sst_hsw_stream_get_volume(struct sst_hsw *hsw, struct sst_hsw_stream *stream return -EINVAL; sst_dsp_read(hsw->dsp, volume, - stream->reply.volume_register_address[channel], sizeof(volume)); + stream->reply.volume_register_address[channel], + sizeof(*volume)); return 0; } @@ -1609,7 +1610,7 @@ int sst_hsw_dx_set_state(struct sst_hsw *hsw, trace_ipc_request("PM enter Dx state", state); ret = ipc_tx_message_wait(hsw, header, &state_, sizeof(state_), - dx, sizeof(dx)); + dx, sizeof(*dx)); if (ret < 0) { dev_err(hsw->dev, "ipc: error set dx state %d failed\n", state); return ret; diff --git a/sound/soc/jz4740/Makefile b/sound/soc/jz4740/Makefile index be873c1b0c20..d32c540555c4 100644 --- a/sound/soc/jz4740/Makefile +++ b/sound/soc/jz4740/Makefile @@ -1,10 +1,8 @@ # # Jz4740 Platform Support # -snd-soc-jz4740-objs := jz4740-pcm.o snd-soc-jz4740-i2s-objs := jz4740-i2s.o -obj-$(CONFIG_SND_JZ4740_SOC) += snd-soc-jz4740.o obj-$(CONFIG_SND_JZ4740_SOC_I2S) += snd-soc-jz4740-i2s.o # Jz4740 Machine Support diff --git a/sound/soc/sh/rcar/src.c b/sound/soc/sh/rcar/src.c index 6232b7d307aa..4d0720ed5a90 100644 --- a/sound/soc/sh/rcar/src.c +++ b/sound/soc/sh/rcar/src.c @@ -258,7 +258,7 @@ static int rsnd_src_init(struct rsnd_mod *mod, { struct rsnd_src *src = rsnd_mod_to_src(mod); - clk_enable(src->clk); + clk_prepare_enable(src->clk); return 0; } @@ -269,7 +269,7 @@ static int rsnd_src_quit(struct rsnd_mod *mod, { struct rsnd_src *src = rsnd_mod_to_src(mod); - clk_disable(src->clk); + clk_disable_unprepare(src->clk); return 0; } diff --git a/sound/soc/sh/rcar/ssi.c b/sound/soc/sh/rcar/ssi.c index 4b7e20603dd7..1d8387c25bd8 100644 --- a/sound/soc/sh/rcar/ssi.c +++ b/sound/soc/sh/rcar/ssi.c @@ -171,7 +171,7 @@ static void rsnd_ssi_hw_start(struct rsnd_ssi *ssi, u32 cr; if (0 == ssi->usrcnt) { - clk_enable(ssi->clk); + clk_prepare_enable(ssi->clk); if (rsnd_dai_is_clk_master(rdai)) { if (rsnd_ssi_clk_from_parent(ssi)) @@ -230,7 +230,7 @@ static void rsnd_ssi_hw_stop(struct rsnd_ssi *ssi, rsnd_ssi_master_clk_stop(ssi); } - clk_disable(ssi->clk); + clk_disable_unprepare(ssi->clk); } dev_dbg(dev, "ssi%d hw stopped\n", rsnd_mod_id(&ssi->mod)); diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c index c8a780d0d057..7769b0a2bc5a 100644 --- a/sound/soc/soc-dapm.c +++ b/sound/soc/soc-dapm.c @@ -254,7 +254,6 @@ static int dapm_kcontrol_data_alloc(struct snd_soc_dapm_widget *widget, static void dapm_kcontrol_free(struct snd_kcontrol *kctl) { struct dapm_kcontrol_data *data = snd_kcontrol_chip(kctl); - kfree(data->widget); kfree(data->wlist); kfree(data); } diff --git a/tools/lib/api/fs/debugfs.c b/tools/lib/api/fs/debugfs.c index 7c4347962353..a74fba6d7743 100644 --- a/tools/lib/api/fs/debugfs.c +++ b/tools/lib/api/fs/debugfs.c @@ -12,8 +12,8 @@ char debugfs_mountpoint[PATH_MAX + 1] = "/sys/kernel/debug"; static const char * const debugfs_known_mountpoints[] = { - "/sys/kernel/debug/", - "/debug/", + "/sys/kernel/debug", + "/debug", 0, }; diff --git a/tools/lib/traceevent/event-parse.c b/tools/lib/traceevent/event-parse.c index baec7d887da4..b83184f2d484 100644 --- a/tools/lib/traceevent/event-parse.c +++ b/tools/lib/traceevent/event-parse.c @@ -4344,6 +4344,7 @@ static void pretty_print(struct trace_seq *s, void *data, int size, struct event format, len_arg, arg); trace_seq_terminate(&p); trace_seq_puts(s, p.buffer); + trace_seq_destroy(&p); arg = arg->next; break; default: diff --git a/tools/lib/traceevent/event-parse.h b/tools/lib/traceevent/event-parse.h index 791c539374c7..feab94281634 100644 --- a/tools/lib/traceevent/event-parse.h +++ b/tools/lib/traceevent/event-parse.h @@ -876,8 +876,8 @@ struct event_filter { struct event_filter *pevent_filter_alloc(struct pevent *pevent); /* for backward compatibility */ -#define FILTER_NONE PEVENT_ERRNO__FILTER_NOT_FOUND -#define FILTER_NOEXIST PEVENT_ERRNO__NO_FILTER +#define FILTER_NONE PEVENT_ERRNO__NO_FILTER +#define FILTER_NOEXIST PEVENT_ERRNO__FILTER_NOT_FOUND #define FILTER_MISS PEVENT_ERRNO__FILTER_MISS #define FILTER_MATCH PEVENT_ERRNO__FILTER_MATCH diff --git a/tools/perf/Makefile.perf b/tools/perf/Makefile.perf index e96923310d57..895edd32930c 100644 --- a/tools/perf/Makefile.perf +++ b/tools/perf/Makefile.perf @@ -589,7 +589,7 @@ $(GTK_OBJS): $(OUTPUT)%.o: %.c $(LIB_H) $(QUIET_CC)$(CC) -o $@ -c -fPIC $(CFLAGS) $(GTK_CFLAGS) $< $(OUTPUT)libperf-gtk.so: $(GTK_OBJS) $(PERFLIBS) - $(QUIET_LINK)$(CC) -o $@ -shared $(ALL_LDFLAGS) $(filter %.o,$^) $(GTK_LIBS) + $(QUIET_LINK)$(CC) -o $@ -shared $(LDFLAGS) $(filter %.o,$^) $(GTK_LIBS) $(OUTPUT)builtin-help.o: builtin-help.c $(OUTPUT)common-cmds.h $(OUTPUT)PERF-CFLAGS $(QUIET_CC)$(CC) -o $@ -c $(CFLAGS) \ diff --git a/tools/perf/arch/x86/tests/dwarf-unwind.c b/tools/perf/arch/x86/tests/dwarf-unwind.c index b602ad93ce63..83bc2385e6d3 100644 --- a/tools/perf/arch/x86/tests/dwarf-unwind.c +++ b/tools/perf/arch/x86/tests/dwarf-unwind.c @@ -23,9 +23,10 @@ static int sample_ustack(struct perf_sample *sample, sp = (unsigned long) regs[PERF_REG_X86_SP]; - map = map_groups__find(&thread->mg, MAP__FUNCTION, (u64) sp); + map = map_groups__find(&thread->mg, MAP__VARIABLE, (u64) sp); if (!map) { pr_debug("failed to get stack map\n"); + free(buf); return -1; } diff --git a/tools/perf/arch/x86/tests/regs_load.S b/tools/perf/arch/x86/tests/regs_load.S index 99167bf644ea..60875d5c556c 100644 --- a/tools/perf/arch/x86/tests/regs_load.S +++ b/tools/perf/arch/x86/tests/regs_load.S @@ -1,4 +1,3 @@ - #include <linux/linkage.h> #define AX 0 @@ -90,3 +89,10 @@ ENTRY(perf_regs_load) ret ENDPROC(perf_regs_load) #endif + +/* + * We need to provide note.GNU-stack section, saying that we want + * NOT executable stack. Otherwise the final linking will assume that + * the ELF stack should not be restricted at all and set it RWX. + */ +.section .note.GNU-stack,"",@progbits diff --git a/tools/perf/config/Makefile b/tools/perf/config/Makefile index ee21fa95ebcf..802cf544202b 100644 --- a/tools/perf/config/Makefile +++ b/tools/perf/config/Makefile @@ -34,6 +34,14 @@ ifeq ($(ARCH),arm) LIBUNWIND_LIBS = -lunwind -lunwind-arm endif +# So far there's only x86 libdw unwind support merged in perf. +# Disable it on all other architectures in case libdw unwind +# support is detected in system. Add supported architectures +# to the check. +ifneq ($(ARCH),x86) + NO_LIBDW_DWARF_UNWIND := 1 +endif + ifeq ($(LIBUNWIND_LIBS),) NO_LIBUNWIND := 1 else @@ -109,6 +117,10 @@ CFLAGS += -Wall CFLAGS += -Wextra CFLAGS += -std=gnu99 +# Enforce a non-executable stack, as we may regress (again) in the future by +# adding assembler files missing the .GNU-stack linker note. +LDFLAGS += -Wl,-z,noexecstack + EXTLIBS = -lelf -lpthread -lrt -lm -ldl ifneq ($(OUTPUT),) @@ -186,7 +198,10 @@ VF_FEATURE_TESTS = \ stackprotector-all \ timerfd \ libunwind-debug-frame \ - bionic + bionic \ + liberty \ + liberty-z \ + cplus-demangle # Set FEATURE_CHECK_(C|LD)FLAGS-all for all CORE_FEATURE_TESTS features. # If in the future we need per-feature checks/flags for features not @@ -504,7 +519,21 @@ else endif ifeq ($(feature-libbfd), 1) - EXTLIBS += -lbfd -lz -liberty + EXTLIBS += -lbfd + + # call all detections now so we get correct + # status in VF output + $(call feature_check,liberty) + $(call feature_check,liberty-z) + $(call feature_check,cplus-demangle) + + ifeq ($(feature-liberty), 1) + EXTLIBS += -liberty + else + ifeq ($(feature-liberty-z), 1) + EXTLIBS += -liberty -lz + endif + endif endif ifdef NO_DEMANGLE @@ -515,15 +544,10 @@ else CFLAGS += -DHAVE_CPLUS_DEMANGLE_SUPPORT else ifneq ($(feature-libbfd), 1) - $(call feature_check,liberty) - ifeq ($(feature-liberty), 1) - EXTLIBS += -lbfd -liberty - else - $(call feature_check,liberty-z) - ifeq ($(feature-liberty-z), 1) - EXTLIBS += -lbfd -liberty -lz - else - $(call feature_check,cplus-demangle) + ifneq ($(feature-liberty), 1) + ifneq ($(feature-liberty-z), 1) + # we dont have neither HAVE_CPLUS_DEMANGLE_SUPPORT + # or any of 'bfd iberty z' trinity ifeq ($(feature-cplus-demangle), 1) EXTLIBS += -liberty CFLAGS += -DHAVE_CPLUS_DEMANGLE_SUPPORT diff --git a/tools/perf/tests/make b/tools/perf/tests/make index 5daeae1cb4c0..2f92d6e7ee00 100644 --- a/tools/perf/tests/make +++ b/tools/perf/tests/make @@ -46,6 +46,7 @@ make_install_man := install-man make_install_html := install-html make_install_info := install-info make_install_pdf := install-pdf +make_static := LDFLAGS=-static # all the NO_* variable combined make_minimal := NO_LIBPERL=1 NO_LIBPYTHON=1 NO_NEWT=1 NO_GTK2=1 @@ -87,6 +88,7 @@ run += make_install_bin # run += make_install_info # run += make_install_pdf run += make_minimal +run += make_static ifneq ($(call has,ctags),) run += make_tags diff --git a/tools/perf/util/machine.c b/tools/perf/util/machine.c index a53cd0b8c151..27c2a5efe450 100644 --- a/tools/perf/util/machine.c +++ b/tools/perf/util/machine.c @@ -717,7 +717,7 @@ static char *get_kernel_version(const char *root_dir) } static int map_groups__set_modules_path_dir(struct map_groups *mg, - const char *dir_name) + const char *dir_name, int depth) { struct dirent *dent; DIR *dir = opendir(dir_name); @@ -742,7 +742,15 @@ static int map_groups__set_modules_path_dir(struct map_groups *mg, !strcmp(dent->d_name, "..")) continue; - ret = map_groups__set_modules_path_dir(mg, path); + /* Do not follow top-level source and build symlinks */ + if (depth == 0) { + if (!strcmp(dent->d_name, "source") || + !strcmp(dent->d_name, "build")) + continue; + } + + ret = map_groups__set_modules_path_dir(mg, path, + depth + 1); if (ret < 0) goto out; } else { @@ -786,11 +794,11 @@ static int machine__set_modules_path(struct machine *machine) if (!version) return -1; - snprintf(modules_path, sizeof(modules_path), "%s/lib/modules/%s/kernel", + snprintf(modules_path, sizeof(modules_path), "%s/lib/modules/%s", machine->root_dir, version); free(version); - return map_groups__set_modules_path_dir(&machine->kmaps, modules_path); + return map_groups__set_modules_path_dir(&machine->kmaps, modules_path, 0); } static int machine__create_module(void *arg, const char *name, u64 start) diff --git a/tools/power/acpi/Makefile b/tools/power/acpi/Makefile index d9186a2fdf06..c2c0f20067a5 100644 --- a/tools/power/acpi/Makefile +++ b/tools/power/acpi/Makefile @@ -89,15 +89,6 @@ else STRIPCMD = $(STRIP) -s --remove-section=.note --remove-section=.comment endif -# if DEBUG is enabled, then we do not strip or optimize -ifeq ($(strip $(DEBUG)),true) - CFLAGS += -O1 -g -DDEBUG - STRIPCMD = /bin/true -Since_we_are_debugging -else - CFLAGS += $(OPTIMIZATION) -fomit-frame-pointer - STRIPCMD = $(STRIP) -s --remove-section=.note --remove-section=.comment -endif - # --- ACPIDUMP BEGIN --- vpath %.c \ @@ -128,7 +119,7 @@ clean: -rm -f $(OUTPUT)acpidump install-tools: - $(INSTALL) -d $(DESTDIR)${bindir} + $(INSTALL) -d $(DESTDIR)${sbindir} $(INSTALL_PROGRAM) $(OUTPUT)acpidump $(DESTDIR)${sbindir} install-man: diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c index 47b29834a6b6..56ff9bebb577 100644 --- a/virt/kvm/arm/vgic.c +++ b/virt/kvm/arm/vgic.c @@ -548,11 +548,10 @@ static bool handle_mmio_cfg_reg(struct kvm_vcpu *vcpu, u32 val; u32 *reg; - offset >>= 1; reg = vgic_bitmap_get_reg(&vcpu->kvm->arch.vgic.irq_cfg, - vcpu->vcpu_id, offset); + vcpu->vcpu_id, offset >> 1); - if (offset & 2) + if (offset & 4) val = *reg >> 16; else val = *reg & 0xffff; @@ -561,13 +560,13 @@ static bool handle_mmio_cfg_reg(struct kvm_vcpu *vcpu, vgic_reg_access(mmio, &val, offset, ACCESS_READ_VALUE | ACCESS_WRITE_VALUE); if (mmio->is_write) { - if (offset < 4) { + if (offset < 8) { *reg = ~0U; /* Force PPIs/SGIs to 1 */ return false; } val = vgic_cfg_compress(val); - if (offset & 2) { + if (offset & 4) { *reg &= 0xffff; *reg |= val << 16; } else { @@ -916,6 +915,7 @@ static void vgic_dispatch_sgi(struct kvm_vcpu *vcpu, u32 reg) case 0: if (!target_cpus) return; + break; case 1: target_cpus = ((1 << nrcpus) - 1) & ~(1 << vcpu_id) & 0xff; @@ -1667,10 +1667,11 @@ static int vgic_ioaddr_assign(struct kvm *kvm, phys_addr_t *ioaddr, if (addr + size < addr) return -EINVAL; + *ioaddr = addr; ret = vgic_ioaddr_overlap(kvm); if (ret) - return ret; - *ioaddr = addr; + *ioaddr = VGIC_ADDR_UNDEF; + return ret; } diff --git a/virt/kvm/assigned-dev.c b/virt/kvm/assigned-dev.c index 8db43701016f..bf06577fea51 100644 --- a/virt/kvm/assigned-dev.c +++ b/virt/kvm/assigned-dev.c @@ -395,7 +395,8 @@ static int assigned_device_enable_host_msix(struct kvm *kvm, if (dev->entries_nr == 0) return r; - r = pci_enable_msix(dev->dev, dev->host_msix_entries, dev->entries_nr); + r = pci_enable_msix_exact(dev->dev, + dev->host_msix_entries, dev->entries_nr); if (r) return r; diff --git a/virt/kvm/async_pf.c b/virt/kvm/async_pf.c index 10df100c4514..06e6401d6ef4 100644 --- a/virt/kvm/async_pf.c +++ b/virt/kvm/async_pf.c @@ -101,7 +101,7 @@ static void async_pf_execute(struct work_struct *work) if (waitqueue_active(&vcpu->wq)) wake_up_interruptible(&vcpu->wq); - mmdrop(mm); + mmput(mm); kvm_put_kvm(vcpu->kvm); } @@ -118,7 +118,7 @@ void kvm_clear_async_pf_completion_queue(struct kvm_vcpu *vcpu) flush_work(&work->work); #else if (cancel_work_sync(&work->work)) { - mmdrop(work->mm); + mmput(work->mm); kvm_put_kvm(vcpu->kvm); /* == work->vcpu->kvm */ kmem_cache_free(async_pf_cache, work); } @@ -183,7 +183,7 @@ int kvm_setup_async_pf(struct kvm_vcpu *vcpu, gva_t gva, unsigned long hva, work->addr = hva; work->arch = *arch; work->mm = current->mm; - atomic_inc(&work->mm->mm_count); + atomic_inc(&work->mm->mm_users); kvm_get_kvm(work->vcpu->kvm); /* this can't really happen otherwise gfn_to_pfn_async @@ -201,7 +201,7 @@ int kvm_setup_async_pf(struct kvm_vcpu *vcpu, gva_t gva, unsigned long hva, return 1; retry_sync: kvm_put_kvm(work->vcpu->kvm); - mmdrop(work->mm); + mmput(work->mm); kmem_cache_free(async_pf_cache, work); return 0; } |