diff options
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 5 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8195.dtsi | 2 |
2 files changed, 5 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi index 07b643065a58..5cfe104ee136 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -480,6 +480,10 @@ domain-supply = <&mt6315_7_vbuck1>; }; +&mfg1 { + domain-supply = <&mt6359_vsram_others_ldo_reg>; +}; + &mmc0 { status = "okay"; @@ -550,7 +554,6 @@ /* for GPU SRAM */ &mt6359_vsram_others_ldo_reg { - regulator-always-on; regulator-min-microvolt = <750000>; regulator-max-microvolt = <750000>; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index 54c674c45b49..0d7735778709 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -538,7 +538,7 @@ #size-cells = <0>; #power-domain-cells = <1>; - power-domain@MT8195_POWER_DOMAIN_MFG1 { + mfg1: power-domain@MT8195_POWER_DOMAIN_MFG1 { reg = <MT8195_POWER_DOMAIN_MFG1>; clocks = <&apmixedsys CLK_APMIXED_MFGPLL>, <&topckgen CLK_TOP_MFG_CORE_TMP>; |