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authorKonrad Dybcio <[email protected]>2023-06-01 11:39:08 +0200
committerBjorn Andersson <[email protected]>2023-06-13 16:15:04 -0700
commite88c533d8a2a0fe84bb54cff1569bd079ad3512c (patch)
tree5027561d0cdc7836511ba76338dd05140085976a /tools/perf/util/scripting-engines/trace-event-python.c
parent501624339466a7896bb8a1f048cf8dcfd54b174e (diff)
clk: qcom: gcc-sm6115: Add missing PLL config properties
When the driver was ported upstream, PLL ctl register values were omitted. Add them to ensure the PLLs are fully configured like we expect them to. Fixes: cbe63bfdc54f ("clk: qcom: Add Global Clock controller (GCC) driver for SM6115") Signed-off-by: Konrad Dybcio <[email protected]> Reviewed-by: Iskren Chernev <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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