diff options
| author | Bard Liao <[email protected]> | 2014-09-26 11:06:40 +0800 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2014-09-26 09:14:27 +0100 |
| commit | 66d627d554a4284dad00b2039efd18e1c129cc2f (patch) | |
| tree | f5c43d3f5ff914dba949b4d0818cc16f3a0954b1 /tools/perf/util/scripting-engines/trace-event-python.c | |
| parent | b7a297677540789b8fb35a6ce66c500739fb4bf9 (diff) | |
ASoC: rt286: Fix sync function
We try to write index registers into cache when we write an index
register, but we change the reg value before updating the cache.
As a result, the cache is never be updated. This patch will fix
this issue.
Signed-off-by: Bard Liao <[email protected]>
Signed-off-by: Mark Brown <[email protected]>
Cc: [email protected]
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
0 files changed, 0 insertions, 0 deletions