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authorKonrad Dybcio <[email protected]>2023-05-17 04:18:50 +0200
committerBjorn Andersson <[email protected]>2023-05-24 21:11:28 -0700
commit661a4f089317c877aecd598fb70cd46510cc8d29 (patch)
treea329d3f5a444b2804558306d9f7dba65fdf7b4bb /tools/perf/util/scripting-engines/trace-event-python.c
parent3a735530c159b75e1402c08abe1ba4eb99a1f7a3 (diff)
arm64: dts: qcom: sm8550: Use the correct LLCC register scheme
During the ABI-breaking (for good reasons) conversion of the LLCC register description, SM8550 was not taken into account, resulting in LLCC being broken on any kernel containing the patch referenced in the fixes tag. Fix it by describing the regions properly. Fixes: ee13b5008707 ("qcom: llcc/edac: Fix the base address used for accessing LLCC banks") Signed-off-by: Konrad Dybcio <[email protected]> Acked-by: Manivannan Sadhasivam <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
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