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authorRodrigo Vivi <[email protected]>2018-10-25 17:56:36 -0700
committerJoonas Lahtinen <[email protected]>2018-11-06 17:17:26 +0200
commit2c2f6e30d5f29691e3563d334ce208d3a1907f49 (patch)
treedc6f1d9772c8aa83a46bc865a9c1b76758aa8810 /tools/perf/util/scripting-engines/trace-event-python.c
parent085603287452fc96376ed4888bf29f8c095d2b40 (diff)
drm/i915/glk: Remove 99% limitation.
While checking the opportunity to add a display_gen check to allow glk and cnl to be on same bucket I noticed these FIXME cases here. So I got the confirmation from HW architect that we actually never needed this workaround. "GLK supports 2 pixel per clock, so pixel clock can be up to 2 * cdclk." So, this reverts commit 97f55ca5b662 ("drm/i915/glk: limit pixel clock to 99% of cdclk workaround") Fixes: 97f55ca5b662 ("drm/i915/glk: limit pixel clock to 99% of cdclk workaround") Cc: Ville Syrjälä <[email protected]> Cc: Madhav Chauhan <[email protected]> Cc: Jani Nikula <[email protected]> Cc: Clinton Taylor <[email protected]> Cc: Arthur J Runyan <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 42882336e62aab00278114392a16374f272a0c99) Signed-off-by: Joonas Lahtinen <[email protected]>
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