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| author | Thierry Reding <[email protected]> | 2012-11-15 22:07:56 +0100 |
|---|---|---|
| committer | Stephen Warren <[email protected]> | 2012-11-15 14:46:26 -0700 |
| commit | 5f10778370e15ca6e74db75d7bbe888870e49e3f (patch) | |
| tree | 84bf054ecae2bd42a5ec2305174df08ab1cfb89b /tools/perf/scripts/python/syscall-counts.py | |
| parent | 35de7bfe91453fca9bb3154a36ddbb86711e08a0 (diff) | |
ARM: tegra: Add Tegra20 host1x clock support
Extend the pll_d frequency table with a few entries to support common
HDMI and LVDS display modes and setup the clock parents for the two
display controllers and HDMI.
Signed-off-by: Thierry Reding <[email protected]>
Signed-off-by: Stephen Warren <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions