spi: bcm2835aux: fix CPOL/CPHA setting

The auxiliary spi supports only CPHA=0 modes as the first bit is
always output to the pin before the first clock cycle. In CPHA=1
modes the first clock edge outputs the second bit hence the slave
can never read the first bit.

Also the CPHA registers switch between clocking data in/out on
rising/falling edge hence depend on the CPOL setting.

Signed-off-by: Stephan Olbrich <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
Signed-off-by: Mark Brown <[email protected]>

0 files changed, 0 insertions, 0 deletions