aboutsummaryrefslogtreecommitdiff
path: root/tools/perf/scripts/python/stackcollapse.py
diff options
context:
space:
mode:
authorJohn Stultz <[email protected]>2017-08-22 11:42:26 -0700
committerDave Airlie <[email protected]>2017-08-29 05:20:35 +1000
commit71f23543d3026d835ca1741e57e7eb4baeca63dc (patch)
treeedf6205440cb8b59bd6f63b3bdba9d7ffc51ad05 /tools/perf/scripts/python/stackcollapse.py
parente47ef3029ba14e7c2d2cfc7823d042f6f1bb94a2 (diff)
drm: kirin: Add mode_valid logic to avoid mode clocks we can't generate
Currently the hikey dsi logic cannot generate accurate byte clocks values for all pixel clock values. Thus if a mode clock is selected that cannot match the calculated byte clock, the device will boot with a blank screen. This patch uses the new mode_valid callback (many thanks to Jose Abreu for upstreaming it!) to ensure we don't select modes we cannot generate. Also, since the ade crtc code will adjust the mode in mode_set, this patch also adds a mode_fixup callback which we use to make sure we are validating the mode clock that will eventually be used. Cc: Daniel Vetter <[email protected]> Cc: Jani Nikula <[email protected]> Cc: Sean Paul <[email protected]> Cc: David Airlie <[email protected]> Cc: Rob Clark <[email protected]> Cc: Xinliang Liu <[email protected]> Cc: Xinliang Liu <[email protected]> Cc: Rongrong Zou <[email protected]> Cc: Xinwei Kong <[email protected]> Cc: Chen Feng <[email protected]> Cc: Jose Abreu <[email protected]> Cc: Archit Taneja <[email protected]> Cc: [email protected] Reviewed-by: Sean Paul <[email protected]> Signed-off-by: John Stultz <[email protected]> Reviewed-by: Xinliang Liu <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions