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| author | Eugen Hristev <[email protected]> | 2021-04-09 14:31:16 +0300 |
|---|---|---|
| committer | Nicolas Ferre <[email protected]> | 2021-07-19 14:32:11 +0200 |
| commit | 577cb67ad98b2b76985336ae204c145228362e2a (patch) | |
| tree | dd6b606d901a42a89a5cc3d1c5f759085405f6be /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | 56bc29659182a9d4b58d8364420f5a9c59d709e8 (diff) | |
ARM: at91: debug: add sama7g5 low level debug uart
Add sama7g5 SoC debug uart on Flexcom3. This is the UART that the
ROM bootloader uses.
Signed-off-by: Eugen Hristev <[email protected]>
Signed-off-by: Nicolas Ferre <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions