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authorNeil Armstrong <[email protected]>2020-09-15 14:45:53 +0200
committerJerome Brunet <[email protected]>2020-11-23 09:08:22 +0100
commite80d8510ffef3a9d2b2ce15882f5fd004d1e1645 (patch)
tree0b1af232217464c8475c66f97200650dd50d0794 /tools/perf/scripts/python/exported-sql-viewer.py
parent14ebb3154b8f3d562cb18331b08ff1a22609ae59 (diff)
clk: meson: axg: add MIPI DSI Host clock
This adds the MIPI DSI Host clock, used to measure the signal timings (ENC VSYNC or DW-MIPI-DSI eDPI timings). Signed-off-by: Neil Armstrong <[email protected]> Signed-off-by: Jerome Brunet <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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