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| author | Thomas Bogendoerfer <[email protected]> | 2019-05-07 23:09:15 +0200 |
|---|---|---|
| committer | Paul Burton <[email protected]> | 2019-05-09 16:48:20 -0700 |
| commit | e6308b6d35ea706c23a589a8c709fa444ff13e17 (patch) | |
| tree | 12679cc0d20fe704547ff21e047a26e96be1bb1a /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | a57140e9a850582ddafdd8f115b78713baaf0d00 (diff) | |
MIPS: SGI-IP27: abstract chipset irq from bridge
Bridge ASIC is widely used in different SGI systems, but the connected
chipset is either HUB, HEART or BEDROCK. This commit switches to
irq domain hierarchy for hub and bridge interrupts to get bridge
setup out of hub interrupt code.
Signed-off-by: Thomas Bogendoerfer <[email protected]>
[[email protected]:
Resolve conflict with commit 69a07a41d908 ("MIPS: SGI-IP27: rework HUB
interrupts").]
Signed-off-by: Paul Burton <[email protected]>
Cc: Ralf Baechle <[email protected]>
Cc: James Hogan <[email protected]>
Cc: [email protected]
Cc: [email protected]
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions