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authorChuanhong Guo <[email protected]>2019-03-21 22:42:51 +0800
committerPaul Burton <[email protected]>2019-04-04 11:23:36 -0700
commite6046b5e69a070f8a1af868bba788cf796bcd9a8 (patch)
treee607eb8af6807fd1fb9a4f8630588f26deef1cce /tools/perf/scripts/python/exported-sql-viewer.py
parente6331a321aafcc291a60ceedf4d6b0051a6117ca (diff)
MIPS: ralink: fix cpu clock of mt7621 and add dt clk devices
For a long time the mt7621 uses a fixed cpu clock which causes a problem if the cpu frequency is not 880MHz. This patch fixes the cpu clock calculation and adds the cpu/bus clkdev which will be used in dts. Ported from OpenWrt: c7ca224299 ramips: fix cpu clock of mt7621 and add dt clk devices Signed-off-by: Weijie Gao <[email protected]> Signed-off-by: Chuanhong Guo <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: John Crispin <[email protected]> Cc: [email protected]
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