diff options
| author | Christophe Leroy <[email protected]> | 2020-02-09 18:14:42 +0000 |
|---|---|---|
| committer | Michael Ellerman <[email protected]> | 2020-02-17 12:47:06 +1100 |
| commit | a4031afb9d10d97f4d0285844abbc0ab04245304 (patch) | |
| tree | 9e5180f59f89e467727d55824f0646e8b2784464 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | 50a175dd18de7a647e72aca7daf4744e3a5a81e3 (diff) | |
powerpc/8xx: Fix clearing of bits 20-23 in ITLB miss
In ITLB miss handled the line supposed to clear bits 20-23 on the L2
ITLB entry is buggy and does indeed nothing, leading to undefined
value which could allow execution when it shouldn't.
Properly do the clearing with the relevant instruction.
Fixes: 74fabcadfd43 ("powerpc/8xx: don't use r12/SPRN_SPRG_SCRATCH2 in TLB Miss handlers")
Cc: [email protected] # v5.0+
Signed-off-by: Christophe Leroy <[email protected]>
Reviewed-by: Leonardo Bras <[email protected]>
Signed-off-by: Michael Ellerman <[email protected]>
Link: https://lore.kernel.org/r/4f70c2778163affce8508a210f65d140e84524b4.1581272050.git.christophe.leroy@c-s.fr
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions