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| author | Neil Armstrong <[email protected]> | 2020-11-26 15:16:00 +0100 |
|---|---|---|
| committer | Jerome Brunet <[email protected]> | 2020-11-26 15:25:20 +0100 |
| commit | 88b9ae600138baff18c7f4c4870622584acc6111 (patch) | |
| tree | dfc529c5afb2b53286e39cf891354c67d82ea50e /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | dee6ecc7c330ba471192614015f8a072b2d1bb75 (diff) | |
clk: meson: g12a: add MIPI DSI Host Pixel Clock
This adds the MIPI DSI Host Pixel Clock, unlike AXG, the pixel clock can be different
from the VPU ENCL output clock to feed the DSI Host controller with a different clock rate.
Signed-off-by: Neil Armstrong <[email protected]>
Signed-off-by: Jerome Brunet <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions