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authorZiyuan Xu <[email protected]>2018-10-11 15:26:43 +0800
committerHeiko Stuebner <[email protected]>2018-10-11 14:36:01 +0200
commit82f4b67f018c88a7cc9337f0067ed3d6ec352648 (patch)
tree5cca1de112a03a24227f12a8d5cf8dfbab40373c /tools/perf/scripts/python/exported-sql-viewer.py
parentc14d28e86d3c70720622e1d517968c1721f23214 (diff)
clk: rockchip: fix wrong mmc sample phase shift for rk3328
mmc sample shift is 0 for RK3328 referring to the TRM. So fix them. Fixes: fe3511ad8a1c ("clk: rockchip: add clock controller for rk3328") Cc: [email protected] Signed-off-by: Ziyuan Xu <[email protected]> Signed-off-by: Shawn Lin <[email protected]> Signed-off-by: Heiko Stuebner <[email protected]>
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