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author | Peter Zijlstra <[email protected]> | 2021-02-10 11:47:35 +0100 |
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committer | Ingo Molnar <[email protected]> | 2021-03-06 12:44:23 +0100 |
commit | 78df6245c3c82484200b9f8e306dc86fb19e9c02 (patch) | |
tree | 1110853d3eb012b4e101a0a892226c4cf2757c8d /tools/perf/scripts/python/exported-sql-viewer.py | |
parent | 16ef7f159c503c7befec7018ee0e82fdc311721e (diff) |
objtool,x86: Support %riz encodings
When there's a SIB byte, the register otherwise denoted by r/m will
then be denoted by SIB.base REX.b will now extend this. SIB.index == SP
is magic and notes an index value zero.
This means that there's a bunch of alternative (longer) encodings for
the same thing. Eg. 'ModRM.mod != 3, ModRM.r/m = AX' can be encoded as
'ModRM.mod != 3, ModRM.r/m = SP, SIB.base = AX, SIB.index = SP' which is actually 4
different encodings because the value of SIB.scale is irrelevant,
giving rise to 5 different but equal encodings.
Support these encodings and clean up the SIB handling in general.
Signed-off-by: Peter Zijlstra (Intel) <[email protected]>
Signed-off-by: Ingo Molnar <[email protected]>
Acked-by: Josh Poimboeuf <[email protected]>
Tested-by: Nick Desaulniers <[email protected]>
Link: https://lkml.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions