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authorPu Wen <[email protected]>2018-09-23 17:34:47 +0800
committerBorislav Petkov <[email protected]>2018-09-27 18:28:57 +0200
commit6d0ef316b9f8ea03fa867debda70b2f11a0b9736 (patch)
treefedc78b52d0dd05ba9183c9c83ece2216d408aec /tools/perf/scripts/python/exported-sql-viewer.py
parent0b13bec787dccca96f8c431da732657ae01baf9a (diff)
x86/events: Add Hygon Dhyana support to PMU infrastructure
The PMU architecture for the Hygon Dhyana CPU is similar to the AMD Family 17h one. To support it, call amd_pmu_init() to share the AMD PMU initialization flow, and change the PMU name to "HYGON". The Hygon Dhyana CPU supports both legacy and extension PMC MSRs (perf counter registers and event selection registers), so add Hygon Dhyana support in the similar way as AMD does. Signed-off-by: Pu Wen <[email protected]> Signed-off-by: Borislav Petkov <[email protected]> Reviewed-by: Borislav Petkov <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Link: https://lkml.kernel.org/r/9d93ed54a975f33ef7247e0967960f4ce5d3d990.1537533369.git.puwen@hygon.cn
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