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authorSergio Paracuellos <[email protected]>2020-12-08 08:55:23 +0100
committerGreg Kroah-Hartman <[email protected]>2020-12-08 09:58:01 +0100
commit518b466a21ad7fa1e338fa4ed9d180ef439d3bc0 (patch)
tree51666be90da326f570cfd9295c3fab1009ffda18 /tools/perf/scripts/python/exported-sql-viewer.py
parent289fa46ac6111df61697495a736f2dac8fa4f23a (diff)
pinctrl: ralink: add a pinctrl driver for the rt2880 family
These Socs have 1-3 banks of 8-32 gpios. Rather then setting the muxing of each pin individually, these socs have mux groups that when set will effect 1-N pins. Pin groups have a 2, 4 or 8 different muxes. Acked-by: Linus Walleij <[email protected]> Signed-off-by: Sergio Paracuellos <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
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