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| author | Ville Syrjälä <[email protected]> | 2022-05-03 21:22:39 +0300 |
|---|---|---|
| committer | Ville Syrjälä <[email protected]> | 2022-05-31 21:04:46 +0300 |
| commit | 4f543d664cec7e9b490bca55f57151afe6f5cf47 (patch) | |
| tree | 5e23dce6eca72359c54db95a397eb0d736bb74c8 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | f2206df8ec862073995f5d27f0f55f698843a9b8 (diff) | |
drm/i915: Require an exact DP link freq match for the DG2 PLL
No idea why the DG2 PLL DP link frequency calculation is allowing
a non-exact match. That makes no sense so get rid of it.
Signed-off-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Reviewed-by: Jani Nikula <[email protected]>
Acked-by: Matt Roper <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions