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authorPaul Walmsley <[email protected]>2019-04-12 19:01:13 -0700
committerGreg Kroah-Hartman <[email protected]>2019-04-29 16:30:59 +0200
commit45c054d0815b1530d7c7ff8441389a0421dd05e7 (patch)
tree96cfb254fdaefadd1d54576b7e69dfce68d524a0 /tools/perf/scripts/python/exported-sql-viewer.py
parente5c8fe558c5fb7fe37227bacdcf857881498ebf3 (diff)
tty: serial: add driver for the SiFive UART
Add a serial driver for the SiFive UART, found on SiFive FU540 devices (among others). The underlying serial IP block is relatively basic, and currently does not support serial break detection. Further information on the IP block can be found in the documentation and Chisel sources: https://static.dev.sifive.com/FU540-C000-v1.0.pdf https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/uart This driver was written in collaboration with Wesley Terpstra <[email protected]>. Tested on a SiFive HiFive Unleashed A00 board, using BBL and the open- source FSBL (using a DT file based on what's targeted for mainline). This revision incorporates changes based on comments by Julia Lawall <[email protected]>, Emil Renner Berthing <[email protected]>, and Andreas Schwab <[email protected]>. Thanks also to Andreas for testing the driver with his userspace and reporting a bug with the set_termios implementation. Signed-off-by: Paul Walmsley <[email protected]> Signed-off-by: Paul Walmsley <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Jiri Slaby <[email protected]> Cc: Palmer Dabbelt <[email protected]> Cc: Wesley Terpstra <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: Julia Lawall <[email protected]> Cc: Emil Renner Berthing <[email protected]> Cc: Andreas Schwab <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
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