diff options
| author | Dmitry Osipenko <[email protected]> | 2019-03-07 01:50:07 +0300 |
|---|---|---|
| committer | Joerg Roedel <[email protected]> | 2019-04-11 14:51:37 +0200 |
| commit | 43a0541e312f7136e081e6bf58f6c8a2e9672688 (patch) | |
| tree | b25e1201eea223aa57f8a51c4691bc097bb90edd /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | 15ade5d2e7775667cf191cf2f94327a4889f8b9d (diff) | |
iommu/tegra-smmu: Fix invalid ASID bits on Tegra30/114
Both Tegra30 and Tegra114 have 4 ASID's and the corresponding bitfield of
the TLB_FLUSH register differs from later Tegra generations that have 128
ASID's.
In a result the PTE's are now flushed correctly from TLB and this fixes
problems with graphics (randomly failing tests) on Tegra30.
Cc: stable <[email protected]>
Signed-off-by: Dmitry Osipenko <[email protected]>
Acked-by: Thierry Reding <[email protected]>
Signed-off-by: Joerg Roedel <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions