diff options
| author | Finn Thain <[email protected]> | 2021-03-30 18:37:51 +1100 |
|---|---|---|
| committer | Geert Uytterhoeven <[email protected]> | 2021-04-06 09:33:20 +0200 |
| commit | 43262178c043032e7c42d00de44c818ba05f9967 (patch) | |
| tree | 00c07114e812d3bb05c41ceacfe3ac43e3306e08 /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | cbfa72b57747f8b87df16396d85e832c8bf03811 (diff) | |
m68k: mvme147,mvme16x: Don't wipe PCC timer config bits
Don't clear the timer 1 configuration bits when clearing the interrupt flag
and counter overflow. As Michael reported, "This results in no timer
interrupts being delivered after the first. Initialization then hangs
in calibrate_delay as the jiffies counter is not updated."
On mvme16x, enable the timer after requesting the irq, consistent with
mvme147.
Cc: Michael Pavone <[email protected]>
Fixes: 7529b90d051e ("m68k: mvme147: Handle timer counter overflow")
Fixes: 19999a8b8782 ("m68k: mvme16x: Handle timer counter overflow")
Reported-and-tested-by: Michael Pavone <[email protected]>
Signed-off-by: Finn Thain <[email protected]>
Link: https://lore.kernel.org/r/4fdaa113db089b8fb607f7dd818479f8cdcc4547.1617089871.git.fthain@telegraphics.com.au
Signed-off-by: Geert Uytterhoeven <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions