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author | Jerome Brunet <[email protected]> | 2018-08-01 16:00:51 +0200 |
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committer | Jerome Brunet <[email protected]> | 2018-09-26 12:00:28 +0200 |
commit | 2303a9ca693e585a558497ad737728fec97e2b8a (patch) | |
tree | 69cc8cbe75ffd3db797ceb7356a7338b7131c920 /tools/perf/scripts/python/exported-sql-viewer.py | |
parent | e40c7e3cda07099a92ea68d022f3304c14f9659f (diff) |
clk: meson: clk-pll: drop CLK_GET_RATE_NOCACHE where unnecessary
CLK_GET_RATE_NOCACHE should only be necessary when the registers
controlling the rate of clock may change outside of CCF. On Amlogic,
it should only be the case for the hdmi pll which is directly controlled
by the display driver (WIP to fix this).
The other plls should not require this flag.
Reviewed-by: Martin Blumenstingl <[email protected]>
Tested-by: Martin Blumenstingl <[email protected]>
Signed-off-by: Jerome Brunet <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions