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authorXiaolong Zhang <[email protected]>2020-03-04 15:27:24 +0800
committerStephen Boyd <[email protected]>2020-03-24 19:03:56 -0700
commit187e5cd2d133771e978e7e4ea6aa684dfd1ce6ab (patch)
treecb09afa67e7e7b1743cd51b76cedad563fc59713 /tools/perf/scripts/python/exported-sql-viewer.py
parentbb6d3fb354c5ee8d6bde2d576eb7220ea09862b9 (diff)
clk: sprd: add gate for pll clocks
Some sprd's gate clocks are used to the switch of pll, which need to wait a certain time for stable after being enabled. Signed-off-by: Xiaolong Zhang <[email protected]> Signed-off-by: Chunyan Zhang <[email protected]> Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
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