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author | Andre Przywara <[email protected]> | 2020-09-07 13:18:30 +0100 |
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committer | Olof Johansson <[email protected]> | 2020-10-03 12:56:03 -0700 |
commit | fc772314a3683ab3f19aa68a660a0f70a8e836a4 (patch) | |
tree | 90e8349e7535afc9cb802bf04e0ee87f031cd896 /tools/perf/scripts/python/export-to-sqlite.py | |
parent | f6320e326f401e077bf7a042db0740c441ca0c8e (diff) |
arm64: dts: lg: Fix SP805 clocks
The SP805 DT binding requires two clocks to be specified, but the two
LG platform DTs currently only specify one clock.
In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux (and U-Boot) SP805 driver would use the first clock
to derive the actual watchdog counter frequency.
Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Andre Przywara <[email protected]>
Acked-by: Chanho Min <[email protected]>
Signed-off-by: Olof Johansson <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions