diff options
| author | Jonas Karlman <[email protected]> | 2019-03-10 12:00:45 +0000 |
|---|---|---|
| committer | Heiko Stuebner <[email protected]> | 2019-03-18 08:45:55 +0100 |
| commit | fb903392131a324a243c7731389277db1cd9f8df (patch) | |
| tree | 72acd497874c7eb10e630f63259d185574ddcdb3 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 9e98c678c2d6ae3a17cb2de55d17f69dddaa231b (diff) | |
clk: rockchip: fix wrong clock definitions for rk3328
This patch fixes definition of several clock gate and select register
that is wrong for rk3328 referring to the TRM and vendor kernel.
Also use correct number of softrst registers.
Fix clock definition for:
- clk_crypto
- aclk_h265
- pclk_h265
- aclk_h264
- hclk_h264
- aclk_axisram
- aclk_gmac
- aclk_usb3otg
Fixes: fe3511ad8a1c ("clk: rockchip: add clock controller for rk3328")
Cc: [email protected]
Signed-off-by: Jonas Karlman <[email protected]>
Tested-by: Peter Geis <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions