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author | Laurent Pinchart <[email protected]> | 2018-06-08 15:21:15 +0300 |
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committer | Simon Horman <[email protected]> | 2018-06-25 15:30:33 +0200 |
commit | e21adc781bb45e810f1c396c4bc2c1624a4c25b9 (patch) | |
tree | bea36ded309a8f9e09953c716374f09c027c2ca4 /tools/perf/scripts/python/export-to-sqlite.py | |
parent | cba59c25888938720390c47aaf1e05f39b42ecf4 (diff) |
arm64: dts: renesas: Fix VSPD registers range
The VSPD and FCPVD nodes have overlapping register ranges, as the FCPVD
devices are mapped in the memory range usually used by the VSP LUT and
CLU, which are not present in the VSPD. Fix this by shortening the VSPD
registers range to 0x5000.
Fixes: 9f8573e38a0b ("arm64: dts: renesas: r8a7795: Add VSP instances")
Fixes: 291e0c4994d0 ("arm64: dts: r8a7795: Add support for R-Car H3 ES2.0")
Fixes: f06ffdfbdd90 ("arm64: dts: r8a7796: Add VSP instances")
Fixes: b4f92030d5d3 ("arm64: dts: renesas: r8a77970: add VSPD support")
Fixes: 295952a183d3 ("arm64: dts: renesas: r8a77995: add VSP instances")
Fixes: 85cb3229218a ("arm64: dts: renesas: r8a77965: Add VSP instances")
Reported-by: Simon Horman <[email protected]>
Reported-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Laurent Pinchart <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Simon Horman <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions