diff options
author | Martin Blumenstingl <[email protected]> | 2020-05-15 22:47:07 +0200 |
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committer | Kevin Hilman <[email protected]> | 2020-05-19 16:02:14 -0700 |
commit | cc9ca02a40e549402eebdf151a8f0ca5027e0f7c (patch) | |
tree | e34b5833b0a0cada5eb19aa06088a714b7b32c4d /tools/perf/scripts/python/export-to-sqlite.py | |
parent | 18dfc0bf8167fb0dc729da4a6a816e34d754318b (diff) |
dt-bindings: power: meson-ee-pwrc: add support for the Meson GX SoCs
The power domains on the GX SoCs are very similar to G12A. The only
known differences so far are:
- The GX SoCs do not have the HHI_VPU_MEM_PD_REG2 register (for the
VPU power-domain)
- The GX SoCs have an additional reset line called "dvin"
Add a new compatible string and adjust the reset line expectations for
these SoCs.
Signed-off-by: Martin Blumenstingl <[email protected]>
Signed-off-by: Kevin Hilman <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions