diff options
| author | Samuel Holland <[email protected]> | 2021-11-18 22:35:39 -0600 |
|---|---|---|
| committer | Maxime Ripard <[email protected]> | 2021-11-23 10:29:05 +0100 |
| commit | c962f10f3931e8409f67dc52725df13e23c67d2d (patch) | |
| tree | c9ff3595d6979a0c91be392283e09dfdae431f01 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 91389c390521a02ecfb91270f5b9d7fae4312ae5 (diff) | |
dt-bindings: clk: Add compatibles for D1 CCUs
The D1 has a CCU and a R_CCU (PRCM CCU) like most other sunxi SoCs, with
3 and 4 clock inputs, respectively. Add the compatibles and bindings.
Signed-off-by: Samuel Holland <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions