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| author | Jiaxun Yang <[email protected]> | 2020-03-25 11:54:55 +0800 |
|---|---|---|
| committer | Thomas Bogendoerfer <[email protected]> | 2020-03-25 10:56:00 +0100 |
| commit | be09ef09e290e1c8bd361e431d3659e13e65094c (patch) | |
| tree | f2a684ee425d50e46449990d653129b2dd29fa3b /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | dbb152267908c4b2c3639492a94b6838821bc195 (diff) | |
irqchip: loongson-liointc: Workaround LPC IRQ Errata
The 1.0 version of that controller has a bug that status bit
of LPC IRQ sometimes doesn't get set correctly.
So we can always blame LPC IRQ when spurious interrupt happens
at the parent interrupt line which LPC IRQ supposed to route
to.
Signed-off-by: Jiaxun Yang <[email protected]>
Co-developed-by: Huacai Chen <[email protected]>
Signed-off-by: Huacai Chen <[email protected]>
Reviewed-by: Marc Zyngier <[email protected]>
Signed-off-by: Thomas Bogendoerfer <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions